diff -Nru libdrm-2.3.0.16/aclocal.m4 libdrm-2.3.1/aclocal.m4 --- libdrm-2.3.0.16/aclocal.m4 2008-05-15 22:47:13.000000000 +0100 +++ libdrm-2.3.1/aclocal.m4 2009-04-20 07:00:29.000000000 +0100 @@ -21,7 +21,7 @@ # libtool.m4 - Configure libtool for the host system. -*-Autoconf-*- -# serial 52 Debian 1.5.26-1ubuntu1 AC_PROG_LIBTOOL +# serial 52 Debian 1.5.26-4 AC_PROG_LIBTOOL # AC_PROVIDE_IFELSE(MACRO-NAME, IF-PROVIDED, IF-NOT-PROVIDED) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/autogen.sh /tmp/5JEwQoyJ2h/libdrm-2.3.1/autogen.sh --- libdrm-2.3.0.16/autogen.sh 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/autogen.sh 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,12 @@ +#! /bin/sh + +srcdir=`dirname $0` +test -z "$srcdir" && srcdir=. + +ORIGDIR=`pwd` +cd $srcdir + +autoreconf -v --install || exit 1 +cd $ORIGDIR || exit $? + +$srcdir/configure --enable-maintainer-mode "$@" diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/autom4te.cache/output.0 /tmp/5JEwQoyJ2h/libdrm-2.3.1/autom4te.cache/output.0 --- libdrm-2.3.0.16/autom4te.cache/output.0 2008-05-15 22:47:13.000000000 +0100 +++ libdrm-2.3.1/autom4te.cache/output.0 1970-01-01 01:00:00.000000000 +0100 @@ -1,22496 +0,0 @@ -@%:@! /bin/sh -@%:@ Guess values for system-dependent variables and create Makefiles. -@%:@ Generated by GNU Autoconf 2.61 for libdrm 2.3.1. -@%:@ -@%:@ Report bugs to . -@%:@ -@%:@ Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, -@%:@ 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. -@%:@ This configure script is free software; the Free Software Foundation -@%:@ gives unlimited permission to copy, distribute and modify it. -## --------------------- ## -## M4sh Initialization. ## -## --------------------- ## - -# Be more Bourne compatible -DUALCASE=1; export DUALCASE # for MKS sh -if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then - emulate sh - NULLCMD=: - # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which - # is contrary to our usage. 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_LT_AC_TAGVAR([old_archive_from_new_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([old_archive_from_expsyms_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([archive_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([archive_expsym_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([module_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([module_expsym_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([predep_objects], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([postdep_objects], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([predeps], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([postdeps], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([compiler_lib_search_dirs], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([compiler_lib_search_path], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([allow_undefined_flag], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([no_undefined_flag], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_action], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_libdir_flag_spec], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_libdir_flag_spec_ld], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_libdir_separator], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_direct], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_minus_L], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_shlibpath_var], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([hardcode_automatic], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([link_all_deplibs], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([always_export_symbols], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([export_symbols_cmds], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([exclude_expsyms], [F77]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([include_expsyms], [F77]) -m4trace:configure.ac:29: -1- AC_LIBTOOL_LANG_GCJ_CONFIG -m4trace:configure.ac:29: -1- _LT_AC_LANG_GCJ_CONFIG([GCJ]) -m4trace:configure.ac:29: -1- _m4_warn([obsolete], [The macro `AC_LANG_SAVE' is obsolete. -You should run autoupdate.], [../../lib/autoconf/lang.m4:167: AC_LANG_SAVE is expanded from... -/usr/share/aclocal/libtool.m4:4189: _LT_AC_LANG_GCJ_CONFIG is expanded from... -/usr/share/aclocal/libtool.m4:4188: AC_LIBTOOL_LANG_GCJ_CONFIG is expanded from... -/usr/share/aclocal/libtool.m4:1920: _LT_AC_TAGCONFIG is expanded from... -/usr/share/aclocal/libtool.m4:80: AC_LIBTOOL_SETUP is expanded from... -/usr/share/aclocal/libtool.m4:60: _AC_PROG_LIBTOOL is expanded from... -/usr/share/aclocal/libtool.m4:25: AC_PROG_LIBTOOL is expanded from... -configure.ac:29: the top level]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([objext], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_SYS_COMPILER -m4trace:configure.ac:29: -1- _LT_COMPILER_BOILERPLATE -m4trace:configure.ac:29: -1- _LT_LINKER_BOILERPLATE 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[GCJ]) -m4trace:configure.ac:29: -1- AC_LIBTOOL_PROG_COMPILER_PIC([GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_can_build_shared], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_wl], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_can_build_shared], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_static], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_can_build_shared], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], [GCJ]) -m4trace:configure.ac:29: -1- _LT_AC_TAGVAR([lt_prog_compiler_pic], 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409d6818eba8a2e2938e0f9281c9318928ba5a35 +Author: Dave Airlie +Date: Tue Jun 3 12:42:49 2008 +1000 + + drm: sg alloc should write back the handle to userspace + (cherry picked from commit d5ae19ebcf2dc6402872e0575b5786b6e8117b6f) + +commit f892b4adf4021e82a7d4f2eb06256d6f4200ed15 +Author: Dave Airlie +Date: Wed May 28 15:31:18 2008 +1000 + + remove include + +commit c28c1cf756979cebb67ffd64bc29ba371f1a9c4b +Author: Dave Airlie +Date: Wed May 28 15:08:08 2008 +1000 + + libdrm: make a branch for libdrm which drops all the TTM apis. + + This will be the next release of libdrm as 2.3.1, Mesa needs to deal with this for 7.1. + +commit 5b86823fa36513f521412a38c240cb18f02dcc9a +Author: Dave Airlie +Date: Wed May 28 11:12:57 2008 +1000 + + radeon: split microcode out into a separate header file. + +commit 0c8a8db1b6c97dd0fad18bd72a1bc56e2a673a10 +Author: Dave Airlie +Date: Wed May 28 10:28:13 2008 +1000 + + i915: fix BSD bh, DRI2 not uses anywhere else + +commit c06096d34fa4afb3f24d610ccfb385f92dbc1e83 +Author: Dave Airlie +Date: Wed May 28 10:02:20 2008 +1000 + + radeon: bump release date/version for r500 3D support + +commit 59c953245c583bb1062d3a8409a9b615a3a19654 +Author: Alex Deucher +Date: Tue May 27 18:33:33 2008 -0400 + + RADEON: add get_param for number of GB pipes + +commit df127c303d944720937fa6b54a8a9f84bc2fe518 +Author: Owain Ainsworth +Date: Tue May 27 15:12:35 2008 -0700 + + [BSD] Move unlock in drm_vm.c from accidental platform #ifdeffing. + + Also remove an unreachable unlock. + +commit cc7ad27fe414cdf87b7561778a766a012541f116 +Author: Owain Ainsworth +Date: Tue May 27 15:11:25 2008 -0700 + + [BSD] Fix lock leak in drm_update_draw malloc failure path. + +commit 9a2ae28fbe0e1e5cce0a5d89fbcc84fbdba1206e +Author: Owain Ainsworth +Date: Tue May 27 15:07:04 2008 -0700 + + [BSD] Fix lock leaks in error paths in drm_bufs.c. + +commit 200ac59573b43abd112d27a1ddda3c124ba9db2a +Author: Owain Ainsworth +Date: Tue May 27 14:59:38 2008 -0700 + + [BSD] Remove superfluous recursive locking in drm_add_magic. + +commit e45f95a03b7242115030a74ab27b142bc5c004c4 +Author: Jie Luo +Date: Tue May 27 14:55:01 2008 -0700 + + [i915] Fix typo in (unused) START_ADDR definition. + +commit 8cd045079e21093437b99cb150b97403e945d2c2 +Author: Robert Noland +Date: Fri May 23 14:36:05 2008 -0400 + + [FreeBSD] Add vblank-rework support and get drivers building. + + The i915 driver now works again. + +commit ad8eb0ed01d96cc16cdafd3b48c0f0cd73d315b4 +Author: Eric Anholt +Date: Tue May 27 14:12:51 2008 -0700 + + [FreeBSD] Convert from drm_device_t to struct drm_device for consistency. + +commit 49075b678fad6c3a5cadd1af67a37332b9255ace +Author: Dave Airlie +Date: Fri May 23 09:39:54 2008 +1000 + + r500: add two more register ranges for mesa driver to setup + +commit 74a9ea896e4c3f4bb3c7195872755ad40da30828 +Author: Dave Airlie +Date: Thu May 15 11:13:03 2008 +1000 + + drm: fix nouveau warning + +commit 91c6c4b2403caca80273e8010e9ced74cf900be3 +Author: Dave Airlie +Date: Wed May 21 20:14:45 2008 +1000 + + rs690/r500: vblank support. + + The new display controller has the vblank interrupts in a different place. + + Add support for vbl interrupts for these chips + +commit 83996561061b99bb490fa0692a491ac9e51245a1 +Author: Dave Airlie +Date: Sat May 17 10:22:12 2008 +1000 + + r500: add more register ranges for Mesa driver + +commit a09c0bbe11004a020d0fac47f7517db55fb91754 +Author: Dave Airlie +Date: Wed May 14 22:48:12 2008 +1000 + + ati_pcigart: oops wrong way around not that it actually mattered + +commit 4c6ec02eb8b1a5723f1a00dc420740d440a9ee0d +Author: Dave Airlie +Date: Wed May 14 22:44:22 2008 +1000 + + ati_pcigart: stop working in the evenings you mess up too often + +commit 2712cdeec319d73187a6cccb06522a4125eef619 +Author: Dave Airlie +Date: Wed May 14 22:43:28 2008 +1000 + + Revert "ati_pcigart: fixup properly this version might even work" + + This reverts commit bc0836e12a9790f1cc83f8bc29bc05043c4bc840. + + tree has some kref hacks in it - oops + +commit bc0836e12a9790f1cc83f8bc29bc05043c4bc840 +Author: Dave Airlie +Date: Wed May 14 22:42:21 2008 +1000 + + ati_pcigart: fixup properly this version might even work + +commit dd1f33f83cbbb9917e13f194fadda4f7066ea98a +Author: Dave Airlie +Date: Wed May 14 22:35:32 2008 +1000 + + ati_pcigart: fill out 40-bit gart table support properly + + Thanks to Alex for supplying this info. + +commit caace3692f3121dcc18fa5e9260ffe1a4abbb943 +Author: Alex Deucher +Date: Tue May 13 21:02:17 2008 -0400 + + RS4xx: separate out RS400 and RS480 IGP chips + + RS400 (intel based IGP) and RS480 (AMD based IGP) have + different MC and GART setups. Currently we only support + RS480. + +commit 10d754f0a2ba2bdda87c243305c8fc46616e965c +Author: Alex Deucher +Date: Mon May 12 14:49:43 2008 -0400 + + RADEON: fix copy/pasto in last commit + +commit 75bc739bee366b8e0520c61c9b9cc10b94524525 +Author: Alex Deucher +Date: Mon May 12 09:44:20 2008 -0400 + + R3/4/5: init pipe setup in drm + + Similar (broken) code in mesa needs to be removed + +commit e16a7101e809aa816463547e0c0284853b0247ed +Author: Alex Deucher +Date: Mon May 12 09:35:06 2008 -0400 + + RADEON: cleanup radeon_do_engine_reset() + +commit 5532b8d2a006451555c4f1309987e62971660cea +Author: Alex Deucher +Date: Mon May 12 09:30:47 2008 -0400 + + R300+: fixup pixcache flush + +commit 3582e82f140cdae947864af8403674e6e117588e +Author: Alex Deucher +Date: Mon May 12 09:24:13 2008 -0400 + + RS4xx: fix MCIND index mask + +commit d26af273f8558c8ee6eca1914b35bfd174129da7 +Author: Alex Deucher +Date: Mon May 12 09:21:45 2008 -0400 + + RADEON: write AGP_BASE_2 on chips that support it + +commit c307e50724c8d0d88b9ac1788de02b8478261967 +Author: Alex Deucher +Date: Mon May 12 09:18:28 2008 -0400 + + R300+: fixup PURGE/FLUSH macros + +commit fb9eaff74712b7b29a7e76209d803fec21c0318c +Author: Alex Deucher +Date: Mon May 12 09:13:44 2008 -0400 + + Radeon IGP: merge RS4xx/RS6xx gart setup + +commit 68b7f550ba140d275c6f9bb26c2186069354be24 +Author: Alex Deucher +Date: Mon May 12 09:00:40 2008 -0400 + + Radeon IGP: wrap MCIND access + + first step in merging rs4xx/rs6xx gart setup + +commit a34025ce227e8755505b483b1a77c4cf5d7fece5 +Author: Alex Deucher +Date: Mon May 12 08:56:11 2008 -0400 + + Radeon IGP: clean up registers and magic numbers + +commit b44f2da380e78769b58c751e81f376f0fa1f48aa +Author: Dave Airlie +Date: Wed May 7 15:10:23 2008 +1000 + + drm: nopage compat fixup for drm_vm + + The kernel has removed nopage so move the old nopage codepaths into a compat vm file and switch to using the fault paths. + + nopfn is on its way out in the future also, so we should switch to using fault + for that path as well soon + +commit d015219bd0b25f367be23e5df8355f479ee53a0f +Author: Dave Airlie +Date: Mon May 5 16:49:04 2008 +1000 + + r500: add allowed range for us config/pixsize + +commit 3ac74f3208ed15a990a0a26742fbfe566f08aa80 +Author: Ben Skeggs +Date: Fri May 2 01:36:30 2008 +1000 + + nv50: enable 0x400500 bit 0 after PGRAPH exception also + + No solid idea about what these 2 bits do, but nv50 can now survive a few + PGRAPH exceptions just as nv40 does :) + +commit 6d8062ac1e048c3643d3a9d2432e497e17f717de +Author: Ben Skeggs +Date: Fri May 2 01:03:51 2008 +1000 + + nouveau: guard against channels potentially not having a context, fix nv50 + +commit 77d20928b330acda5b6ceb469f50757b5300702b +Author: Ben Skeggs +Date: Fri May 2 00:53:42 2008 +1000 + + nouveau: disable all card interrupts when unknown PFIFO IRQ occurs. + + This is possibly temporary. I can trigger an unending IRQ storm on G8x + in some circumstances, and have no idea how to handle that particular PFIFO + exception correctly yet. + +commit 5c4c778c0d7d3f4749efade3b1023b8b22c029a9 +Author: Ben Skeggs +Date: Fri May 2 00:52:21 2008 +1000 + + nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler + + Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ + occurs during channel creation/takedown. + +commit bfbe4ade3253330bd0c625d50fa2e7b5cb62dada +Author: Ben Skeggs +Date: Fri May 2 00:50:21 2008 +1000 + + nouveau: gather nsource in trap_info() + + The IRQ handling stuff really is a mess.. On the TODO :) + +commit e317dfdabfb836165fbe3b006e53a88a1bc7c264 +Author: Ben Skeggs +Date: Fri May 2 00:06:22 2008 +1000 + + nv50: PGRAPH exception handling completely different from earlier chips + +commit b92efd59565b9c63734b762b9d2be46447309007 +Author: Ben Skeggs +Date: Thu May 1 23:47:42 2008 +1000 + + nv50: I cave... Add nv84 initial context values. + + I swore I'd actually do this properly and not go the horrible route + we did with nv4x, but I won't get around to it just yet with so many + *actually* interesting things to do first.. One day. + + Since someone already added nv86, why not! + +commit cb33133ef354b77a8cf06b16ce95a0babbe8bc6f +Author: Jesse Barnes +Date: Tue Apr 29 12:36:04 2008 -0700 + + i915: fix off by one in VGA save/restore of AR & CR regs + + Turns out it's important to save/restore AR14 in particular. + +commit f31e04a96013c059fc90c98a878de14adbea524a +Author: Maarten Maathuis +Date: Tue Apr 29 19:34:22 2008 +0200 + + nouveau: NV9x cards exist as well. + +commit 7f8e4060859651993921281445ec00940c577222 +Author: Jesse Barnes +Date: Sun Apr 27 09:42:17 2008 -0700 + + Use fixed sized types in new ioctls + + Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat + issues. + +commit b45fe49bcd989be4e1327c13dd734410b395761c +Author: Jesse Barnes +Date: Sat Apr 26 17:11:18 2008 -0700 + + Enum-ectomy of vblank modesetting ioctl + + Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this. + +commit 10b9a116a7b7fe3acf0848de9e0cf40f8e1bcd75 +Author: Thomas Hellstrom +Date: Wed Apr 23 17:33:09 2008 +0200 + + Don't disable IRQs, just tasklets, when taking the drm lock spinlock. + +commit 9ba3aaaa1a22663ec3d8d9d1792edf10a25d0ad7 +Author: Jakob Bornecrantz +Date: Wed Apr 23 12:43:30 2008 +0200 + + Fixed unlock check on EAGAIN + +commit feff72929e94b6c17e352a2ec86b3440b9edf059 +Author: Xiang, Haihao +Date: Wed Apr 23 17:17:16 2008 +0800 + + i915: fix for compatibility mode + +commit b3967765c082c4fae1954ec70474fb428ef42c70 +Author: Pekka Paalanen +Date: Sun Apr 20 20:47:38 2008 +0300 + + linux-core Makefile: add GIT_REVISION + + This tries to automatically fetch a git revision string and if succeeds, + it #defines GIT_REVISION string macro. Packagers can override it by + 'make GIT_REVISION=foo'. + + Update Nouveau to use GIT_REVISION, if defined, instead of DRIVER_DATE + in struct drm_driver. + + Signed-off-by: Pekka Paalanen + +commit ce8c8425185cfe0390230b7b537f2e0514c721c6 +Author: Dave Airlie +Date: Tue Apr 22 16:08:17 2008 +1000 + + i915: gfx hw and i945gme fixes from upstream + + From Jesse and Zhenyu originally. + +commit f0e38f521790becbf9ca13ef5c579d12c6985d52 +Author: Keith Packard +Date: Sun Apr 20 16:10:05 2008 -0700 + + [I915] Handle tiled buffers in vblank tasklet + + The vblank tasklet update code must build 2D blt commands with the + appropriate tiled flags. + +commit 21dbba5a227e20dd64ce300cc78927e139a684dd +Author: Keith Packard +Date: Sun Apr 20 01:55:57 2008 -0700 + + On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank + + The batchbuffer submission paths were fixed to use the 965-specific command, + but the vblank tasklet was not. When the older version is sent, the 965 will + lock up. + +commit 1ad1bd5bd95db71500edfcea8b46421d7f3cdb15 +Author: Thomas Hellstrom +Date: Mon Apr 14 13:52:33 2008 +0200 + + Fix buffer object map wait error. + Add some branch prediction hints. + +commit c5955c652302d66719984cb5a218cb590c74ad42 +Author: Thomas Hellstrom +Date: Mon Apr 14 12:10:50 2008 +0200 + + Fix buffer object creation validation. + + BO lock fixes. + +commit c9b73ef6daff75df27d17260a9fc84e68f1b21b4 +Author: Thomas Hellstrom +Date: Sun Apr 13 14:49:14 2008 +0200 + + Unlock the BO mutex while waiting for idle, unmapped, unfenced. + + Move unfenced checking into idle checking. + Never time out while waiting for software events like unmapped or unfenced. + +commit 65dd0e68ff0e0e354925adb7d5fffeb0ffbb485c +Author: Thomas Hellstrom +Date: Fri Apr 11 09:36:12 2008 +0200 + + Fix up buffer manager locking. + +commit b986d7d2c9090fc62c1853f62886dd124e8066c1 +Author: Keith Packard +Date: Thu Mar 27 11:40:04 2008 -0700 + + Save and restore dsparb and d_state regs + +commit db61f02bd7e4b9d5ac416f1ef98bac1bd4d984bc +Author: Patrice Mandin +Date: Mon Apr 7 22:24:24 2008 +0200 + + Missing KERNEL_VERSION macro + +commit 27c3785d3f12743a9e160238a4d00353060ec2f2 +Author: Hasso Tepper +Date: Mon Apr 7 15:27:43 2008 +0300 + + Add DragonFly BSD support for device creation + + DragonFly behaves just like FreeBSD in this regard. + +commit dfa9f0399223d86a6478bf93be879da476f93eda +Author: Ben Skeggs +Date: Mon Apr 7 13:29:11 2008 +1000 + + nouveau: enable accelerated move to sysmem + +commit c12b60b5094fe97db60cd0f18fafd1720679bd38 +Author: Ben Skeggs +Date: Mon Apr 7 13:05:51 2008 +1000 + + nouveau: enable m2mf for tt<->vram moves, fix fence_poll + +commit e89710bef7691e4e9d0bc7d427542bfae6ce4258 +Author: Thomas Hellstrom +Date: Sun Apr 6 11:21:22 2008 +0200 + + Place highmem pages last in the ttm page array. + +commit c3888b97f60fbbc0b1382e5a16689eecaa2f79a5 +Author: Thomas Hellstrom +Date: Sun Apr 6 10:32:02 2008 +0200 + + Use clflush() when available for cache flushing. + +commit 51a0fdcf3fef5af57938d9958efd698e96d78803 +Author: Thomas Hellstrom +Date: Sun Apr 6 09:46:29 2008 +0200 + + [I915] Fix VRAM eviction. + +commit 87ae5b22e3120d205f520a99cea31743903d49a2 +Author: Thomas Hellstrom +Date: Sun Apr 6 09:33:50 2008 +0200 + + Fix emergency allocation accounting. + +commit 1692d30cea263a084bfea824cd8638000e97bc57 +Author: Maarten Maathuis +Date: Sat Apr 5 21:02:00 2008 +0200 + + nv50: primitive i2c interrupt handler + +commit 3fc444a5e8e35ffec7a1426c80c9644e5777ddbe +Author: Maarten Maathuis +Date: Thu Apr 3 01:13:31 2008 +0200 + + nv50: primitive display interrupt handler. + +commit 562f95ea96f08e1d73a872dc87237614292c873a +Author: Dave Airlie +Date: Mon Mar 31 11:34:48 2008 +1000 + + nouveau: fix return from function.. + + dude kernel moduless use kernel errors :) + + this fixes an oops on init when this codepath hits. + +commit 22d931f9664e1857e07ce7ab8aad760a4a22f15e +Author: Thomas Hellstrom +Date: Sun Mar 30 21:30:43 2008 +0200 + + Initialize the fence::error member. + +commit 1f4ba62567d32fdd32786273326e1aab17d5d412 +Author: Thomas Hellstrom +Date: Sun Mar 30 15:14:45 2008 +0200 + + [i915] Report buffer state _after_ fence submission to user-space. + This fixes a problem where the wrong bo->fence_type was reported, and + also saves some memory space. + [bo core] export the drm_bo_fill_rep_arg function. + +commit b8567bafff58cfb9d77145088fd5b8ad2e5cde6b +Author: Thomas Hellström +Date: Thu Mar 6 17:35:56 2008 +0100 + + Don't call fence::poll during irq if there are no waiters. + +commit cf3c0123a038a825d478fa10e29cd7490bab369e +Author: Maarten Maathuis +Date: Sun Mar 30 14:50:41 2008 +0200 + + nouveau: forgot to add a break + +commit 68b83a88135cd236be220dafde65c877e396eb0d +Author: Maarten Maathuis +Date: Sun Mar 30 14:46:45 2008 +0200 + + nouveau: Add ctx values for nv86. + + - Note that this may not work for all nv86. + +commit 753a4bdf1b554490f7b288c0203050b5114433c3 +Author: Dave Airlie +Date: Sun Mar 30 07:33:39 2008 +1000 + + drm/r300: fix wait interface mixup + + This interface was defined completely wrong, however userspace has only + ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use + it properly. + +commit 1674d2817929fe4ee4e1c4762e89600119dbdc50 +Author: Oliver McFadden +Date: Sat Mar 29 17:25:44 2008 +0000 + + r300: Correctly translate the value for the R300_CMD_WAIT command. + + Previously, the R300_CMD_WAIT command would write the passed directly to the + hardware. However this is incorrect because the R300_WAIT_* values used are + internal interface values that do not map directly to the hardware. + + The new function I have added translates the R300_WAIT_* values into appropriate + values for the hardware before writing the register. + + Thanks to John Bridgman for pointing this out. :-) + +commit a81d07f64d7557da3c4888867a20d2eec94b4ec1 +Author: Stuart Bennett +Date: Tue Mar 25 18:30:05 2008 +0000 + + nouveau: nv20 bios does not initialise PTIMER + + The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw + +commit b0817a42e789a83454e6acba0578116829e2bf51 +Author: Dave Airlie +Date: Mon Mar 24 18:52:26 2008 +1000 + + i915: fix oops on agp=off + + Kernel bug 10289. + +commit 4323ee3e5b263a1dc8cfdf72485a20a3c1d8f144 +Merge: a244d29... 36e11dd... +Author: Dave Airlie +Date: Mon Mar 24 18:47:50 2008 +1000 + + Merge branch 'r500-fp' + +commit a244d2905052d3263bdcc26b295558a354702b89 +Author: Ben Skeggs +Date: Mon Mar 24 03:22:42 2008 +1100 + + nouveau: silence warning + +commit 24ba0c9c3bd0f160eb0c3a820fd407998f85fd55 +Author: Ben Skeggs +Date: Mon Mar 24 03:20:59 2008 +1100 + + nv40: voodoo - not quite. + +commit 6f4b3de284e93e8fdb133f0aadfc86d298f45916 +Author: Ben Skeggs +Date: Mon Mar 24 03:13:05 2008 +1100 + + nv40: allocate massive amount of PRAMIN for grctx on all chipsets. + + More or less a workaround for issues on some chipsets where a context + switch results in critical data in PRAMIN being overwritten by the GPU. + + The correct fix is known, but may take some time before it's a feasible + option. + +commit 36e11dd3801734ff5af9f5edb7aa698f0e2c49c2 +Author: Dave Airlie +Date: Fri Mar 21 16:59:52 2008 +1000 + + r500: fragment program upload is also used to upload constants. + + Limit frag address to 8 bits + +commit 316979356f05796c5bd5a47dfc29fe48d6874b49 +Author: Dave Airlie +Date: Thu Mar 20 14:20:53 2008 +1000 + + drm: fixup r500fp submission + +commit 1021799b6ca6b195ad2d5f002e45668f69c44651 +Author: Stuart Bennett +Date: Tue Mar 18 23:12:28 2008 +0000 + + nouveau: do not set on-board timer's numerator/denominator to bad values + +commit 9e4f9082872838084a3c4f9661d65c12768d3dc4 +Author: Alex Deucher +Date: Wed Mar 19 15:37:56 2008 -0400 + + RADEON: switch over to new production microcode + + This needs to be tested thoroughly before pushing to the + kernel. + +commit d8af16d2a75f38dacb9b87a4b317790c88c6ba40 +Author: Alex Deucher +Date: Wed Mar 19 14:57:42 2008 -0400 + + RADEON: production microcode for all radeons, r1xx-r6xx + + This updated microcode is not in use yet. + +commit a3c808d8feff9dc379f71f971ca20ec3c686b0c0 +Author: Dave Airlie +Date: Wed Mar 19 16:10:37 2008 +1000 + + move some more r300 regs into not allowed on r500 + +commit d18c2c684229ec6923e1a578ae837f34e6b97422 +Author: Dave Airlie +Date: Tue Mar 18 09:07:45 2008 +1000 + + drm: add new rs690 pci id + +commit 602800a280ecaf562427eada19b118b990ab26e1 +Author: Thomas Hellstrom +Date: Mon Mar 17 11:37:10 2008 +0100 + + Evict cached_mapped relocatee before applying reloc. + + Fix that got left out after the intel-post-reloc merge. + +commit 3add9494037e7c88b5e5a476001176784d743a26 +Author: Dave Airlie +Date: Mon Mar 17 11:08:03 2008 +1000 + + initial r500 RS and FP register and upload code + +commit 1f96e9a98245b18c99cc6a7e66372a076b9abf6b +Author: Dave Airlie +Date: Mon Mar 17 07:05:46 2008 +1000 + + drm/pcigart: fix the pci gart to use the drm_pci wrapper. + + This is the correct fix for the RS690 and hopefully the dma coherent work. + + For now we limit everybody to a 32-bit DMA mask but it is possible for + RS690 to use a 40-bit DMA mask for the GART table itself, + and the PCIE cards can use 40-bits for the table entries. + + Signed-off-by: Dave Airlie + +commit 1a2d8c4bfa96dd176ec084811ad286f95968ee52 +Author: Thomas Hellstrom +Date: Sun Mar 16 20:07:14 2008 +0100 + + Avoid unnecessary waits for command regulator pause. + +commit 3a3a9485aadced820f7619ef7f2a11e72782769f +Author: Thomas Hellstrom +Date: Sun Mar 16 11:44:35 2008 +0100 + + [via] Remove some leftover vars. + +commit b81d7b3b8d7ca83a9b79d2dbea22f00e78180516 +Author: Thomas Hellstrom +Date: Sun Mar 16 11:39:18 2008 +0100 + + [via] Allow a little larger stride for SG DMA DownloadFromScreen. + +commit 7d3d15e67de27f7c47859f36bb55002f0c9d52d6 +Author: Thomas Hellstrom +Date: Sun Mar 16 11:37:17 2008 +0100 + + [via] The millionth fixup for the millionth-1 attempt to stabilize the AGP + DMA command submission. It's worth remembering that all new bright ideas on how + to make this command reader work properly and according to docs + will probably fail :( Bring in some old code. + +commit 563fe9dcd4d08de8864ade161258df891f3db471 +Author: Thomas Hellstrom +Date: Sun Mar 16 11:29:57 2008 +0100 + + [via] Fix driver after vblank-rework merge. + +commit afa803ee40c1d06066f58a34761be58ba03badb5 +Author: Dave Airlie +Date: Sun Mar 16 15:01:27 2008 +1000 + + ati: fix rs690 igp gart by allocating the page table in 32-bit memory + +commit 5b1d9263d3c108be7360ccd3aeed4cc3a0bf1ada +Author: Dave Airlie +Date: Sun Mar 16 14:00:16 2008 +1000 + + drm/rs690: set AGP_BASE_2 to 0 + +commit dd9eb923edd15284113dc12c05fb341ad60f1b46 +Author: Dave Airlie +Date: Sun Mar 16 12:58:07 2008 +1000 + + drm: set rs690 gart base completly. + + The docs state bits 4-11 represent bits 32-39 of a 40-bit address + +commit 76946ed83df2e39e3867538e54dc743fecb4f8e8 +Author: Dave Airlie +Date: Sun Mar 16 12:56:11 2008 +1000 + + drm: this u32 should be a dma_addr_t + + doesn't fix anything but just making it consistent + +commit 1ea8a470fe9103036817ae3a960522c37901bddc +Author: Alan Hourihane +Date: Fri Mar 14 00:25:42 2008 +0000 + + fix build problems + +commit ae1bb96a7e24362500e02cf3a86bd268c2dcc835 +Author: Mike Isely +Date: Fri Mar 14 09:53:05 2008 +1000 + + drm: Fix race that can lockup the kernel + + The i915_vblank_swap() function schedules an automatic buffer swap + upon receipt of the vertical sync interrupt. Such an operation is + lengthy so it can't be allowed to happen in normal interrupt context, + thus the DRM implements this by scheduling the work in a kernel + softirq-scheduled tasklet. In order for the buffer swap to work + safely, the DRM's central lock must be taken, via a call to + drm_lock_take() located in drivers/char/drm/drm_irq.c within the + function drm_locked_tasklet_func(). The lock-taking logic uses a + non-interrupt-blocking spinlock to implement the manipulations needed + to take the lock. This semantic would be safe if all attempts to use + the spinlock only happen from process context. However this buffer + swap happens from softirq context which is really a form of interrupt + context. Thus we have an unsafe situation, in that + drm_locked_tasklet_func() can block on a spinlock already taken by a + thread in process context which will never get scheduled again because + of the blocked softirq tasklet. This wedges the kernel hard. + + To trigger this bug, run a dual-head cloned mode configuration which + uses the i915 drm, then execute an opengl application which + synchronizes buffer swaps against the vertical sync interrupt. In my + testing, a lockup always results after running anywhere from 5 minutes + to an hour and a half. I believe dual-head is needed to really + trigger the problem because then the vertical sync interrupt handling + is no longer predictable (due to being interrupt-sourced from two + different heads running at different speeds). This raises the + probability of the tasklet trying to run while the userspace DRI is + doing things to the GPU (and manipulating the DRM lock). + + The fix is to change the relevant spinlock semantics to be the + interrupt-blocking form. After this change I am no longer able to + trigger the lockup; the longest test run so far was 20 hours (test + stopped after that point). + + Note: I have examined the places where this spinlock is being + employed; all are reasonably short bounded sequences and should be + suitable for interrupts being blocked without impacting overall kernel + interrupt response latency. + + Signed-off-by: Mike Isely + +commit 9be916f3537599489e083437c9a948eb93004904 +Author: Alex Deucher +Date: Wed Mar 12 11:16:12 2008 -0400 + + Fix chip family for RV550 + +commit 1766e1c07b03c6ccf545469663334be762c0bddf +Author: Ben Skeggs +Date: Wed Mar 12 23:37:29 2008 +1100 + + nv50: force channel vram access through vm + + If we ever want to be able to use the 3D engine we have no choice. It + appears that the tiling setup (required for 3D on G8x) is in the page tables. + + The immediate benefit of this change however is that it's now not possible + for a client to use the GPU to render over the top of important engine setup + tables, which also live in VRAM. + + G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping + of real vram pages to their offset within the start of a channel's VRAM + DMA object and only populate a single PDE for VRAM use. + +commit 88bd1e4a350d011ec44f6786e0bfdf8fb386800c +Merge: 2a618e5... 612c22f... +Author: Thomas Hellstrom +Date: Wed Mar 12 11:34:29 2008 +0100 + + Merge branch 'intel-post-reloc' + + Conflicts: + + linux-core/drm_compat.c + linux-core/drm_compat.h + linux-core/drm_ttm.c + shared-core/i915_dma.c + + Bump driver minor to 13 due to introduction of new + relocation type. + +commit 2a618e5a7f6d26fe85e7d931d0ef08d9f18b1b7c +Author: Thomas Hellstrom +Date: Wed Mar 12 10:36:40 2008 +0100 + + Bug # 14712 + Disable page saving for GPU read-only TTMs. + +commit 5bebcd7a0b548b29a9859b2949b06662968cc868 +Author: Thomas Hellstrom +Date: Wed Mar 12 10:19:36 2008 +0100 + + Dont allow !sysadmin clients to alter the memory type of + NO_EVICT buffers. + +commit 88be276a427124cc545a7d89b137e4ae6dd79acb +Author: Alan Hourihane +Date: Thu Jan 17 13:04:42 2008 +0000 + + Fix for debug memory routines + +commit 32625774072f905d15024cc40ce7fd364d9ee4cd +Author: Alan Hourihane +Date: Thu Jan 17 13:04:23 2008 +0000 + + Add error message + +commit c0a1cd052ac44d1b342fa3f26afe1bd21d92b194 +Author: Thomas Hellstrom +Date: Thu Jan 17 13:10:36 2008 +0100 + + Add an emergency pinnable memory quota for root-only processes. + +commit 7bcce66a1d5c93ff9b9f20d45d5b2c33c8ca8da9 +Author: Thomas Hellstrom +Date: Wed Mar 12 10:07:56 2008 +0100 + + Fix kernel crash when we hit OOM conditions. + (Alan Hourihane) + +commit f1a681ebe5573c2ec7806ba4cb754314baef6935 +Author: Thomas Hellstrom +Date: Wed Mar 12 10:02:09 2008 +0100 + + Avoid duplicate calls to drm_ttm_bind in some cases. + +commit fa1d88e3b2de843f33c9d77c9d95db762a950a14 +Author: Thomas Hellstrom +Date: Wed Mar 12 09:56:06 2008 +0100 + + Make sure other TTM memory types than TT is really unbound when evicted. + +commit 8a18d123f55a7fb11ce333f0b1095020918b8616 +Author: Thomas Hellstrom +Date: Thu Feb 28 09:08:52 2008 +0100 + + Avoid large kmallocs. + +commit f13936f7fc4d4932d5c511ccec29f1c4d24dc2dc +Author: Stuart Bennett +Date: Tue Mar 11 00:33:58 2008 +0000 + + nouveau: move AGP reset to mem_init_agp + + Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25 + +commit 07ba3b7193f1a50c3ef0509f9e37dab41457f81b +Author: Dave Airlie +Date: Mon Mar 10 18:30:17 2008 +1000 + + remove unneeded load call + +commit 2848f048616c2c97f02701386ee73137a1307e2c +Author: Keith Packard +Date: Thu Jan 24 11:46:45 2008 -0800 + + Switch from PIPE_VBLANK to PIPE_EVENT interrupts. + + My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt. + Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT + registers to use START_VBLANK on 965 and VBLANK on previous chips. + +commit ce3733572e4eea6d9adb167d8fccac745455445b +Author: Dave Airlie +Date: Sat Mar 8 08:30:03 2008 +1000 + + drm/radeon: check sarea_priv exists + +commit 1ccccbd4ce3463edb459eb193feb572938fce19e +Author: Ben Skeggs +Date: Fri Mar 7 15:08:59 2008 +1100 + + nouveau: redo channel idle detection + + Will hopefully work a bit better than previous code, which depended on + knowing the channel's most recent PUT value. Some chips always return + 0 on reading these regs, and currently userspace is the only other entity + which knows the value. + +commit cd924de02927a091c517b0ac6b9cd8f065ce448c +Author: Ben Skeggs +Date: Fri Mar 7 14:38:05 2008 +1100 + + nouveau: don't touch NV_USER regs on channel destroy. + + Not only was this entirely pointless, it actually causes my NV30GL to + die randomly when channels are destroyed. + +commit 2540ea7dc6c0c4f0ebca3370d6ec7359e4276e13 +Author: Dave Airlie +Date: Fri Mar 7 09:29:35 2008 +1000 + + flush_agp_mappings commit + +commit 92a30dd608c2838dea97efc04e1447056f37d0b5 +Author: Dave Airlie +Date: Thu Mar 6 14:43:23 2008 +1000 + + drm/bo: allow non-suser priv to add kernel BOs. + + modprobe can be run with dropped capabilities we still want the kernel bos + to work. + +commit a875821f7b19a1bcee238cef5c3b507d2869542d +Author: Benjamin Herrenschmidt +Date: Wed Mar 5 19:25:03 2008 +1000 + + drm: Fix for non-coherent DMA PowerPC + + This patch fixes bits of the DRM so to make the radeon DRI work on + non-cache coherent PCI DMA variants of the PowerPC processors. + + It moves the few places that needs change to wrappers to that + other architectures with similar issues can easily add their + own changes to those wrappers, at least until we have more useful + generic kernel API. + + Signed-off-by: Benjamin Herrenschmidt + +commit d5c0101252e9f48ef1b59f48c05fea7007df97f0 +Author: Dave Airlie +Date: Mon Feb 18 10:39:21 2008 +1000 + + ttm: make sure userspace can't destroy kernel create memory managers + + this adds something to say the kernel initialised the memory region not + the userspace. and blocks userspace from deallocating kernel areas + +commit 180c9188f4cb7163f1e3e7d5098eaabf29a98540 +Author: Dave Airlie +Date: Wed Feb 20 13:27:10 2008 +1000 + + drm/ttm: add ioctl to get back memory managed area sized + + taken from modesetting branch but could be useful outside it. + +commit 12574590cdf7871755d1939463ca6898251fd0d1 +Author: Dave Airlie +Date: Thu Mar 6 05:21:50 2008 +1000 + + drm: reorganise minor number handling using code from modesetting branch + + Rip out the whole head thing and replace it with an idr and drm_minor + structure. + +commit 638353103d009d44bd5bdbe97cc7cef1bf011cdf +Author: Xiang, Haihao +Date: Wed Mar 5 15:08:46 2008 +0800 + + i915: Evict if relocatee buffer is CACHED_MAPPED before + writting relocations, otherwise the GPU probably sees some + inconsistent data. Fix fd.o bug#14656 + +commit a6a2f2c8c491617de702dc7d62bb55cbada4d42b +Author: Eric Anholt +Date: Tue Mar 4 13:45:41 2008 -0800 + + Clarify when WAIT_LAZY is relevant to users. + +commit 3332a0add63162222bd9c829117cd7e30d981aa7 +Author: Eric Anholt +Date: Wed Jan 30 19:02:56 2008 -0800 + + Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS. + +commit d41846adb72ba89c94ea1164e366032b1d36bd55 +Author: Eric Anholt +Date: Tue Mar 4 13:35:23 2008 -0800 + + Clarify through the names what drm_ttm_alloc_pages() and friend actually did. + + These are all about the page directory (pointers to pages) rather than the + actual pages backing the allocation. + +commit eedf3fa2f08eb774a36109c2fbda7207bf83fbe9 +Author: Eric Anholt +Date: Tue Mar 4 12:16:51 2008 -0800 + + Don't shortcut the info syscall for drmBOBusy on nonshareable objects. + + This broke the results when you're trying to check if a buffer you dispatched + some time ago is done being rendered from. + +commit 63fd6f284ddd1096d34b39941683ae244c1e01fc +Author: Zou Nan hai +Date: Mon Mar 3 14:49:49 2008 +0800 + + [i915] 2D driver may reset Frame count value, this may lead driver + to leap it's vblank count a huge value. + This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc. + +commit 09999c90ab1bf3f7d8b277895c962c8a7b3afc18 +Author: Patrice Mandin +Date: Fri Feb 29 21:57:40 2008 +0100 + + FIX_KMAP_BEGIN requires CONFIG_HIMEM (see include/asm-i386.h/fixmap.h) + +commit 612c22f131a25915196e69d7ec1adb6f4ec84a60 +Author: Thomas Hellstrom +Date: Fri Feb 29 15:38:55 2008 +0100 + + Working revision. + +commit 1d068973d5f5e6d8d14b4c0c6e28588107aafc6f +Author: Thomas Hellstrom +Date: Fri Feb 29 13:31:14 2008 +0100 + + Fix compilation breakage on x86-64. + +commit 2305100c0fce9ec86a22660e5fed54791cff030b +Author: Thomas Hellstrom +Date: Fri Feb 29 13:25:55 2008 +0100 + + More post-ioctl work. + +commit cdbd616ea5f0ee491ff82cac74b918a14b039917 +Author: Dave Airlie +Date: Fri Feb 29 10:16:24 2008 +1000 + + agp: export the correct symbol + +commit 8ef838e5ff7b3c005d7fbc725e17bcccd0e1e1eb +Author: Thomas Hellstrom +Date: Thu Feb 28 13:47:15 2008 +0100 + + Add a compat kmap_atomic_prot_pfn to do quick kernel map / unmaps of + + PCI- or high memory. + This is substantially more efficient than drm_bo_kmap, + since the mapping only lives on a single processor. + Unmapping is done use kunmap_atomic(). Flushes only a single tlb() entry. + + Add a support utility int drm_bo_pfn_prot() that returns the + pfn and desired page protection for a given bo offset. + + This is all intended for relocations in bound TTMS or vram. + Mapping-accessing-unmapping must be atomic, either using preempt_xx() macros + or a spinlock. + +commit 28d4d02d6791c15f61b718039f1d4b907f0e31e9 +Author: Thomas Hellstrom +Date: Thu Feb 28 14:05:53 2008 +0100 + + Initial commit. + +commit 40c9e6a26dd251fe2bf207bb259ba7e4a7704fbe +Author: Thomas Hellstrom +Date: Thu Feb 28 13:47:15 2008 +0100 + + Add a compat kmap_atomic_prot_pfn to do quick kernel map / unmaps of + PCI- or high memory. + This is substantially more efficient than drm_bo_kmap, + since the mapping only lives on a single processor. + Unmapping is done use kunmap_atomic(). Flushes only a single tlb() entry. + + Add a support utility int drm_bo_pfn_prot() that returns the + pfn and desired page protection for a given bo offset. + + This is all intended for relocations in bound TTMS or vram. + Mapping-accessing-unmapping must be atomic, either using preempt_xx() macros + or a spinlock. + +commit fd595fa4dc6f788a8a1e1b56178e15f411706cb9 +Author: Thomas Hellstrom +Date: Wed Feb 27 21:44:40 2008 +0100 + + Reinstate buffer idle before applying relocations. + +commit 72983ff30183745cd96760aa07b857c44daebde7 +Author: Thomas Hellstrom +Date: Wed Feb 27 19:46:28 2008 +0100 + + Don't wait for buffer idle before applying relocations. + +commit e87cec19687089f9f268ec0eb81b57e6fb8de6a9 +Author: Thomas Hellstrom +Date: Tue Feb 26 10:47:05 2008 +0100 + + [i915] Relocation fixes. + +commit 56bb29cf37c27b283efcd1a32d3583393e5208ea +Author: Thomas Hellstrom +Date: Tue Feb 26 00:01:09 2008 +0100 + + Make the execbuffer code reasonably safe against errors. + + In particular -EAGAINs, which should be common during Xserver operation. + Also handle the fence creation failure case. + +commit d6098db1409e8ee45052920d3acdd3b6f2cb80aa +Author: Roland Scheidegger +Date: Sat Feb 23 11:01:36 2008 +0100 + + fix texture uploads with large 3d textures (bug 13980) + + Texture uploads could hit the blitter coordinate limit, adjust the texture + offset when uploading the pieces. Make sure to check the end address of the + upload too. + +commit 20d0e539160fcbdd65ecbe188ac1ce2800af1b5c +Author: Jesse Barnes +Date: Fri Feb 22 13:57:38 2008 -0800 + + i915: put ARX back into index mode before doing restore + + Fixes resume from hibernate in some configurations. + +commit 0d32015974f019e8d2ea1eb48acd9e082389d9c5 +Author: Maarten Maathuis +Date: Fri Feb 22 13:41:05 2008 +0100 + + nouveau: Remove some random (french) comment. + +commit 7e5f9c8bd33c503fef9bea20b955a5a48e255621 +Author: Maarten Maathuis +Date: Fri Feb 22 13:35:13 2008 +0100 + + nouveau: A single define of dma skips is more than enough. + +commit b7086e6ae5632ad3c0f7c54ffd641519959d84a6 +Author: Kristian Høgsberg +Date: Fri Feb 22 11:22:52 2008 -0500 + + Fix one last occurance of struct _drm_i915_batchbuffer. + + Thanks to Todd Merrill for pointing it out. + +commit b0fee67a305cf37cf2a71d6c3753fba825400b71 +Author: Kristian Høgsberg +Date: Fri Feb 22 00:12:39 2008 -0500 + + i915: Remove leading underscore from struct tags. + + This matches the changes in mesa to use the system drm includes + for the definitions of the drm ioctl structs. + +commit 32c67922b722e375268789600cd89b80749e7a71 +Author: Kristian Høgsberg +Date: Thu Feb 21 15:31:48 2008 -0500 + + Don't free irq resources until after we've unregistered the handler. + +commit 374b41e5bcdb5c22471c8c16dd794ac54c4f76d2 +Author: Michel Dänzer +Date: Thu Feb 21 11:49:38 2008 +0100 + + linux: Clean up vblank related resources from drm_irq_uninstall(). + + This fixes at least two problems: + + * The vblank_disable_fn timer callback could get called after the DRM was + de-initialized, e.g. on X server shutdown. + * Leak of vblank related resources when disabling and re-enabling the IRQ, e.g. + on an X server reset. + +commit 9d1061b8cfaf91bff6b55398c6059be97c2e0165 +Author: Alan Hourihane +Date: Wed Feb 20 22:22:49 2008 +0000 + + fix SAREA + +commit 6c41e5381fb8ea890943b6679fe6ae7ac4cfea4d +Author: Dave Airlie +Date: Wed Feb 20 10:02:20 2008 +1000 + + drm: add support for passing state into the suspend hooks. + + fix i915 driver to use state for hibernate save avoidance. + + Signed-off-by: Dave Airlie + +commit 5d8c754bc2c720d70bbdeca6b294660105717a62 +Author: Keith Packard +Date: Sat Feb 16 19:19:29 2008 -0800 + + [915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE) + + Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on + the VGA output on my HP 2510p after resume. + +commit cd87e6352bf529ae0bc57e8434ddfccec3660d9a +Author: Stephane Marchesin +Date: Sat Feb 16 03:50:10 2008 +0100 + + nouveau: no GART on ia64 either. + +commit 15cbde683f5006b541b22c41ff840aefb017ff8e +Author: Ben Skeggs +Date: Sat Feb 16 04:33:27 2008 +1100 + + nv40: actually init all tile regs. + +commit 373dbcf8b25750967e9ba24433cff872df41cb74 +Author: Kristian Høgsberg +Date: Tue Feb 5 13:27:16 2008 -0500 + + i915: Add a dri2 init path that gets the lock from the dri2 sarea. + +commit db3f03ae3538bea3d29ef66ac24d9a1f54cff418 +Author: Kristian Høgsberg +Date: Tue Feb 12 16:08:18 2008 -0500 + + i915: Only look up dev_priv->mmio_map if it's not already set up + +commit ee15459483d50b2efe630051b45f36cfbb351683 +Author: Kristian Høgsberg +Date: Tue Feb 5 12:27:48 2008 -0500 + + i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID. + +commit 4feb0638f1a8eb8527647ff47312ee61e3f683f9 +Author: Kristian Høgsberg +Date: Tue Feb 5 12:25:22 2008 -0500 + + i915: Make sarea_priv setup optional. + +commit d63b57749f097b36df04c6beff9b35a1dd859523 +Author: Jesse Barnes +Date: Thu Feb 7 17:33:28 2008 -0800 + + Restore pipeconf regs unconditionally + + On many chipsets, the checks for DPLL enable or VGA mode will prevent the + pipeconf regs from being restored, which could result in a blank display or X + failing to come back after resume. So restore them unconditionally along with + actually restoring pipe B's palette correctly. + +commit 6f19473191ae543fcc199d252c5865c0734d38ad +Author: Jesse Barnes +Date: Thu Feb 7 11:21:09 2008 -0800 + + Fix saveGR array size + + Make sure we have enough room for all the GR registers or we'll end up + clobbering the AR index register (which should actually be harmless + unless the BIOS is making an assumption about it). + +commit 8b6c96dedd4ba5dfbfec6a7c831d566e31d28781 +Author: Jesse Barnes +Date: Thu Feb 7 10:48:08 2008 -0800 + + i915: save/restore interrupt state + + On resume, if the interrupt state isn't restored correctly, we may end + up with a flood of unexpected or ill-timed interrupts, which could cause + the kernel to disable the interrupt or vblank events to happen at the + wrong time. So save/restore them properly. + +commit 79d69285202b55f269aa88a6bcda257257c9dee3 +Author: Jesse Barnes +Date: Thu Feb 7 10:40:06 2008 -0800 + + Fix vblank enable/disable callbacks + + There were two problems with the existing callback code: the vblank + enable callback happened multiple times per disable, making drivers more + complex than they had to be, and there was a race between the final + decrement of the vblank usage counter and the next enable call, which + could have resulted in a put->schedule disable->get->enable->disable + sequence, which would be bad. + + So add a new vblank_enabled array to track vblank enable on per-pipe + basis, and add a lock to protect it along with the refcount + + enable/disable calls to fix the race. + +commit 76748efae2f51409813eeb6b91b783c73cb2845e +Author: Thomas Hellstrom +Date: Tue Feb 5 10:35:56 2008 +0100 + + i915: Re-report breadcrumbs on poll to the fence manager, + + since a breadcrumb may actually turn up before a corresponding fence object + has been placed on the fence ring. + +commit a0781e762295ce3d5f6e839d437a0de505cefa3b +Author: Stuart Bennett +Date: Mon Jan 28 22:59:26 2008 +0000 + + nouveau: make nv34 work every time, not just every 2nd time + + And make nv30_graph_init a bit more like mmio-traces + +commit 733e07663e50087ca1e9af8e9b5def556521e3b5 +Author: Maarten Maathuis +Date: Sat Feb 2 12:46:31 2008 +0100 + + nouveau: NV40 can/should now be able to run after the blob. + + - Moved the fix from the ddx to drm, because it seemed more appropriate. + - Don't be shy, report if it works for you or not. + +commit c77b0937f290568604961fa0013691349c5fcf3b +Author: Thomas Hellstrom +Date: Thu Jan 31 14:11:12 2008 +0100 + + Add an fence_class_manager::last_queued_sequence member, since a + sequence number may actually turn up before the corresponding fence + object has been queued on the ring. + + Fence drivers can use this member to determine whether a + sequence number must be re-reported. + +commit 47ee6237fe86a8621744bbd6cecb8b5e58848b05 +Author: Thomas Hellstrom +Date: Wed Jan 30 22:14:02 2008 +0100 + + i915: Avoid calling drm_fence_flush_old excessively. + +commit f1edb7ad91d8b92057ffa02eb162e3740d05a147 +Author: Thomas Hellstrom +Date: Wed Jan 30 22:06:02 2008 +0100 + + Simplify the fencing code and differentiate between flushes and + waiting types. + Add a "command_stream_barrier" method to the bo driver. + +commit 9a7e45858d8faa7afbe31b130d2de1be781085da +Author: Ben Skeggs +Date: Wed Jan 30 11:40:13 2008 +1100 + + nv40: some more nv67 changes + + With some luck the drm-side will be OK now for this chipset. + +commit 0744cb153aabd290fd4832288a530adeb5561e2c +Author: Mirko +Date: Tue Jan 29 10:11:27 2008 -0500 + + Add new RV380 pci id + + bug 14289 + +commit 01f6afcfea9d315ad1473045da141bfc95bcb7e6 +Author: Jesse Barnes +Date: Mon Jan 28 21:05:22 2008 -0800 + + Fix hibernate save/restore of VGA attribute regs + + In hibernate, we may end up calling the VGA save regs function twice, so we + need to make sure it's idempotent. That means leaving ARX in index mode after + the first save operation. Fixes hibernate on 965. + +commit b8755ff7c33baac2abe5b5fe00897b33a896a098 +Author: Maciej Cencora +Date: Sun Jan 27 12:50:31 2008 +1000 + + drm: add initial rs690 support for drm. + + This adds support for configuring the RS690 GART. + +commit 6bfb9b639ab2ab71969eeeb72105ce7e0c487462 +Author: George Sapountzis +Date: Fri Jan 25 16:54:29 2008 +0200 + + mach64: fix after vblank-rework + + don't disable vblank interrupts (similar to r128) + +commit bfdddd218ec3e7ce3f8e765b93af35661a7bf0fd +Author: Jesse Barnes +Date: Thu Jan 24 20:59:51 2008 -0800 + + Fixup modeset ioctl number & typedef usage + + Should be 0x08 rather than 0xa0, and shouldn't use typedefs. + +commit e3c42f00042ffacc7868ed608b9ecf786dcc4e4a +Merge: c7ee6cc... 5b99306... +Author: Eric Anholt +Date: Thu Jan 24 12:32:08 2008 -0800 + + Merge commit 'airlied/i915-ttm-cfu' + + This requires updated Mesa to handle the new relocation format. + +commit c7ee6cc269c26d8e7ed98a16a272eca63daab201 +Author: Jesse Barnes +Date: Thu Jan 24 08:57:04 2008 -0800 + + Remove broken 'in vblank' accounting + + We need to return an accurate vblank count to the callers of + ->get_vblank_counter, and in the Intel case the actual frame count + register isn't udpated until the next active line is displayed, so we + need to return one more than the frame count register if we're currently + in a vblank period. + + However, none of the various ways of doing this is working yet, so + disable the logic for now. This may result in a few missed events, but + should fix the hangs some people have seen due to the current code + tripping the wraparound logic in drm_update_vblank_count. + +commit 5b9930645227d52f47b6dc85cd1aee65bb5820ad +Author: Dave Airlie +Date: Thu Jan 24 15:18:09 2008 +1000 + + i915: fix missing header when copying data from userspace + +commit 34b71eb45124b32377b82b4d3737537b9195b0a7 +Author: Dave Airlie +Date: Thu Jan 24 14:37:40 2008 +1000 + + i915 make relocs use copy from user + + Switch relocs to using copy from user and remove index and pass buffer + handles in instead. + +commit b5a34f5da50e22ecb80853f0f422beb90857dc2d +Author: Jesse Barnes +Date: Wed Jan 23 08:39:57 2008 -0800 + + Fix thinko in get_vblank_counter + + Should use vtotal not htotal to figure out if we're in a vblank period. + +commit cb917843711ab5fe22f311cbd3eb597bce105df5 +Author: Jesse Barnes +Date: Wed Jan 23 08:38:01 2008 -0800 + + Fix IS_I915G macro + + One to many parantheses... + +commit 7c726086dd6591c7b32bffdcfd8e180309aad14d +Author: Maarten Maathuis +Date: Wed Jan 23 16:40:19 2008 +0100 + + nouveau: Fix warning in nouveau_mem.c + +commit c57f43e3a266d247c8a2be6fd7702caab2dc009b +Author: Dave Airlie +Date: Wed Jan 23 16:45:09 2008 +1000 + + i915/flush: get the ret the right way around + +commit 2f19fe44983647328a97cb4ce513d773459ca853 +Author: Dave Airlie +Date: Wed Jan 23 16:44:51 2008 +1000 + + drm/i915: add support for E7221 + +commit 531f25cfe9d0319f78fe58260bfed08d5e3e8bcc +Author: Jesse Barnes +Date: Tue Jan 22 15:16:01 2008 -0800 + + Correct vblank count value + + The frame count registers don't increment until the start of the next + frame, so make sure we return an incremented count if called during the + actual vblank period. + +commit 893e311999d1565943899d73c56c674fc9b6e502 +Author: Jesse Barnes +Date: Tue Jan 22 13:11:29 2008 -0800 + + i915 irq fixes + + Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read + vblank counter registers on disabled pipes (might hang otherwise). And + deal with flipped pipe/plane mappings if present. + +commit 0cd4cbc9a6330bd619608f274592082de7c05bcf +Merge: 128a8f7... 5231a52... +Author: Jesse Barnes +Date: Tue Jan 22 09:42:37 2008 -0800 + + Merge branch 'master' into vblank-rework, including mach64 support + + Conflicts: + + linux-core/drmP.h + linux-core/drm_drv.c + shared-core/i915_drv.h + shared-core/i915_irq.c + shared-core/mga_irq.c + shared-core/radeon_irq.c + shared-core/via_irq.c + + Mostly trivial conflicts. + + mach64 support from Mathieu Bérard. + +commit 5231a524f53babd127a576d7567671dafb29651b +Author: Dave Airlie +Date: Tue Jan 22 14:39:28 2008 +1100 + + Revert "Fix pipe<->plane mapping vs. vblank handling (again)" + + This reverts commit bfc29606e4a818897eebca46a5e23bbe7bc3ce25. + + This regresses i915 here for me I can't get greater than 0.333 fps with gears + +commit 616cef5ec84b97eb676ee7cc6699451d778fad3b +Author: Stephane Marchesin +Date: Mon Jan 21 21:11:47 2008 +0100 + + nouveau: don't forget NV80. + +commit 641c9a2ecccb4fd51e2453c18df5d1e6a209d6e3 +Author: Stephane Marchesin +Date: Mon Jan 21 21:01:28 2008 +0100 + + nouveau: new card family for old card designs. + +commit c6f175cbea1dba3fc26426243acc55b89b8a8064 +Author: Kyle McMartin +Date: Thu Jan 17 18:51:56 2008 -0500 + + i915: fix invalid opcode exception on cpus without clflush + + i915_flush_ttm was unconditionally executing a clflush instruction + to (obviously) flush the cache. Instead, check if the cpu supports + clflush, and if not, fall back to calling wbinvd to flush the entire + cache. + + Signed-off-by: Kyle McMartin + +commit 44a9fa8cc6c7d598163d1885bf69e4bf747a004b +Author: Eric Anholt +Date: Mon Jan 7 13:10:50 2008 -0800 + + Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again. + +commit ac6b3780c816f81c8159ff5ba07a77563e26a1c5 +Author: Zhenyu Wang +Date: Wed Jan 9 11:30:35 2008 +0800 + + i915: Add chipset id for Intel Integrated Graphics Device + + This adds new chipset id in drm. + + Signed-off-by: Zhenyu Wang + +commit 88c511e49dce869d1c4e3271bf642cbb22fef0cf +Author: Thomas Hellstrom +Date: Tue Jan 15 10:03:41 2008 +0100 + + Properly propagate the user-space fence flags. + This avoids a sync flush when user-space has already programmed + and MI_FLUSH in the batchbuffer. + +commit 099e89edf094ec231621b67129e9226ba50e99ad +Author: Thomas Hellstrom +Date: Tue Jan 15 09:46:59 2008 +0100 + + Define i915_compat.c upper_32_bits for kernels < 2.6.21 + +commit 806c1929dcd344f6eab3133584a9c4ce9f3f47bc +Author: Zou Nan hai +Date: Tue Jan 15 09:19:02 2008 +0800 + + this is to fix a deadloop in drm hang system issue. + (1 << bits) is an undefined value when bits == 32. + gcc may generate 1 with this expression + which will lead to an infinite retry loop in + drm_ht_just_insert_please. + Because of the different implement of hash_long, + this issue is more frequenly see on 64 bit system + +commit 62df4f0a48776e55443d7f61a41e1ed0fb77b6ed +Author: Dave Airlie +Date: Mon Jan 14 19:36:10 2008 +1000 + + fixup i915 compat resource allocation + +commit 269d518008a20dc81231574f2d07d101553d3824 +Author: Stephane Marchesin +Date: Mon Jan 14 03:16:40 2008 +0100 + + nouveau: make mem alloc debug a little more verbose. + +commit f0b7c45653b510693821ad68a20a3820c29195ef +Author: Ben Skeggs +Date: Fri Jan 11 12:51:08 2008 +1100 + + nv05: enable ctx/op methods, and ignore patch valid failures. + + Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU + will just ignore those PGRAPH_DEBUG_3 bits on that hw. + +commit 5f15f317fb304f6a2321c033d401f603b365f2d0 +Author: Stuart Bennett +Date: Mon Jan 7 17:38:18 2008 +0000 + + nouveau: AGP reset correction - don't touch FW bit + +commit 0bfd09f719fb1de3e489fe513a122f29cdcef0c3 +Author: Ben Skeggs +Date: Mon Jan 7 18:56:44 2008 +1100 + + nv50: more small changes + +commit 942b500e24fba25e3e047c7756b75a2782076512 +Author: Ben Skeggs +Date: Mon Jan 7 18:18:51 2008 +1100 + + nv50: oops, lost some state saving along the way somewhere. + + xf86-video-nv will now work again after nouveau. + +commit 3d248cd7e4538ced5c0b652a784eb4ef309d5e11 +Author: Ben Skeggs +Date: Mon Jan 7 17:23:31 2008 +1100 + + nv50: hook up timer funcs... + +commit 7a4ba7273c740503b6f254f74b2e06312c15790a +Author: Ben Skeggs +Date: Mon Jan 7 17:10:36 2008 +1100 + + nv50: abort on chips without ctx ucode + +commit 15f8fd34df11d9fceb3f813c9478ffe66cae3473 +Author: Ben Skeggs +Date: Mon Jan 7 17:07:59 2008 +1100 + + nv50: some needed ctx vals + +commit fa5e18679fcdb7bd2d69c605183b0b205416bf2b +Author: Ben Skeggs +Date: Mon Jan 7 16:55:20 2008 +1100 + + nv50: use dummy page in gart tables + + Just to be safe, we don't really know exactly how the tables work yet, so + we can't be certain there's a way to say "page not present". + +commit 3d3d509dcae7f26cfcbe63e527a16f181a24e37c +Author: Ben Skeggs +Date: Mon Jan 7 16:52:47 2008 +1100 + + nv50: some cleanups + small changes + +commit cd19dcef4f7cc454f68618a0a1e903f159db21ad +Author: Stephane Marchesin +Date: Mon Jan 7 06:11:33 2008 +0100 + + Nouveau: ppc oops. + +commit de522ae742bd058780135eb21fe287e9a9dc263a +Author: Stephane Marchesin +Date: Mon Jan 7 05:54:05 2008 +0100 + + Nouveau: move PPC bios copy to firstopen. + +commit bd5d760a105e0a7aec00791d397511a0f7bc27ea +Author: Jeremy Kolb +Date: Sun Jan 6 10:09:47 2008 -0500 + + nouveau: Add ctx_voodoo for NV86 + +commit f5e5e5c0ea7d7a69f7bf16c718bf757fbb4b541d +Author: Pekka Paalanen +Date: Fri Jan 4 23:47:57 2008 +0200 + + drm: One forgotten rename of 'mask' to 'proposed_flags'. + + Due to commit d1187641d64f442968a3b9ea6a19de6cdd45acd4. + +commit 30fba69a68efc196908dab22581d1b99cf8750ae +Author: Xavier Bachelot +Date: Fri Jan 4 16:29:04 2008 +1000 + + via: add P4M900 pci id. + + bug 12108 + +commit 71adbfc874517efbba8b9f7c3f90baad0d7fb707 +Author: Stuart Bennett +Date: Thu Jan 3 16:57:55 2008 +0000 + + [PATCH] nouveau: reset AGP on init for < nv40 + + This is necessary for AGP to work after running bios init scripts on nv3x, and + is seen in mmio traces of all cards (nv04-nv4x) + + I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt) + use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know + the effects of using the wrong one + +commit 381724a35b662302b70f9a5c04f1412ff2c2ad5b +Author: Stuart Bennett +Date: Thu Dec 27 01:10:52 2007 +0000 + + [PATCH] nouveau: Fix nv20/30 context loading + + Don't set the context as valid until it has been loaded + +commit 78d6649069a40c5c30ecc482eea803a5dc89c080 +Author: Dave Airlie +Date: Thu Jan 3 17:44:04 2008 +1000 + + mach64: some more minor cleanups + +commit 97b8c9591cfeb88d02bd9255adf8a1f9aaa72630 +Author: Dave Airlie +Date: Thu Jan 3 17:10:30 2008 +1000 + + mach64: cleanup some of the macro formatting + +commit 9ab620d661253f9b08f683a2a6f9ddee002015bc +Author: Márton Németh +Date: Thu Jan 3 16:56:04 2008 +1000 + + drm: cleanup DRM_DEBUG() parameters + + As DRM_DEBUG macro already prints out the __FUNCTION__ string (see + drivers/char/drm/drmP.h), it is not worth doing this again. At some + other places the ending "\n" was added. + + airlied:- I cleaned up a few that this patch missed also + +commit 5e99b42b043e36a8db4a27522be27944a344715e +Merge: b9417f4... 96a0005... +Author: Dave Airlie +Date: Thu Jan 3 16:05:13 2008 +1000 + + Merge branch 'r500-support' + +commit 96a00054beb84050d618c8418e2da999530b117f +Author: Dave Airlie +Date: Thu Jan 3 16:03:05 2008 +1000 + + remove duplicate pciids + +commit b9417f41418321d5081547a3a3386dcccae7541f +Author: Xiang, Haihao +Date: Wed Dec 26 17:13:58 2007 +0800 + + i915: return fence argument from i915_execbuffer ioctl32 routine + +commit 5d8d64ad3881c10bc3cd3fd5cab1ac14268da5ce +Author: Xiang, Haihao +Date: Tue Dec 25 16:57:14 2007 +0800 + + i915: i915_execbuffer ioctl32 routine, fix #13732 + +commit da3601e43ae75695f3b080904b1e090c8eb1cd8e +Author: Keith Packard +Date: Sun Dec 16 22:00:45 2007 -0800 + + Change drm_bo_type_dc to drm_bo_type_device and comment usage of this value. + + I couldn't figure out what drm_bo_type_dc was for; Dave Airlie finally clued + me in that it was the 'normal' buffer objects with kernel allocated pages + that could be mmapped from the drm device file. + + I thought that 'drm_bo_type_device' was a more descriptive name. + + I also added a bunch of comments describing the use of the type enum values and + the functions that use them. + +commit d1187641d64f442968a3b9ea6a19de6cdd45acd4 +Author: Keith Packard +Date: Sun Dec 16 20:16:50 2007 -0800 + + Rename inappropriately named 'mask' fields to 'proposed_flags' instead. + + Flags pending validation were stored in a misleadingly named field, 'mask'. + As 'mask' is already used to indicate pieces of a flags field which are + changing, it seems better to use a name reflecting the actual purpose of + this field. I chose 'proposed_flags' as they may not actually end up in + 'flags', and in an case will be modified when they are moved over. + + This affects the API, but not ABI of the user-mode interface. + +commit 37fb2ac4071f62bad2c36cc9ca84f9c8feee6bf5 +Author: Keith Packard +Date: Sun Dec 16 01:47:51 2007 -0800 + + Use dummy_read_page for unpopulated kernel-allocated ttm pages. + + Previously, dummy_read_page was used only for read-only user allocations; it + filled in pages that were not present in the user address map (presumably, + these were allocated but never written to pages). + + This patch allows them to be used for read-only ttms allocated from the + kernel, so that applications can over-allocate buffers without forcing every + page to be allocated. + +commit 881ee70ab7bab5d6f6140dc9bf1e19c7b5844084 +Author: Keith Packard +Date: Sun Dec 16 01:12:07 2007 -0800 + + Move dummy_read_page from drm_ttm_set_user to drm_ttm_create. + + I'm hoping to use the dummy_read_page for kernel allocated buffers to avoid + allocating extra pages for read-only buffers (like vertex and batch buffers). + This also eliminates the 'write' parameter to drm_ttm_set_user and just + has DRM_TTM_PAGE_WRITE passed into drm_ttm_create. + +commit 6d44f48002c19d67187adb660ef74dd1870d52c2 +Author: Keith Packard +Date: Sun Dec 16 00:54:25 2007 -0800 + + Clean up and document drm_ttm.c APIs. drm_bind_ttm -> drm_ttm_bind. + + Aside from changing drm_bind_ttm to drm_ttm_bind, this patch + adds only documentation and fixes the functions inside drm_ttm.c + to all be prefixed with drm_ttm_. + +commit 2db6400396ea5c8a5ce54fe9e211b9d01a11d506 +Author: Li Zefan +Date: Mon Dec 17 09:50:45 2007 +1000 + + drm: don't cast a pointer to pointer of list_head + + The casting is safe only when the list_head member is the first member of + the structure. + +commit 6180dbda203161b8926513cca4ee963bbbf18cc9 +Author: Jesper Juhl +Date: Mon Dec 17 09:45:03 2007 +1000 + + While reading some code I stumbled across the use of 'err' in + drivers/char/drm/mga_dma.c::mga_do_cleanup_dma() and I think there's a small + problem. + + The variable is only used inside #if __OS_HAS_AGP which is fine, but all + that + ever happens is an assignment to the variable - it is never actually used + for + anything. The variable is nicely initialized to zero which is also what the + return statement at the end of function returns (always at the moment). + + It looks to me like that function should be returning 'err' instead of + always + just returning 0. Here's a patch to do that. + + Signed-off-by: Jesper Juhl + Signed-off-by: Andrew Morton + +commit 0b031dbd63bbb3e0ba6d39e1e5c4eb4e87985158 +Author: Keith Packard +Date: Fri Dec 14 13:19:35 2007 -0800 + + Document drm_ttm_set_user. + + Add a comment explaining the parameters for this function + +commit 9d17373ffbba3cc4ee5f63ff02ff24d48ab99fe0 +Author: Keith Packard +Date: Fri Dec 14 13:19:09 2007 -0800 + + Document drm_buffer_object_validate function. + + Just add documentation for this function, no code changes. + +commit 7461519fed25f6d63415a9dd4b915c6cc668a69c +Author: Keith Packard +Date: Fri Dec 14 12:49:22 2007 -0800 + + Document fence_class mess in drm_bo_setstatus_ioctl + + drmBOSetStatus does not bother to set the fence_class parameter. + Fortunately, drm_bo_setstatus_ioctl doesn't end up using it as it + calls drm_bo_handle_validate with use_old_fence_class = 1. + +commit 5f23519b14e54823c94f5db5ad81e6bd5ffd3877 +Author: Keith Packard +Date: Fri Dec 14 12:45:55 2007 -0800 + + Document drm_bo_handle_validate. Match drm_bo_do_validate parameter order. + + Document parameters and usage for drm_bo_handle_validate. Change parameter + order to match drm_bo_do_validate (fence_class has been moved to after + flags, hint and mask values). Existing users of this function have been + changed, but out-of-tree users must be modified separately. + +commit b5181d2506be332db8b07c02cdf37c6e25545c4d +Author: Keith Packard +Date: Fri Dec 14 12:33:35 2007 -0800 + + Document drm_bo_do_validate. Remove spurious 'do_wait' parameter. + + Add comments about the parameters to drm_bo_do_validate, along + with comments for the DRM_BO_HINT options. Remove the 'do_wait' + parameter as it is duplicated by DRM_BO_HINT_DONT_BLOCK. + +commit b0bc5f1ae559c705565e516ebb289bf072559dec +Author: Keith Packard +Date: Fri Dec 14 11:42:17 2007 -0800 + + Make ttm create/destroy APIs consistent. Pass page_flags in create. + + Creating a ttm was done with drm_ttm_init while destruction was done with + drm_destroy_ttm. Renaming these to drm_ttm_create and drm_ttm_destroy makes + their use clearer. Passing page_flags to the create function will allow that + to know whether user or kernel pages are needed, with the goal of allowing + kernel ttms to be saved for later reuse. + +commit 449a3b19ff6e5bd054e7da3086e2d16604fae7ed +Author: Patrice Mandin +Date: Sat Dec 15 10:23:30 2007 +0100 + + Revert "nouveau: nv30: missing ramin init, does it brake other hw?" + + This reverts commit 46235ea4595152d8dd5f016c18c6845a77db30b0. + +commit 35a8b61317b57fcaaf5f7df06b0e2b532eddb9cb +Author: Alan Hourihane +Date: Thu Dec 13 10:40:36 2007 +0000 + + catch an out of memory condition + +commit 7dcaf0cdbb57dcf85aa8798736948c280d3966b2 +Author: Keith Packard +Date: Tue Dec 11 20:21:23 2007 -0800 + + Make relocation validate client computed values when debugging + +commit 4ec8f58d042d7fe0dab570fed35a438759645ca8 +Author: Keith Packard +Date: Thu Dec 6 15:12:21 2007 -0800 + + i915: wait for buffer idle before writing relocations + + When writing a relocation entry, make sure the target buffer is idle, + otherwise the GPU may see inconsistent data. + +commit 9ee511d786b1a87944f043c1a16057e8dfc48668 +Author: Keith Packard +Date: Tue Dec 4 20:54:53 2007 -0800 + + Bump driver minor for relocation optimzations + +commit 57b9a54eb668477407c8be54c041d7a9f92c1f51 +Author: Keith Packard +Date: Tue Dec 4 12:22:30 2007 -0800 + + Allow relocation to be skipped when buffers don't move. + + One of the costs of superioctl has been the need to perform relocations + inside the kernel. The cost of mapping the buffers to the CPU and writing + data is fairly high, especially if those buffers have been mapped and read + by the GPU. + + If we assume that buffers don't move around very often, we can have the + client compute the relocations itself using the previous GPU address. When + that object doesn't move, the kernel can skip computing and writing the + updated data. + + Here's a patch which adds a new field to struct drm_bo_info_req called + 'presumed_offset', and a new DRM_BO_HINT_PRESUMED_OFFSET that is set when + this field has been filled in by the client. + + There are two separate optimizations performed when the presumed_offset is + correct: + + 1. i915_exec_reloc checks to see if all previous buffer offsets were guessed + correctly. If so, there's no need for it to look at *any* of the + relocations for a buffer. When this happens, it skips the whole + relocation process, simply returning success. + + 2. i915_apply_reloc checks to see if the target buffer offset was guessed + correctly. If so, it skips mapping the relocatee, computing the + relocation and writing the value. If no relocations are needed, the + relocatee should never be mapped to the CPU, and so the kernel shouldn't + need to wait for any fences to pass. + +commit 814f695135f21aadeba77a3114df505d81a8d433 +Merge: e51b3c8... cfa21b2... +Author: Dave Airlie +Date: Mon Dec 10 15:53:59 2007 +1000 + + Merge branch 'master' into r500-support + +commit cfa21b22b43c7113107b5eb086b5f4d4ec36dc0a +Author: Dave Airlie +Date: Mon Dec 10 10:13:52 2007 +1000 + + drm: move agp include outside CONFIG_AGP as it isn't dependant on agp in kernel + +commit 7d08b816b7af3cd415bebf65f44313415fea091a +Author: José Fonseca +Date: Sat Dec 8 19:21:27 2007 +0000 + + mach64: comment bus master / ring buffer behavior and security + +commit bfc29606e4a818897eebca46a5e23bbe7bc3ce25 +Author: Jesse Barnes +Date: Fri Dec 7 14:24:45 2007 -0800 + + Fix pipe<->plane mapping vs. vblank handling (again) + + If drmMinor >= 6, the intel DDX driver will enable vblank events on both + pipes. If drmMinor >= 10 on pre-965 chipsets, the intel DDX driver will + swap the pipe<->plane mapping to allow for framebuffer compression on + laptop screens. This means the secondary vblank counter (corresponding + to pipe B) will be incremented when vblank interrupts occur. + + Now Mesa waits for vblank events on whichever plane has a greater + portion of the displayed window. So it will happly ask to wait for the + primary counter even though that one won't increment. + + So we can fix this in either the DDX driver, Mesa or the kernel (though + I thought we already had several times). + + Since current (and previous) userspace assumes it's talking about a pipe + == plane situation and now uses planes when talking to the kernel, we + should probably just hide the mapping details there (indeed they already + are hidden there for vblank swaps), which this patch does. + + So as far as userland is concerned, whether we call things planes or + pipes is irrelevant, as long as kernel developers understand that + userland hands them planes and they have to figure out which pipe that + corresponds to (which will typically be the same on 965+ hardware and + reversed on pre-965 mobile chips). + +commit f1a99ddc14ebca303f20b6c23bd289fc887243ae +Author: Dave Airlie +Date: Thu Dec 6 16:03:28 2007 +1000 + + take down stuff after asking driver to unload + +commit a64a4373e85a321a359e147b2c7220d501dff06a +Author: José Fonseca +Date: Wed Dec 5 22:53:02 2007 +0000 + + mach64: make buffer emission macros normal functions + +commit 46ecd12c07f921bb015f87cb07ddb02baa94b382 +Author: José Fonseca +Date: Wed Dec 5 00:10:39 2007 +0000 + + mach64: use utf-8 + +commit e38749ebe5ece08ec63dfd37aca28108ad5cc7ab +Author: Kristian Høgsberg +Date: Wed Dec 5 14:43:22 2007 -0500 + + Remove references to the sarea_priv perf_boxes field. + + This field isn't touched or read by any other code in the stack so it's + time to retire these last few references. + +commit 2f6e53342156ecb0e61a13816043445032c2b539 +Author: Dave Airlie +Date: Wed Dec 5 04:54:58 2007 +1000 + + patch from -mm kernel to use upper_32_bits + +commit 690dd04d1b9a4da92139793d3f5129a80f9c7353 +Author: Robert Noland +Date: Sun Dec 2 01:45:09 2007 -0500 + + bsd: Replace other occurrences of msleep with mtx_sleep + +commit fbc307274f7cb29f986daae3d8e367d53172e3ba +Author: Robert Noland +Date: Sun Dec 2 01:23:11 2007 -0500 + + bsd: Now make secondary vblank work + + We needed to specifically check for driver support and test the correct + vbl_received value. Also pulled over support for _DRM_VBLANK_NEXTONMISS + from the linux code. + +commit 787d500c15c964f2a715ea0c949177c1d38dc367 +Author: Robert Noland +Date: Sat Dec 1 17:09:49 2007 -0500 + + bsd: Hook secondary vblank support. + +commit e6ca3f5754d649b6290ea017f815aeb18d565718 +Author: Robert Noland +Date: Sat Dec 1 16:35:48 2007 -0500 + + bsd: Fix typo in i915_drv.c + +commit 0c3e5261b63f6a642f4c62d287e56a52954c2b06 +Author: Robert Noland +Date: Sun Nov 25 12:54:31 2007 -0500 + + mtx_sleep is preferred to msleep + + Calling semantics are the same and both were introduced in 5.0 + +commit b2f8368b571efe610750640c5f10f4c4e0bf7133 +Author: Robert Noland +Date: Sun Nov 25 12:50:07 2007 -0500 + + Clarify order of operations + +commit 453a295c829dd9e07175f4b2e8fe7e179e5a4d79 +Author: Robert Noland +Date: Sat Nov 24 01:56:05 2007 -0500 + + DRM_DEBUG already prints the function name. + +commit d6295cc9ffe9f36f78131f8049baf24e77d35e15 +Author: Robert Noland +Date: Sat Dec 1 02:40:13 2007 -0500 + + drm: Add _DRM_DRIVER map flag. + + This flag indicates that the driver is responsible for the map. + +commit 83e62be6f449ad480eb590ee9d4131974c9920e2 +Author: Robert Noland +Date: Sat Dec 1 02:32:23 2007 -0500 + + bsd: Move counter initialization to load time. + +commit 887b920a7fd2cfa70b41425d26e4d3707d4075b9 +Author: Maarten Maathuis +Date: Fri Nov 30 22:50:34 2007 +0100 + + nouveau: Properly identify NV40 and NV44 generation. + +commit 309b2c4c05d02a7e7311a9491b74044f6c7f06a4 +Author: Jiri Slaby +Date: Thu Nov 29 09:55:38 2007 +1000 + + Beside the emitted warning, the added cast (u64 -> unsigned) strips out + part of address on 64 bit. Cast to unsigned long instead. + + Signed-off-by: Jiri Slaby + +commit 32c9a109b10c087f63964b4b055603feee522cc0 +Author: Dave Airlie +Date: Thu Nov 29 09:47:24 2007 +1000 + + drm: enable udev node creation + +commit 4602b6687ebb0dcf5047f2c3d88dccd751558c81 +Author: Dave Airlie +Date: Thu Nov 29 09:46:02 2007 +1000 + + drm: oops not a cleanup.. + +commit 9be085cbf44ac8bd3bc6fe3e9b55df6fec7ac389 +Author: Robert C. Noland III +Date: Wed Nov 28 00:33:42 2007 -0500 + + Fix up drm_ati_pcigart_info + +commit dc338921f94daad17055105a38214483d5ac33e1 +Author: Dave Airlie +Date: Thu Nov 29 09:37:51 2007 +1000 + + drm: more cleanups + +commit e9fa8fe7342fad710bee4f65bc23ec06d3020f05 +Author: Dave Airlie +Date: Wed Nov 28 22:46:06 2007 +1000 + + i965: oops force mi batchbuffer start + +commit e51b3c8ff4bb88bc0f57473b7c3fe7fcd6b1a916 +Author: Dave Airlie +Date: Tue Nov 27 08:43:14 2007 +1000 + + r500: add a bunch of all r5xx pci ids.. + + fix up a range that may be needed for r500 mesa + +commit 5dc5c36e624e5393b5427a159ad34e5fc358cc9f +Author: Dave Airlie +Date: Thu Nov 22 16:10:36 2007 +1000 + + drm: major whitespace/coding style realignment with kernel + +commit 7bf05708b686ec8822cc1ac7c8b647d4f7110bff +Author: Dave Airlie +Date: Thu Nov 22 13:29:17 2007 +1000 + + drm: cleanup drm_regman.c coding style + +commit 6ff4a70a2be606c02f2b27f92ebdb9a8ec11cbe0 +Author: Dave Airlie +Date: Thu Nov 22 09:17:34 2007 +1000 + + i915: add context handle to superioctl struct + + This will be used later for lockless operation. + +commit 66079b91f38cd8e21ae4c8ea1e74c56d44b82329 +Author: Dave Airlie +Date: Thu Nov 22 08:15:12 2007 +1000 + + r500: add pci id for X1650 + +commit 09e51db77b049765117d3cfa8b59fab0b73e6c93 +Author: Jerome Glisse +Date: Sun Nov 18 19:16:40 2007 +0100 + + drm: don't reset to 0 irq_enabled when client open file descriptor + +commit 5ec64d4a30ff6170e8b9f87fa52fd9cc0b5ddb9c +Author: Dave Airlie +Date: Wed Nov 21 13:02:19 2007 +1000 + + r500: suggestion from glisse to not add cliprect offset on r5xx + +commit dc0ec76d60093e4f7d9b886c5a6afcb0cc8a46bf +Author: Dave Airlie +Date: Tue Nov 20 08:44:33 2007 +1000 + + radeon: add initial r5xx support + +commit 3fc3fc082adfa9a7dfe45ea8fb7a9fb6e7019ff6 +Author: Eric Anholt +Date: Mon Nov 19 08:41:23 2007 -0800 + + Fix capitalization of __linux__ define. + +commit 648b5b582a4fc5a925e7c3010d5a21b24daca572 +Author: Jerome Glisse +Date: Mon Nov 19 14:37:21 2007 +0100 + + drm: fix dead lock in drm_buffer_object_transfer + +commit a74181ddb2776d7ffbcb10d8103950bd3d88b00d +Author: Robert Noland +Date: Tue Nov 13 17:50:46 2007 -0500 + + Bug #13233: Fix build on FreeBSD. + +commit c12a3a3ce08cbbba118acd8742b2ef990b417eea +Author: Robert Noland +Date: Sun Nov 18 22:40:13 2007 -0800 + + Bug #13233: Chase move of agp headers on FreeBSD. + +commit a90510966e12e20d3c51d224dda607ac9951d039 +Author: Dave Airlie +Date: Sun Nov 18 19:25:31 2007 +1000 + + radeon: refactor out the fb/agp location read/write. + + Add a new get param to get the fb location into userspace. Mesa currently + hits MMIO to do this, but this isn't always possible. + +commit 307fc3c92c85ded23de414b0d1a3d48f934c666d +Author: Stephane Marchesin +Date: Fri Nov 16 15:02:25 2007 +0100 + + nouveau: also mention the number of succcessfully copied bios bytes. + +commit f2c8d39a0f99dab9d69d927214c8c66aabb70c5c +Author: Jeremy Kolb +Date: Thu Nov 15 22:09:59 2007 -0500 + + nouveau: rename + +commit a3e627f8d66b5e9e896837824ce76664e5997b27 +Author: Jeremy Kolb +Date: Thu Nov 15 20:46:49 2007 -0500 + + nouveau: flip buffer into gart. + +commit baf5d20297577c81d0a6be1abcc45555ed83643c +Author: Stephane Marchesin +Date: Thu Nov 15 20:42:38 2007 +0100 + + nouveau: be verbose about PPC bios for now. + +commit 9b2a95bc6c9ddbf481d5f6017d9e85ed4def095d +Author: Stephane Marchesin +Date: Thu Nov 15 18:01:26 2007 +0100 + + nouveau: revert the nv34 context size change, it was not the culprit after all. + +commit 3c998d8fcbb7745fd949347823eca678c6f904b8 +Author: Stephane Marchesin +Date: Thu Nov 15 16:00:25 2007 +0100 + + nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels. + +commit 6206091e5f300616c27dc834922f2976d97f72d4 +Author: Thomas Hellstrom +Date: Thu Nov 15 10:38:55 2007 +0100 + + mm fixups. + +commit 62cdc6dbb3545d21bc3a68987d0781f277ae6ee4 +Author: Dave Airlie +Date: Thu Nov 15 14:43:23 2007 +1100 + + i915: remove excess debug output + +commit 2cf7ad0d9b2f265537c7030c6f93b4275cb2d051 +Author: Stephane Marchesin +Date: Thu Nov 15 03:43:22 2007 +0100 + + nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output detection in user space. + +commit 2eee33ace5b647153a7cf20990efd12313cc8472 +Author: Dave Airlie +Date: Thu Nov 15 13:29:55 2007 +1100 + + intel: add flushing for i8xx chipsets. + + Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM + code paths + +commit 46235ea4595152d8dd5f016c18c6845a77db30b0 +Author: Patrice Mandin +Date: Wed Nov 14 23:31:59 2007 +0100 + + nouveau: nv30: missing ramin init, does it brake other hw? + +commit 68cdcda1eaf02353f2ef2d637c6bf1003c849185 +Author: Kristian Høgsberg +Date: Wed Nov 14 14:28:34 2007 -0500 + + Add new shared header file drm_internal.h. + + This header file is shared across linux and bsd, but is not installed + for user space to access. It's the place to put prototypes and data + types that aren't platform or chipset specific, but still internal to + the drm. + +commit 448ccf13ba647a4b649857c661ab9c64bce91795 +Author: Stephane Marchesin +Date: Wed Nov 14 02:52:55 2007 +0100 + + nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards. + +commit f3708b4c04b35b03c28b2297c23eb424206747cd +Author: Thomas Hellstrom +Date: Tue Nov 13 15:42:08 2007 +0100 + + Fix ttmtest. + +commit 2d7eb4434f50ab190b530a7ef23e4a361092a33d +Author: Ben Skeggs +Date: Wed Nov 14 05:36:20 2007 +1100 + + nouveau: Also wait until CACHE1 gets emptied. + +commit 7e4bb6099a492b90374565aa574ba65f19ae2ab2 +Author: Ben Skeggs +Date: Wed Nov 14 05:11:11 2007 +1100 + + Revert "nouveau: stub superioctl" + + This reverts commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed. + + Err.. didn't mean for that to slip in :) + +commit eb5487b9ca1d7ce60d5ddc784089d91cf176f439 +Merge: 2370ded... 7c1e59f... +Author: Ben Skeggs +Date: Wed Nov 14 05:09:07 2007 +1100 + + Merge branch 'fifo-cleanup' into upstream-master + +commit 7c1e59fb0c5043d3d369f5feb8e195a6a3da3457 +Author: Ben Skeggs +Date: Wed Nov 14 04:24:36 2007 +1100 + + nouveau: Attempt to wait for channel idle before we destroy it. + +commit 53ab6026cfb20bfdf34b245e41af424be62941a8 +Author: Ben Skeggs +Date: Wed Nov 14 04:15:13 2007 +1100 + + nouveau: Use "new" NV40 USER control regs. + + Probably entirely pointless, but a simple change in any case. + +commit 7246a33dd104903bc9227628270712ea9e6168d8 +Author: Ben Skeggs +Date: Wed Nov 14 04:05:48 2007 +1100 + + nouveau: store user control reg offsets in channel struct + +commit d0904f0f2b87c725d3e67060419c445259bd4a5e +Author: Ben Skeggs +Date: Wed Nov 14 03:27:37 2007 +1100 + + nouveau: funcs to determine active channel on PFIFO. + +commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed +Author: Ben Skeggs +Date: Fri Nov 9 04:27:23 2007 +1100 + + nouveau: stub superioctl + +commit 793cd1dad5e248509a1b09dce7126f236efadb3e +Author: Jesse Barnes +Date: Sat Nov 10 14:39:36 2007 -0800 + + Make sure PLLs are enabled before writing pipe configuration regs + + Fix from the X driver. Make sure the PLLs are enabled and not in VGA mode + before writing PIPE(A|B)CONF regs to avoid hangs or crashes. + +commit c2f80ecf4be09b5b9866d12e3b25cdcf7996b1f4 +Author: Patrice Mandin +Date: Fri Nov 9 18:08:08 2007 +0100 + + suspend() and resume() need kernel 2.6.22 or later + +commit c20370e0969e41bbf735daf932e37ac5ec959213 +Author: Thomas Hellstrom +Date: Wed Nov 7 18:07:10 2007 +0100 + + Don't overwrite TTM page flags. + +commit 47497abc1e38081564db429329a3ba16198c1521 +Author: Dave Airlie +Date: Wed Nov 7 23:10:24 2007 +1000 + + i915: oops disable TTM is backwards + +commit 40fb079aebae4277813e6a32e2e93c81dc0038e3 +Author: Thomas Hellstrom +Date: Tue Nov 6 09:47:57 2007 +0100 + + Avoid buffers not ending up on a list in some cases. + +commit 20eecf2b884193d865419312290b2bb9f94ebf37 +Author: Thomas Hellstrom +Date: Tue Nov 6 09:36:25 2007 +0100 + + Add missing drm_regman.c file. + +commit 9280076b6710e8fcc9594b7f8db87176d3e92097 +Author: Dave Airlie +Date: Tue Nov 6 18:13:46 2007 +1100 + + i915: disable TTM on 8xx chips for now until flushing is solved + +commit 349eebd567246e3c2d47734772e882ae50723cb9 +Author: Dave Airlie +Date: Tue Nov 6 18:00:10 2007 +1100 + + i915: compat code doesn't work in i8xx hw. + +commit 81b7f9b71c45fc621e0b5770062aedf5ae5e57ee +Author: Zhenyu Wang +Date: Tue Nov 6 17:59:14 2007 +1100 + + [PATCH] i915: fix missing G33 detect in IS_I9XX + + G33 detect seems missing with Jesse's suspend/resume patch. + +commit b437c8ca0fe62a43661a31a3010284926d20f209 +Author: Dave Airlie +Date: Tue Nov 6 12:12:10 2007 +1000 + + drm/agp: kernel style fixes + +commit 9493ce6ca39b65b9f955943a043c0741a5c59f7c +Author: Dave Airlie +Date: Tue Nov 6 11:32:58 2007 +1000 + + i915: cleanup most of the whitespace + +commit 427cc561b3dfbd504472e284e5fc16b63acd1816 +Author: Thomas Hellstrom +Date: Mon Nov 5 13:22:00 2007 +0100 + + Export a symbol. + +commit 44ad6f409d6d08163d26e20d41b1601b2fde53d7 +Author: Thomas Hellstrom +Date: Mon Nov 5 13:20:16 2007 +0100 + + Fix a user-buffer check. + +commit 82ffcbbd628fc8c07d3becbbcb86a54214e78110 +Author: Dave Airlie +Date: Mon Nov 5 19:14:23 2007 +1000 + + drm: more kernel coding style cleanups + +commit 6ee5412da0cc7516472235805482b8632cb374ef +Author: Dave Airlie +Date: Mon Nov 5 19:09:18 2007 +1000 + + drm/ttm: apply linux kernel coding style to bo_lock/move/object/ttm.c + +commit 7ad38907075852e347b5b4432c96d199387f5ce8 +Author: Dave Airlie +Date: Mon Nov 5 19:05:32 2007 +1000 + + drm/ttm: kernel coding style for bo.c and objects.h + +commit 3b43ed51cca4cf4b03d74ee403b8a72b919f87c8 +Author: Dave Airlie +Date: Mon Nov 5 18:56:46 2007 +1000 + + drm: fix the the typo + +commit 78fe88baee9271ceaf6187019633e4cccfebb776 +Author: Li Zefan +Date: Mon Nov 5 18:48:27 2007 +1000 + + drm: fix memset size error + + The size passing to memset is wrong. + + Signed-off-by: Li Zefan + +commit 921bd07c242355d187018f36d74bd95fd0d02b17 +Author: Dave Airlie +Date: Mon Nov 5 12:56:55 2007 +1000 + + drm: update kernel generator script using v4l script + +commit 7f6bf84c238a1859ffd409c0ef1f1ca7eb5e6e72 +Author: Dave Airlie +Date: Mon Nov 5 12:42:22 2007 +1000 + + drm: remove lots of spurious whitespace. + + Kernel "cleanfile" script run. + +commit 3664de73955aafe912318c91717ff9ecc1027af2 +Author: Dave Airlie +Date: Mon Nov 5 12:10:52 2007 +1000 + + drm: move some of the OS stuff into the OS header + +commit d81bc78a04f3b72bdf2600158cea084223a3a682 +Author: Pekka Paalanen +Date: Thu Oct 25 22:34:45 2007 +0300 + + nouveau: more nv20_graph_init. + + This patch is originally from malc0_, but since it used some NV40_* + regs, I edited them into hex values with a comment. + This seems to correspond quite well with my own mmio-trace, + for the parts I cared to check. + +commit 5092865601ccaae1409abfa083147276916d6c25 +Author: Ben Skeggs +Date: Mon Nov 5 05:42:08 2007 +1100 + + nouveau: Use a sw method instead of notify interrupt to signal fence completion. + +commit 9096d50df7ac99f44d043556420f9f9f54e59b3f +Author: Ben Skeggs +Date: Mon Nov 5 05:15:32 2007 +1100 + + nouveau: disable m2mf buffer move for the moment + +commit 6abbbb2f4f5b6b280077a6c88bb643507c8ec8fa +Author: Ben Skeggs +Date: Mon Nov 5 04:44:40 2007 +1100 + + Fill fence sequence after emit ioctl. + +commit 0a2ab1a9003f132195fe70c145a78b4079a3fb7f +Author: Ben Skeggs +Date: Mon Nov 5 03:53:46 2007 +1100 + + nouveau: cleanups + +commit c1008104adcd45faad2c6c1a2192c86447f3d9a3 +Author: Ben Skeggs +Date: Mon Nov 5 02:35:56 2007 +1100 + + nouveau: only pass annoying messages if irq isn't handled fully. + +commit dfa449cf9a7ce5de9cbd571f604ae7c3c778dabd +Author: Ben Skeggs +Date: Mon Nov 5 02:32:46 2007 +1100 + + nouveau: vram is bar1 + +commit 173a5be28f4ed59e27d7a719f62bc275959b5b70 +Author: Ben Skeggs +Date: Mon Nov 5 02:20:35 2007 +1100 + + nouveau: hook up an inital fence irq handler + +commit 9a999e57af4a3f5a863c21154dd3b9618888c1f7 +Author: Ben Skeggs +Date: Mon Nov 5 00:01:38 2007 +1100 + + nouveau: crappy ttm mm init, disabled for now. + +commit a2e8e294d8e5d7cf179cb562745c1b613ff60e52 +Author: Dave Airlie +Date: Sun Nov 4 11:01:27 2007 +1100 + + drm: fix oops since user objects.. + +commit 998d120a47cab85e985b24932fe8f4682f5f78e9 +Author: Jeremy Kolb +Date: Fri Nov 2 19:46:27 2007 -0400 + + nouveau: add darktama's email address to authors section. + +commit 2dc2ee7a5aed18b82a1125d8e56a7ef92be18532 +Author: Jeremy Kolb +Date: Fri Nov 2 19:44:30 2007 -0400 + + nouveau: put it all together. + +commit c1aa08106e0a7190c7a303ec8a9b6b5339251137 +Author: Jeremy Kolb +Date: Fri Nov 2 19:43:53 2007 -0400 + + nouveau: Add darktama's fencing code. Restructure some stuff. + +commit 2c6cbea7dedc0b06114117b4c4ce2a23f74c54f6 +Author: Jeremy Kolb +Date: Thu Nov 1 23:35:46 2007 -0400 + + nouveau: incorporate darktama's buffer object work. + +commit 239e81093f05e7d81f95a55527f3c9fcb8fc483a +Author: Jeremy Kolb +Date: Thu Nov 1 19:04:38 2007 -0400 + + nouveau: more filling in for ttm. Change copyright since it's based off of radeon code. + +commit 94c22c334948a49641f4a1fa84687f992e5cc5cb +Author: Thomas Hellstrom +Date: Fri Nov 2 16:03:41 2007 +0100 + + User buffer support. + +commit c06808fb6521822238bca4574758f30246b71c2d +Author: Thomas Hellstrom +Date: Fri Nov 2 15:52:00 2007 +0100 + + Return fence errors. + Time out properly in the presence of signals. + +commit bb5f2158dbd30dbbffa3881fac75b71d71ecaaf9 +Author: Dave Airlie +Date: Sat Nov 3 00:39:44 2007 +1000 + + radeon: set the address to access the aperture on the CPU side correctly + + This code relied on the CPU and GPU address for the aperture being the same, + On some r5xx hardware I was playing with I noticed that this isn't always true. + I wonder if this will fix some of those r4xx DRI issues we've seen in the past. + +commit 128a8f7ea20af2549e448157b431d5c1f90f37c3 +Author: Jesse Barnes +Date: Thu Nov 1 15:02:26 2007 -0700 + + Use unsigned long instead of u64 in drm_modeset_ctl_t + + A bad idea, ABI-wise, but we're going to be changing this structure anyway + before we merge upstream, so just fix the build for now. + +commit 00d60265570c866261c09fd3397d5853a1ce196a +Author: Jesse Barnes +Date: Thu Nov 1 12:50:03 2007 -0700 + + Cleanup vblank_init and fix drm_irq_install + + The vblank_init function wanted a couple of cleanups. + + Also, drm_irq_install wasn't checking the new return value of irq_postinstall. + If it returns a failure, assume IRQs didn't get set up and take appropriate + action. + +commit 5766d81074d6faa7f14b45635765cdb7209597fc +Author: Stephane Marchesin +Date: Thu Nov 1 15:48:46 2007 +0100 + + nouveau: don't use AGP on PPC. It's a hopeless case. + +commit 1b176e76134224e2af94d24ff7b33c7b536eaeea +Author: Jeremy Kolb +Date: Wed Oct 31 21:27:00 2007 -0400 + + nouveau: add missing file. + +commit 9416541fb29666c630f2bcfcc0f3ae0b6c4436d8 +Merge: 31847b4... 61cbcb5... +Author: Jeremy Kolb +Date: Wed Oct 31 20:14:48 2007 -0400 + + Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm + +commit 31847b4b62575739a164e019b33ced0531683403 +Author: Jeremy Kolb +Date: Wed Oct 31 20:13:01 2007 -0400 + + nouveau: ttm stubs + +commit 61cbcb5dbe487c6d4eba04794cbaa0279ab807b0 +Author: Dave Airlie +Date: Thu Nov 1 10:34:11 2007 +1100 + + drm/ttm: add support for cached un-snooped mappings. + + This mapping allows cached objects to be mapped in/out of the TT space + with the appropriate flushing calls. + + It should put back the old CACHED functionality for snooped mappings + +commit 6b0b2546c29858866ae1986b3b7254551245967e +Author: Dave Airlie +Date: Thu Nov 1 02:00:36 2007 +1000 + + i915: fix compat code on 965/g33 + +commit 17f0882d5080a2436e4351c2bf497b8e00bc8e74 +Author: Dave Airlie +Date: Wed Oct 31 11:33:34 2007 +1100 + + drm: add chipset flushing via agp support + +commit 2489062a3319c72197914ee06b089ae581c5f0a8 +Author: Dave Airlie +Date: Wed Oct 31 11:27:44 2007 +1100 + + i915: add backwards compat chipset flushing code + +commit c106a7d8b9ddc1f6da3d462e3114af2ca72b3b46 +Author: Dave Airlie +Date: Wed Oct 31 11:21:05 2007 +1100 + + drm: call driver load after initing agp subsystem + +commit 91aae7e683786a48547872b0a5fa92b2232e02c0 +Merge: 7e9ea55... 79744d7... +Author: Jesse Barnes +Date: Tue Oct 30 12:52:46 2007 -0700 + + Merge branch 'master' into vblank-rework, fixup remaining drivers + + Conflicts: + + linux-core/drmP.h + linux-core/drm_drv.c + linux-core/drm_irq.c + shared-core/i915_drv.h + shared-core/i915_irq.c + shared-core/mga_drv.h + shared-core/mga_irq.c + shared-core/radeon_drv.h + shared-core/radeon_irq.c + + Merge in the latest master bits and update the remaining drivers (except + mach64 which math_b is working on). Also remove the 9xx hack from the i915 + driver; it seems to be correct. + +commit 79744d730c90019edd367eee4a8ec1fa22d53402 +Author: Stephane Marchesin +Date: Tue Oct 30 16:55:17 2007 +0100 + + Nouveau: add a comment about SKIPS for next API breakage. + +commit 0cebcd43dd7b950c07625601b87c72329857d831 +Author: Stephane Marchesin +Date: Tue Oct 30 16:54:57 2007 +0100 + + Nouveau: fold some loops. + +commit 50dec29c800a6e980a01be38190e44a0ba7916b5 +Author: Dave Airlie +Date: Tue Oct 30 17:51:59 2007 +1000 + + drm/i915: add driver cache flush entry point + + Use clflush on Intel hardware to flush cached objects. + +commit ff5889f8316e0c16112f114c1c8f57645b8dc54f +Author: Kristian Høgsberg +Date: Mon Oct 29 19:32:32 2007 -0400 + + Move struct drm_drawable_info out of public header file. + +commit 6342e0507be177be309774aff0c31746beab73f6 +Author: Jesse Barnes +Date: Mon Oct 29 10:51:11 2007 -0700 + + Remove unused memory save areas + + These need to be kmalloc'd separately anyway or we may hit kmalloc size + limits. + +commit cc745fcc3a16cb1ffc2ab578155dc880b862f95a +Author: Stephane Marchesin +Date: Sun Oct 28 01:59:11 2007 +0200 + + nouveau: don't touch PMC_BOOT_1 on x86, it seems to be undefined on some early cards. + +commit 1e2a2bababf3fbaa0a665983856761c2284dba30 +Author: Jesse Barnes +Date: Fri Oct 26 16:10:02 2007 -0700 + + i915: suspend/resume support + + Add suspend/resume support to the i915 driver. Moves some of the + initialization into the driver load routine, and fixes up places where we + assumed no dev_private existed in some of the cleanup paths. This allows + us to suspend/resume properly even if X isn't running. + +commit 6707ab862656d766a4c78b85e5584a29d2434126 +Author: Jesse Barnes +Date: Fri Oct 26 16:08:54 2007 -0700 + + update DRM sysfs support + + Make DRM devices use real Linux devices instead of class devices, which are + going away. While we're at it, clean up some of the interfaces to take + struct drm_device * or struct device * and use the global drm_class where + needed instead of passing it around. + +commit b9d8ddd3ca587e87474d37637096b9ebd0a927e9 +Author: Stephane Marchesin +Date: Fri Oct 26 15:11:38 2007 +0200 + + nouveau: flip the CHECK_STATE bit off on nv30. This lets you do 8-bit surface destination. + +commit a4c87d3796cac374d25e01b26bdbb9028ce03107 +Author: Thomas Hellstrom +Date: Fri Oct 26 10:31:14 2007 +0200 + + Minor libdrm fixes. + +commit 1681189e11b5a00ae72a55de932146ea37f7afd9 +Author: Thomas Hellstrom +Date: Fri Oct 26 10:25:57 2007 +0200 + + Buffer flags and masks are 64-bit. + + don't mask off the high dword. + Signed-off-by: Thomas Hellstrom + +commit 7e9ea55a2f052cc939ba9bbf9edac39798344b7a +Author: Ian Romanick +Date: Thu Oct 25 17:14:53 2007 -0700 + + Initial pass at porting MGA to vblank-rework + + This is currently only compile tested. + +commit b9d9c30474238ac8ba4899a19fe4a97e9376f6c4 +Author: Thomas Hellstrom +Date: Thu Oct 25 10:29:15 2007 +0200 + + Tighten permissions on some buffer manager ioctls. + Set bo init minor to 0. + Add the version function to header. + +commit 11f3e5e53f8fc4de90d1c289e0ba218ddfca23dc +Author: Thomas Hellstrom +Date: Thu Oct 25 10:12:21 2007 +0200 + + Buffer manager: + Implement a version check IOCTL for drivers that don't use + drmMMInit from user-space. + Remove the minor check from the kernel code. That's really up + to the driver. + Bump major. + +commit b5cad27e05ad3666be8ccdf71e10d743efa5849e +Author: Thomas Hellstrom +Date: Thu Oct 25 09:49:33 2007 +0200 + + Fix buffer object flag / mask checking. + +commit 07706c9b79b88baff5f160351b482ccdf3315f0c +Merge: 3d4b32e... a70fe82... +Author: Thomas Hellstrom +Date: Thu Oct 25 09:24:45 2007 +0200 + + Merge branch 'master' into drm-ttm-finalize + +commit a70fe82baf0ca2be98e02680cff489f90b0ea3de +Author: Dave Airlie +Date: Thu Oct 25 16:53:18 2007 +1000 + + i915: relocate buffers before validation add memory barrier between two + +commit c5f158abbe97492f56eb60ac54679945e9d6ddae +Author: Dave Airlie +Date: Thu Oct 25 16:52:33 2007 +1000 + + i915: remove relocatee kernel mapping sooner stops mutex taking during sleep + +commit 07abc3384e24356d1302459e2e5c4699ed7b0072 +Author: Roel Kluin <12o3l@tiscali.nl> +Date: Thu Oct 25 10:24:55 2007 +1000 + + missing mutex unlock bug + +commit 83199c257ea68a7cc0c6928109ff77bf25131819 +Author: Eric Anholt +Date: Wed Oct 24 16:27:46 2007 -0700 + + Fix missing \n on some DRM_ERROR in i915_dma.c + +commit fd7c24753c4020a0022aaa183cfe8fc04a307abd +Author: Dave Airlie +Date: Wed Oct 24 11:13:15 2007 +1100 + + i915: use a drm memory barrier define + +commit a294aa724a1e932fb6017383e08532bfcc914df0 +Author: Dave Airlie +Date: Tue Oct 23 17:54:07 2007 +1000 + + i915: require mfence before submitting batchbuffer + +commit 9a115080e870f8196adef4a19598343e63e61e45 +Author: Stephane Marchesin +Date: Tue Oct 23 02:18:56 2007 +0200 + + nouveau: fix IGP + +commit 3d4b32e91647f61712d54a46f0a173deff46e6b4 +Author: Thomas Hellstrom +Date: Mon Oct 22 19:16:39 2007 +0200 + + Remove duplicate file. + +commit 824330d0e652e0bab1851437f120c7e76feee832 +Author: Thomas Hellstrom +Date: Mon Oct 22 19:09:36 2007 +0200 + + Don't clobber the unfenced list with DONT_FENCE operations. + +commit 919c886b2b7728768720aac93e0f6fd1acb8b2df +Author: Thomas Hellstrom +Date: Mon Oct 22 18:59:37 2007 +0200 + + A cmdbuf mutex to implement validate-submit-fence atomicity in the absence + of a hardware lock. + +commit d4ce4be0dad516caa43fddcd8a56c28f264c9c2a +Author: Thomas Hellstrom +Date: Mon Oct 22 13:16:51 2007 +0200 + + Setstatus header. + +commit 22883ff26b8a45ab2bec60accc4b822cf6b4f214 +Author: Dave Airlie +Date: Mon Oct 22 11:54:41 2007 +1100 + + i915: split reloc execution into separate function + +commit 6420d33b02db0da900140c238bb35f13abc182e7 +Author: Thomas Hellstrom +Date: Sun Oct 21 12:57:43 2007 +0200 + + Get the lock flags right in libdrm. + +commit 4ebe7471cbfdd6afa33485ea9ec55812da38445f +Author: Thomas Hellstrom +Date: Sun Oct 21 12:31:00 2007 +0200 + + Disable i915 accelerated blit copy moves for now until we can + guarantee that it doesn't clash with the X server. + +commit 9ddff6d15fdff571193aac10ef81e67798fd712d +Author: Thomas Hellstrom +Date: Sun Oct 21 12:26:26 2007 +0200 + + Adapt i915 super-ioctl for lock-free operation. + +commit 3b19b50cb5cd31e60eb03e99dd1109b6d0f5b8a3 +Author: Thomas Hellstrom +Date: Sun Oct 21 12:20:56 2007 +0200 + + Remove the need for the hardware lock in the buffer manager. + Add interface entry cleaning a memory type without touching NO_EVICT buffers. + +commit 48b5eaf303b60077faed09db77785d7a544ac335 +Author: Thomas Hellstrom +Date: Sat Oct 20 16:49:43 2007 +0200 + + Simple replacement for hardware lock in some cases. + Fix i915 since last commit. + +commit c0e3537e77f1765001f665f93e5349ccd0f1d092 +Author: Thomas Hellstrom +Date: Fri Oct 19 16:44:12 2007 +0200 + + Some comment updates pending removal of the init mutex. + +commit 733ff568346e8fe40e9790f21f8b7efc659d5d12 +Author: Thomas Hellstrom +Date: Fri Oct 19 16:28:47 2007 +0200 + + No fence_class argument on drmBOSetStatus since it's not + associated with a particular command submission. + +commit cf2d1bba5513ae38d8efbaf50251fc136ed1d414 +Author: Thomas Hellstrom +Date: Fri Oct 19 16:24:36 2007 +0200 + + Remove the clean_unfenced function. + Change the restriction that non-creators can't change the buffer flags to + non-creators can't change EVICT and NO_MOVE flags. + +commit 2c5c18fbd394f419a9cf650720a1187440c643cd +Author: Robert Noland +Date: Wed Oct 17 13:25:31 2007 -0700 + + Bug #12838: Fix lock test client vs. server master race and misplaced closes. + +commit e7523d337997018a86530266a8f3f88dd061c138 +Author: Robert Noland +Date: Wed Oct 17 13:20:46 2007 -0700 + + Fix a race in the auth test where client prevents server from being master. + +commit 36120264ca8f43078f8748e022faeb9471edcb36 +Author: Jung-uk Kim +Date: Wed Oct 17 12:50:29 2007 -0700 + + Bug #11870: FreeBSD hardware lock cleanup fix with multiple opens by a process. + + Previously, the lock would get released on the first close by the X Server + (during AIGLX setup), and the Radeon driver would then hang in initialization + due to unexpected failure in DRM calls that required the lock to be held. + + Based on a patch by Kostik Belousov. + +commit bb29ba7fa77659be284c365ebfb2f740491e8506 +Author: Thomas Hellstrom +Date: Wed Oct 17 10:57:12 2007 +0200 + + Only allow creator to change shared buffer mask. + +commit 086c058a417317491320129d2cbeb68d1cfcfefe +Author: Thomas Hellstrom +Date: Wed Oct 17 10:55:21 2007 +0200 + + Remove the op ioctl, and replace it with a setuser ioctl. + + Remove need for lock for now. + May create races when we clean memory areas or on takedown. + Needs to be fixed. + Really do a validate on buffer creation in order to avoid problems with + fixed memory buffers. + +commit 0d1926d36e59ddfc34d8c9c0cdef10b71a49ecf1 +Author: Thomas Hellstrom +Date: Thu Oct 4 10:14:41 2007 +0200 + + Revert "Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning." + + This reverts cf2d569daca6954d11a796f4d110148ae2e0c827 commit. + +commit cd276d9cab0be8eff2d9450e5c95b6eb3cd639af +Author: Thomas Hellstrom +Date: Thu Oct 4 10:01:30 2007 +0200 + + Revert "Copy the important parts of object_validate into object_create()." + + This reverts f9c27aa50b715a7d21858f1ce9e4785120bd0c36 commit. + +commit 12b989a7108a52f16b1b1bb6dd2ea818c235b52c +Author: Thomas Hellstrom +Date: Thu Oct 4 09:51:01 2007 +0200 + + Revert "Remove the pinned buffer from the LRU when pinning." + + This reverts 3a0bc518e35c62bb9c64c9105f836584d949653f commit. + +commit 646560d1d112b58899f9e4cab0c966cec7e0b8c3 +Author: Thomas Hellstrom +Date: Thu Oct 4 09:50:29 2007 +0200 + + Revert "Add some more verbosity to drm_bo_set_pin_req comments." + + This reverts e7bfeb3031374653f7e55d67cc1b5c823849359f commit. + +commit ec1162b212248042bf1317abcb3c47bb10db8aa3 +Author: Dave Airlie +Date: Wed Oct 17 15:36:14 2007 +1000 + + i915: lock struct mutex about buffer object lookups + +commit db1709f2f3f8cab2477fb149b58420de4db65654 +Author: Michel Dänzer +Date: Tue Oct 16 15:10:08 2007 +0200 + + Revert part of earlier commit that caused an unresolved symbol for i915. + +commit 3f1aa1550353e828814169915c9a74c67d2e81cd +Author: Dave Airlie +Date: Tue Oct 16 22:28:00 2007 +1100 + + drm: drop drm bo list handling code + +commit efc4fd7c4dabed384fa1ab67e744d38025aff47d +Author: Dave Airlie +Date: Tue Oct 16 22:08:55 2007 +1100 + + drm: rename drmBOUnReference to drmBOUnreference for consistency + +commit a69c85fec8ed323bffb1324ea08157b3897e97db +Author: Kristian Høgsberg +Date: Tue Oct 9 21:09:31 2007 -0400 + + Drop destroy ioctls for fences and buffer objects. + + We now always create a drm_ref_object for user objects and this is then the only + things that holds a reference to the user object. This way unreference on will + destroy the user object when the last drm_ref_object goes way. + +commit dccefba71a65566e7e1628b3be67621866000411 +Author: Kristian Høgsberg +Date: Tue Oct 9 21:09:30 2007 -0400 + + Take bo type argument out of the ioctl interface. + + The buffer object type is still tracked internally, but it is no longer + part of the user space visible ioctl interface. If the bo create ioctl + specifies a non-NULL buffer address we assume drm_bo_type_user, + otherwise drm_bo_type_dc. Kernel side allocations call + drm_buffer_object_create() directly and can still specify drm_bo_type_kernel. + Not 100% this makes sense either, but with this patch, the buffer type + is no longer exported and we can clean up the internals later on. + +commit 440fc5113ef1ffb1a22bff92cf34eaf23896db8d +Author: [utf-8] Kristian Høgsberg +Date: Tue Oct 9 21:09:29 2007 -0400 + + Eliminate support for fake buffers. + +commit 9fdab5b5c512f586012654917438327b3c67eaa4 +Author: Ben Skeggs +Date: Tue Oct 16 14:43:57 2007 +1100 + + nouveau: revert unintended change. + +commit 677753047f2b8a8b0b12bae348a2f4f9718682f1 +Author: Ben Skeggs +Date: Tue Oct 16 14:42:26 2007 +1100 + + nouveau: Cleanup PGRAPH handler, attempt to survive PGRAPH exceptions. + +commit 3af053779cb0fe9b75a657df76c3dd0cc08966b6 +Author: Ben Skeggs +Date: Tue Oct 16 13:32:03 2007 +1100 + + nouveau: Survive PFIFO_CACHE_ERROR. + +commit 6398325ba11da8a01c72f6203af0a2e4b43125c2 +Author: Ben Skeggs +Date: Tue Oct 16 13:27:27 2007 +1100 + + nouveau: Handle multiple PFIFO exceptions per irq, cleanup output. + +commit 30353c8efcc026ee8940f3eadab084c42a3acd4e +Author: Stephane Marchesin +Date: Sun Oct 14 23:07:30 2007 +0200 + + nouveau: PPC fixes. These regs are very touchy. + +commit 837e364353b3137ce87b5cce9c06f05a3d603201 +Author: Jeremy Kolb +Date: Sun Oct 14 10:56:31 2007 -0400 + + nouveau: fix warning. + +commit 811e43f9e27abdf4c8a4b36c7c287e53134fc950 +Author: Jeremy Kolb +Date: Sun Oct 14 10:56:17 2007 -0400 + + nouveau: fix warning. + +commit 8d3cb7e472ceb31a28de3acc19176e3a2d2995b1 +Author: Dave Airlie +Date: Sun Oct 14 21:19:13 2007 +1000 + + i915: fix vbl_swap allocation + +commit 3ab7627651f4c48a114d91158d41e4c4f528c4cc +Author: Pekka Paalanen +Date: Fri Oct 12 23:55:59 2007 +0300 + + nouveau: Fix a typo in nv25_graph_context_init + +commit 50deb31e9ff556f941449bc788821eaa2e5f9e34 +Author: Stuart Bennett +Date: Tue Oct 9 20:39:10 2007 +0100 + + nouveau: Fix typos in nv20_graph_context_init + +commit 0d2554f83e72cae1bc44e476fbed4fc78873264f +Author: Pekka Paalanen +Date: Fri Oct 12 23:43:31 2007 +0300 + + nouveau: Make notifiers go into PCI memory + + On some hardware notifers in AGP memory just don't work. + +commit 9d779e2c88a02f5f9d57618145654610f0f10e28 +Author: Arthur Huillet +Date: Fri Oct 12 22:39:58 2007 +0200 + + nouveau: mandatory "oops I forgot half of the files" commit + +commit 74ea019863c1d08d31eac81d3bfc73e97479b2c5 +Author: Arthur Huillet +Date: Fri Oct 12 22:35:39 2007 +0200 + + nouveau: added support for software methods, and implemented those necessary for NV04 (TNT1) to start X + +commit 74001c34e5ad768feec8b2fbe9a617bc598a0a4b +Author: Dave Airlie +Date: Fri Oct 12 10:54:38 2007 +1000 + + i915: add superioctl support to i915 + + This adds the initial i915 superioctl interface. The interface should be + sufficent even if the implementation may needs fixes/optimisations internally + in the drm wrt caching etc. + +commit 604f02ff619d87d1372bcb7969c826d981fefc60 +Author: Dave Airlie +Date: Fri Oct 12 09:46:11 2007 +1000 + + i915: check mask instead of flags for buffer fence types + +commit f0fd53f86b30e230f3f34b49b54392d20f053a89 +Author: Eric Anholt +Date: Wed Oct 10 15:31:00 2007 -0700 + + FreeBSD: Fill in domain field when supported. + +commit fc7d4d19d36b6a12ed23d4d9e50826346258299f +Author: Ian Romanick +Date: Wed Oct 10 15:27:07 2007 -0700 + + Eliminate trailing whitespace from last commit. + +commit 83da774b192966b8c3f00b531ecfd4ec2b5eceaa +Author: Ian Romanick +Date: Wed Oct 10 15:25:30 2007 -0700 + + Fix command list submission on big-endian. + +commit bf126f4925bf1601935e085be2feeb004b474a05 +Author: Matthieu Castet +Date: Wed Oct 10 21:11:43 2007 +0200 + + nouveau : nv10 and nv04 PGRAPH_NSTATUS are different + +commit d912709a63c59d0b3e48458bac41fb76ea279214 +Author: Maarten Maathuis +Date: Wed Oct 10 16:41:21 2007 +0200 + + nouveau: PMC_BOOT_1 was not mapped. + +commit d4680333dc850832258d0f38fb2a236a3f568fc8 +Author: Thomas Hellstrom +Date: Wed Oct 10 09:31:51 2007 +0200 + + Only add native-type on EXE signals. Otherwise flush flags may + get out of sync. + +commit 9b294bbe0ec79177298ea32746fbed03fcf62055 +Author: Stephane Marchesin +Date: Wed Oct 10 01:12:20 2007 +0200 + + nouveau: try to fix big endian. + +commit 20928a2f2b3f1fa15c46edcf7e20f97566664ce8 +Author: Maarten Maathuis +Date: Sun Oct 7 19:01:56 2007 +0200 + + nouveau: A char is signed, so it may overflow for >NV50. + +commit 18952a167014f21545e3fda28ed2c09b09789323 +Author: Matthieu Castet +Date: Sat Oct 6 12:00:08 2007 +0200 + + nouveau : print correct value in nouveau_graph_dump_trap_info for nv04 + +commit 19b7cc34443889fc73de2e10462e1c0f9fa38041 +Merge: d351601... 495bbba... +Author: Dave Airlie +Date: Fri Oct 5 12:11:43 2007 +1000 + + Merge branch 'pre-superioctl-branch' + +commit d351601899e5814d809b8e86ab6f0d6e7676f585 +Author: Maarten Maathuis +Date: Thu Oct 4 09:46:16 2007 +0200 + + nouveau: Remove excess device classes. + +commit 319436c5cc51a1beb641e899987969fcf912deda +Author: Maarten Maathuis +Date: Thu Oct 4 09:39:31 2007 +0200 + + nouveau: NV47 context switching voodoo + warning + +commit b510517d59efcb45cc7079743be967bee122b251 +Author: Maarten Maathuis +Date: Thu Oct 4 09:31:46 2007 +0200 + + nouveau: Switch over to using PMC_BOOT_0 for card detection. + +commit 5ca12104f8a3eebecae6d238c1c456c8e6540ae3 +Author: Maarten Maathuis +Date: Tue Oct 2 21:54:37 2007 +0200 + + linux-drm: Obey device class requirements when detecting devices. + +commit 495bbbaadc93c574eb98dd2ad64bdca4d91d4152 +Author: Dave Airlie +Date: Thu Oct 4 16:13:22 2007 +1000 + + drm: fix page count calculation + + Also no need to do pre-populate work on single page + +commit 7fbd10d93310345164d1e65da281848b05493797 +Author: Stephane Marchesin +Date: Thu Oct 4 03:43:59 2007 +0200 + + nouveau: nv2a drm context switch support. + +commit 0379919e99542bc50cf9d0a8a3996b2896ec4e64 +Author: Ian Romanick +Date: Wed Oct 3 14:12:16 2007 -0700 + + Use 'ifdef __BIG_ENDIAN' instead of 'if __BIG_ENDIAN' + +commit 7f99fd5d7aa1f0d2463907d9d8c483b6249ac831 +Author: Ian Romanick +Date: Wed Oct 3 14:08:18 2007 -0700 + + First round of byte-ordering fixes for PowerPC. + + This isn't 100% as command submission via PCI-e GART buffers doesn't work. + I've hacked around that for the time being. This is essentially the code + that was used at the POWER.org event to show Bimini. + +commit a72eb27fbc7a66e35018ffbcb5137cfaaf4049aa +Author: Pekka Paalanen +Date: Tue Oct 2 21:56:01 2007 +0300 + + nouveau: nv20 graph_create_context difference + + nv20 writes the chan->id to a different place than nv28. + This still does not make nv20 run nv10_demo. + +commit afc57ef1dfb5bdf17411505d4dfbb03863a870bf +Author: Pekka Paalanen +Date: Tue Oct 2 21:51:14 2007 +0300 + + nouveau: fix nv25_graph_context_init + + It was writing 4x the data in a loop. + +commit ffa3173ec4bb5a310b3f8539bb6c2f8589ce2ed5 +Author: Stuart Bennett +Date: Tue Oct 2 15:45:30 2007 +0100 + + nouveau: nv20 graph context init + +commit b0473699ed7bef4efd0742e0a350d345a7cc9a0c +Author: Dave Airlie +Date: Tue Oct 2 15:48:28 2007 +1000 + + ttm: returning into dummy causes a buffer object leak + + as nobody ever derefs dummy, however not returning does the deref + correctly. + +commit 69fcfb413e72ad2204d306f20af6547819e040da +Author: Maarten Maathuis +Date: Mon Oct 1 22:21:23 2007 +0200 + + nouveau: Fix dereferencing a NULL pointer when erroring out during initialization. + +commit e1600646a90f11c7a5874c83bda6f70f789f7f48 +Author: Stephane Marchesin +Date: Mon Oct 1 03:28:10 2007 +0200 + + nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but causes nv30 issues. + +commit 75e8f4b5cfdff0bb62ce8439ecf743cd12fc560d +Author: Matthieu Castet +Date: Sun Sep 30 23:19:39 2007 +0200 + + nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLE + +commit 9cd6ece3079373eddff320a1d3e09bfe2a35be83 +Author: Matthieu Castet +Date: Sun Sep 30 23:09:30 2007 +0200 + + nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle + Also clean PGRAPH_CHANNEL macros + +commit aa135ba8e86d43a738973a25d638b7dc4cdddc55 +Author: Pekka Paalanen +Date: Sun Sep 30 22:04:53 2007 +0300 + + nouveau: rename nv30_graph.c to nv20_graph.c + +commit 205403aea8213ffc0e36f4103d78d62bf1584a69 +Author: Pekka Paalanen +Date: Sun Sep 30 21:10:06 2007 +0300 + + nouveau: nv30 graph function renames, removed nv20_graph.c + + All nv30 functions in nv30_graph.c that can be used on nv20 are renamed + as accordingly. nv20 specific parts from nv20_graph.c are moved into + nv30_graph.c. + +commit a67060c810613059b71c14e9fa91ea114fcf0106 +Author: Pekka Paalanen +Date: Sun Sep 30 18:14:24 2007 +0300 + + nouveau: graph ctx init nv25 + + According to mmio_trace_900XGL.tar.bz2 by Evan Fraser the nv25 init is + exactly the same as nv28 init. + +commit aa2c3379914fc6fea63bfcfd8579ab6cd8d70a68 +Author: Pekka Paalanen +Date: Sun Sep 30 12:03:22 2007 +0300 + + nouveau: nv28 graph context init + +commit 8ad605a2644251a400700e6f0e25ef76a1c80628 +Author: Pekka Paalanen +Date: Sat Sep 29 23:17:19 2007 +0300 + + nouveau: let nv20 hardware do ctx switching automatically. + +commit dc592c8b7bc12d16c658648f124792ac4d2882b9 +Author: Pekka Paalanen +Date: Sat Sep 29 23:06:29 2007 +0300 + + nouveau: Make nv20 use the nv30 PGRAPH ctx functions. + +commit 88bdb38cea60cea918b6e6a1ca97a7ec3de5b832 +Author: Pekka Paalanen +Date: Sat Sep 29 21:09:09 2007 +0300 + + nouveau: Change couple constants to symbols. + +commit a45fce77125aafc42c2cae6b5a896526ec4ab630 +Author: Pekka Paalanen +Date: Sat Sep 29 21:07:46 2007 +0300 + + nouveau: NV30 should never call nouveau_nv20_context_switch(). + +commit fb3ed99fb110a540d16923417c33ff581721ba3a +Author: Matthieu Castet +Date: Sun Sep 30 14:50:22 2007 +0200 + + nouveau : pgraph_ctx dynamic alloc for nv04, nv10 + +commit c76e04828bd5849f526fae5af7deaf1cbc9f4c55 +Author: Matthieu Castet +Date: Sun Sep 30 14:21:47 2007 +0200 + + nouveau : nv04 don't use chan->pgraph_ctx array + This commit is a first step to dynamic alloc pgraph context on nv04, nv10. + +commit f8f31f04574cd6986d7d9ef2215bbb23e0f44b73 +Author: Matthieu Castet +Date: Sat Sep 29 23:06:29 2007 +0200 + + nouveau : stop the fifo of the channel we are deleting + +commit 097db7a9b0cd0e53fb82dffa57c662f327c19670 +Author: Matthieu Castet +Date: Sat Sep 29 23:05:44 2007 +0200 + + nouveau : nv1x fix strange corruption + that appears when running glxgears and nouveau demo + +commit f863d23e01bf0b851c2c7addedfaec77ef951a0c +Author: chaohong guo +Date: Sat Sep 29 18:06:47 2007 +0200 + + radeon: Commit the ring after each partial texture upload blit. + + This makes sure each blit starts as early as possible, which may improve + texture upload performance in some cases. + +commit 215eab6ccfb6d3a22218f996c8215a7dcaf65d01 +Author: Michel Dänzer +Date: Thu Sep 27 08:01:58 2007 +0200 + + Don't build without any optimization on Linux. + + Building without optimization causes the drm module not to link correctly on + ppc. + +commit 72134e939eda578bc53746bf43f7096cbeaf9b7b +Author: Matthieu Castet +Date: Fri Sep 28 21:28:47 2007 +0200 + + nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array. + This avoid hardcoding pgraph_ctx size and potential buffer overflow. + +commit 0bb2395a8be0c33cc687dfd6aae7df81a82ed8e5 +Author: Jesse Barnes +Date: Fri Sep 28 10:10:08 2007 -0700 + + Revert drm_i915_flip_t braindamage + + I should not have renamed this field. + I should not have renamed this field. + I should not have renamed this field. + + On the plus side, it was at least binary compatible. + +commit 24cdd2f8c494573e1f84a752ae4eccec8890347a +Author: Keith Packard +Date: Wed Sep 26 14:25:10 2007 -0700 + + Allow parallel module compile + +commit b44925b2a553df6a611db320b553336a946aa1a8 +Author: Alan Hourihane +Date: Wed Sep 26 16:18:19 2007 +0100 + + Add brackets + +commit 6671ad1917698b6174a1af314b63b3800d75248c +Author: Alan Hourihane +Date: Wed Sep 26 15:38:54 2007 +0100 + + don't copy back if an error was returned. + +commit c4b3a0f602abd02038f7e5dd45fcfb2df4b5fcfa +Merge: 0774090... 03c47f1... +Author: Thomas Hellstrom +Date: Tue Sep 25 18:03:31 2007 +0200 + + Merge branch 'master' into pre-superioctl-branch + + Conflicts: + + linux-core/drm_bo.c + linux-core/drm_fence.c + linux-core/drm_objects.h + shared-core/drm.h + +commit 03c47f1420bf17a1e0f2b86be500656ae5a4c95b +Author: Dave Airlie +Date: Tue Sep 25 16:16:14 2007 +1000 + + drm: use fence_class as name instead of class + +commit bb5516f4f47d16d5d59797fa170abd50d35377a7 +Author: Dave Airlie +Date: Wed Sep 12 23:50:38 2007 +1000 + + drm/ttm: fixup fence class naming and interfaces + + This is some code for nouveau that Ben Skeggs worked on, and also + fixes the naming (having class in a system header file == C++ keyword == bad plan) + +commit 54df1b9ff3b79097fedd8ed7bf54aca30a660cbd +Author: Thomas Hellstrom +Date: Sat Sep 22 14:30:55 2007 +0200 + + Fix pinned buffer fence class. + +commit 0774090d5b7d3eba734086b437021039bc19c365 +Author: Thomas Hellstrom +Date: Sat Sep 22 13:59:56 2007 +0200 + + Fix drm_bo.c compiling. + +commit bea727b8387f3094b9921004d7686a2d77184466 +Author: Thomas Hellstrom +Date: Sat Sep 22 13:38:36 2007 +0200 + + Make nouveau compile on older kernels. + +commit da63f4ba0f15c3ae614eba92c8219670c674727e +Author: Thomas Hellstrom +Date: Sat Sep 22 13:34:33 2007 +0200 + + Add fence error member. + + Modify the TTM backend bind arguments. + Export a number of functions needed for driver-specific super-ioctls. + Add a function to map buffer objects from the kernel, regardless of where they're + currently placed. + A number of error fixes. + +commit 24e33627c5dfb92324a9faf1c7d366e7f33e622a +Merge: 7587e96... e7bfeb3... +Author: Eric Anholt +Date: Fri Sep 21 17:05:21 2007 -0700 + + Merge branch 'bo-set-pin' + + This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a + separate privileged ioctl to pin buffers like NO_EVICT meant before. The + functionality that was supposed to be covered by NO_MOVE may be reintroduced + later, possibly in a different way, after the superioctl branch is merged. + +commit e7bfeb3031374653f7e55d67cc1b5c823849359f +Author: Eric Anholt +Date: Fri Sep 21 16:14:22 2007 -0700 + + Add some more verbosity to drm_bo_set_pin_req comments. + +commit 3c995c2c4d2530e5bd01548764b20c4d062fd7a5 +Author: Eric Anholt +Date: Fri Sep 21 15:58:02 2007 -0700 + + Fix mapCount refcounting on unmap, even though the value is unused. + +commit 7587e9682c1b70930c015915d588b42ccd00c7c4 +Author: Stephane Marchesin +Date: Fri Sep 21 22:42:39 2007 +0200 + + nouveau: fix ppc and get it right this time. + +commit dc60c452e6ac72ebc4e5c73153d4d9d8c9edfae5 +Author: Stephane Marchesin +Date: Fri Sep 21 22:27:53 2007 +0200 + + nouveau: fix notifiers on PPC. + +commit 74c6f2f47a9977fef8fcc7c698862d5bd2f54336 +Author: Stephane Marchesin +Date: Fri Sep 21 22:04:45 2007 +0200 + + nouveau: add some checks to the nv04 graph switching code. + +commit bc5423f16838257a040a55b88df9588d268fda06 +Author: Dave Airlie +Date: Thu Sep 20 14:01:29 2007 +1000 + + drm_sysfs: update sysfs code from kernel + +commit 3d3a96ad4e5596187236898ca241515a21661b69 +Merge: 0055fd5... e349b58... +Author: Eric Anholt +Date: Wed Sep 19 15:55:58 2007 -0700 + + Merge branch 'origin' into bo-set-pin + +commit e349b58b4a6ebfe299720cb921039a600c145e65 +Author: Michel Dänzer +Date: Tue Sep 18 21:03:22 2007 +0100 + + i915: Reinstate check that drawable has valid information in i915_vblank_swap. + +commit 78d111fa967d18e7f9f9b2acd26aff20b884eb6c +Author: Michel Dänzer +Date: Tue Sep 18 20:55:43 2007 +0100 + + i915: Fix scheduled buffer swaps. + + One instance of unlocking a spinlock was converted incorrectly when this code + was fixed to build on BSD. + +commit a3881ad2fef99aaf0a863609a847020ea822798c +Author: Ian Romanick +Date: Tue Sep 18 11:03:49 2007 -0700 + + Add ioc32 compat layer for XGI DRM. + +commit e7d4a26913ba3a4949ac36280925062948ee21ce +Author: Ian Romanick +Date: Tue Sep 18 11:03:08 2007 -0700 + + Fix ioc32 compat layer + + Previously any ioctls that weren't explicitly listed in the compat ioctl + table would fail with ENOTTY. If the incoming ioctl number is outside the + range of the table, assume that it Just Works, and pass it off to drm_ioctl. + This make the fence related ioctls work on 64-bit PowerPC. + +commit 41345b95a2cdc1e509171d31fc8aed8cecb43dbd +Author: Brian +Date: Wed Sep 12 12:05:15 2007 -0600 + + Added bool typedef added in kernel 2.6.19 + + This allows the xgi code to compile with older kernels. + +commit c453135789597648ef5aa641c4e59bb5b5e320de +Author: Brian +Date: Wed Sep 12 11:48:48 2007 -0600 + + Added idr_replace() function which was apparently added in Linux 2.6.18 + + Someone should probably double-check my work here since this is the + first time I've touched drm_compat.[ch] + +commit 852232fb803bef92b12136be2766ddee3e3613b2 +Author: Jesse Barnes +Date: Wed Sep 12 08:55:33 2007 -0700 + + Remove plane->pipe mapping from SAREA private after all + + We can figure out which pipe a given plane is mapped to by looking at the + display control registers instead of tracking it in a new SAREA private field. + If this becomes a performance problem, we could move to an ioctl based solution + by adding a new parameter for the DDX to set (defaulting to the old behavior if + the param was never set of course). + +commit 7fdf98051a51a0117f415f7f7374f2b4d0b2e531 +Merge: 3cb8acd... 0bd8752... +Author: Jesse Barnes +Date: Tue Sep 11 03:50:17 2007 -0700 + + Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm + +commit 3cb8acd5abcb410ab2982f55aec94b5a793a47d6 +Author: Jesse Barnes +Date: Tue Sep 11 03:48:46 2007 -0700 + + Disambiguate planes & pipes for swap operations + + This mod makes the SAREA track plane to pipe mappings and corrects the name of + the plane info variables (they were mislabeled as pipe info since until now all + code assumed a direct mapping between planes and pipes). + + It also updates the flip ioctl argument to take a set of planes rather than + pipes, since planes are flipped while pipes generate vblank events. + +commit 0bd8752a0cb8afb7f29a5f659c3459aab42d9955 +Author: Patrice Mandin +Date: Mon Sep 10 18:52:17 2007 +0200 + + nouveau: nv10: add combiner registers + +commit 00bb534a546a4ca4bb6e167f5b387fa8156f4ca7 +Author: Matthieu Castet +Date: Sun Sep 9 15:49:33 2007 +0200 + + nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load + +commit b2ee72f4400999b2cf783256547fe8c7bfa698f5 +Author: Matthieu Castet +Date: Sun Sep 9 12:13:00 2007 +0200 + + nouveau : nv10 pipe ctx switch load/save. + + This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes + +commit f19d80b0465d9ba93005d8499654e3256494c831 +Author: Maarten Maathuis +Date: Sat Sep 8 22:19:00 2007 +0200 + + nouveau: Add Quadro NVS 140 pciid + +commit 06bb07259531d10df2c1979919af899e3812057b +Author: Ben Skeggs +Date: Fri Sep 7 20:07:13 2007 +1000 + + nouveau: Use nv41 ctxprog/vals on nv42. + +commit 54c96cbc46a21e05cf991d0e4a26da58bd87ce85 +Merge: edf5a86... c597bd5... +Author: Ian Romanick +Date: Thu Sep 6 15:37:52 2007 -0700 + + Merge branch 'xgi-0-0-2' + +commit c597bd57eee3ea05a3b8c851615c7351d0b32fce +Author: Ian Romanick +Date: Thu Sep 6 15:20:52 2007 -0700 + + Bump version to 1.0.0. + +commit edf5a86a269690b0e42a5cee7d4ac3828b42ca3e +Author: Stephane Marchesin +Date: Thu Sep 6 02:46:45 2007 +0200 + + nouveau: fix some nv04 graph switching. + +commit ff9a019cf06b7ebaf2fa8dee8e37c866ca4623af +Author: Stephane Marchesin +Date: Thu Sep 6 02:12:05 2007 +0200 + + nouveau: add pure nv30 support. + +commit ef4944de85b974e6b91087fdcb8f241f2619d28d +Author: Maarten Maathuis +Date: Tue Sep 4 18:51:57 2007 +0200 + + Add context init voodoo and context switch code for NV41. + +commit fee49e2071f2f528d7041bf1f14c640fff7478cc +Merge: bb3da88... bac3f49... +Author: Ian Romanick +Date: Fri Aug 31 10:54:55 2007 -0700 + + Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2 + +commit bb3da88601749cd647632eed86fb57dfd7cb81ee +Author: Ian Romanick +Date: Fri Aug 31 10:48:13 2007 -0700 + + Acutally emit the IRQ (duh) when setting the fence post. + +commit bac3f49daa54bf34ea21854be23061d10a0d0d1b +Author: Stephane Marchesin +Date: Fri Aug 31 01:39:40 2007 +0200 + + nouveau: nv04 context switching support. Works for starting X up at least. + +commit 69b11f44f0a0cfe0806e18dae2f360bc1ed8e005 +Author: Stephane Marchesin +Date: Thu Aug 30 21:51:53 2007 +0200 + + nouveau: give nv03 the last cut. + +commit 9c5b9d458bc618fb9d7d8590c866655e92f9cb0b +Author: Ian Romanick +Date: Wed Aug 29 14:41:49 2007 -0700 + + Use ati_pcigart for PCI-e GART table handling. + +commit c46ffd6b2943332a88589fb525305ffd09d35b8d +Author: Ian Romanick +Date: Wed Aug 29 00:23:30 2007 -0700 + + Fix late night dumb-dumb mistake. + +commit 2bcd5b5e330843e1e1a5f0a19105ecd33e76b00b +Author: Ian Romanick +Date: Wed Aug 29 00:04:18 2007 -0700 + + Use DRM_SPINLOCK / DRM_UNSPINLOCK macros. + +commit c78e610fa42c8122ed6bc504222ef650f5693d22 +Author: Keith Packard +Date: Tue Aug 28 12:23:51 2007 -0700 + + Add register defines for hw binning + +commit 589707b765eee78cc278c10603e2c858bb819436 +Author: Dave Airlie +Date: Tue Aug 28 15:17:11 2007 +1000 + + drm: remove XFREE86_VERSION macros + +commit a331d2e352675be260254e8abef412540ead9c30 +Author: Matthieu Castet +Date: Sun Aug 26 20:48:32 2007 +0200 + + nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition + + - fix offset for nv04 + - use it in nv10 graph ctx switch for getting next channel + - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+ + +commit 4182fce4084f4d884a7435b8ad2acb5c209f4544 +Author: Matthieu Castet +Date: Sat Aug 25 22:10:45 2007 +0200 + + nouveau : nv1x graph reworks + + - add forgotten init value + - use the same PGRAPH_DEBUG than the blob + - remove init of ddx reg : it should be done with object + - better handle of channel destruction + + hope I didn't break anything ;) + +commit 502bbdbe14fa458ed06c7fa4b1ccb63e4f126625 +Author: Patrice Mandin +Date: Sat Aug 25 00:12:58 2007 +0200 + + nouveau: nv10: output a warning if last channel invalid, and switch to next + +commit 98750111961a5729eba9433b927f8c24548fbace +Author: Patrice Mandin +Date: Thu Aug 23 10:18:34 2007 +0200 + + nouveau: nv10: check some NULL pointers inside context switch + +commit 8645dac8952473dc3e09ba7a7a9db3fbdf75215f +Author: Matthieu Castet +Date: Wed Aug 22 23:17:56 2007 +0200 + + nouveau : fix some potential crashes with objects causing hash collision + +commit 11c46afe7599cf3cefd30a7e55325a1a1aa8e5ba +Author: Ben Skeggs +Date: Wed Aug 22 13:23:49 2007 +1000 + + nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do. + +commit a654c0341a7892307522ed6e7f4518cc7e28a99e +Author: Ben Skeggs +Date: Wed Aug 22 13:17:19 2007 +1000 + + nouveau/nv40: Dump extra info on ucode state if ctx switch fails. + +commit 81eaff44c47cfb23e96b1cb848df5fd7ea24f913 +Author: Ben Skeggs +Date: Wed Aug 22 13:09:27 2007 +1000 + + nouveau: NV4c ctx ucode. + + Seems we already have a nv4c_ctx_init() somehow, a quick check shows the + ucode matches it still. + +commit ae883c97ad7af5529d40c8d52c2da614d34233e0 +Author: Ben Skeggs +Date: Wed Aug 22 12:54:26 2007 +1000 + + nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit. + +commit c8ee6a6cabbd44c06e382f99c2691d3efe46b984 +Author: Stephane Marchesin +Date: Wed Aug 22 04:20:09 2007 +0200 + + nouveau: redo nv30_graph.c. Should work better, but we still lack a couple of cards. + +commit 76337bdb19fb6a098fc6d6ceaafb58a4ed15f9b0 +Author: Stephane Marchesin +Date: Mon Aug 6 17:42:31 2007 +0200 + + nouveau: fix the comment and debug message for PCIGART size + +commit 03c0490129816b5f5b40855438e948fdae572d06 +Author: Ben Skeggs +Date: Tue Aug 21 02:23:21 2007 +1000 + + nouveau: Add NV44 ctx ucode. Patch from stillunknown. + + Microcode is similar enough to the NV4A one that it should be able to use + the same initial PGRAPH context. One day this mess will go away, honest.. + +commit 216f1b0573b2c0e39ac82c7f56235c1003e9bd4d +Author: Ben Skeggs +Date: Tue Aug 21 02:18:27 2007 +1000 + + nouveau: Poke 0x2230 on NV47 also. + + Makes 0x2220 work the same way as on NV40. + +commit c8760c7999b8aeb6d51b09c062331f518953a920 +Author: Patrice Mandin +Date: Sun Aug 19 18:45:01 2007 +0200 + + Check also for Linux, as it's not supported on different OS + +commit a122e7dabfaade751e8f6bb6d1488902fd36a40e +Author: Patrice Mandin +Date: Sun Aug 19 18:41:18 2007 +0200 + + Function pci_get_bus_and_slot needs 2.6.19 or later + +commit 3383e8bd6bcd2323c81252e617c8522593baf818 +Author: Ian Romanick +Date: Fri Aug 17 10:53:18 2007 -0700 + + Remove unnecessary include. + +commit 0d3c741df19c35307723422c1f2f28a23995823d +Author: Ian Romanick +Date: Thu Aug 16 13:43:04 2007 -0700 + + Forgot to add this file on the last commit. + +commit 0055fd5c35306a6363b0414f7f2220b3d1c27ecc +Merge: 3a0bc51... 02c4e0e... +Author: Eric Anholt +Date: Thu Aug 16 09:23:09 2007 -0700 + + Merge branch 'master' into bo-set-pin + +commit 8a4d7f34d9c0182c466518c6f413d9a039db402d +Author: Ben Skeggs +Date: Fri Aug 17 01:12:46 2007 +1000 + + nouveau: Detect memory on NFORCE/NFORCE2 correctly. + +commit d8a800b63de09f41d482d2b3367e4da67ed0f92b +Author: Ian Romanick +Date: Wed Aug 15 21:05:26 2007 -0700 + + Implement fence support. + +commit b668d6d9050106bebfb704e4ed32d2924bb26371 +Author: Eric Anholt +Date: Wed Aug 15 14:29:31 2007 -0700 + + Fix dev->agp->base initialization on BSD, and fix addmap range check on Linux. + + With the previous linux commit, an AGP aperture at the end of the address space + would have wrapped to 0 and the test would have failed. + +commit 6e93c35ba7c5001e756d0c9d1a4f534384652a5a +Author: Eric Anholt +Date: Wed Aug 15 13:42:04 2007 -0700 + + BSD: Return EINVAL if drm_unlock is called on an unheld or other-owner lock. + +commit 9254e00e4bbbc02282415cd0ca7bd6b5cb52be82 +Author: Eric Anholt +Date: Wed Aug 15 13:41:24 2007 -0700 + + Add a set of tests for DRM locking, exposing issues on BSD. + +commit 8a1ca401b403848d894f664977f9e939eaf07291 +Author: Eric Anholt +Date: Wed Aug 15 13:13:24 2007 -0700 + + Fix a bad error message in auth.c regression test. + +commit d1a2b26a99205b802919aa0901b4e19cb2d251fe +Author: Eric Anholt +Date: Wed Aug 15 13:08:19 2007 -0700 + + Require master in setversion test, since it requires auth. + +commit a9ee144eab5bbd5f90747c38cdc016da46c124fe +Author: vehemens +Date: Wed Aug 15 11:12:46 2007 -0700 + + BSD: simplify drm_ioctl() after other refactoring. + +commit 4cdd871e90cd5fe440d0a4af5d69f1d84e49e742 +Author: vehemens +Date: Wed Aug 15 11:05:44 2007 -0700 + + Bug #11989: Fix regression in getstats ioctl (kernel panic). + +commit 56133e04de40e3004018d069cb229e62ee10e0f4 +Author: Eric Anholt +Date: Wed Aug 15 11:04:56 2007 -0700 + + BSD: Fix regression in setversion ioctl (current version not returned). + +commit a23a47b16cf813f0e7e9616ef6eb66f6ae0bc2ac +Author: Eric Anholt +Date: Wed Aug 15 11:03:10 2007 -0700 + + Add a regression test for the setversion interface. + +commit 8a881b47f7c21be2cdeff4b0d1b00d39d503f358 +Author: Eric Anholt +Date: Wed Aug 15 10:52:01 2007 -0700 + + Add simple regression test for getstats (does it not crash the kernel?). + +commit 5346fc5f36b5e7c55fc7b5cd46f1e4d7563a86a4 +Author: Eric Anholt +Date: Tue Aug 14 14:41:24 2007 -0700 + + BSD: Replace brief description in each file's first line with doxygen later on. + + The brief descriptions usually had the wrong filename in them. + +commit 10f9b7bd0b471487371813083bd3481629b2a56f +Author: Ben Skeggs +Date: Wed Aug 15 14:14:23 2007 +1000 + + nouveau: Use count parameter in nouveau_notifier_alloc(). + +commit a615d2fde77092062f7e2bbfa39705b5f34547e8 +Author: Ben Skeggs +Date: Wed Aug 15 13:53:58 2007 +1000 + + nouveau: Turn some messages into DRM_DEBUGs.. + +commit c3faa589b09616acdfd827be1719f6c2706c49ab +Author: Ben Skeggs +Date: Wed Aug 15 13:36:54 2007 +1000 + + nouveau: Allow GART notifiers when using sgdma code. + +commit ee01d3755ac03f2c47e3b4d9bf084d68e6ee95bc +Author: Ben Skeggs +Date: Wed Aug 15 13:34:57 2007 +1000 + + nouveau: Workaround mysterious PRAMIN clobbering by the card. + +commit f563a50d145848ed296b63c63422caff80232ddf +Author: Ian Romanick +Date: Tue Aug 14 13:44:51 2007 -0700 + + Eliminate unused / useless ioctls. + +commit 7b12174aacd09a991be3e74a3db47534961a6887 +Author: Ian Romanick +Date: Tue Aug 14 13:24:02 2007 -0700 + + Clean up remaining C++ style comments. + +commit d3c8e98dd9ccc366513c117d032fbf80be4eb06a +Author: Ian Romanick +Date: Tue Aug 14 13:20:37 2007 -0700 + + Move dwWriteReg to xgi_cmdlist.c, the only file where it is used. + +commit be76f0eea9b455fde77e15ff35f4f00c70661e51 +Author: Ian Romanick +Date: Tue Aug 14 13:19:48 2007 -0700 + + Remove unused interrupt related functions. + +commit 891714d8d732480af97fbc45562145a560b7999b +Author: Ian Romanick +Date: Tue Aug 14 13:18:44 2007 -0700 + + Clean up xgi_(en|dis)able_(mmio|ge) and move to xgi_misc.c. + +commit a6ea60c77e8d4a266d696e0d99c11b1f39578dcc +Author: Ben Skeggs +Date: Wed Aug 15 01:40:46 2007 +1000 + + nouveau: Catch all NV4x chips instead of just NV_40. + +commit 02c4e0e757b69cd6ae38b8ab2c078b3f06fea661 +Author: Ben Skeggs +Date: Wed Aug 15 00:56:24 2007 +1000 + + nouveau/nv40: Fix channel scheduling. + + Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels + will appear to "freeze" in some circumstances. + +commit 3ee211f4f7435792752c1dbcd3a60e2e7abfba09 +Author: Eric Anholt +Date: Mon Aug 13 16:29:24 2007 -0700 + + Bug #11895: Only add the AGP base to map offset if the caller didn't. + + The i830 and newer intel 2D code adds the AGP base to map offsets already, + because it wasn't doing the AGP enable which used to set dev->agp->base. + + Credit goes to Zhenyu for finding the issue. + +commit 15f841bd529b50901272ca35a4c57de42a51901a +Author: Ian Romanick +Date: Mon Aug 13 16:21:20 2007 -0700 + + Strobe magic 0xB03F register to flush PCI-e GART table. + + The original XGI kernel driver strobed 0xB03F each time a page was + allocated to back a GART page. When the driver was converted to use + the DRM SG interface, this code was lost. Returning it fixes a long + standing issue where the X-server would work fine the first time, but + acceleration commands would be ignored on the second X-server + invocation. + +commit 4340f49bf79a5421886363e08501ad347973b083 +Author: vehemens +Date: Mon Aug 13 10:17:47 2007 -0700 + + Bug #11951: Fix an errno sign inversion on pre-FreeBSD 5. + + Also, annotate where signs change, to hopefully remind the reader of these + issues in the future. + +commit d6a45ebf0ee47c31f560f3072a4b70c4039e454a +Author: Eric Anholt +Date: Mon Aug 13 11:27:46 2007 -0700 + + Add a regression test for authentication. + +commit 3b07a37a48ca6dc22d538221b59b430dd72c6203 +Author: Eric Anholt +Date: Mon Aug 13 10:50:25 2007 -0700 + + Add doxygen and fix whitespace for drm_auth.c + +commit 263775c454f381fffc8f5d4f309b4e1b131c3734 +Author: vehemens +Date: Mon Aug 13 10:24:39 2007 -0700 + + Fix drm_auth.c locking to not recurse on dev_lock. + +commit da279868706cc799bdf25cdd5523d11fda64d4cc +Author: Dave Airlie +Date: Mon Aug 6 18:33:29 2007 +1000 + + i915: i965 non-secure batchbuffer bit has moved. + +commit a46104674f129e873b8dfa29cf8aac9c67bd77be +Author: Ben Skeggs +Date: Fri Aug 10 13:54:26 2007 +1000 + + nouveau/nv50: demagic instmem setup. + +commit 39907f613b6c84499c34c9a6ece5f5dde64788c0 +Author: Ben Skeggs +Date: Fri Aug 10 13:53:10 2007 +1000 + + nouveau: Allow creation of gpuobjs before any other init has taken place. + +commit 20a0e5e4298761ae6005399e45d66b93109d2121 +Author: Ian Romanick +Date: Thu Aug 9 18:57:15 2007 -0700 + + After calling drm_sman_cleanup, mark both heaps as uninitialized. + + Since the heaps weren't marked as uninitialized, SG memory was never + re-allocated. This prevented the X-server from being able to restart + without re-loading the kernel module. + +commit 06e09842dfbdaa9502d3b3e6b657de4e3630644c +Author: Ian Romanick +Date: Thu Aug 9 18:28:16 2007 -0700 + + Use DRM_MEMORYBARRIER() macro instead of mb(). + +commit 371f0a4d410f02d8db050b51fd2e714f888a71e0 +Author: Ian Romanick +Date: Thu Aug 9 18:15:42 2007 -0700 + + Mask off correct bits in M2REG_AUTO_LINK_STATUS for interrupt handling. + +commit 6dd97099ea5c6dc7931c6b482eb5935f7dd9ed2d +Author: Ian Romanick +Date: Thu Aug 9 16:20:44 2007 -0700 + + Minor clean up of IRQ code. Much, much more to come. + +commit dbd4d0597ff32458bbe4347bdea0e4b9e55a14da +Author: Ian Romanick +Date: Thu Aug 9 16:01:14 2007 -0700 + + Use sman memory manager instead of internal version. + +commit aea6b4dea9708f66f5fc2068fe84407682570aca +Author: Ian Romanick +Date: Thu Aug 9 15:30:36 2007 -0700 + + Unify alloc and free ioctls. + + The DRM_XGI_PCIE_ALLOC and DRM_XGI_FB_ALLOC ioctls (and the matching + free ioctls) are unified to DRM_XGI_ALLOC. The desired memory region + is selected by xgi_mem_alloc::location. The region is magically + encoded in xgi_mem_alloc::index, which is used to release the memory. + + Bump to version 0.11.0. This update requires a new DDX. + +commit 25cb876f8513d02d4d189371eaa8b7b9a88e860d +Author: Ian Romanick +Date: Thu Aug 9 15:23:13 2007 -0700 + + Associate master file pointer with command list buffer. + + Pass the master's file pointer, as supplied to xgi_bootstrap, to + xgi_cmdlist_initialize. Associate that pointer with the memory + allocated for the command list buffer. By doing this the memory will + be automatically cleaned up when the master closes the device. This + allows the removal of some clean up code. + +commit 7784e8c6e74b93ffb39d82e3385bd3268a55507c +Author: Ben Skeggs +Date: Thu Aug 9 11:12:13 2007 +1000 + + nouveau: silence irq handler a bit + +commit 7281463f8d5d45a26f4cdff3fb67d896e0e74f74 +Author: Ben Skeggs +Date: Thu Aug 9 10:23:36 2007 +1000 + + nouveau/nv40: add some missing pciids. + +commit e326acf5493a7193954d3dd794855e2a11dc1782 +Author: Matthieu Castet +Date: Wed Aug 8 22:55:32 2007 +0200 + + nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry + + This should improve multi fifo + +commit 05633ca3708f48cfbbb77518da4e791d7e1613c2 +Author: Ben Skeggs +Date: Wed Aug 8 16:37:55 2007 +1000 + + nouveau: Always allocate drm's push buffer in VRAM + + Fixes #11868 + +commit 40f21563564332786ca2b9ffc7d7ba9c7e6f7f1a +Author: Ben Skeggs +Date: Wed Aug 8 16:11:28 2007 +1000 + + nouveau: return channel id + +commit 296050eee6ca7b496e8702ceca9628de803d79f8 +Author: Ben Skeggs +Date: Wed Aug 8 13:01:29 2007 +1000 + + nouveau/nv50: hack up initial channel context from current state + + We really should be providing static values like the nv40 PGRAPH code does, + however, this will do for now to keep X at least working. + +commit 4ad487190d5b79947c65e238330506db6b77e523 +Author: Ben Skeggs +Date: Wed Aug 8 10:42:12 2007 +1000 + + nouveau: enable/disable engine-specific interrupts in _init()/_takedown() + + All interrupts are still masked by PMC until init is finished. + +commit a4759b85139dd8d81de25e170777309b770f5316 +Author: Matthieu Castet +Date: Tue Aug 7 23:09:44 2007 +0200 + + nouveau : fix enable irq (in the previous code all irq were masked by engine + init after irq_postinstall) + +commit f7ba02b7458823627097a2320bf9befa84fc9c76 +Author: Ian Romanick +Date: Mon Aug 6 17:27:15 2007 -0700 + + Unify infrastructure for freeing on-card / GART memory. + +commit 6718198897ef9e275506d3fcb497641e1b09d3b1 +Author: Ian Romanick +Date: Mon Aug 6 16:56:20 2007 -0700 + + Release client memory in reclaim_buffers_idlelocked instead of preclose. + +commit f3072becda3a2d5fe587f20e155d4d4f9ace60a2 +Author: Ian Romanick +Date: Mon Aug 6 16:35:07 2007 -0700 + + Refactor xgi_(fb|pcie)_free_all into xgi_free_all. + +commit 90907c59152f628d6f0efea4927a06e547f4a3c7 +Author: Ian Romanick +Date: Mon Aug 6 16:17:23 2007 -0700 + + Replace per-heap semaphores with drm_device::struct_mutex. + +commit f96bff9e213a950ab910832908d30e732435e628 +Author: Ian Romanick +Date: Mon Aug 6 16:09:05 2007 -0700 + + Unify infrastructure for allocating (not yet freeing) on-card / GART memory. + +commit 5362cc723e6605c31d152eb22ee3dc40c9e3f56b +Author: Ian Romanick +Date: Mon Aug 6 15:52:06 2007 -0700 + + Eliminate unnecessary function xgi_pcie_free_locked. + +commit d749cc9ae8c50157a1588369222a591410002c26 +Author: Eric Anholt +Date: Mon Aug 6 15:45:37 2007 -0700 + + Initialize the AGP structure's base address at init rather than enable. + + Not all drivers call enable (intel), but they would still like to use this + member in driver code. + +commit a6fb93a150f90ada9af6760b52d34716497f744f +Author: Ian Romanick +Date: Mon Aug 6 15:43:51 2007 -0700 + + Finish removing allocation "owner" infrastructure. + +commit 78e9c1a93d00097895bc77d9ac90da1945021804 +Author: Ian Romanick +Date: Mon Aug 6 15:37:56 2007 -0700 + + Eliminate special-case handling of framebuffer (fake) allocation. + +commit 997a9a738ec26cf0ef2c7dee5e30bb53bd11bf6c +Author: Ian Romanick +Date: Mon Aug 6 15:31:34 2007 -0700 + + Eliminate allocation "owner" usage. + +commit 66f5232d9393f6886d8fd1a60b2d75cd009b972c +Author: Ben Skeggs +Date: Tue Aug 7 01:51:46 2007 +1000 + + nouveau: Init global gpuobj list early, unbreaks sgdma code. + +commit ac24f328ec8954f78b1025db716abdd5b25b3dd9 +Author: Stephane Marchesin +Date: Mon Aug 6 17:14:26 2007 +0200 + + nouveau: Bump PCI GART to 16MB + +commit 8d5a8ebc316028f14666697cff33daddbe384bcd +Author: Ben Skeggs +Date: Mon Aug 6 22:32:36 2007 +1000 + + nouveau: ouch, add nouveau_dma.[ch] files.. + +commit 92084c6e056a738308ff65f3fcd7411fd7d2995a +Author: Ben Skeggs +Date: Mon Aug 6 22:11:18 2007 +1000 + + Export some useful ttm functions to drivers. + +commit 7a0a812ea42d80eed89b7b9993eae42c7c1b1613 +Author: Ben Skeggs +Date: Mon Aug 6 22:06:52 2007 +1000 + + nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway. + + Need to find another way of doing this, ideally someone'd hunt down which + object/method controls it! The Xv blit adaptor is likely now broken on + cards that have pNv->WaitVSyncPossible enabled. + +commit cf04641bc61c8bc18101713a8d95ef98e6afae7f +Author: Ben Skeggs +Date: Mon Aug 6 22:05:31 2007 +1000 + + nouveau: Give DRM its own gpu channel + + If your card doesn't have working context switching, it is now broken. + +commit 51f24be578025e3f1eae859288adf5232afc898d +Author: Ben Skeggs +Date: Mon Aug 6 21:46:55 2007 +1000 + + nouveau: Determine trapped channel id from active grctx on >=NV40 + +commit 97770db72040dc032130413e0cdabc1777560a75 +Author: Ben Skeggs +Date: Mon Aug 6 21:45:18 2007 +1000 + + nouveau: Various internal and external API changes + + 1. DRM_NOUVEAU_GPUOBJ_FREE + Used to free GPU objects. The obvious usage case is for Gr objects, + but notifiers can also be destroyed in the same way. + + GPU objects gain a destructor method and private data fields with + this change, so other specialised cases (like notifiers) can be + implemented on top of gpuobjs. + + 2. DRM_NOUVEAU_CHANNEL_FREE + + 3. DRM_NOUVEAU_CARD_INIT + Ideally we'd do init during module load, but this isn't currently + possible. Doing init during firstopen() is bad as X has a love of + opening/closing the DRM many times during startup. Once the + modesetting-101 branch is merged this can go away. + + IRQs are enabled in nouveau_card_init() now, rather than having the + X server call drmCtlInstHandler(). We'll need this for when we give + the kernel module its own channel. + + 4. DRM_NOUVEAU_GETPARAM + Add CHIPSET_ID value, which will return the chipset id derived + from NV_PMC_BOOT_0. + + 4. Use list_* in a few places, rather than home-brewed stuff. + +commit beaa0c9a28b30a6ba3292184d04875b6a597e433 +Author: Ben Skeggs +Date: Mon Aug 6 03:40:43 2007 +1000 + + nouveau: Pass channel struct around instead of channel id. + +commit 2453ba19b6f9956ea5d412a66d5d33c8a8b301b2 +Author: Patrice Mandin +Date: Fri Aug 3 23:06:39 2007 +0200 + + nouveau:nv10: fill and use load,save graph context functions + +commit 3a0bc518e35c62bb9c64c9105f836584d949653f +Author: Eric Anholt +Date: Thu Aug 2 14:08:04 2007 -0700 + + Remove the pinned buffer from the LRU when pinning. + + Also, be a little safer with setting the pinned flag within the struct lock. + I'm not 100% sure if this is required, but it seems like it might be. + +commit cf4f1a85af69c2c2e5ba9c822d30863f16ce6821 +Author: Eric Anholt +Date: Thu Aug 2 13:51:55 2007 -0700 + + Add a couple of doxygen comments from reading the code. + +commit 9dfcc1ba07b6ad1a41234ae4016b54444094ac18 +Merge: 405c48b... 7602e4f... +Author: Patrice Mandin +Date: Thu Aug 2 20:08:05 2007 +0200 + + Merge branch 'master' of git+ssh://pmandin@git.freedesktop.org/git/mesa/drm + +commit 405c48b857a967c1174b27a5db975668e1d6a9f8 +Author: Patrice Mandin +Date: Thu Aug 2 20:06:37 2007 +0200 + + Add libdrm source dir, to build tests from a different build dir + +commit 7602e4f8a67d777437502672b4f74d9b990535ce +Author: Dave Airlie +Date: Thu Aug 2 19:13:45 2007 +1000 + + drm: add unlocked ioctl code path - not used yet + +commit f83000c8b388f18f677238b9342fd6a7e262394b +Author: Ian Romanick +Date: Tue Jul 31 17:27:00 2007 -0700 + + Refactor register dumping code. + +commit c395d27a725f170645704bfc0d27b1e935b53c83 +Author: Dave Airlie +Date: Wed Jul 25 14:32:15 2007 +1000 + + drm/fence: shut up lockdep + +commit 283eaa25594347267df4e6e5eedbb9d17bb3682c +Author: Dave Airlie +Date: Tue Jul 31 09:22:45 2007 +1000 + + drm: fix fencing refcount error + + This extra increase was causing fence leaks on my system, due to create/user add already increasing it twice no need for a 3rd go. + +commit 08919d8a70558dc61c430be5ed6e4a2bed7429b2 +Author: Ian Romanick +Date: Mon Jul 30 12:01:52 2007 -0700 + + Move additional GE initialization into the kernel. + + This code comes directly from the X server. + +commit 2fc697a7d270d57463eb5a16a0c65bd8e14c9893 +Author: Ian Romanick +Date: Mon Jul 30 10:20:15 2007 -0700 + + Fix GE shut-down sequence. + + When the GE is shut down, an empty command packet without a begin-link + must be sent. After this command is sent, wait for the hardware to go + idle. Finally, turn off the GE and disable MMIO. + +commit 01628a430d476f5875270d7137fc083ba85cef90 +Author: Ian Romanick +Date: Mon Jul 30 10:02:46 2007 -0700 + + Use DRM_READ/DRM_WRITE macros instead of directly accessing MMIO space. + +commit 2ac80e79e424aa6577e556b2df01caea9e480852 +Author: Ian Romanick +Date: Mon Jul 30 09:59:19 2007 -0700 + + Use OUT3C5B macro instead of assuming little-endian byte order. + +commit cd51f131389297f923798daef6c734ba93f4422b +Author: Ian Romanick +Date: Fri Jul 27 15:45:59 2007 -0700 + + Convert to new ioctl interface between core DRM and device-specific module. + +commit f01026eae69e81ae16a69a014ba3bcfb286fc7a4 +Author: Arthur Huillet +Date: Fri Jul 27 15:48:04 2007 +0200 + + nouveau: creating notifier in PCI memory for PCIGART + +commit c37ed9eca57a42b98cc67ca98dbf5135f5ab7aba +Author: Ian Romanick +Date: Thu Jul 26 17:01:16 2007 -0700 + + Eliminate use of DRM_ERR. + +commit b89cc0346500d9875d4acebc611db8f9ee3463f7 +Author: Ian Romanick +Date: Thu Jul 26 16:58:59 2007 -0700 + + Eliminate unnecessary (and now wrong) call gto drm_sg_free. + +commit c561cb4650dc5895acfb3ae00c7ff455be31a860 +Merge: 2bafeb6... 4175dd8... +Author: Ian Romanick +Date: Thu Jul 26 16:58:28 2007 -0700 + + Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2 + + Conflicts: + + linux-core/drmP.h + linux-core/drm_scatter.c + +commit 3c8ebd94e48589711f44d23e85d713a1ed980f37 +Author: Eric Anholt +Date: Thu Jul 26 11:26:12 2007 -0700 + + debug print ioctl return value as -integer rather than fffffwhatever. + +commit f9c27aa50b715a7d21858f1ce9e4785120bd0c36 +Author: Eric Anholt +Date: Thu Jul 26 11:17:41 2007 -0700 + + Copy the important parts of object_validate into object_create(). + + This should let us allocate buffers without holding the hardware lock. + + While here, add DRM_DEBUG info for the drm_bo ioctls, so you can see something + more specific than just the cmd value per ioctl. + +commit cf2d569daca6954d11a796f4d110148ae2e0c827 +Author: Eric Anholt +Date: Thu Jul 26 10:14:17 2007 -0700 + + Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning. + + This cleans up the create/validate interfaces for this very uncommon path, and + makes pinned object creation much easier to use for the X Server. + +commit 4175dd818110bd10d6d09190d30c271e89202b18 +Author: Dave Airlie +Date: Thu Jul 26 15:26:36 2007 +1000 + + drm/bo: set the req pointer for each buffer to validate + +commit e2d00715cc1d3919aadd5066ef7355049f417bd2 +Author: Dave Airlie +Date: Thu Jul 26 13:25:21 2007 +1000 + + drm: fix size argument for copy to/from user + +commit f2528cbc965858c6a7a81d659f9d5f4da290b5ae +Author: Eric Anholt +Date: Wed Jul 25 12:54:15 2007 -0700 + + Improve the drawable test to use multiple drawables. + +commit be3099f26547f48066bbdd7a36578b54da9170b4 +Author: Eric Anholt +Date: Sun Jul 22 09:51:34 2007 +0100 + + Fix copy'n'paste-o in FreeBSD drawable code. + +commit 2bafeb673f14b1e3799bf00817138c0b8211635e +Author: Ian Romanick +Date: Tue Jul 24 16:17:30 2007 -0700 + + Fix typo on previous commit. Sigh... + +commit 75a68635a8f7b0d4fb31031832cc282a39a4a1e7 +Author: Ian Romanick +Date: Tue Jul 24 15:53:50 2007 -0700 + + Pass correct offset to xgi_find_pcie_virt. + + The wrong offset was being passed to xgi_find_pcie_virt. This would + cause an oops in addFlush2D. + +commit 8e64d2ae862d5fa02e23c68db6b55393e1f86005 +Author: Ian Romanick +Date: Tue Jul 24 13:36:02 2007 -0700 + + Fix license formatting. + +commit 2ef2997ee38ff359c331b6a3febf194bd46e4962 +Author: Ian Romanick +Date: Tue Jul 24 13:29:29 2007 -0700 + + Fix flags for serveral ioctls. + +commit 887cb31ee9ec04e45829500f095aa4a3bc1095ea +Author: Ian Romanick +Date: Tue Jul 24 13:27:44 2007 -0700 + + Fix bug preventing X server from restarting. + + The core DRM lastclose routine automatically destroys all mappings and + releases SG memory. XP10 DRM and DDX assumed this data stayed around + until module unload. xgi_bootstrap was reworked to recreate all these + mappings. In addition, the drm_addmap for the GART backing store was + moved into the kernel. This causes a change to the ioctl protocol and + a version bump. + +commit 46214fc3979ed60b32289ade1b8efbba1c8bf732 +Author: Ian Romanick +Date: Mon Jul 23 18:50:52 2007 -0700 + + Minor log message clean up. + +commit 388a2c54eea7575a5b046da3df09f7a1c63551d6 +Author: Ian Romanick +Date: Mon Jul 23 18:50:07 2007 -0700 + + Minor log message clean up. + +commit 03e932e32be6ae3de6994c6893c813a34623ad7d +Author: Eric Anholt +Date: Mon Jul 23 15:11:12 2007 -0700 + + linux: Make DRM_IOCTL_GET_CLIENT return EINVAL when it can't find client #idx. + + Fixes the getclient test and dritest -c. + +commit 2097d743f287d994bd001baedd39e3bc808999c6 +Author: Ian Romanick +Date: Mon Jul 23 13:26:28 2007 -0700 + + Eliminate XGI_CHECK_PCI_CONFIG. + + Based on review comments from airlied, XGI_CHECK_PCI_CONFIG is + removed. He believes (and I tend to agree) that this is a largely + unnecessary workaround for a bug elsewhere. + +commit 7e6d08f670a55d79ee037144aa29104e4e8fc700 +Author: Adrian Bunk +Date: Mon Jul 23 18:15:00 2007 +1000 + + drm_rmmap_ioctl(): remove dead code + + This patch removes some obviously dead code spotted by the Coverity + checker. + + Signed-off-by: Adrian Bunk + +commit 94203840fe53edaf1556d1a0a8a27773c24a7fc5 +Author: Ian Romanick +Date: Sat Jul 21 23:00:01 2007 -0700 + + Bump version. + +commit 699207cf2fa0c5255365dd28eeb3dd760f362818 +Author: Ian Romanick +Date: Sat Jul 21 21:37:45 2007 -0700 + + Remove some extraneous debug messages. + +commit 877296ade051cd45c0c2e0354b9f6765f8030413 +Author: Ian Romanick +Date: Sat Jul 21 21:36:11 2007 -0700 + + xgi_mem_alloc::offset is a hardware offset, so it should be u32, not long. + +commit 1a0775760c0eecbb238f0e928b185c267c1c3783 +Author: Ian Romanick +Date: Sat Jul 21 21:35:06 2007 -0700 + + Rename and document fields of xgi_cmdring_info. + +commit 3265a61f895a1d35072984e9cdc71aad898647fa +Author: Ian Romanick +Date: Sat Jul 21 20:39:22 2007 -0700 + + Make s_cmdring a field in the xgi_info structure instead of a global. + +commit 5d6fdd9d7924fde8ce62631e6bdce8d5fe33fc3d +Author: Ian Romanick +Date: Sat Jul 21 20:34:56 2007 -0700 + + Clean up xgi_cmd_info and associated code. + + There were numerous unnecessary fields in xgi_cmd_info. The remaining + fields had pretty crummy names. Cut out the cruft, and rename the + rest. As a result, the unused parameter "triggerCounter" to + triggerHWCommandList can be removed. + +commit 0844c46759b96d52c4952fceb96f7c6bb74b2ce7 +Author: Pekka Paalanen +Date: Sat Jul 21 23:13:25 2007 +0300 + + Fix misc ioctl issues, makes Nouveau run. + + Debug print fix in drm_release(). + Forgotten local variable init in drm_setversion(). + Unnecessary put_user() in drm_addmap_ioctl(). + ioctl->cmd check broken in drm_ioctl(); workaround. + +commit b43b0b2b32a31bcb81042659ffcc95b8975e42cf +Author: Dave Airlie +Date: Sat Jul 21 22:11:41 2007 +1000 + + fix missing brace placement for IOC_IN + +commit f68ad6d1abdce7d3c11cc2e90745c0d1e565fe77 +Author: Dave Airlie +Date: Sat Jul 21 21:50:25 2007 +1000 + + fix drm no-compile due to BSD :-) + +commit 5b38e134163cc375e91424c4688cc9328c6e9082 +Author: Eric Anholt +Date: Thu Jul 19 17:11:11 2007 -0700 + + Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE. + + The data is now in kernel space, copied in/out as appropriate according to the + This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal + with those failures. This also means that XFree86 4.2.0 support for i810 DRM + is lost. + +commit c1119b1b092527fbb6950d0b5e51e076ddb00f29 +Author: Eric Anholt +Date: Fri Jul 20 06:39:25 2007 -0700 + + Replace filp in ioctl arguments with drm_file *file_priv. + + As a fallout, replace filp storage with file_priv storage for "unique + identifier of a client" all over the DRM. There is a 1:1 mapping, so this + should be a noop. This could be a minor performance improvement, as everything + on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls + went the other direction. + +commit 35de4868361ce1fb515cf33f27e6be4c59b07f89 +Author: Eric Anholt +Date: Fri Jul 20 06:42:18 2007 -0700 + + BSD: Replace symlink building with symlinks in git. + +commit e39286eb5eab8846a228863abf8f1b8b07a9e29d +Author: Eric Anholt +Date: Thu Jul 19 17:00:17 2007 -0700 + + Remove DRM_ERR OS macro. + + This was used to make all ioctl handlers return -errno on linux and errno on + *BSD. Instead, just return -errno in shared code, and flip sign on return from + shared code to *BSD code. + +commit 5dc9fd96d7bf48003db832f145ad8acb4bcb73b4 +Author: Eric Anholt +Date: Fri Jul 20 12:55:51 2007 -0700 + + Fix linux spinlock macros after the last commit. + +commit ed82d5398a751cf755cf4168cbb79b181facc86f +Author: Ian Romanick +Date: Fri Jul 20 11:31:01 2007 -0700 + + Clean up flush command generation in addFlush2D. + +commit 659209cb2d59c7b25df58d130d0649f8f899b693 +Author: Ian Romanick +Date: Fri Jul 20 11:29:16 2007 -0700 + + Clean up generation of begin commands in xgi_submit_cmdlist + + Generate the begin command once in a temporary buffer. Then, + depending on whether the command is to be written directly to the + hardware or to a secondary buffer, copy to command to the correct place. + +commit 6bd848307485f678915913f282e2ea59ae3ca1a8 +Author: Ian Romanick +Date: Fri Jul 20 10:57:40 2007 -0700 + + Change handling of begin types slightly. + + Moved the getCurBatchBeginPort before its only caller. Modified + function to return the command ID instead of the port offset. + Function also now assumes input begin type is value. + + Added code to ioctl handler to validate begin type. + +commit 56665a42f470d5cf8cb4865558cb658dff15a9dd +Author: Ian Romanick +Date: Thu Jul 19 19:09:24 2007 -0700 + + Delete unused variable in xgi_driver_load. + +commit 970674f4867d65bd16cf3585d46930b72a827cce +Author: Ian Romanick +Date: Thu Jul 19 19:08:47 2007 -0700 + + Fix error handing related to xgi_cmdlist_initialize. + + xgi_cmdlist_initialize wasn't correctly checking for errors from + xgi_pcie_alloc. Furthermore, xgi_bootstrap, the one caller of + xgi_cmdlist_initialize, wasn't check its return value. + +commit a33f5487296eacf503f5b27ba829f5fbdae8e63b +Author: Ian Romanick +Date: Thu Jul 19 19:05:52 2007 -0700 + + Debug message and comment clean up in xgi_submit_cmdlist. + +commit 15245b670e5359a7dbf9151aa9f160e929e0b46b +Author: Ian Romanick +Date: Thu Jul 19 11:38:56 2007 -0700 + + Rework xgi_(pcie|fb)_free_all to prevent deadlock. + +commit 2f53ce4af2f7db911d908ff382738f30be004e8b +Author: Ian Romanick +Date: Thu Jul 19 11:05:13 2007 -0700 + + Move MMIO drm_addmap (and code that depends on it) to xgi_bootstrap. + + For reasons that I don't understand, the drm_addmap call would succeed + in xgi_driver_load, but writes to the map later would oops. Moving it + to xgi_bootstrap fixes this problem. + +commit 5ba94c2ab8be350fee495e5cfe94afb8f663956a +Author: Ian Romanick +Date: Thu Jul 19 10:29:18 2007 -0700 + + Initial pass at converting driver to DRM infrastructure. + +commit f4e1c1d05cfbd43ac429ab6dc78345ffa3599b7a +Author: Eric Anholt +Date: Thu Jul 19 06:46:13 2007 -0700 + + FreeBSD warnings cleanup. + +commit 05204b9c8d021e019456a8dbd83c012e277c7aaf +Merge: e544286... 0c95d48... +Author: Eric Anholt +Date: Thu Jul 19 06:31:26 2007 -0700 + + Merge branch 'origin' + +commit e544286eae71a6b150af4d86096895c14e42c36e +Author: Eric Anholt +Date: Thu Jul 19 06:17:58 2007 -0700 + + FreeBSD: Fix the recently added drawable add/remove/update code. + +commit ecf3fbe599cd72c495acf339ae24f3a9e01fdb36 +Author: Eric Anholt +Date: Thu Jul 19 06:17:04 2007 -0700 + + Add a test for drawable add, remove, and update. + +commit 50cb405f93da70054ede29e0c365f06352dc8fe5 +Author: Eric Anholt +Date: Thu Jul 19 06:02:20 2007 -0700 + + Fix the getclient test (Need this feature for future tests). + +commit d7cf298e540c631795868c52b044c7249bf45902 +Author: Eric Anholt +Date: Thu Jul 19 04:59:59 2007 -0700 + + Add some trivial regression tests, one of which fails. + +commit 51de9ec5e38426b13a1da0f78f3a0894dcb3e495 +Author: Eric Anholt +Date: Thu Jul 19 03:36:57 2007 -0700 + + Add current BSD stuff to .gitignore. + +commit 0c95d489abd19efd2ba017e78a4b28cea0854e77 +Author: Ben Skeggs +Date: Thu Jul 19 16:42:58 2007 +1000 + + nouveau/nv50: get non-default push buffer sizes working. + +commit 33a50412c21229610dbb75dee83f145e2f1ec128 +Author: Eric Anholt +Date: Wed Jul 18 14:22:40 2007 -0700 + + Add dry-coded DRM drawable private information storage for FreeBSD. + + With this, all modules build again. + +commit af4cfa624a005f7105db89f6f076c41adbe44bd3 +Author: Pekka Paalanen +Date: Fri Jul 6 20:33:32 2007 +0300 + + nouveau: Make nouveau_wait_for_idle() read PTIMER. + + Following my nv28 kmmio dumps, nouveau_wait_for_idle() is modified to + read PTIMER and NV03_PMC_ENABLE. Also a timeout based on PTIMER value is + added, so wait_for_idle() cannot stall indefinitely (unless PTIMER is + halted). The timeout was selected as 1 giga-ticks, which for me is 1s. + +commit 696bee093f6f75dbb48699ff32bbebe2d3a1e307 +Author: Pekka Paalanen +Date: Fri Jul 6 19:34:15 2007 +0300 + + nouveau: Add read() method to Engine.timer. + + This is not called from anywhere, yet. + +commit 0c77f5abeadcbb89643740889cc865ba0ae66538 +Author: Pekka Paalanen +Date: Fri Jul 6 13:57:31 2007 +0300 + + nouveau: Add bitfield names for NSOURCE and NSTATUS. + + Name strings and pretty-printing in nouveau_graph_dump_trap_info(). + +commit 14ecf8d6c2ccecbe9841ad4a7eb3b301685f2351 +Author: Pekka Paalanen +Date: Fri Jul 6 12:47:53 2007 +0300 + + nouveau: Replace 0x00400104 and 0x00400108 with names. + + NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE. + The prefix NV03 is chosen because nv10reg.h had no versioned prefix, + and the code using these registers does not check card_type. + +commit 1ff858fe3a6b632c879a9f99a67227db7df70b62 +Author: Thomas Hellstrom +Date: Wed Jul 18 10:40:03 2007 +0200 + + Fix via dmablit when blit queue is full. + Fix by Simon Farnsworth, Bugzilla Bug #11542 + http://bugs.freedesktop.org/show_bug.cgi?id=11542 + +commit a64b5d8d3763639fbb4098500ad5c86fb8590aa7 +Author: Dave Airlie +Date: Wed Jul 18 15:49:45 2007 +1000 + + fix some missing whitespace/tab + +commit 3a71e87742ce8686c2b3c85ebbc8fb7a72b4f6e0 +Author: Dave Airlie +Date: Wed Jul 18 09:46:16 2007 +1000 + + drm: idr stuff is upstream for 2.6.23 + +commit 6ad1df217647d112a21c2e004d4e3d74c7bb0e0e +Author: Dave Airlie +Date: Wed Jul 18 09:42:06 2007 +1000 + + drm: remove drm_u64_t, replace with uint64_t everwhere + + This might break something, stdint.h inclusion in drm.h maybe required + but I'm not sure yet what platforms have it what ones don't. + +commit bff698d0edef90272247dfb90e454f7b98fd82dd +Author: Dave Airlie +Date: Tue Jul 17 09:59:26 2007 +1000 + + drm_context: fix braino + +commit 8d60bf2f199d57ec45feaab836b31832b9bbabb9 +Author: Ian Romanick +Date: Mon Jul 16 22:15:41 2007 -0700 + + Add XP5 and XP10 PCI IDs. + +commit 7f98815d0027b1d4bd07b08e540106d5e994bcc5 +Author: Ian Romanick +Date: Mon Jul 16 22:15:01 2007 -0700 + + Make drm_sg_free callable in-kernel. + +commit bcba7ba981a88e27ad4d7e8ebcdbed7097cf1488 +Author: Ian Romanick +Date: Mon Jul 16 21:15:58 2007 -0700 + + Log message clean up in WriteRegDWord. Remove unused inline functions. + +commit 5b08ab258f3e541334d2b64d38e15e1431080199 +Author: Ian Romanick +Date: Mon Jul 16 21:12:30 2007 -0700 + + Clean ups (primarilly log messages) in xgi_test_rwinkernel. + +commit 2b6ea465134e72fa6aa96df5e40fbc91b561ef00 +Author: Ian Romanick +Date: Mon Jul 16 21:11:22 2007 -0700 + + Eliminate unnecessary structures and defines. + +commit 875dd1e53852d231b60eb82bfed33c016f92f3b8 +Author: Ben Skeggs +Date: Tue Jul 17 14:06:05 2007 +1000 + + nouveau: Destroy PGRAPH context table on PGRAPH takedown + +commit 658ff2daf3d2a080da2d859f522a627aef841637 +Author: Ian Romanick +Date: Mon Jul 16 20:58:43 2007 -0700 + + Eliminate several useless ioctls and associated cruft. + + The ioctlss XGI_ESC_DEVICE_INFO, XGI_ESC_MEM_COLLECT, + XGI_ESC_PCIE_CHECK, XGI_ESC_GET_SCREEN_INFO, XGI_ESC_PUT_SCREEN_INFO, + XGI_ESC_MMIO_INFO, and XGI_ESC_SAREA_INFO, are completely unnecessary. + The will be doubly useless when the driver is converted to the DRM + infrastructure. + +commit 4575d5b8f18fef8cd19e7884bf8dab5e8f71ec9e +Author: Ian Romanick +Date: Mon Jul 16 20:56:11 2007 -0700 + + Massive log message clean up in xgi_submit_cmdlist. + +commit ec67c2def9af16bf9252d6742aec815b817f135a +Author: Ben Skeggs +Date: Sun Jul 15 17:18:15 2007 +1000 + + nouveau: G8x PCIEGART + + Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART + support for G8X using the current mm has been hacked on top of it. + +commit 70a8a60a3e81c18f9c6485102cb226c340c3cd73 +Author: Ian Romanick +Date: Mon Jul 16 10:56:43 2007 -0700 + + Correct errors in the usage of pci_map_page. + + With these changes the driver no longer instantly hard-locks a 6600LE + on a PowerPC G5. I haven't tested any 3D apps yet. + +commit 3f04fe7890fe7728e7df37a6b65ad328a46699bf +Author: Eric Anholt +Date: Mon Jul 16 01:53:06 2007 -0700 + + Fix FreeBSD build. + +commit 23631fca09a9769d2391ebdec1f186cf33bf984e +Author: Dave Airlie +Date: Mon Jul 16 13:52:21 2007 +1000 + + drm: fixup old kernel compat code + +commit 0accdc1f69885c6145b6224d26ccd72002f2a72e +Author: Dave Airlie +Date: Mon Jul 16 13:50:04 2007 +1000 + + drm: fixup compat wrappers + +commit 535e3dec8c61474be55588d2b5dc87b0301435f8 +Author: Dave Airlie +Date: Mon Jul 16 13:46:37 2007 +1000 + + drm: remove internal sman typedef + +commit 191c062933bb7a6f9dabf3fd639321e1dac88c50 +Author: Dave Airlie +Date: Mon Jul 16 13:45:39 2007 +1000 + + drm: remove drm_ref_t + +commit 24311d5d82b61a4729b15355088dd9c2898d1089 +Author: Dave Airlie +Date: Mon Jul 16 13:42:11 2007 +1000 + + drm: remove drm_buf_t + +commit be85ad0333b0c28129c2e4635f92780816308aa6 +Author: Dave Airlie +Date: Mon Jul 16 13:37:02 2007 +1000 + + drm: detypedef ttm/bo/fence code + +commit 6dce9e07352e14d2e03d26b8a64a40e111ecab2b +Author: Dave Airlie +Date: Mon Jul 16 12:48:44 2007 +1000 + + drm: remove hashtab/sman and object typedefs + +commit 21ee6fbfb8f2219a454458204afc9c5fcd89f9a8 +Author: Dave Airlie +Date: Mon Jul 16 12:32:51 2007 +1000 + + drm: remove drmP.h internal typedefs + +commit 1a07256d601a94466b7905680f5b929bf3f2390a +Author: Dave Airlie +Date: Mon Jul 16 11:30:53 2007 +1000 + + drm: remove ttm userspace typedefs + +commit b95ac8b7b313ad3eadc9e8bb0ead155303b7fa92 +Author: Dave Airlie +Date: Mon Jul 16 11:22:15 2007 +1000 + + drm: detypedef drm.h and fixup all problems + +commit 4be9554fcdf27bce86d0d69068d284af2793b950 +Author: Dave Airlie +Date: Mon Jul 16 11:13:07 2007 +1000 + + drm: fix typedef in drm_os_linux.h + +commit f174f835ffac330bbd373d8ba5091205be28f327 +Author: Dave Airlie +Date: Mon Jul 16 10:13:58 2007 +1000 + + drm: remove typedefs in drm.h to their own section + +commit 2134193af6c29fcb83408b2878facd4b9cc4c4c8 +Merge: bc7d6c7... 2c9e05c... +Author: Dave Airlie +Date: Mon Jul 16 10:05:20 2007 +1000 + + Merge branch 'drm-ttm-cleanup-branch' + +commit bc7d6c76fab2ff4d2f11b6bd84ca8b8f124729fd +Author: Patrice Mandin +Date: Sat Jul 14 18:32:11 2007 +0200 + + nouveau: nv10 and nv11/15 are different + +commit aa6d9199fa7b0cbe04a936312db7be75bb53bdc8 +Author: Arthur Huillet +Date: Fri Jul 13 20:51:52 2007 +0200 + + applied patch from Ian Romanick fixing PCI DMA object creation code + +commit 00a5ab760b1d65ceea95e703d8ce8ecf8b63fbb3 +Merge: 5ae3ad4... 3007b03... +Author: Arthur Huillet +Date: Fri Jul 13 16:03:25 2007 +0200 + + Merge commit 'public/master' + +commit 5ae3ad4f015aa072180a0c55255832be4e7557cf +Author: Arthur Huillet +Date: Fri Jul 13 15:57:17 2007 +0200 + + now attempting to create PCI object only when there is a pci_heap + +commit 3007b03bdf608708a50b842d4291d3640c30f2c5 +Author: Arthur Huillet +Date: Fri Jul 13 15:57:17 2007 +0200 + + now attempting to create PCI object only when there is a pci_heap + +commit 0029713451af6f5f216079775ff77cae9b423c0e +Author: Ben Skeggs +Date: Fri Jul 13 15:09:31 2007 +1000 + + nouveau: nuke internal typedefs, and drm_device_t use. + +commit 5522136b7f01402ae02cbe35180e3d80f850a6b3 +Merge: 76ca1e8... 851c950... +Author: Ian Romanick +Date: Thu Jul 12 15:28:17 2007 -0700 + + Merge branch 'master' into xgi-0-0-2 + +commit 851c950d988e5a47fa6add71427e5ef8d4dcf231 +Author: Ben Skeggs +Date: Fri Jul 13 02:18:59 2007 +1000 + + nouveau: unbreak AGP + +commit af317f1cc7136dbf03b39ced64c42202703c5066 +Author: Ben Skeggs +Date: Thu Jul 12 11:55:47 2007 +1000 + + nouveau: mem_alloc() returns offsets, not absolute addresses now. + +commit 522a0c868c79b48c5434f39faab1a02ca4425a90 +Author: Ben Skeggs +Date: Thu Jul 12 11:39:45 2007 +1000 + + nouveau: nuke left over debug message + +commit 750371cb6ea9a64c9d4d4d3b9716c3c68d810d48 +Author: Ben Skeggs +Date: Thu Jul 12 10:15:16 2007 +1000 + + nouveau: separate region_offset into map_handle and offset. + +commit 5fbdf9da8bda996c0a474d13fe69d260f12ffce7 +Author: Arthur Huillet +Date: Thu Jul 12 02:35:39 2007 +0200 + + fixed object creation code to not Oops on 64bits, worked around memalloc not working on 64bit for PCIGART + +commit b301a9051b3fd9ad3dce6bcf32b06da7953a8b91 +Author: Arthur Huillet +Date: Wed Jul 11 15:01:37 2007 +0200 + + NV50 will not attempt to use PCIGART now + +commit d26ae22c2b17e0f193334cefec7d141befcfa1ee +Author: Arthur Huillet +Date: Wed Jul 11 14:56:27 2007 +0200 + + fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will probably still have a problem + +commit 5ccadac9e3b1beb8ac0177c7a39862094fe3b6de +Author: Ben Skeggs +Date: Wed Jul 11 14:22:59 2007 +1000 + + nouveau/nv50: G80 fixes. + + Again, no hardware, so no idea if it'll even work yet. I understand how + the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)". + +commit 13e1377044d581d692af77656e3bc32c9eb183f7 +Author: Ben Skeggs +Date: Wed Jul 11 12:38:48 2007 +1000 + + nouveau: Some checks on userspace object handles. + +commit 2c9e05cf4c6eb18c941321f764ed1b282a314ba9 +Merge: 9b9a127... 694e1c5... +Author: Dave Airlie +Date: Wed Jul 11 11:23:41 2007 +1000 + + Merge branch 'master' into cleanup + + Conflicts: + + libdrm/xf86drm.c + linux-core/drm_bo.c + linux-core/drm_fence.c + +commit 694e1c5c3f768436651ddf95e11ab5a89ccc8ffa +Author: Arthur Huillet +Date: Wed Jul 11 02:35:10 2007 +0200 + + Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel. + +commit 04e4922c0c407a9f0cfe268f62130891e98fc682 +Author: Arthur Huillet +Date: Wed Jul 11 02:33:12 2007 +0200 + + Made drm_sg_alloc accessible from inside the DRM - drm_sg_alloc_ioctl is the ioctl wrapper + +commit 76ca1e858fb8e1a65ea49c0c62350d7ca91044a2 +Author: Ian Romanick +Date: Mon Jul 9 18:54:25 2007 -0700 + + Convert occurances of U32 to other types. + + Most occurances of U32 were converted to u32. These are cases where + the data represents something that will be written to the hardware. + Other cases were converted to 'unsigned int'. + + U32 was the last type in xgi_types.h, so that file is removed. + +commit a9c49be6f8a0aa199a9dc0ffd0a9aa2b85cd796d +Author: Ian Romanick +Date: Mon Jul 9 18:52:43 2007 -0700 + + Fix ioctl types. + + I had moved code from xgi_drv.h to xgi_drm.h before changing the ioctl + types for XGI_IOCTL_(FB|PCIE)_ALLOC. + +commit 5c481d0a4284ec7311a47fbeab1680d007769668 +Author: Ian Romanick +Date: Mon Jul 9 16:43:48 2007 -0700 + + Eliminiate fields in xgi_info that are duplicates of fields in pci_dev. + +commit 1f4e24b429789710f5d69fc78335f20c023569bb +Author: Ian Romanick +Date: Mon Jul 9 16:33:14 2007 -0700 + + Move types shared with user mode to xgi_drm.h. + +commit 7268b65d5ce804713c12b8fadc42f9a086cdfe14 +Author: Ian Romanick +Date: Mon Jul 9 16:22:48 2007 -0700 + + Correct types that are shared with user mode. + +commit a3f56dc3d0620633c7719a01e6e578661d65edfc +Author: Ian Romanick +Date: Mon Jul 9 16:07:27 2007 -0700 + + Adjust the types of the fields of xgi_aperture. + +commit 2f2d8b9688743ac6367bf13c3c023310a257ceb7 +Author: Ian Romanick +Date: Mon Jul 9 15:59:09 2007 -0700 + + Merge xgi_mem_req and xgi_mem_alloc into a single type. + + These two structures were used as the request and reply for certain + ioctls. Having a different type for an ioctl's input and output is + just wierd. In addition, each structure contained fields (e.g., pid) + that had no business being there. + + This change requires updates to user-space. + +commit 023f7d9c0064f912415c92a85c3a9d722191909f +Author: Ben Skeggs +Date: Mon Jul 9 23:58:00 2007 +1000 + + nouveau: Allocate mappable VRAM for notifiers.. + +commit 31e33813e8c1b085683e68524e680882368e59a9 +Author: Ben Skeggs +Date: Mon Jul 9 20:02:14 2007 +1000 + + nouveau: Don't be so strict on +Date: Mon Jul 9 15:37:37 2007 +1000 + + nouveau: Avoid oops + + Turns out lastclose() gets called even if firstopen() has never been... + +commit c806bba4665bb369168ee0b453fa28e2e0bf2a5d +Author: Ben Skeggs +Date: Thu Jul 5 00:12:33 2007 +1000 + + nouveau/nv50: Initial channel/object support + + Should be OK on G84 for a single channel, multiple channels *almost* work. + + Untested on G80. + +commit 3324342e42b78aef8e90e11273776dd2b3b92074 +Author: Ben Skeggs +Date: Wed Jul 4 15:31:01 2007 +1000 + + nouveau: enable reporting for all PFIFO/PGRAPH irqs + +commit 163f8526123ffa38783fc911b5f7a19debce7f73 +Author: Ben Skeggs +Date: Mon Jul 2 19:31:18 2007 +1000 + + nouveau: rewrite gpu object code + + Allows multiple references to a single object, needed to support PCI(E)GART + scatter-gather DMA objects which would quickly fill PRAMIN if each channel + had its own. + + Handle per-channel private instmem areas. This is needed to support NV50, + but might be something we want to do on earlier chipsets at some point? + + Everything that touches PRAMIN is a GPU object. + +commit 5b726b63906419ccb3de2e065f9bf7ae875ccdf3 +Author: Michel Dänzer +Date: Fri Jul 6 09:50:50 2007 +0200 + + radeon: Improve vblank counter. + + The frame counter seems to increase only at the end of vertical blank, so we + need to add 1 while in vertical blank. + +commit 86e75b7f7f64643c6ef2c0fef353b38753df8239 +Author: Ian Romanick +Date: Thu Jul 5 17:49:13 2007 -0700 + + Remove XGI_IOCTL_CPUID and associated cruft. + +commit 8b18276458e93263d5d554f779227a906592ac74 +Author: Ian Romanick +Date: Thu Jul 5 17:45:44 2007 -0700 + + Major clean up of xgi_ge_irq_handler + + Two large blocks of code were moved out of this function into separate + functions. This brought some much needed sanity to the indentation. + Some dead varaibles were removed. + +commit 2695e8e209228dfc2e6a9b10bc118d0794602b37 +Author: Ian Romanick +Date: Thu Jul 5 17:18:12 2007 -0700 + + Convert weird rtdsc usage to get_cycles. + + I'm not convinced that get_cycles is the right approach here, but it's + better than the weird way that rtdsc was being used. + +commit d57b7f02d2e525e5600e5d77370d7ad2b4c9b265 +Author: Kristian Høgsberg +Date: Tue Jul 3 10:41:48 2007 -0400 + + Use idr_replace trick to eliminate struct drm_ctx_sarea_list. + +commit 1814a829eb65ee53a14fa9b53fc6f3a4196dcaa5 +Author: Kristian Høgsberg +Date: Tue Jul 3 10:31:46 2007 -0400 + + Don't take dev->struct_mutex twice in drm_setsareactx. + +commit 91990946fa3f7e8e725af18d1f3a63e0c7892308 +Author: Michel Dänzer +Date: Tue Jul 3 12:33:51 2007 +0200 + + One more spinlock initializer cleanup. + +commit ea832a8e555c9e1f90830b55cbd970d0eca0e2cf +Author: Michel Dänzer +Date: Tue Jul 3 12:15:15 2007 +0200 + + Simplification for previous commit. + + Dave Airlie pointed out on IRC that idr_replace lets us know if the ID hasn't + been allocated, so we don't need a special pointer value for allocated IDs that + don't have valid information yet. + +commit 8d96ba9805316b29e948d7594344feebb17042f7 +Author: Michel Dänzer +Date: Tue Jul 3 11:41:44 2007 +0200 + + Restore pre-idr semantics for drawable information. + + There's a difference between a drawable ID not having valid drawable + information and not being allocated at all. Not making the distinction would + break i915 DRM swap scheduling with older X servers that don't push drawable + cliprect information to the DRM. + +commit c9d752ff4fb2b6eee2fef636193fc9ca29abba37 +Author: Kristian Høgsberg +Date: Mon Jul 2 17:52:07 2007 -0400 + + Fix must-check warnings and implement a few error paths. + +commit b323ab52aa9ccbfb06dd723ece361a5242d067b0 +Author: Kristian Høgsberg +Date: Thu Jun 28 14:45:26 2007 -0400 + + Drop drm_drawable_list and add drm_drawable_info directly to the idr. + +commit fc37781dd30b53815dd71ce576eb2147d23f0914 +Author: Ian Romanick +Date: Fri Jun 29 21:48:31 2007 -0700 + + Convert a few more U32 variables to more appropriate, generic types. + +commit 49ccec1b0845ea14ab2cfd2f53704fe26e38fbef +Author: Ian Romanick +Date: Fri Jun 29 21:38:48 2007 -0700 + + Convert xgi_mem_location enum values to less generic names. + +commit 32584d94e6ef7c0b463794a40541eb8183c7fb02 +Author: Ian Romanick +Date: Fri Jun 29 21:35:27 2007 -0700 + + Convert open coded list iterators to either list_for_each_entry or list_for_each_entry_safe + +commit 4403540776c8ed3c2e28f26b6dacaab0b9e40e05 +Author: Ian Romanick +Date: Fri Jun 29 21:15:33 2007 -0700 + + Clean up xgi_pcie_heap_check + + The whole purpose of xgi_pcie_heap_check is to log information about + entries on the used_list. If XGI_DEBUG is not set, it doesn't print + anything. Therefore we can #ifdef the whole function body. + + Convert open-code list iteration to use list_for_each_entry. + +commit 4c4780bc8e5bf01b2b920c6b8de4ddbd0256c81f +Author: Ian Romanick +Date: Fri Jun 29 21:05:16 2007 -0700 + + Stop-gap fix in xgi_submit_cmdlist + + Comment in the code explains it. Basically, I put an if-statement + around a block of code to prevent a NULL pointer dereference that + should never happen in the first place. Eventually, this will need to + come out. + +commit e206c4c59da0e81ed65796d543c311fc7e30b19a +Author: Ian Romanick +Date: Fri Jun 29 21:00:50 2007 -0700 + + Convert some PCI-e GART related variable to generic types. + + A few of the PCI-e GART related fields in struct xgi_info were + hardcoded to u32. None of them need to be. Convert them to either + unsigned int or bool. + +commit 37733786582d04f072178949cc9e31225abf5577 +Author: Ian Romanick +Date: Fri Jun 29 20:49:21 2007 -0700 + + Delete unused arrays s_emptyBegin and s_flush2D. + +commit 406ded3816300f6b3e945c932c44350b22f43bd9 +Author: Ian Romanick +Date: Fri Jun 29 16:41:32 2007 -0700 + + Replace U(8|16) with u(8|16). + +commit ec7730e5ba6ac1d60f90af483b3966d863cb5400 +Author: Ian Romanick +Date: Fri Jun 29 16:37:39 2007 -0700 + + Eliminate unnecessary defines of TRUE and FALSE. + +commit 5da2a3c2d488983efed6f8433a304096e2bb75e8 +Author: Ian Romanick +Date: Fri Jun 29 16:37:01 2007 -0700 + + Replace BOOL with bool. + +commit ba3173fa39e236eee9ce9abb60f1151492378811 +Author: Ian Romanick +Date: Fri Jun 29 16:35:36 2007 -0700 + + Eliminate unused integer and float typedefs. + +commit 88328d4ef007c781874aafedfef59aae0d21a37c +Author: Ian Romanick +Date: Fri Jun 29 15:27:38 2007 -0700 + + Eliminate structure typedefs + + Documentation/CodingStyle says that 'typedef struct foo foo_t' is + evil. I tend to agree. Elminate all uses of such construct. + +commit 33b8476dfb0f9b5045103c3a9781ba82bcae4a9d +Author: Ian Romanick +Date: Fri Jun 29 09:30:02 2007 -0700 + + Fix return type of xgi_find_pcie_block. + + This function used to return 'void *', which was then cast to + 'xgi_pcie_block_t *' at the only caller. I changed the return type to + 'struct xgi_pcie_block_s *' and removed the explicit cast. + +commit a27af4c4a665864df09123f177ca7269e48f6171 +Author: Thomas Hellstrom +Date: Fri Jun 29 15:22:28 2007 +0200 + + Avoid hitting BUG() for kernel-only fence objects. + +commit 00f1a66f22d52c212bb9334a0103a4785af69bc1 +Author: Thomas Hellstrom +Date: Fri Jun 29 12:50:12 2007 +0200 + + Fence object reference / dereference cleanup. + + Buffer object dereference cleanup. + Add a struct drm_device member to fence objects: + This can simplify code, particularly in drivers. + +commit 475c1e67bacabb89c568c7482991451d223c53ae +Author: Ian Romanick +Date: Thu Jun 28 23:40:36 2007 -0700 + + Remove unused type 'struct xgi_pcie_list_s' / xgi_pcie_list_t. + +commit 8fa24c53f5851a2d3ad2da31ee56a4fd5abbd543 +Author: Ian Romanick +Date: Thu Jun 28 22:32:11 2007 -0700 + + Minor clean up of variable declarations in xgi_find_pcie_virt. + +commit 9c85fb866dc7954092b7ffd0ca9f76eb5354ace8 +Author: Ian Romanick +Date: Thu Jun 28 22:26:39 2007 -0700 + + Clean up debug log messages in xgi_find_pcie_block. + +commit 11ffe4632a097e3d579d084634eeccc63348249b +Author: Ian Romanick +Date: Thu Jun 28 22:20:13 2007 -0700 + + Convert comment header of xgi_find_pcie_virt to kernel doc format. + +commit e26ec51146e77eec2a45f61c9506e9800fc2fba2 +Author: Ben Skeggs +Date: Fri Jun 29 13:52:55 2007 +1000 + + nouveau: small RAMFC cleanups + +commit 1c32fecd6d2286af075976167c4887b9096e8312 +Author: Ben Skeggs +Date: Thu Jun 28 21:01:17 2007 +1000 + + nouveau: Hack around possible Xv blit adaptor breakage + +commit 2dd85772aa4e134730f294d77b4ff030a175a4ab +Author: Ben Skeggs +Date: Thu Jun 28 04:23:17 2007 +1000 + + nouveau/nv10: Fix earlier NV1x chips + + Can't use nv04 code for them, since an extra field was inserted into + RAMFC after DMA_PUT/GET. + +commit 68ecf61647e9ec16d59cc8f50550d11478eb3118 +Author: Ben Skeggs +Date: Mon Jun 25 15:42:55 2007 +1000 + + nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit + +commit 18a6d1c9c380b6b19524f654d9173a79e19aa1df +Author: Ben Skeggs +Date: Mon Jun 25 15:16:19 2007 +1000 + + nouveau: simplify PRAMIN access + +commit 38617b6a26d893bbd7b235019159e609f6cdd84b +Author: Ben Skeggs +Date: Mon Jun 25 03:52:06 2007 +1000 + + nouveau: name some regs + +commit ce0d528d3ca78348a7c1ad7c402757824fb6cf95 +Author: Ben Skeggs +Date: Sun Jun 24 20:49:19 2007 +1000 + + nouveau/nv50: skeletal backend + +commit 695599f18d907bb277805581bbe208b0e083e7d9 +Author: Ben Skeggs +Date: Sun Jun 24 19:03:35 2007 +1000 + + nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7) + + For various reasons, this ioctl was a bad idea. + + At channel creation we now automatically create DMA objects covering + available VRAM and GART memory, where the client used to do this themselves. + + However, there is still a need to be able to create DMA objects pointing at + specific areas of memory (ie. notifiers). Each channel is now allocated a + small amount of memory from which a client can suballocate things (such as + notifiers), and have a DMA object created which covers the suballocated area. + The NOTIFIER_ALLOC ioctl exposes this functionality. + +commit 4f2dd78ff3b6efeee97b72cca6bbfaef485a08d9 +Author: Ben Skeggs +Date: Thu Jun 28 02:56:30 2007 +1000 + + nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks + +commit 9b9a127ed0fe9a6a8e2fde84739ccff6fa0bc5ac +Author: Thomas Hellstrom +Date: Tue Jun 26 23:25:40 2007 +0200 + + More 64-bit padding. + +commit 8cee7dca95bc2114eb90640cf83ac87c29243683 +Author: Ian Romanick +Date: Tue Jun 26 13:46:36 2007 -0700 + + Clean up warnings about unused variables and functions. + +commit b9ef1467fed9e96c5e7bd453d01511f8ce98583c +Author: Ian Romanick +Date: Tue Jun 26 13:39:01 2007 -0700 + + Clean up mixed declarations and code. + +commit 3547fbda63925217a5be24de5d5abec3b53d3fe1 +Author: Ian Romanick +Date: Tue Jun 26 13:29:28 2007 -0700 + + Revert over-zealous change from previous commit. + +commit 3a776fa01e61c1dc40a0a1803a80c98bf7e77164 +Author: Ian Romanick +Date: Tue Jun 26 13:26:10 2007 -0700 + + Add XGI driver to Makefiles. + +commit 47bf6239aaefb977cc17e421af273c3278eb127c +Author: Ian Romanick +Date: Tue Jun 26 13:20:15 2007 -0700 + + Clean up compile-time kernel feature detection. + +commit 7a053306a9f8152462fda521e1a8322ac2bdf9fd +Author: Ian Romanick +Date: Tue Jun 26 13:16:04 2007 -0700 + + linux/config.h is deprecated or gone. + +commit ec9e494eb99d409a7e1e97bb6c5f71e9bb5a4486 +Author: Ian Romanick +Date: Tue Jun 26 13:15:22 2007 -0700 + + Gut support for pre-2.6 kernels. + +commit 434657a2582362367ba2a94f827511252001368f +Author: Ian Romanick +Date: Tue Jun 26 13:10:30 2007 -0700 + + dos2unix and Lindent + +commit 7af9d670371de868f0642148fe2d594bc9a7dea3 +Author: Ian Romanick +Date: Tue Jun 26 13:05:29 2007 -0700 + + Initial XP10 code drop from XGI. + + See attachment 10246 on https://bugs.freedesktop.org/show_bug.cgi?id=5921 + +commit 5c27f8a70e6e3684d8d58661a9cc918a3514fd14 +Author: Ian Romanick +Date: Tue Jun 26 09:51:55 2007 -0700 + + Add support SiS based XGI chips to SiS DRM. + +commit 9f617522d9cb8cd33e588d12a13f427dbe5171c2 +Author: Ben Skeggs +Date: Mon Jun 25 01:57:57 2007 +1000 + + nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303 + +commit 3dfc13e2da10e86051c7106feb5683542907acdc +Author: Ben Skeggs +Date: Sun Jun 24 19:00:44 2007 +1000 + + nouveau: kill some dead code + +commit 5f05cd7086c54bccf1c2f0b003b78a08dc55472a +Author: Ben Skeggs +Date: Sun Jun 24 19:00:26 2007 +1000 + + nouveau: NV04/NV10/NV20 PGRAPH engtab functions + + NV04/NV10 load_context()/save_context() are stubs. I don't know enough about + how they work to implement them sanely. The "old" context_switch() code + remains hooked up, so it shouldn't break anything. + + NV20 will probably break if load_context() works. No inital context values + are filled in, so when the first channel is created PGRAPH will probably end + up having its state zeroed. Some setup from nv20_graph_init() will probably + need to be moved to the per-channel context setup. + +commit 5d55b0655cb480b7d6ab4cf2467dac6dc6d8df25 +Author: Ben Skeggs +Date: Sun Jun 24 18:58:38 2007 +1000 + + nouveau: NV3X PGRAPH engtab functions + +commit 341bc7820749024e09275de6e689b10c2908689a +Author: Ben Skeggs +Date: Sun Jun 24 18:58:14 2007 +1000 + + nouveau: NV1X/2X/3X PFIFO engtab functions + + Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC + entry size. + +commit 05d86d950a10b77ffaa708e9d89b2a87c11fed01 +Author: Ben Skeggs +Date: Sun Jun 24 18:57:09 2007 +1000 + + nouveau: NV04 PFIFO engtab functions + +commit acb710d1a59788a0205cd0daf0859864e683fbd2 +Author: Ben Skeggs +Date: Sun Jun 24 18:56:40 2007 +1000 + + nouveau: NV4X PGRAPH engtab functions + +commit f2e64d527699751d6b64698495ae1d48eeee6cf7 +Author: Ben Skeggs +Date: Sun Jun 24 18:56:01 2007 +1000 + + nouveau: NV4X PFIFO engtab functions + +commit 0afb3b518e1ece820b01f3eea64b25cff01c97bc +Author: Ben Skeggs +Date: Sun Jun 24 18:55:23 2007 +1000 + + nouveau: split PFIFO/PGRAPH context creation + +commit 9dbf322d26642f9e671f144b34e7cd7d295e9b8e +Author: Ben Skeggs +Date: Sun Jun 24 18:55:06 2007 +1000 + + nouveau: (mostly) hook up put_base again + +commit 24b71c318a00dfbb18b2bbf6652e3b781175c430 +Author: Ben Skeggs +Date: Sun Jun 24 18:54:51 2007 +1000 + + nouveau: prototype PFIFO/PGRAPH engtab API + +commit 5c7c07fd49b154623f9dfdab1fe1f2cda8508036 +Author: Ben Skeggs +Date: Sun Jun 24 18:54:36 2007 +1000 + + nouveau: rename engtab functions + +commit 7f2a1cf2753c0c97b1290469a15322f7549f78ae +Merge: d2d5302... 97dcd7f... +Author: Jesse Barnes +Date: Fri Jun 22 11:12:02 2007 -0700 + + Merge branch 'vblank-rework' into vblank + +commit 97dcd7fd25c18d5148619254229f8d94efb55b44 +Author: Jesse Barnes +Date: Fri Jun 22 11:06:51 2007 -0700 + + more vblank rework + - use a timer for disabling vblank events to avoid enable/disable calls too + often + - make i915 work with pre-965 chips again (would like to structure this + better, but this hack works on my test system) + +commit 068ffc1e1bf5607f836839a1fc621a95547251e3 +Author: Michel Dänzer +Date: Fri Jun 22 11:55:26 2007 +0200 + + radeon: Acknowledge all interrupts we're interested in. + + Failure to do so was probably the root cause of fd.o bug 11287. + +commit d2d53024fb4003a6b86a3ea1ea33c76ac20bebc9 +Author: Michel Dänzer +Date: Fri Jun 22 11:45:23 2007 +0200 + + Fix vblank wait condition. + + Sync-to-vblank actually works again for me with radeon. + +commit 2738bca6f52e236a2d9a0e456a78b10442ededdd +Author: Michel Dänzer +Date: Fri Jun 22 11:44:38 2007 +0200 + + Use drm_calloc instead of assigning 0. + +commit 6e2cd7c16331b07c395732d132a6a4cdc1fad481 +Author: Michel Dänzer +Date: Fri Jun 22 11:44:19 2007 +0200 + + drm_modeset_ctl_t fixes. + + s/u64/drm_u64_t/ to allow userspace code using drm.h to compile. + + Move 64 bit arg member to the beginning to avoid alignment issues with 32 + bit userspace on 64 bit kernels. + +commit b8dd31487551ff83b63205a5cefbd06de7d4fbca +Author: Michel Dänzer +Date: Fri Jun 22 11:42:54 2007 +0200 + + Remove mask parameter from radeon_acknowledge_irqs(). + + Simply always acknowledge all interrupts we're interested in, to avoid hard + hangs when an unexpected interrupt is flagged. + +commit 24c09faec1c47260cd280221fa72fe18a12efef9 +Merge: 2d24455... afe8422... +Author: Jesse Barnes +Date: Thu Jun 21 15:26:34 2007 -0700 + + Merge branch 'vblank-rework' into vblank + +commit afe842297f7117cf80718de78ce706f6fd83584b +Author: Jesse Barnes +Date: Thu Jun 21 15:23:20 2007 -0700 + + RADEON: fix race in vblank interrupt handling + It's possible that we disable vblank interrupts and clear the + corresponding flag in irq_enable_reg, but receive an interrupt at just + the wrong time, causing us to not ack it properly, nor report to the + core kernel that it was handled. Fix that case by always handling + vblank interrupts, even if the irq_enable_reg field is clear. + +commit 40f6a696cb22ffa064f78198a7a241015d365967 +Author: Oliver McFadden +Date: Thu Jun 21 14:35:11 2007 +0000 + + r300: Synchronized the register defines file; documentation changes. + +commit 213732af4381819113756d6d920794cf0dc30dd6 +Author: Oliver McFadden +Date: Thu Jun 21 14:32:58 2007 +0000 + + r300: Allow writes to R300_VAP_PVS_WAITIDLE. + +commit 2d24455ed8b12df6d06d135cb70f02473d11f4b0 +Author: Jesse Barnes +Date: Mon Jun 18 17:43:58 2007 -0700 + + Remove broken CRTC enable checks and incorrect user irq enable in set_pipe + routine. + +commit d8ed021d29951b17cfbda0ade968c73a52ac7ec7 +Author: Michel Dänzer +Date: Mon Jun 18 13:08:21 2007 +0200 + + radeon: VBlank rework fixups. + + Fix range of frame counter registers. + + Use DRM_ERR() instead of Linux specific error codes in shared code. + + Remove duplicate register definitions and superfluous local variables. + +commit 215787e4297ed4f6364bcc98869a347fc4cad00d +Author: Oliver McFadden +Date: Mon Jun 18 08:42:46 2007 +0000 + + r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1. + +commit 8038e7b60f62e51b7f134141fd58f334eec31a10 +Author: Oliver McFadden +Date: Mon Jun 18 08:36:50 2007 +0000 + + r300: Synchronized the register defines file again. + +commit 638ebbab54a48004c2e1d9cc5498e1dec976911e +Author: David Woodhouse +Date: Mon Jun 18 12:45:20 2007 +1000 + + fix radeon setparam on 32/64 systems, harder. + + Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a + compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was + to handle the fact that on i386, alignof(uint64_t)==4. + + Unfortunately, this handler was installed for _all_ 64-bit + architectures, instead of only x86_64 and ia64. And thus it breaks + 32-bit compatibility on every other arch, where 64-bit integers are + aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode. + + Arnd has a cunning plan to use 'compat_u64' with appropriate alignment + attributes according to the 32-bit ABI, but for now let's just make the + compat_radeon_cp_setparam routine entirely disappear on 64-bit machines + whose 32-bit compat support isn't for i386. It would be a no-op with + compat_u64 anyway. + + Signed-off-by: David Woodhouse + +commit 741d1c80314de6f30bcc7eca7a7720b0aac3c56c +Author: Jesse Barnes +Date: Fri Jun 15 17:06:46 2007 -0700 + + Remove broken crtc enable checks, radeon does it slightly differently + (this makes get_vblank_counter return an actual value). + +commit b6610363e373c13a2e7fdee8691756e1768bdd57 +Author: Jesse Barnes +Date: Fri Jun 15 11:21:57 2007 -0700 + + First cut at radeon support for the vblank rework. + +commit 3d5d41fa9823cf44138c8f4bc954bca80539d74e +Author: Michel Dänzer +Date: Fri Jun 15 17:13:11 2007 +0200 + + i915: Fix handling of breadcrumb counter wraparounds. + +commit 0f5334be2bc6ceca971a7a6ab3ca1c23a707867c +Author: Michel Dänzer +Date: Fri Jun 15 11:01:51 2007 +0200 + + Remove DRIVER_IRQ_VBL(2). + + If the driver doesn't support vertical blank interrupts, it won't call + drm_vblank_init(), and dev->num_crtcs will be 0. + + Also fix an off-by-one test against dev->num_crtcs. + +commit fbee089aca727c92e0aa5d7a2ae7a8c5cf9c3076 +Author: Michel Dänzer +Date: Fri Jun 15 10:49:16 2007 +0200 + + Make vblank waitqueue per CRTC. + +commit 84bea383538df83c049680497ba2179e50d07ca3 +Author: Thomas Hellstrom +Date: Fri Jun 15 10:35:52 2007 +0200 + + Fix i915 sequence mask. + +commit 3ee31a1f356df4b81e3ba226a416627fd3b70e07 +Author: Thomas Hellstrom +Date: Fri Jun 15 10:31:32 2007 +0200 + + Indentation fixes. + +commit d34b2c7b9e108766b1d67cd23b8f7ecc77835ac7 +Author: Thomas Hellstrom +Date: Fri Jun 15 10:21:31 2007 +0200 + + Fix refcounting / lock race. + + Reported by Steve Wilkins / Michel Dänzer. + +commit e1b8eabeee354822fc0a413dd097210b621eb73a +Author: Thomas Hellstrom +Date: Thu Jun 14 11:52:38 2007 +0200 + + Locking fixes and instrumentation. + +commit 82e2c3304d3f1697537b73a2c888c8c6b1b6cdc8 +Author: Michel Dänzer +Date: Fri Jun 15 10:25:50 2007 +0200 + + Wake up vblank waitqueue in drm_handle_vblank(). + +commit 914a810a82af6f82e69a94448570772f20a94953 +Author: Michel Dänzer +Date: Fri Jun 15 10:21:44 2007 +0200 + + i915: Fix tests for vblank interrupts being enabled on CRTC by X server. + +commit 7f95a06c61f585cbc4b5fefc833432178550fe31 +Author: Michel Dänzer +Date: Fri Jun 15 10:12:23 2007 +0200 + + Return current sequence number to userspace after blocking wait for vblank. + +commit 1000d88ddfcd0ae769125db37d4e78643a430caf +Author: Michel Dänzer +Date: Fri Jun 15 10:10:33 2007 +0200 + + Fix memory leaks in vblank error paths. + + Also use drm_calloc instead of drm_alloc and memset, and use the size of the + struct instead of the size of the pointer for allocation... + +commit b06268294afb47e62949984d73905344dd160262 +Author: Jesse Barnes +Date: Thu Jun 14 11:32:31 2007 -0700 + + Comment new vblank routines and fixup several issues: + - use correct refcount variable in get/put routines + - extract counter update from drm_vblank_get + - make signal handling callback per-crtc + - update interrupt handling logic, drivers should use drm_handle_vblank + - move wakeup and counter update logic to new drm_handle_vblank routine + - fixup usage of get/put in light of counter update extraction + - fix longstanding bug in signal code, update pending counter only + *after* we're sure we'll setup signal handling + +commit 2407ce57de36470e767ebc1800cbbec74cab0ae4 +Author: Thomas Hellstrom +Date: Wed Jun 13 15:59:28 2007 +0200 + + Fix drmMMUnlock / drmMMLock return values. + +commit 62082ab3e63f6f474655da98b710e453b4124ed1 +Author: Thomas Hellstrom +Date: Wed Jun 13 15:38:59 2007 +0200 + + Make sure we read fence->signaled while spinlocked. + +commit 5156f1c897142171e78d0ea2c45a3aecb581fffa +Author: Thomas Hellstrom +Date: Wed Jun 13 15:19:30 2007 +0200 + + Fix fence object deref race. + +commit 1a4b9294a29379ea6e9fd6fb315317f391232d4b +Author: Jesse Barnes +Date: Tue Jun 12 16:29:09 2007 -0700 + + Remove unnecessary (and uncommented!) read barrier from the interrupt + path. It doesn't appear to serve any useful purpose. + +commit ca47fa90b73d0eac73fb7d1ba712d81e180eae7d +Author: Jesse Barnes +Date: Tue Jun 12 13:35:41 2007 -0700 + + Update vblank code: + - move pre/post modeset ioctl to core + - fixup i915 buffer swap + - fix outstanding signal count code + - create new core vblank init routine + - test (works with glxgears) + - simplify i915 interrupt handler + +commit db689c7b95613237cec904c3f6ee27e8c2bf7ce0 +Author: Jesse Barnes +Date: Tue Jun 12 10:44:21 2007 -0700 + + Initial checkin of vblank rework. Code attempts to reduce the number + of vblank interrupt in order to save power. + +commit f984b1b8d17f285dfacb593702178f1eb2fdb4ac +Author: Thomas Hellstrom +Date: Tue Jun 12 12:30:33 2007 +0200 + + Fix some obvious bugs. + +commit b6b5df24b962c94433afe4d8665b5f145bfa1ad3 +Author: Thomas Hellstrom +Date: Tue Jun 12 12:21:38 2007 +0200 + + Try to make buffer object / fence object ioctl args 64-bit safe. + Introduce tile members for future tiled buffer support. + Allow user-space to explicitly define a fence-class. + Remove the implicit fence-class mechanism. + 64-bit wide buffer object flag member. + +commit 280083d4a2a12a1ff6dc1b068553a4ae8960200c +Author: Dave Airlie +Date: Sun Jun 10 15:40:10 2007 +1000 + + use krh's idr mods to remove lists from idr code + +commit 31815730732a5d2a446aa316a5b4d837766762e6 +Author: Oliver McFadden +Date: Fri Jun 8 19:40:57 2007 +0000 + + r300: Added the CP maximum fetch size and ring rptr update variables. + +commit 7426da75382cce157b873c228c783115fd66589f +Author: Dave Airlie +Date: Thu Jun 7 18:45:00 2007 +1000 + + oops must fix this properly at some point + +commit e22f428f5fa55400850951b32c6ed0e856bf836b +Author: Dave Airlie +Date: Thu Jun 7 18:40:41 2007 +1000 + + drm: fix radeon setparam alignment issues on 32/64-bit + +commit 39625f9621a56b4dde5d400615bba5217a75a24c +Author: Oliver McFadden +Date: Tue Jun 5 19:19:42 2007 +0000 + + r300: Small correction to the previous commit. + +commit 9e0bd88c61bda7979cdc0543deb0cb9de30587f7 +Author: Alex Deucher +Date: Tue Jun 5 19:05:49 2007 +0000 + + r300: Document more of the RADEON_RBBM_STATUS register. + +commit 109e2a10f260f3a5f78762bbedcaeb9b2ebde1c0 +Author: Wang Zhenyu +Date: Tue Jun 5 11:15:29 2007 -0700 + + Add support for the G33, Q33, and Q35 chipsets. + + These require that the status page be referenced by a pointer in GTT, rather + than phsyical memory. So, we have the X Server allocate that memory and tell + us the address, instead. + +commit 5bd0ca125ed687b2dc6896197c0c8ab2673897f8 +Author: Dave Airlie +Date: Tue Jun 5 18:14:54 2007 +1000 + + remove include of linux ioctl32.h from drm drivers + +commit 4327d7f3142cdbf3f3f94426ae33e2d30b5a40c8 +Author: Maurice van der Pot +Date: Mon Jun 4 10:49:30 2007 +1000 + + nouveau: fix RAMHT wrapping + +commit a05d4fecd3307aa2f2f27531e7ff0b1985ef5c56 +Author: Dave Airlie +Date: Sun Jun 3 18:30:52 2007 +1000 + + radeon: refine irq acking for vbl on crtc 2 + +commit a4cddc6596b30dfa781eb7803de5b60aca50f112 +Author: root +Date: Sun Jun 3 18:12:28 2007 +1000 + + Revert "drm: add new drm_wait_on function to replace macro" + + This reverts commit 6e860d08d0f5b1e9a2d711aaf9fd6b982aa8039e. + + As I said not a good plan - this macro will have to stay for now, + trying to do the vbl code with the inline was a bit messy - may need specialised + drm wait on functions + +commit 8d95f4bd91fcc46b3e59767cb86b6c99bc8679c3 +Author: root +Date: Sun Jun 3 18:11:44 2007 +1000 + + Revert "move i915 to new drm_wait_on function" + + This reverts commit feb68037784ac09e333a321d294fdb2d8c57a4c8. + + This was a bad idea, the macro is actually a bit harder to convert + to a static for the other use cases + +commit 4e9d215bdfe72588cbacdb17ab9b60a42a43aefb +Author: Dave Airlie +Date: Sun Jun 3 16:28:21 2007 +1000 + + radeon: add support for vblank on crtc2 + + This add support for CRTC2 vblank on radeon similiar to the i915 support + +commit 638c8087deecdf489eb4f70e82590d1be0c8c942 +Author: Dave Airlie +Date: Fri Jun 1 19:00:24 2007 +1000 + + drm: fixup initialisation of list heads and idr + +commit 5c394b309de4325daae67fc766a0640b39658a64 +Author: Wang Zhenyu +Date: Wed May 30 16:25:49 2007 +0800 + + i915: Add support for 945GME chip + +commit 3917f85c73c32105b59f5185a89fe136ed6962a1 +Author: Wang Zhenyu +Date: Wed May 30 16:24:42 2007 +0800 + + i915: Add support for 965GME/GLE chip. + +commit b0c8d885ce645aee5027a75e4149ba4be265b55d +Author: Jung-uk Kim +Date: Tue May 15 13:35:33 2007 -0700 + + Update a bunch of FreeBSD port code. + + Tested on r200/r300. i915 updates still remain to be done. + +commit fdc293d40c2fdd184d89bd38257ade2437c4cbc1 +Author: Brian +Date: Tue May 29 14:56:17 2007 -0600 + + reformatting, clean-ups + +commit ccd7b6e8ddeac936518f626d2326ae439931b2bf +Author: Brian +Date: Tue May 29 14:54:00 2007 -0600 + + Clean-ups and reformatting. + + Use 4-space indentation consistently. + Replace occurances of: + if (cond) code; + with: + if (cond) + code; + to facilitate putting breakpoints on code. + +commit 056c2f249a61ba7078bae3d767a59f2be4c6556e +Author: Dave Airlie +Date: Sun May 27 08:44:38 2007 +1000 + + drm: move context handling code to use linux idr + +commit f64674743a49c242e4f24cbb7599c1c21c035a4f +Author: Dave Airlie +Date: Sun May 27 07:26:52 2007 +1000 + + drm: convert drawable handling to use Linux idr + + This cleans this code up a lot and uses the generic Linux idr which is + designed for this. + + Signed-off-by: Dave Airlie + +commit 2bb7703698bef1f599295126ca3834d37a8596c0 +Author: Thomas Gleixner +Date: Sat May 26 05:20:59 2007 +1000 + + drm: spinlock initializer cleanup + +commit 8e083c522e73f27af7e97e0d202f56f0323abe81 +Author: Michel Dänzer +Date: Sat May 26 04:35:54 2007 +1000 + + drm: make sure the drawable code doesn't call malloc(0). + + Signed-off-by: Michel Dänzer + Signed-off-by: Dave Airlie + +commit ad02c536dfaeaeb7ad025dfcfcb1a2a99aa5ad7e +Author: Dave Airlie +Date: Sat May 26 04:02:55 2007 +1000 + + radeon: add other IGP chipsets + +commit 58b2ed78329305d5760c6df55175f958477f89ae +Author: Dave Airlie +Date: Sat May 26 03:48:08 2007 +1000 + + Revert "drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls." + + This reverts commit 3fdef0dc2000308b16907b95f637c60acde80a74. + + ditto not on master yet + +commit 375f3f2884cd1437e9ec2608647face0c3cbef3a +Author: Dave Airlie +Date: Sat May 26 03:47:48 2007 +1000 + + Revert "drm/ttm: cleanup most of fence ioctl split out" + + This reverts commit 3dfc1400e9fc58c69292d7cf7c2e1653fa5e6991. + + this shouldn't have gone on master yet + +commit ce58e53a01e61818210ebf65623e35a3af20167b +Author: Dave Airlie +Date: Tue May 8 15:43:29 2007 +1000 + + whitespace fixups from kernel + +commit adee6f52e65ca67a9773fa23537c424fac9f0da8 +Author: Dave Airlie +Date: Tue May 8 15:09:48 2007 +1000 + + ati_pcigart: cut to 80 chars + +commit 3dfc1400e9fc58c69292d7cf7c2e1653fa5e6991 +Author: Dave Airlie +Date: Sun May 6 11:35:11 2007 +1000 + + drm/ttm: cleanup most of fence ioctl split out + +commit 3fdef0dc2000308b16907b95f637c60acde80a74 +Author: Dave Airlie +Date: Sun May 6 11:17:30 2007 +1000 + + drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls. + + This is the first bunch of ioctls + +commit 7b48f0022a24bc5f565ae64b450dda77dee616c1 +Author: Dave Airlie +Date: Sat May 26 04:26:24 2007 +1000 + + drm: cleanup use of Linux list handling macros + + This makes the drms use of the list handling macros a lot cleaner + and more along the lines of how they should be used. + +commit ea98d7e79657469545b865a353784d79fc8cff9d +Author: Stephane Marchesin +Date: Thu May 17 17:35:14 2007 +0200 + + nouveau: don't build the module by default + +commit ca725bba8472d5d94bcb7414b510d7d3027cbb1c +Author: Oliver McFadden +Date: Sun May 13 16:18:54 2007 +0000 + + r300: Added my comments into r300_reg.h. + +commit c6ff0caaa3e8f61f7c19950913b1ce731f979ce3 +Author: Oliver McFadden +Date: Sun May 13 07:53:40 2007 +0000 + + r300: Synchronized R300 register defines file. + + Just moved the indent control comments so that indent doesn't try to change + anything. + +commit e9b604ed3fd6b4e056920bd327646b3e0e9b3be8 +Author: Matthieu Castet +Date: Sat May 12 15:35:39 2007 +0200 + + nouveau : nv10 graph move clipping value to per channel init + +commit 5d623935c0e4f5f283c961de186b78b30db12463 +Author: Matthieu Castet +Date: Sat May 12 15:16:37 2007 +0200 + + nouveau : nv10 graph clipping values were forgoten in ddx to drm commit + +commit e4d163d81ad7ce46af43cf84485dc96c4cb22b1f +Author: Keith Packard +Date: Mon May 7 09:07:48 2007 -0400 + + Allow vblank interrupts to remain disabled across VT switch. + + i915_driver_irq_postinstall was forcing vblank interrupts to pipe A when + called with vblank interrupts disabled. This caused vblank interrupts to be + accidentally re-enabled when VT switching the X server. Instead, start the + driver with vblank interrupts enabled on pipe A to support older X servers, + but then leave control over the state to the X server if it is able to do so. + +commit e0056c7eb4640fc4863a352997ba00e3142b3355 +Author: Oliver McFadden +Date: Wed May 9 18:31:31 2007 +0000 + + r300: Synchronized R300 register defines file. + +commit a02b04514250bff19aaf90d1f9699b4ec4749343 +Author: Oliver McFadden +Date: Wed May 9 15:22:09 2007 +0000 + + r300: Synchronized R300 register defines file. + +commit 59784116bf7d18cfbbb7236fbdd601476207b9dc +Author: Matthieu Castet +Date: Tue May 8 21:18:02 2007 +0200 + + nouveau : fix fifo context size for nv10 + +commit b2a875ba8955cfbf3df2dc1ecb25915a252eef9f +Author: Dave Airlie +Date: Tue May 8 18:25:15 2007 +1000 + + ttm: complete drm buffer object ioctl split + + retain the op operation for validate/fence operations + +commit ae677472af25786fe935309ff1ac287e1610c819 +Author: Dave Airlie +Date: Tue May 8 17:55:57 2007 +1000 + + drm/ttm: remove old fence ioctl + +commit 25c51f539f254937d116699e66f8c382d78e71d4 +Author: Dave Airlie +Date: Tue May 8 17:53:58 2007 +1000 + + drm/ttm: ioctl cleanup for buffer object - user side only + + This just cleans up the xf86drm.c to what I want and drm.h, + I need to fix up the kernel internals to suit these changes now. + + I've moved to using struct instead of typedefs for the bo and it doesn't look + that bad so I'll do the same thing for mm and fence.. + +commit 963ed9910ab59af23c66f4a8fafb7879f5140d97 +Author: Dave Airlie +Date: Tue May 8 17:51:21 2007 +1000 + + libdrm: fix typo on ttm fence interface + +commit c4e2caec44c5c1837d676ff0f5ad0747b2e570a7 +Author: Brian +Date: Sun May 6 10:09:59 2007 -0600 + + s/OJBECTS/OBJECTS/ + +commit 4e858f8811d057a86740b27e0c9af933d382ed0d +Author: Oliver McFadden +Date: Sun May 6 12:47:03 2007 +0000 + + r300: Synchronize the register file from Mesa. + +commit 87ec1fea6c1ac93b4ff02f8c06ed476c0081e2e5 +Author: Oliver McFadden +Date: Sun May 6 12:35:16 2007 +0000 + + r300: Use the defined names for known registers. + +commit 6a62941ecaa7d2b8f14b30920856bfa52aee4775 +Author: Dave Airlie +Date: Sun May 6 11:35:11 2007 +1000 + + drm/ttm: cleanup most of fence ioctl split out + +commit ee8954cb53e4964a5565833b5a937f1cbcb60d44 +Author: Dave Airlie +Date: Sun May 6 11:17:30 2007 +1000 + + drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls. + + This is the first bunch of ioctls + +commit c9cd2c768bd37adadb87476f55f95e7b2336bc6b +Author: Dave Airlie +Date: Sun May 6 10:50:10 2007 +1000 + + drm: remove unused define DRM_HAS_TTM + +commit cf7c90f7b4087764cdd5f6c73328b0cf9dcb0b78 +Author: Thomas Hellstrom +Date: Wed May 2 17:13:32 2007 +0200 + + Fix buffer object list freeing. + +commit f06ad82ecdc2c84f913bb4d6d48132f27f02c3a9 +Author: Michel Dänzer +Date: Tue May 1 17:03:55 2007 +0200 + + Fix userspace ABI breakage from 3c384a9ad5f964709a237cfe035ea5d6df2da5fa. + +commit ca1cd3257c7c41821788ca45d45e51065f436803 +Author: Michel Dänzer +Date: Sun Apr 29 12:17:57 2007 +0200 + + radeon: Don't mess up page flipping when a file descriptor is closed. + + There can still be other contexts that may use page flipping later on, so don't + just unilaterally 'clean it up', which could lead to the wrong page being + displayed, e.g. when running 3D apps with a GLX compositing manager such as + compiz using page flipping. + +commit feb68037784ac09e333a321d294fdb2d8c57a4c8 +Author: Dave Airlie +Date: Sat Apr 28 15:07:22 2007 +1000 + + move i915 to new drm_wait_on function + +commit 6e860d08d0f5b1e9a2d711aaf9fd6b982aa8039e +Author: Dave Airlie +Date: Sat Apr 28 15:05:20 2007 +1000 + + drm: add new drm_wait_on function to replace macro + +commit e9b3acd25733517420f7b9fea01cfd529d909348 +Author: Dave Airlie +Date: Sat Apr 28 15:04:49 2007 +1000 + + remove register usage + +commit 9f9c19065cecde16aa2994b6f777336a6e5f3409 +Author: Dave Airlie +Date: Sat Apr 28 14:49:27 2007 +1000 + + remove DRM_GETSAREA and replace with drm_getsarea function + +commit e88934274ab80119d6dd139e3d780c3cdea7e9e5 +Author: George Sapountzis +Date: Thu Apr 26 14:16:51 2007 +0300 + + Revert "bug 7092 : add pci ids for mach64 in Dell poweredge 4200" + + This reverts commit 255f3e6f76dfd267a14765dd1293229184298d89. + + Rage IIc does not have a vertex setup engine. + +commit 3a2c9f46212328a44533a45523d2a9f9b72a15da +Author: George Sapountzis +Date: Thu Apr 26 14:16:28 2007 +0300 + + linux: minor indent. + +commit 942d9be296df38aa69987845a08d3d607b85f83e +Author: George Sapountzis +Date: Thu Apr 26 14:16:13 2007 +0300 + + freebsd: remove stray apperance of IN_MODULE. + + The xserver no longer uses the libc-wrapper. + +commit b69b42634619076d4163ae144f0154880d1928cd +Author: George Sapountzis +Date: Thu Apr 26 14:15:55 2007 +0300 + + libdrm: remove HAVE_XORG_CONFIG_H and XFree86LOADER ifdef's. + + We no longer import libdrm in the xserver. + +commit 2a6f555053bd404e7e5721c40990da2d9db53d19 +Author: Dave Airlie +Date: Thu Apr 26 17:54:06 2007 +1000 + + update create_lk_drm.sh script + +commit afc029e935a8f4667aff786c51818712487d185d +Author: Dave Airlie +Date: Thu Apr 26 16:25:43 2007 +1000 + + whitespace cleanup + +commit e5c1f1caa2a6b8c63aa6d0f8a70372eaf72f1840 +Author: Dave Airlie +Date: Thu Apr 26 16:22:28 2007 +1000 + + remove some whitespace violation + +commit 4b72759b307f046d71c08d9008b7467e0b3bb0ba +Author: Dave Airlie +Date: Thu Apr 26 16:22:11 2007 +1000 + + drm: nopfn warning on 64-bit + +commit 71d44cda52f239b543cb1fad93ef35adc3093d38 +Author: Jesse Barnes +Date: Thu Apr 26 16:09:24 2007 +1000 + + drm/ttm: allow drm_buffer_object_create to be used in-kernel + +commit 3c384a9ad5f964709a237cfe035ea5d6df2da5fa +Author: Jesse Barnes +Date: Wed Apr 11 12:51:52 2007 -0700 + + Add new buffer object type for kernel allocations that don't initially have a user mapping. + (cherry picked from commit 2e21779992bd5026d8ec4dea52466377dbe5a0ed) + +commit 5c8561aae22138880673503d930af7f1b361d071 +Author: Brian +Date: Wed Apr 25 14:52:29 2007 -0600 + + More detailed instructions, tips. + +commit 61477d60c466b4aac395057a285c1d238a83ce1c +Author: Stephane Marchesin +Date: Mon Apr 23 22:37:01 2007 +0200 + + nouveau: fix wacky pci id + +commit af3ffcd822e562b02fe0671e7e88d9c5a6225658 +Author: Kristian Høgsberg +Date: Fri Apr 20 18:06:31 2007 -0400 + + Initialize rwlock using rwlock_init to appease lockdep validator. + +commit a8a8108e459977ec8b334e517abd67e1b264337e +Author: Thomas Hellstrom +Date: Thu Apr 19 23:25:14 2007 +0200 + + Avoid a fence timeout problem when a signal is pending. + +commit 1ce9c092314ddf005cdadc6937e36d4dc59788ce +Author: Thomas Hellstrom +Date: Fri Apr 20 15:49:31 2007 +0200 + + Fix via compile error + (Reported by Benno Schulenberg.) + +commit 2df2c70e20caa3d6d1a1ac12da6fe3cc0689d51f +Author: Thomas Hellstrom +Date: Wed Apr 18 16:33:28 2007 +0200 + + Simplify the ttm backend interface and the agp ttm backend. + +commit 5a96d59ce9d9ad5816e2d0e195afa9902445f594 +Author: Thomas Hellstrom +Date: Tue Apr 17 14:15:37 2007 +0200 + + Don't always free up memory space when we unpin buffers. + +commit 5432cc4abf672ed3adb10fd5d61a6a5716089a98 +Author: Thomas Hellstrom +Date: Tue Apr 17 10:53:19 2007 +0200 + + Fix buffer object reference problems. + (Reported by Dave Airlie). + +commit e805ca959dbef85ac7b508639a64832a7995703a +Author: Thomas Hellstrom +Date: Tue Apr 17 08:58:23 2007 +0200 + + via: Make sure we flush write-combining using a follow-up read. + +commit e91ceff6c98661bfae5db008e024b71a8a0f5129 +Author: Thomas Hellstrom +Date: Tue Apr 17 08:46:45 2007 +0200 + + Add a code comment. + +commit e6e4946c82ab6f63143df7f49f38fa56f7e8980a +Author: Thomas Hellstrom +Date: Mon Apr 16 16:23:05 2007 +0200 + + Require the hardware lock for buffer creation + (since that implies a validate). + Fix drm_bo_wait_unfenced error messages and codes. + Fix some return codes from libdrm. + +commit 9b7211dd6793dc62d11ad1ae980b22fa2d61f9dd +Author: Matthieu Castet +Date: Tue Apr 10 23:19:29 2007 +0200 + + nouveau: nv10 per channel init from ddx + +commit 059b5d90770e32ba3d6d9a62acf74b352de7f421 +Author: Oliver McFadden +Date: Mon Apr 9 23:23:40 2007 +0000 + + rs480: Renamed some unknown registers. See dri-devel list. + +commit 2d7f9f59c3ae9dbaa516ee45ae26b32825e7bf3e +Author: Ben Skeggs +Date: Mon Apr 9 23:20:26 2007 +1000 + + nouveau: NV46 support + +commit 29f8fe80469a161c89c1a690ae2b62b3c21e4794 +Author: Dave Airlie +Date: Mon Apr 9 22:00:34 2007 +1000 + + radeon: bump version for IGPGART support + +commit a70f8e0ab265cc4a26ed2f9e92ab0618bd920a93 +Author: Dave Airlie +Date: Mon Apr 9 21:52:59 2007 +1000 + + radeon: add support for reverse engineered xpress200m + + The IGPGART setup code was traced using mmio-trace on fglrx by myself + and Phillip Ezolt on dri-devel. + + This code doesn't let the 3D driver work properly as the card has no + vertex shader support. + + Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this + work on. + +commit b25558bb7377f6df6d457b50067a1d245f7911fd +Author: Dave Airlie +Date: Sat Apr 7 07:21:05 2007 +1000 + + fixup install target, not sure what I was smokin... + +commit 46257c51c1e402cf04007f01a90cb423b141f89e +Author: Dave Airlie +Date: Sun Apr 1 16:30:52 2007 +1000 + + i915: use breadcrumb macro everywhere + +commit 78034c06dfc0cd79cc47c2daa119ca3ee2a4fed4 +Author: Ben Skeggs +Date: Fri Apr 6 03:24:39 2007 +1000 + + nouveau: make a note about a bit that breaks some cards + +commit 38f52402a8b7126f0c1ceccf7c1843b1a5247ef6 +Author: Ben Skeggs +Date: Fri Apr 6 03:03:59 2007 +1000 + + nouveau: Power up all card units by default on startup. + +commit 9c793716591c141d7bb1796f5dc6473c45d9545c +Author: Dave Airlie +Date: Thu Apr 5 11:18:00 2007 +1000 + + add an install target to the drm modules makefile + +commit c4968279218cf246323e38bbbd44ce2774871fde +Author: Thomas Hellstrom +Date: Tue Apr 3 10:54:23 2007 +0200 + + Fix user object reference when caller is not object creator. + (Reported by Dave Airlie). + +commit 38d18acb8f3617d79735f71564d9f49e608461ec +Author: Thomas Hellstrom +Date: Tue Apr 3 10:24:06 2007 +0200 + + Add a fence flush event to each fence-signaled check when lazy-waiting + + to make sure we don't lose any sequence numbers if, for some reason, + they don't generate an IRQ. + +commit 139e4bbc73c65d6e1d7fc831ae15c8b28f92e821 +Author: Thomas Hellstrom +Date: Tue Apr 3 10:21:41 2007 +0200 + + Make sure we ack irqs before we read a breadcrumb so that + + breadcrumb updates that occur _AFTER_ we've read the breadcrumb really + generates a new IRQ. + +commit 7743af94492681f5aaf7cfdef78d695a6db7cbd0 +Author: Thomas Hellstrom +Date: Fri Mar 30 14:14:26 2007 +0200 + + Evicted no-move buffers can get lost if they end up in another + + memory type than local. + +commit d85e243259259d7702db0d344ae1ff7d26598227 +Author: Thomas Hellstrom +Date: Fri Mar 30 12:23:22 2007 +0200 + + Fix an oops when trying to clean a not yet initialized memory type. + +commit 72d457fc1973a61f906a42d049c1c160cc7dee4e +Author: Thomas Hellstrom +Date: Thu Mar 29 21:33:41 2007 +0200 + + Make sure CMA (Can't map aperture) pages are mapped uncached. + + (Should really make this write-combined using PATs, at some point). + +commit 5395a92d40337aa3de424f87fb38cb5a0ca45bcf +Author: Oliver McFadden +Date: Mon Apr 2 19:45:10 2007 +0000 + + r300: Synchronize the register header file again. + + It's a good idea to keep these synchronized; even though the DRM doesn't use all + the defines, maintaining two different copies is prone to errors when the diff + gets bigger. + +commit cbbdbd5e653860bcae165c8abd16006d4425e3de +Author: Matthieu Castet +Date: Sun Apr 1 14:31:41 2007 +0200 + + nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+ + + http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file. + + Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL. + +commit 25cedcf76fae45f8a1a63ccb6b4bc5746b7d1587 +Author: Matthieu Castet +Date: Sun Apr 1 14:21:29 2007 +0200 + + nouveau : nv10 ctx switch fix + restoring NV10_PGRAPH_CTX_SWITCH1 now works + +commit 223061e0846a95d4a3dba84b36afb2cef313bae9 +Author: Matthieu Castet +Date: Sun Apr 1 00:44:11 2007 +0200 + + nouveau : set the correct PGRAPH_CTX_CONTROL register + + "5a072f32 (Stephane Marchesin 2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg + +commit ddb1715e06f6b5ab81ed0bc6667104bb9e7fcdee +Merge: cd4c821... 406a894... +Author: Eric Anholt +Date: Fri Mar 30 12:56:34 2007 -0700 + + Merge branch 'crestline-qa', adding support for the 965GM chipset. + +commit cd4c82176f3f429e722ca3fac2abf231af479780 +Merge: 5d69640... 3f70518... +Author: Eric Anholt +Date: Fri Mar 30 12:56:08 2007 -0700 + + Merge branch 'origin' + +commit 3f70518f0bcf36a1e2c82db962324dbdee106f67 +Author: Dave Airlie +Date: Thu Mar 29 09:25:04 2007 +1000 + + drm/bo: avoid oops if the memory manager for this type isn't initialised + +commit bdabc8f9986bf4e190f8e4a24466dec551b08006 +Author: Stephane Marchesin +Date: Thu Mar 29 00:54:18 2007 +0200 + + nouveau: fix nv04 context switches. + +commit 81b811da376fed5363f25e82e5285455df3e8157 +Author: Dave Airlie +Date: Tue Mar 27 18:01:31 2007 +1000 + + drm/i915: set the bo up at firstopen time not after DMA init + + This is required to use TTM to allocate the ring buffer. + +commit 72a1190f6d9acea5fb789bec706c842604954049 +Author: Dave Airlie +Date: Tue Mar 27 17:59:30 2007 +1000 + + drm/ttm: make sure dev_mapping is set-up for the first opener of the drm + + This was causing an oops in my miniglx code to try and use a TTM-only setup. + +commit 406a894e529267177e6161c1713f2aa2293e7734 +Merge: ddc87d3... 674cefd... +Author: Nian Wu +Date: Tue Mar 27 12:53:13 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 674cefd4fe4b537a20a10edcb4ec5df55facca8e +Author: Ben Skeggs +Date: Mon Mar 26 19:43:48 2007 +1000 + + nouveau: move card initialisation into the drm + + The PGRAPH init for the various cards will need cleaning up at some point, + a lot of the values written there are per-context state left over from the + all the hardcoding done in the ddx. + + It's possible some cards get broken by this commit, let me know. + Tested on: NV5, NV18, NV28, NV35, NV40, NV4E + +commit ddc87d302526347f670e8b61e227c0eb05c15cde +Merge: e7cd5a1... 5ad43f4... +Author: Nian Wu +Date: Sun Mar 25 17:00:36 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 5d69640a6ad15522fa37c3b232eb34acef955892 +Author: Eric Anholt +Date: Sat Mar 24 09:39:09 2007 -0700 + + Catch up to new interrupt API, and retire FreeBSD 4.x support here. + +commit 5ad43f46759ff1eb473c9101e7de0d46a4ed8177 +Author: Dave Airlie +Date: Sat Mar 24 17:58:27 2007 +1100 + + vm: cleanup drm_vm.c along lines of cleanups queued for kernel + +commit e7cd5a1e2df29c1a06b74439faf750c6c5bb8e4a +Merge: 0467ad4... 4988fa4... +Author: Nian Wu +Date: Fri Mar 23 17:00:41 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 4988fa48869098b18a3b60884550614818d60445 +Author: Ben Skeggs +Date: Fri Mar 23 14:45:00 2007 +1100 + + nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOs + +commit 8d918b0b63b3142d92204253bfc954ed12aa98ed +Author: Dave Airlie +Date: Fri Mar 23 14:56:39 2007 +1100 + + cleanup more whitespace from ttm merge + +commit 39795501a8d4d5286fd21d36f8b7258f70fec989 +Author: Dave Airlie +Date: Fri Mar 23 14:56:28 2007 +1100 + + drm: remove second spinlock init for tasklet lock + +commit 2bb9de96d5b58961ec2ff2e49e1e7260c8befa48 +Author: Ben Skeggs +Date: Fri Mar 23 13:45:29 2007 +1100 + + nouveau: remove unused cruft + +commit 0467ad41188031073cbbad1139a916e2439af2f1 +Merge: fe4cc50... e222254... +Author: Nian Wu +Date: Wed Mar 21 17:00:43 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit e22225416a12c2beab7a5bcb866d214ee212cbc4 +Author: Ben Skeggs +Date: Wed Mar 21 17:57:47 2007 +1100 + + nouveau: support multiple channels per client (breaks drm interface) + +commit fe4cc50983bdaf51bf29ef041f65e0007f547844 +Merge: 8398b99... 209870a... +Author: Nian Wu +Date: Tue Mar 20 13:11:02 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 209870a88262a4a27b36e5cc97f3b1e7021dbefd +Author: Dave Airlie +Date: Tue Mar 20 10:13:58 2007 +1100 + + rename badly named define + +commit ef71b6230b50b81c1169d63f44d397ef0b77f94d +Author: Alan Hourihane +Date: Mon Mar 19 11:40:52 2007 +0000 + + remove i830 reference + +commit cbe31d0dc7ead9e690faf8b68c481a39f0f01195 +Author: Alan Hourihane +Date: Mon Mar 19 11:40:05 2007 +0000 + + Remove old i830 kernel driver. + +commit 8398b99d8d146278adc13d6093811e53cd42c88a +Merge: df73975... 1e77e52... +Author: Nian Wu +Date: Mon Mar 19 17:00:31 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 1e77e52755c9bb94c9230778845e6701b4d82b3a +Author: Dave Airlie +Date: Mon Mar 19 09:20:04 2007 +1100 + + more return values fixup + +commit 46fac1708242756d280128888bda7218fb224603 +Author: Dave Airlie +Date: Mon Mar 19 09:12:08 2007 +1100 + + fixup return values in drm ioctl + +commit 26aba875e1094dcb3ba88ac4c41e943ef46df2c8 +Author: Dave Airlie +Date: Mon Mar 19 08:56:24 2007 +1100 + + more whitespace issues + +commit c991f8e049d8f39cbbb74afb81097affdc110a29 +Author: Dave Airlie +Date: Mon Mar 19 08:46:39 2007 +1100 + + cleanup ioctl expansion code + +commit a2e3bae8e23398b1db25ea79cf1086a1fa735946 +Author: Dave Airlie +Date: Mon Mar 19 08:46:25 2007 +1100 + + oops missing else + +commit bbb6fc9307c42891120faeaca5c57cf7884866ad +Author: Dave Airlie +Date: Mon Mar 19 08:36:01 2007 +1100 + + make drm fops const from kernel + +commit 483f6a113d21b90821d091c4dae413703f9907e5 +Author: Dave Airlie +Date: Mon Mar 19 08:32:25 2007 +1100 + + use ARRAY_SIZE + +commit 2d7ecb84221278a9b6a0328fb2f9a63ea6b8e2e2 +Author: Dave Airlie +Date: Mon Mar 19 08:29:07 2007 +1100 + + more tab/space conversion + +commit 2463b03cb4d89cfcc5f2af6d6f09b28a491cb971 +Author: Dave Airlie +Date: Mon Mar 19 08:23:43 2007 +1100 + + whitespace cleanup pending a kernel merge + +commit 6c4428d40c7531a28aa405e3db407461d20a0110 +Author: Dave Airlie +Date: Mon Mar 19 08:09:21 2007 +1100 + + clean up more of inline functions agp_remap/drm_lookup_map + +commit 27197d7836b913976f6b75005d1c0c926774825a +Author: Dave Airlie +Date: Sun Mar 18 21:45:07 2007 +1100 + + deinline agp_remap along lines of kernel + +commit c4808e206bcc5b3d3c0baa2e6e5130e67b78152b +Author: Dave Airlie +Date: Sun Mar 18 21:42:48 2007 +1100 + + remove drm_lookup_map unused now + +commit df73975980e926e350bf36bf4bc8a07220f66164 +Merge: 80d0018... 93f66af... +Author: Nian Wu +Date: Wed Mar 14 17:00:27 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 93f66af76a18357f7e3bfcb52c241962287c5caa +Author: Oliver McFadden +Date: Tue Mar 13 14:48:01 2007 +0000 + + r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; not + enough information is known about them to be sure as to what the values mean. + +commit 80d0018bc078d489f509152673c838be3c471854 +Merge: ab75d50... a90c285... +Author: Nian Wu +Date: Tue Mar 13 17:00:31 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit a90c2854a7a71953e03d36b1ff7db3e9c2babb99 +Author: Oliver McFadden +Date: Tue Mar 13 06:25:04 2007 +0000 + + Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT. + + Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these + values are really unknown; ideally more reverse engineering should be done to + determine what these values mean and when they should be set. + +commit 90f8c691a57a79a6a9652b7d2a01c59acc127b3f +Author: Ben Skeggs +Date: Tue Mar 13 14:51:55 2007 +1100 + + nouveau: make sure cmdbuf object gets destroyed + +commit 1775202cf96c51018bf369b1b4d08023d622513c +Author: Ben Skeggs +Date: Tue Mar 13 14:18:03 2007 +1100 + + nouveau: associate all created objects with a channel + cleanups + +commit 7e2bbe295424adfcd455a4c4b42dd0342087615e +Author: Ben Skeggs +Date: Tue Mar 13 13:43:14 2007 +1100 + + nouveau: s/fifo/channel/ + +commit 462a6ea4caadae0c68f6fe3e0343950ced2095cb +Author: Oliver McFadden +Date: Tue Mar 13 01:19:56 2007 +0000 + + Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to either + R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values. + +commit 5667396e05723afc5a626e1ba0384e29a240dea3 +Author: Oliver McFadden +Date: Tue Mar 13 00:50:05 2007 +0000 + + Guess another unknown register used for R300 pacification. + +commit ab75d50d6ca72615259e4fa857effeb6192c28a9 +Merge: b369724... 0cd5c65... +Author: Nian Wu +Date: Mon Mar 12 09:03:40 2007 +0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 0cd5c650d1bb36e0ba6b40abd1da1459d1a767f0 +Author: Patrice Mandin +Date: Sun Mar 11 14:02:40 2007 +0100 + + nouveau: PUT,GET, not 2xPUT + +commit b36972407747154abc0c5f2cdcf3b8ddbba4ff2e +Merge: 0a85c9f... 6ffe94f... +Author: Nian Wu +Date: Wed Mar 7 16:01:50 2007 -0500 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 6ffe94f008db22f959d4d397861b7439cb5404ba +Author: Thomas Hellstrom +Date: Wed Mar 7 09:19:57 2007 +0100 + + Add via CX700. + +commit 0a85c9fa02608426a9a97f1d26e37c301330926b +Merge: 6c48b8e... 188a93c... +Author: Nian Wu +Date: Mon Mar 5 09:01:45 2007 -0500 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 188a93c9dfde31de4d86733fa46b50487d3a4ac0 +Author: Dave Airlie +Date: Sun Mar 4 19:10:46 2007 +1100 + + radeon: make PCI GART aperture size variable, but making table size variable + + This is precursor to getting a TTM backend for this stuff, and also + allows the PCI table to be allocated at fb 0 + +commit c9178c3d01f6f38a33f9624c620d290cb9036964 +Author: Dave Airlie +Date: Sun Mar 4 18:13:34 2007 +1100 + + ati: make pcigart code able to handle variable size PCI GART aperture + + This code doesn't enable a variable aperture it just modifies the codebase + to allow me fix it up later + +commit 6c48b8e7ffd0af4d49855d7175e822f4af1f526f +Merge: 0bbbb46... 72caa48... +Author: Nian Wu +Date: Thu Mar 1 09:02:09 2007 -0500 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 0bbbb46650667c84a50f1a675a7a910d6ef7df4b +Merge: 7c3aeaf... 6a51da7... +Author: Nian Wu +Date: Wed Feb 28 09:00:12 2007 -0500 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 72caa48c82e4334d3292185dbadf758d2dd14c16 +Author: Ben Skeggs +Date: Wed Feb 28 15:14:08 2007 +1100 + + nouveau: intrusive drm interface changes + + graphics objects: + - No longer takes flags/dmaobj parameters, requires some major changes + to the ddx to setup the object through the FIFO. This change is + likely to cause breakages on some cards (tested on NV05,NV28,NV35, + NV40 and NV4E). + dma objects: + - now takes a "class" parameter, not really used yet but we may need + it at some point. + - parameters are checked, so clients can't randomly create DMA objects + pointing at whatever they feel like. + misc: + - Added FB_SIZE/AGP_SIZE getparams + - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR + - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't + NOTIFICATION_PENDING. + +commit 7c3aeafe756f823e2cd6352ed1788aeec0000b95 +Merge: df2fc3e... 80468e7... +Author: Nian Wu +Date: Tue Feb 27 14:42:26 2007 -0500 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 6a51da7325163151678c27dcbf51595092773d7a +Author: Jay Estabrook +Date: Tue Feb 27 08:55:08 2007 +0000 + + Fix Alpha domain/bus issue + +commit 80468e75323a4353e29f010b61ee657851f8508c +Author: Thomas Hellstrom +Date: Mon Feb 26 18:17:54 2007 +0100 + + Fix build for 2.6.21-rc1. + The vm subsystem of 2.6.21 is fully compatible with the buffer object + vm code. + +commit df2fc3ec62d6799a3266cfb18b1279a126892f44 +Merge: 80095ff... 9d8ba2d... +Author: Nian Wu +Date: Sun Feb 25 17:06:13 2007 -0800 + + Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline + +commit 9d8ba2d0d479f53b996c0a0e366acfee52daab3b +Author: Jakob Bornecrantz +Date: Sun Feb 25 10:48:26 2007 +1100 + + drm: remove unnecessary NULL checks, and fix some indents.. + +commit 2b7a9afa0977d4a8b21db3d436cec66e5a45764d +Author: Thomas Hellstrom +Date: Thu Feb 22 17:04:20 2007 +0100 + + Some fencing cleanup. + +commit a253de2fcfa11abadd4697a9d89137adf3f35f78 +Author: Dave Airlie +Date: Sun Feb 18 17:59:40 2007 +1100 + + drm: remove last usage of VM_OFFSET + +commit 6d8ed5aedda27ec238aac3d69fb9dfadc82bfa9a +Author: Thomas Hellstrom +Date: Fri Feb 16 20:25:26 2007 +0100 + + Leftover files from previous commit. + +commit e0f53e59be4b96ed6eb28bd2df9f6a9d789d1734 +Author: Thomas Hellstrom +Date: Fri Feb 16 20:22:24 2007 +0100 + + Simple fence object sample driver for via, based on idling the GPU. + Buffer object driver for via. + Some changes to buffer object driver callbacks. + Improve fence flushing. + +commit 7766378d97323de375687285f2e125008b79045d +Author: Thomas Hellstrom +Date: Thu Feb 15 12:10:33 2007 +0100 + + Initial support for fence object classes. + + (Fence objects belonging to different command submission mechanisms). + +commit 7803977aa9c3ca6360e6c22e77415cf17151cb9e +Author: Michel Dänzer +Date: Thu Feb 15 09:26:16 2007 +0100 + + Fix build against older kernels. + +commit a78f70faade8950ebb11ac8334c8c551f8e32b35 +Merge: 35eb12d... 1345076... +Author: Thomas Hellstrom +Date: Wed Feb 14 15:33:40 2007 +0100 + + Merge branch 'ttm-vram-0-1-branch' + +commit 35eb12d8bf91e7a3b0702385fa47b648194803c4 +Author: Thomas Hellstrom +Date: Wed Feb 14 15:32:08 2007 +0100 + + Fix multiple spinlock unlocking + +commit 1345076c8f93936563cd5c15588b1d76d87969d3 +Author: Thomas Hellstrom +Date: Wed Feb 14 14:10:10 2007 +0100 + + Rename drm_ttm.h to drm_objects.h + Fix up some header incompatibilities in drm_fence.c caused by the previous + commit. + +commit 8ffc1844b083e36266ebc4d1a47f6e8fe619fd05 +Author: Thomas Hellstrom +Date: Wed Feb 14 14:05:40 2007 +0100 + + Move fence- and buffer-object related header stuff to drm_ttm.h + +commit 5c9a7b0f9499b94856916facd110059223d243dc +Author: Thomas Hellstrom +Date: Wed Feb 14 13:31:35 2007 +0100 + + Remove an intel-specific hack and replace it with a fence driver callback. + +commit 04760563b88c8e94f3ae448710d1ab8b350c2e5f +Author: Thomas Hellstrom +Date: Wed Feb 14 12:39:02 2007 +0100 + + Set the drm bus map type for each buffer object memory type. + +commit 7bcb62b45d18ab7b48ad3cb5d13aec3bc577678e +Author: Thomas Hellstrom +Date: Wed Feb 14 10:49:37 2007 +0100 + + Rework buffer object vm code to use nopfn() for kernels >= 2.6.19. + +commit f524870184b29885c6207af21fcb45c47fbaa576 +Author: Stephane Marchesin +Date: Wed Feb 14 00:08:55 2007 +0100 + + nouveau: fix the build on big endian (thanks CyberFoxx) + +commit 59af900e4f62370457117b0659e3f28f89949499 +Author: B. Rathmann +Date: Wed Feb 14 00:07:31 2007 +0100 + + nouveau: fix memory initialization with multiple cards. + +commit 6b289db05496c5cc89c29817be16cb107a522722 +Author: Thomas Hellstrom +Date: Tue Feb 13 20:46:56 2007 +0100 + + Remove debug printout. + +commit e1460426b885ab656e3cda3fd3841d64260434c5 +Author: Thomas Hellstrom +Date: Sun Feb 11 20:33:57 2007 +0100 + + Bugzilla Bug #9457 + + Add refcounting of user waiters to the DRM hardware lock, so that we can use the + DRM_LOCK_CONT flag more conservatively. + + Also add a kernel waiter refcount that if nonzero transfers the lock for the kernel context, + when it is released. This is useful when waiting for idle and can be used + for very simple fence object driver implementations for the new memory manager. + + It also resolves the AIGLX startup deadlock for the sis and the via drivers. + i810, i830 still require that the hardware lock is really taken so the deadlock remains + for those two. I'm not sure about ffb. Anyone familiar with that code? + +commit 9efdae317ce01cea95f75855b175243ae858fde4 +Author: Thomas Hellstrom +Date: Tue Feb 13 20:05:32 2007 +0100 + + More bugfixes. + Fixed memory, pinned buffers and unmappable memory now seems + fully functional. + +commit 80095ffe01efe79983c2124ecc99ce979d7ac6a9 +Author: Wang Zhenyu +Date: Tue Feb 13 16:20:45 2007 +0800 + + i915: Add 965GM pci id update + +commit 2a2d72623306de01e620485169721c790167d2b1 +Merge: 3234b29... 5bd13c5... +Author: Wang Zhenyu +Date: Tue Feb 13 16:18:15 2007 +0800 + + Merge branch 'master' into crestline + +commit 3234b290585235e3ce7db99dfeb1714ccc1f6697 +Author: Wang Zhenyu +Date: Tue Feb 13 16:17:38 2007 +0800 + + Revert "Add Intel 965GM chipset support" + + This would be updated with external pci id file change. + +commit 5bd13c5e15a14d34356f2363c55b1d4c7ca3269a +Author: Adam Jackson +Date: Mon Feb 12 15:45:51 2007 -0500 + + Fix some outdated URLs, remove others. + +commit abc14ddfb5ad85bf2a5094597d829e6614e6c359 +Author: Thomas Hellstrom +Date: Mon Feb 12 21:40:42 2007 +0100 + + Update flags and comments. + +commit 398913dc0e632c71e3095a7d50dae911aed18884 +Author: Thomas Hellstrom +Date: Mon Feb 12 20:34:50 2007 +0100 + + Lindent. + +commit b0c5339ed69c6ff08b7817f870e895aae2ef04c7 +Author: Thomas Hellstrom +Date: Mon Feb 12 20:32:03 2007 +0100 + + More bugfixes. + +commit f02f83ee08a2bb87700544a9b67f475532e84af4 +Author: Thomas Hellstrom +Date: Mon Feb 12 17:47:57 2007 +0100 + + Cleanup and fix support for pinned buffers. + +commit 130c39be3cf9a5fd742aa6b00d0383e96bbbd7b7 +Author: Aapo Tahkola +Date: Sun Feb 11 10:24:14 2007 +0200 + + Sync r300_reg.h from mesa driver. #10210 + +commit 6a60b47d12b94d8c0a0feb00f165048be51153dd +Author: Maarten Maathuis +Date: Sun Mar 11 12:13:58 2007 +1100 + + replace instance of SA_SHIRQ with IRQF_SHARED + + backwards compat added by airlied + +commit caf0c481a6b998fc5e4a78d6b95f9f390c0ecc28 +Author: Michel Dänzer +Date: Sat Mar 10 17:13:54 2007 +0100 + + Bump version patchlevel so it can be tested for new functionality. + +commit 4f795a05f1f987491d85d5b9bdbf280451c7ed20 +Merge: 1b3a6d4... d734992... +Author: Michel Dänzer +Date: Sat Mar 10 00:11:10 2007 +0100 + + Merge branch 'i915-pageflip' + +commit d734992e6a8a5757dc360ab6a5e7c80ebc03b1cd +Author: Michel Dänzer +Date: Fri Mar 9 23:34:11 2007 +0100 + + i915: Only wait for pending flips before asynchronous flips again. + +commit 0741064df4b913189d26a184a7c5dcc7827152be +Author: Michel Dänzer +Date: Fri Mar 9 16:39:13 2007 +0100 + + i915: Do not wait for pending flips on both pipes at the same time. + + The MI_WAIT_FOR_EVENT instruction does not support waiting for several events + at once, so this should fix the lockups with page flipping when both pipes are + enabled. + +commit 1b3a6d47751018c75e4333ee3ab8ba21dbd55bdd +Author: Ben Skeggs +Date: Wed Mar 7 21:17:45 2007 +1100 + + nouveau: remove a hack that's not needed since the last interface change. + +commit 5bd0e52dbacb9f492433cbfa1e66c73faf67dcd5 +Author: Ben Skeggs +Date: Wed Mar 7 21:00:55 2007 +1100 + + nouveau: ack PFIFO interrupts at PFIFO, not PMC. + +commit a33859184aa852777a50ea83f9dfa013f63f806f +Author: Michel Dänzer +Date: Wed Feb 28 17:48:56 2007 +0100 + + i915: Eliminate dev_priv->current_page. + + Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients + to modify it as well while they hold the HW lock, e.g. in order to sync pages + between pipes. + +commit 074e10b384c893a256fcf964676562792fdf93c8 +Author: Michel Dänzer +Date: Wed Feb 28 15:57:08 2007 +0100 + + i915: Only clean up page flipping when the last client goes away, not any one. + +commit 1cdc1b6fbabffc0dd4d3c1f8405d9372a45480a2 +Author: Michel Dänzer +Date: Wed Feb 28 15:23:19 2007 +0100 + + i915: Don't emit waits for pending flips before emitting synchronous flips. + + The assumption is that synchronous flips are not isolated usually, and waiting + for all of them could result in stalling the pipeline for long periods of time. + + Also use i915_emit_mi_flush() instead of an old-fashioned way to achieve the + same effect. + +commit fd0fed3f1e10d7ff1205a485621767b650c6f5ff +Author: Michel Dänzer +Date: Wed Feb 28 12:33:56 2007 +0100 + + i915: Fix test for synchronous flip affecting both pipes. + +commit 1a0d890a42bee78177ad45d5e5956d2c3c4fcdc7 +Author: Michel Dänzer +Date: Thu Feb 22 17:21:18 2007 +0100 + + i915: Add support for scheduled buffer swaps to be done as flips. + + Unfortunately, emitting asynchronous flips during vertical blank results in + tearing. So we have to wait for the previous vertical blank and emit a + synchronous flip. + +commit 5a40c043ccf965b1c3c74c80828090d2bc4438d4 +Author: Michel Dänzer +Date: Thu Feb 22 17:19:30 2007 +0100 + + Add DRM_VBLANK_FLIP. + + Used to request that a scheduled buffer swap be done as a flip instead of a + blit. + +commit 6f89584e136211d7c4c69d88005f0e70393274f8 +Author: Michel Dänzer +Date: Mon Feb 19 12:27:54 2007 +0100 + + i915: Improved page flipping support, including triple buffering. + + Pages are tracked independently on each pipe. + + Bump the minor version for 3D clients to know page flipping is usable, and + bump driver date. + +commit 34aa3393d04da1201815143c92a5bef83bf0d585 +Author: Michel Dänzer +Date: Fri Feb 2 17:28:43 2007 +0100 + + i915: Page flipping enhancements. + + Leave it to the client to wait for the flip to complete when necessary, + but wait for a previous flip to complete before emitting another one. This + should help avoid unnecessary stalling of the ring due to pending flips. + + Call i915_do_cleanup_pageflip() unconditionally in preclose. + +commit 078e4307266bcfdc7d4be1a70df65d35dda4d0d3 +Author: Michel Dänzer +Date: Fri Feb 2 17:23:42 2007 +0100 + + i915: Unify breadcrumb emission. + +commit 85ee2a8d044cd4d8de4894a794151af9471648e3 +Author: Thomas Hellstrom +Date: Sat Feb 10 12:06:36 2007 +0100 + + Various bugfixes. + +commit 53aee3122a1821b8ca24ed2bc5c1940cb0f2ff8e +Author: Thomas Hellstrom +Date: Fri Feb 9 16:36:53 2007 +0100 + + I915 accelerated blit copy functional. + Fixed - to System memory copies are implemented by + flipping in a cache-coherent TTM, + blitting to it, and then flipping it out. + +commit 57df3980724d3da446c4576b3fadcd89c5da414e +Author: Thomas Hellstrom +Date: Fri Feb 9 12:43:18 2007 +0100 + + Reinstate some LRU handling. + +commit d32b21e016c371b8676f42da5fc3aeded039a6c8 +Author: Thomas Hellstrom +Date: Fri Feb 9 00:11:53 2007 +0100 + + Remove some code that should have gone in + commit 6a49d9a8abd9f168211017c2d585d0d64e89c530 + +commit 99acdaee482fc8a2fc6718317e2f546401e93739 +Author: Thomas Hellstrom +Date: Fri Feb 9 00:07:29 2007 +0100 + + Fix copyright statements. + +commit 6a49d9a8abd9f168211017c2d585d0d64e89c530 +Author: Thomas Hellstrom +Date: Fri Feb 9 00:02:02 2007 +0100 + + Fix evict_mutex locking range. + Implement unmappable buffers. (fault moves them to mappable when needed). + Various bugfixes. + +commit b2bcbf874b0f26ca0c490fb0453bef64ce6d9dd7 +Author: Thomas Hellstrom +Date: Thu Feb 8 21:28:33 2007 +0100 + + Add an accelerated buffer copy cleanup helper. + Export helper functions and make some important buffer-object functions non-static. + Add an i915 accelerated blit buffer move for pci memory buffers. + +commit a0ed808d05a7965366e329a6e8f4e538350b9c23 +Author: Thomas Hellstrom +Date: Thu Feb 8 19:06:39 2007 +0100 + + Don't create a ttm just to copy from. + +commit bf8f46d4c64eb5b66814223f7e5ddb8d8e7a555e +Author: Thomas Hellstrom +Date: Thu Feb 8 18:59:02 2007 +0100 + + Fix mm_block leak. + Some other minor fixes. + +commit e4b2da440699f581a8779ea8cb9e99e4c903e6a7 +Author: Thomas Hellstrom +Date: Thu Feb 8 16:21:38 2007 +0100 + + A minor function interface change and some memcpy bugfixing. + + Hooray!! it sort of works with a fixed AGP area as faked VRAM. + +commit 1257907fa9a24de7aa95485e1b3ab509fdc4d4e6 +Author: Thomas Hellstrom +Date: Thu Feb 8 13:29:08 2007 +0100 + + Simplify external ttm page allocation. + Implement a memcpy fallback for copying between buffers. + +commit 09984ad77bdeca0e9d87b1fe2be1489205fda297 +Author: Thomas Hellstrom +Date: Thu Feb 8 11:55:24 2007 +0100 + + Update memory compatibility tests. + Now only pinned buffers are broken. + +commit 898aca1a66d5e685a01944f92d572641b7980c85 +Author: Eric Anholt +Date: Tue Jan 23 08:34:25 2007 +0800 + + Warning fix: correct type of i915_mmio argument. + +commit ef9a9d3cd1fb6f7def03ddea69af3db8502d8eb9 +Author: Eric Anholt +Date: Tue Jan 23 08:19:43 2007 +0800 + + Define __iomem for systems without it. + +commit 8918748058bc1aff64298855cde09512e2128367 +Author: Eric Anholt +Date: Tue Jan 23 08:05:36 2007 +0800 + + Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list. + +commit c1fbd8a56653b91af57a408bbcf20a760a2bd8c8 +Author: Thomas Hellstrom +Date: Wed Feb 7 17:25:13 2007 +0100 + + Checkpoint commit. + Flag handling and memory type selection cleanup. + glxgears won't start. + +commit af24465b2eddfcc5296edc830ea5ed86065a4abd +Author: Thomas Hellstrom +Date: Wed Feb 7 12:52:23 2007 +0100 + + Fix a stray unlock_kernel() in drm_vm.c + Add a file for memory move helpers, drm_bo_move.c + Implement generic memory move. + Cached, no_move and unmapped memory temporarily broken. + +commit 71b9e876f99db219fcbf4e3ab977b64b068cc2b4 +Author: Thomas Hellstrom +Date: Tue Feb 6 16:59:45 2007 +0100 + + Simplify pci map vs no pci map choice. + +commit 40ce53dfde11f84d7bf8db5db93fb73715b2e96e +Author: Thomas Hellstrom +Date: Tue Feb 6 15:56:43 2007 +0100 + + Implement a drm_mem_reg_t substructure in the buffer object type. + +commit 609e3b037526021d20c7cc18b7fed1152206dc68 +Author: Thomas Hellstrom +Date: Tue Feb 6 14:20:33 2007 +0100 + + Implement a policy for selecting memory types. + +commit 17985f07d68322519919a7f629a6d2d9bf3916ed +Author: Stephane Marchesin +Date: Tue Feb 6 01:17:32 2007 +0100 + + nouveau: more work on the nv04 context switch code. + +commit 2d962332dea5ed328ae45c6ef7298ea15216b635 +Author: Thomas Hellstrom +Date: Mon Feb 5 16:13:32 2007 +0100 + + i915: Add copy-blit operation. + +commit 8c663b4e56b45d377a5a0fed4318a129fc1233fa +Author: Stephane Marchesin +Date: Sat Feb 3 06:13:27 2007 +0100 + + nouveau: and of course, I was missing the last nv04 piece. + +commit ebf22aed9aa56e8ba00b5d3d1d2ca4600e5f1ec5 +Author: Stephane Marchesin +Date: Sat Feb 3 06:02:12 2007 +0100 + + nouveau: add missing nv04_graph.c symlink. + +commit 0c13657c33f282233b9f4bb397acb99c4cd65919 +Author: Stephane Marchesin +Date: Sat Feb 3 06:00:29 2007 +0100 + + nouveau: plugin the nv04 graph init function. + +commit 7ab9e7f36f5fb58652f915a0839a167c6206743a +Author: Stephane Marchesin +Date: Sat Feb 3 05:56:42 2007 +0100 + + nouveau: cleanup the nv04 pgraph save/restore mechanism. + +commit d69902db3b1f82dd35f5bbb3327bdf836961850c +Author: Stephane Marchesin +Date: Sat Feb 3 05:25:36 2007 +0100 + + nouveau: fix nv04 graph routines for new register names. + +commit 5a072f32c8f941d1ef301811881e8c89c8d8a5f1 +Author: Stephane Marchesin +Date: Sat Feb 3 04:57:06 2007 +0100 + + nouveau: rename registers to their proper names. + +commit e64dbef911cd739ba5c4d26493dfef6766ff83fd +Author: Stephane Marchesin +Date: Mon Jan 29 04:03:59 2007 +0100 + + nouveau: add NV04 registers required for PGRAPH context switching. + +commit 55f7859a256814e3843790d88b275150f6161a26 +Author: Matthieu Castet +Date: Fri Feb 2 23:01:03 2007 +0100 + + nouveau: nv ctx switch opps the size of array was wrong + +commit 63cf3b3da7ee039c98c793d31ea1aa586a069c43 +Author: Matthieu Castet +Date: Fri Feb 2 20:08:33 2007 +0100 + + nouveau: nv10 ctx switch, some regs are nv17+ only + +commit 63f2abd721c40f1cddae555c79b4ab4c55aae006 +Author: Thomas Hellstrom +Date: Fri Feb 2 19:49:11 2007 +0100 + + Make also later kernels work with buffer object vm + and clean up some function names. + +commit c269d560e4d71448cfc9c2ea51eee3d5feafaad4 +Author: Thomas Hellstrom +Date: Fri Feb 2 14:47:44 2007 +0100 + + Make vm handle buffer objects instead of ttm objects. + Remove ttm objects. + Make vm aware of PCI memory type buffer objects. + (Only works for pre 2.6.16 kernels for now). + +commit 8c17edf23c04371e513b29ad14eca0d2bf32b812 +Author: Michel Dänzer +Date: Thu Jan 18 10:34:59 2007 +0100 + + Make git ignore generated config.h.in. + +commit 6c04185857694b2293046b7ea1d4515404a740c3 +Author: Thomas Hellstrom +Date: Fri Feb 2 09:15:44 2007 +0100 + + via: Try to improve command-buffer chaining. + + Bump driver date and patchlevel. + +commit 70bba11bc7bbf0cfb028521c1b6676ed0962c317 +Author: Thomas Hellstrom +Date: Fri Feb 2 09:20:16 2007 +0100 + + Disable AGP DMA for chips with the new 3D engine. + +commit 77a6d8ae938e14051da3039414b64ff060746de6 +Author: Wang Zhenyu +Date: Fri Feb 2 09:52:37 2007 +0800 + + Add Intel 965GM chipset support + +commit 9907b32c6790f6e9dad42cdce60e3b1b457233e5 +Author: Wang Zhenyu +Date: Fri Feb 2 09:51:38 2007 +0800 + + Revert origin crestline pci id patch + +commit dd733dea3856e7ddbba7c4c3928ccaba909b4535 +Author: Thomas Hellstrom +Date: Thu Feb 1 13:19:05 2007 +0100 + + Fix missing ttm_open_vma call from previous commit. + Honour the ttm backend cant-use-aperture flag. + +commit 9677c5ecc6b97ef75b3141b671fb5cfbbf8a3fa8 +Author: Thomas Hellstrom +Date: Thu Feb 1 10:53:07 2007 +0100 + + Prepare for removal of the ttm_object type. + +commit 333c6af47a906461678b5a8b2af415936d30babc +Author: Thomas Hellstrom +Date: Thu Feb 1 00:38:57 2007 +0100 + + Protect drm_mmap against disappearing maps. + + The map lists and hash tables are protected using dev->struct_mutex, + but drm_mmap strangely never locked this mutex. + +commit 3024f23c6551e219b0236041a8205bf1bc60ed94 +Author: Thomas Hellstrom +Date: Wed Jan 31 14:50:57 2007 +0100 + + memory manager: Make device driver aware of different memory types. + + Memory types are either fixed (on-card or pre-bound AGP) or not fixed + (dynamically bound) to an aperture. They also carry information about: + + 1) Whether they can be mapped cached. + 2) Whether they are at all mappable. + 3) Whether they need an ioremap to be accessible from kernel space. + + In this way VRAM memory and, for example, pre-bound AGP appear + identical to the memory manager. + + This also makes support for unmappable VRAM simple to implement. + +commit 07fabc3fd8f00006e6117081f5183a826a6d2bbb +Author: Thomas Hellstrom +Date: Wed Jan 31 11:41:44 2007 +0100 + + Make the utility runnable also for normal users. + +commit 36d50687dd88e0e42cf2adfd8ff81a160765e12a +Author: Thomas Hellstrom +Date: Wed Jan 31 11:03:53 2007 +0100 + + Fix an error-path oops. + +commit d399fcf46f3b9eab0eb37aefc8e593f8a711d1ef +Author: Thomas Hellstrom +Date: Tue Jan 30 16:20:23 2007 +0100 + + Add a buffer object transfer function. + Creates a placeholder for the old buffer contents + when it is transfered to / from static memory like VRAM. + +commit 0932269656825397b4b9e1bfdfc75254f544c96f +Author: Thomas Hellstrom +Date: Tue Jan 30 14:42:27 2007 +0100 + + Indent according to xorg rules. + +commit 2bc925430b522eda596499561eba6fb61278ae8c +Author: Thomas Hellstrom +Date: Tue Jan 30 14:41:02 2007 +0100 + + Add license header. + +commit 9968a21be11a3d64dac9daab768a11d729cdd77c +Author: Thomas Hellstrom +Date: Tue Jan 30 14:38:49 2007 +0100 + + Add some relevant tests for the new buffer object interface. + +commit c01fe2cdd4a86f37c1a9bce344b41b6432dbe427 +Author: Thomas Hellstrom +Date: Tue Jan 30 12:56:51 2007 +0100 + + Add the ttmtest test utility. + +commit 9bbdc0fb10101586fb2bbddeb700e3241a993b1f +Author: Thomas Hellstrom +Date: Tue Jan 30 12:33:46 2007 +0100 + + Clean up buffer object destruction somewhat. + +commit 9a654e71bda3530f6d18d115729af27cc15033de +Author: Thomas Hellstrom +Date: Mon Jan 29 13:36:17 2007 +0100 + + Use pre-defined list_splice function. + +commit 45418bb1b1a0fac38f0dda7e29022bfb4cae3d03 +Author: Thomas Hellstrom +Date: Mon Jan 29 13:19:20 2007 +0100 + + s/buf/bo/ for consistency. + +commit 1e4c7d69f5b55f5299e5b0c220e4af1dfb21f69d +Author: Thomas Hellstrom +Date: Mon Jan 29 13:11:55 2007 +0100 + + Some cleanup. A buffer object should only have one active memory type. + +commit ee4ac5c897faa499ad24c148b4f065bc770b529d +Author: Ben Skeggs +Date: Sun Jan 28 23:48:33 2007 +1100 + + nouveau: determine chipset type at startup, instead of every time we use it. + +commit c744bfde2de1713f0c15a185538a003d64c52d80 +Author: Matthieu Castet +Date: Fri Jan 26 21:57:44 2007 +0100 + + make works ctx switch on nv10. + +commit 9c03ca81e75c1c0749b719bb62ae56b99c9ff2ae +Author: Patrice Mandin +Date: Fri Jan 26 21:05:59 2007 +0100 + + nouveau: oops, wrong indexing in nv17 regs + +commit 5534c90ff39bf2bd41daca024d5b19889e78b1a0 +Author: Patrice Mandin +Date: Fri Jan 26 19:54:35 2007 +0100 + + nouveau: read gpu type once + +commit 05d3ed472e6ab5cfa7741e523bdb3992591ecc7e +Author: Patrice Mandin +Date: Fri Jan 26 19:25:49 2007 +0100 + + nouveau: only save/restore nv17 regs on nv17,18 hw + +commit e7ba15a00369d85d3abeb42d95fe76dc40a544a8 +Author: Patrice Mandin +Date: Fri Jan 26 19:24:34 2007 +0100 + + nouveau: add extra pgraph registers + +commit d4c9f135b56eee826f0d5eaf41f2088a861da590 +Author: Patrice Mandin +Date: Fri Jan 26 18:10:31 2007 +0100 + + nouveau: add some nv10 pgraph defines + +commit 6d9ef1a960a76410e816425d8a53fb96cf2b871d +Author: Patrice Mandin +Date: Thu Jan 25 23:06:48 2007 +0100 + + nouveau: simplify and fix BIG_ENDIAN flags + +commit 3886b7e62925a6eb7ca05e3ab23f3d4781439d06 +Merge: 9f5cda4... 90ae39d... +Author: Nian Wu +Date: Thu Jan 25 13:30:46 2007 -0800 + + Merge branch 'master' into crestline + +commit 582637641abbadc75795ac7e0671e1a5e3b41880 +Author: Thomas Hellstrom +Date: Thu Jan 25 14:26:58 2007 +0100 + + Remove a scary error printed when we were leaking memory caches. + + We don't use memory caches anymore... + + Fix memory accounting initialization to only use low or DMA32 memory. + +commit 90ae39d2f07058dd128d2fb19ffad712ee75c9a0 +Author: Ben Skeggs +Date: Thu Jan 25 11:11:01 2007 +1100 + + nouveau: nv4c default context + +commit aa7266385e0af26b9225f7dba0643867ac4e231a +Author: Ben Skeggs +Date: Thu Jan 25 08:16:23 2007 +1100 + + nouveau: always print nsource/nstatus regs on PGRAPH errors + +commit 7d4e6b1445d4c734f1dd6070ffa041c42e649e91 +Author: Zou Nan hai +Date: Wed Jan 24 16:33:21 2007 +0800 + + vblank interrupt fix + +commit 19ba0749384994662e0d6167c70cc6fbd78eb0ff +Author: Ben Skeggs +Date: Fri Jan 19 15:41:51 2007 +1100 + + nouveau: fix getparam from 32-bit client on 64-bit kernel + +commit 4291df69bd03f71cbbe91b7b1ad82b580e1d362a +Author: Ben Skeggs +Date: Sun Jan 14 10:42:58 2007 +1100 + + nouveau: re-add 6150 Go pciid (0x0244) + +commit a40de938fa5cf98f01d569e39fe3931d545c357a +Author: Jeremy Kolb +Date: Thu Jan 18 21:39:36 2007 -0500 + + nouveau: cleanup nv30_graph.c + +commit ab72a7714e4e9b87cc93887d1978f1c533255566 +Author: Jeremy Kolb +Date: Thu Jan 18 21:39:09 2007 -0500 + + nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching. + +commit bd0418cb01232d7529ecb0f515aa9b6d6804a3ac +Author: Dave Jones +Date: Thu Jan 18 01:28:49 2007 -0500 + + add missing quadro id + +commit 78a4f5c1bc37cbc581191f47b8b19250bfb86c1e +Author: Jeremy Kolb +Date: Wed Jan 17 08:46:59 2007 -0500 + + nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet. + + Hook into nv20 pgraph switching functions (they're identical for nv3x). + Actually call nv30_pgraph_context_init so the ctx_table is allocated. + + Thanks to Carlos Martin for the help. + +commit 9f5cda44dbf5b8f3c7cc00b8a58eee2690a864e6 +Merge: 6ac742d... fdbc34f... +Author: Xiang, Haihao +Date: Tue Jan 16 09:49:20 2007 +0800 + + Merge branch 'master' into crestline + +commit fdbc34fab03eba8d257e14c6d557ffed5fa32c2d +Author: Matthieu Castet +Date: Sun Jan 14 20:04:20 2007 +0100 + + nouveau: opps nv20 ctx ramin size was wrong + +commit 06cd15559525cd023fe347fcb8e918c6418b938e +Author: Matthieu Castet +Date: Sat Jan 13 23:30:43 2007 +0100 + + nouveau: opps restored the wrong channel + +commit f04347f371c6c9c3a47550c6b7d26b7bd5629c85 +Author: Matthieu Castet +Date: Sat Jan 13 23:19:41 2007 +0100 + + nouveau: nv20 graph ctx switch. + + Untested... + +commit cd5f543b2f3d6dd4c45f676c6fb9848b4d8a1c33 +Author: Matthieu Castet +Date: Sat Jan 13 21:43:47 2007 +0100 + + nouveau: first step to make graph ctx works + + It is still not working, but now we could use some 3D commands + without needed to run nvidia blob before. + +commit 4ae64a1b583be3ef13338e8029e7e9efe21f2c2f +Author: Matthieu Castet +Date: Sat Jan 13 21:41:33 2007 +0100 + + nouveau: add and indent pgraph regs + +commit 1967aa82cfc18c422360ef544b66e316d98f53a1 +Author: Stephane Marchesin +Date: Sat Jan 13 12:32:45 2007 +0100 + + nouveau: Oops, fix the nv04 RAMFC_DMA_FETCH value. + +commit 69a98d89d5204ec224703bddc3582bb854716a20 +Author: Dave Airlie +Date: Sat Jan 13 08:43:15 2007 +1100 + + nouveau: add missing symlink + +commit 1bad7e0d02ff82227c34b853e06ca25a80193347 +Author: Matthieu Castet +Date: Fri Jan 12 20:30:14 2007 +0100 + + nouveau : remove useless init : we clear RAMIN before + +commit 9d3deddc4a8f12b9493858a529570e77f8362ad1 +Author: Haihao Xiang +Date: Fri Jan 12 11:24:14 2007 -0800 + + Delay for a usec while spinning waiting for ring buffer space. + + This means the loop will wait up to ~10ms for ring buffer space to become + available, rather than just however long it takes to check the space 10000 + times. This matches other drivers' behavior when waiting for ring buffer/fifo + space. + +commit 4297a83b48664b2b6a6dc0a72a4d11b043f34778 +Author: Jeremy Kolb +Date: Fri Jan 12 00:13:05 2007 -0500 + + nouveau: get nv30 context switching to work. + + * Pulled in some registers from nv10reg.h. Needed for context switching. + * Filled in nv30 graphics context (based on nv40_graph.c). + * Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work. + +commit 8ff026723cf170034173052a58c650c8c1f28c0b +Author: Michel Dänzer +Date: Thu Jan 11 09:02:07 2007 +0100 + + radeon: Fix u32 overflows when determining AGP base address in card space. + + The overflows could lead to the AGP aperture overlapping the framebuffer area + in the card's address space when the latter is located at the very end of the + 32 bit address space, which would result in a freeze on X server startup, + probably because the card read commands from the framebuffer instead of from + AGP. + + See http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=392915 . + +commit 125f3ff36796c8d28c29e960247fdd42d4cd877c +Author: Dave Airlie +Date: Wed Jan 10 15:19:47 2007 +1100 + + Revert "nouveau: Fill in context_init for nv10-nv3x." + + This reverts ac076cb9aff976e8fae567cfa82a898bfc2712e8 commit. + + Well it didn't do anything interesting... + +commit ac076cb9aff976e8fae567cfa82a898bfc2712e8 +Author: Jeremy Kolb jkolb@brandeis.edu +Date: Tue Jan 9 23:12:37 2007 -0500 + + nouveau: Fill in context_init for nv10-nv3x. + + Fill in the context with the values from PFIFO_CACH1. This should work from nv10 through the nv30 series. + +commit ec12209c763d0ea258b3e1e567bf097f9e918265 +Author: Stephane Marchesin +Date: Wed Jan 10 04:42:09 2007 +0100 + + nouveau: Don't use DRIVER_USE_MTRR, we already setup our own mtrr over vram. + +commit f6ba3b2603c58b9f5624fd4a97511b2913ec7866 +Author: Dave Airlie +Date: Tue Jan 9 15:51:29 2007 +1100 + + ttm: make ttm alloc/free into alloc_pages/free_pages + + Add a vmalloc flag to the page flags + +commit a70aedd5fc78a162aeb681d47a75edcc831ed3f3 +Author: Dave Airlie +Date: Tue Jan 9 13:38:36 2007 +1100 + + novueau: try resource 3 if resource 2 is 0 length + + This happens on my NV43 PPC + +commit deba42ef32da0c2d0977cdeb639420e1ac1b7f2b +Author: Stephane Marchesin +Date: Mon Jan 8 20:55:57 2007 +0100 + + nouveau: fix nv4a context size. + +commit 22821cf01d6509b7c074e42ae0ef9567e48e97d2 +Author: Dave Airlie +Date: Mon Jan 8 22:26:35 2007 +1100 + + add export symbol for memory manager + +commit 6ac742d95dfd717ae730035da34624682c652b7b +Author: Keith Packard +Date: Sun Jan 7 23:05:39 2007 -0800 + + Align whitespace with master + +commit c5aaf7648df82665851c9e67f5509b427ca34c8e +Merge: 63c0f39... d0080d7... +Author: Keith Packard +Date: Sun Jan 7 22:37:40 2007 -0800 + + Merge branch 'master' into crestline + + Conflicts: + + shared-core/i915_drm.h + + Whitespace change only + +commit d0080d71b9f3df0d4f743324b7e8f1ce580bdcaf +Author: Stephane Marchesin +Date: Mon Jan 8 05:02:40 2007 +0100 + + nouveau: nv4a context support. + +commit 6eaa1272b4159a547d6da21f14cbcc5b5d0f600c +Merge: 1f0f7d7... 5bf60c9... +Author: Stephane Marchesin +Date: Mon Jan 8 03:50:34 2007 +0100 + + Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drm + +commit 5bf60c9d6c2e04a65085a0a332de24b06043fcb8 +Author: Dave Airlie +Date: Mon Jan 8 13:09:12 2007 +1100 + + i830: complete fix for i830 maps + +commit 26bf6d9b5b5be19973f6da4f5ed292c7f83de099 +Author: Ben Skeggs +Date: Mon Jan 8 12:50:44 2007 +1100 + + nouveau: oops + +commit 128d87a3dd26b1c633dac3fe0f0d5e9190f11d53 +Author: Ben Skeggs +Date: Mon Jan 8 12:47:22 2007 +1100 + + nouveau: nv43 context stuff + +commit b147c3926352e4dcb9dbf53b8b12baae8ce34254 +Author: Christoph Hellwig +Date: Mon Jan 8 10:55:49 2007 +1100 + + drm: remove drm_follow_page, and drm_ioremap and ioremapfree + + This comes from the Re: [patch] paravirt: isolate module ops on lkml + It needs some testing, please report any regressions caused. + + Signed-off-by: Dave Airlie + +commit fe5770b89e57c669a946dea86a58b17387bf9cf4 +Author: Dave Airlie +Date: Mon Jan 8 22:27:11 2007 +1100 + + fixup i810/i830 to use drm_core_ioremap instead of drm_ioremap + +commit 1f0f7d7a180af088d6c79d55da04402f0eff0416 +Author: Stephane Marchesin +Date: Mon Jan 8 00:11:39 2007 +0100 + + nouveau: fix a stupid bug from me. + +commit faa46122993bc5970b3d67933bd81d863a3c4762 +Author: Ben Skeggs +Date: Mon Jan 8 00:37:39 2007 +1100 + + nouveau: avoid allocating vram that's used as instance memory. + +commit cd3711455e7e5e69448b4805bddc2adcd480c6d5 +Author: Ben Skeggs +Date: Sun Jan 7 23:56:45 2007 +1100 + + nouveau: map pci resource 2 on >=nv40 + +commit 31daf669624c35bdf686aaeea7d7844d0cb5141a +Author: Keith Packard +Date: Sat Jan 6 17:40:50 2007 -0800 + + Revert i915 drm driver name to i915; miniglx doesn't work otherwise + + Yes, this driver supports the new memory manager, that is indicated by the + version number being >= 1.7. + +commit 2851c9f5c6c6847151d011d68ec00897ac9d9634 +Author: Wang Zhenyu +Date: Mon Dec 4 15:48:04 2006 +0800 + + Bump i915 minor for ARB_OC ioctl + +commit f7180349fde6947e229ecde17215c2984e6e883b +Author: Zou Nan hai +Date: Mon Dec 4 15:48:04 2006 +0800 + + i915: ARB_Occlusion_query(MMIO ioctl) support. + + This adds a new ioctl for passing counter information from the chip back to + applications, these counters include the data needed to perform OC. + +commit 1f1714cf3dd24ea4109722ea2b47bcf4725f27ea +Author: Ben Skeggs +Date: Sat Jan 6 18:05:21 2007 +1100 + + nouveau: get c51 doing glxgears without the binary driver's help. + +commit dbb0d979cc6c4e1f444cdbbf6dc3571c3818ea39 +Author: Ben Skeggs +Date: Sat Jan 6 17:50:00 2007 +1100 + + nouveau: Use PMC_BOOT_0 to determine which ctx_voodoo to load. + +commit 528ab8ce4038397c043b05a46f95c666a985f7a3 +Author: Stephane Marchesin +Date: Fri Jan 5 20:59:45 2007 +0100 + + nouveau: oops, we don't need OS_HAS_MTRR actually. + +commit d99c7c27e2df1a7093f3d2f5c7d196f58bfe1647 +Merge: 025f281... 0f95ddc... +Author: Stephane Marchesin +Date: Fri Jan 5 20:50:46 2007 +0100 + + Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drm + +commit 025f281bbfe81960e8c60234f5eafd37cbe2d881 +Author: Stephane Marchesin +Date: Fri Jan 5 20:49:34 2007 +0100 + + nouveau: Add an mtrr over the whole FB + +commit 0f95ddc42892abdbc1f111b6b105f2ef4ed2b05f +Merge: 9d167f1... f80659b... +Author: Matthieu Castet +Date: Fri Jan 5 19:41:12 2007 +0100 + + Merge branch 'master' of git+ssh://matc@git.freedesktop.org/git/mesa/drm/ + +commit 9d167f1f4bc89b784248d22bc95dfc15a72d0244 +Author: Matthieu Castet +Date: Fri Jan 5 19:40:11 2007 +0100 + + Add basic pgraph context for nv10. + It only fake a context switch : pgraph state are not save/restored. + +commit f80659bc2967dbed4aed0d44a550bb4a9e4569b5 +Author: Stephane Marchesin +Date: Fri Jan 5 19:37:06 2007 +0100 + + Cleanup the nv04 fifo code a bit. + +commit 4fe2858f53c6ea542cd81961ebdad118acfc8f32 +Author: Michel Dänzer +Date: Tue Jan 2 10:05:48 2007 +0100 + + i915: Fix a DRM_ERROR that should be DRM_DEBUG. + + It would clutter up the kernel output in a situation which is legitimate before + X.org 7.2 and handled correctly by the 3D driver. + +commit 176b62991ad59e9a03a8416db8945d5e37ab0406 +Author: Michel Dänzer +Date: Tue Jan 2 10:03:56 2007 +0100 + + Make git ignore Emacs style backup files and cscope files. + +commit 972074b5d618575d9291de50ffe12f2f4ca01a20 +Author: Michel Dänzer +Date: Tue Jan 2 10:02:44 2007 +0100 + + linux-core: Make git ignore generated module symbol version files. + +commit 91855bb2540bbb824d4d5d437f3eb2d5d06c11ba +Author: Ben Skeggs +Date: Tue Jan 2 16:35:00 2007 +1100 + + nouveau: oops, forgot to free RAMIN.. + +commit 861017e6d50f5724c179717f995322c498ee15db +Author: Ben Skeggs +Date: Tue Jan 2 15:56:10 2007 +1100 + + nouveau: Hookup nv40_graph_init. + + Now I can get 3D + working grctx switching on my NV40 without + the binary driver initialising the card first. However, this + change also breaks 3D on my C51 even *with* the binary driver's + help. So, it's likely that the weird voodoo is card-specific. + +commit 41da9fd2e59b2af295c8f345586030e5a70d7a83 +Author: Ben Skeggs +Date: Tue Jan 2 15:08:04 2007 +1100 + + nouveau: Hook up grctx code for NV4x. + + This is enough to get grctx switching going on my NV40 and C51 after + the binary driver has initialised the card first. + + Bumping the drm patchlevel because the ddx needs some modifications to + have NV4x work at all with these changes. + +commit 0e0d954584ba95656663efa3daf6e191e521040b +Author: Ben Skeggs +Date: Tue Jan 2 14:52:43 2007 +1100 + + nouveau: Add nv40-specific PGRAPH code, not hooked up yet. + +commit 2c3bc69ba2b60e4f89b93332fa8da758170b2285 +Author: Ben Skeggs +Date: Tue Jan 2 14:41:34 2007 +1100 + + nouveau: Only clobber PFIFO if no channels are already alloc'd + + With this change the GPU is responsible for doing the channel switch + itself. This is needed for the upcoming NV4x PGRAPH context work as + we don't yet know enough to manually swap PGRAPH contexts. + +commit 2dcbf6a59918761cffb27e027b1235c551ed03dd +Author: Dave Airlie +Date: Mon Jan 1 11:30:38 2007 +1100 + + make build against 2.6.20 hopefully + +commit 87faf62fae711c8337793abaf0f529f2660245db +Author: Dave Airlie +Date: Mon Jan 1 11:22:35 2007 +1100 + + fixup permission along line of kernel + +commit a16a8a47cdb04e29f5d8ed05403f21714f7aaf9d +Author: Thomas Hellstrom +Date: Thu Dec 28 22:17:08 2006 +0100 + + Add some new via chipsets. + Disable 3D functionality and AGP DMA for chipsets with the DX9 3D engine. + +commit 7859bd61d3d5b5dd69ce978adeae91eaa1e533aa +Author: Thomas Hellstrom +Date: Wed Dec 27 19:46:46 2006 +0100 + + Leftover from previous commit. + +commit 2980ec22a165bc71add7464e28a2e56b5c971d20 +Author: Thomas Hellstrom +Date: Wed Dec 27 19:38:33 2006 +0100 + + Allow for non-power-of-two texture pitch alignment. + +commit 975136d6e5adc6b6a03719499cf39fbd3f67dc90 +Author: Thomas Hellstrom +Date: Wed Dec 27 15:32:09 2006 +0100 + + Proper allocation of AGP pages for ttms. + +commit c38ede06670b47620bbce33c5a4affd063769475 +Author: Ben Skeggs +Date: Wed Dec 27 01:58:57 2006 +1100 + + nouveau: return the *actual* type of memory alloc'd to userspace + +commit 9e019df75764a7ce79266ceb058307336ddf00ef +Author: Ben Skeggs +Date: Tue Dec 26 23:30:26 2006 +1100 + + nouveau: Alloc cmdbuf for each channel individually + +commit 72cb361c5cbf4f0aeae25312369087b8a234bc5a +Author: Thomas Hellstrom +Date: Thu Dec 21 12:05:49 2006 +0100 + + Bug #9120. + Require at least agpgart version 0.102 for the AGP TTM backend. + This should hopefully avoid crashes when the wrong agpgart + driver is installed. + +commit ae5822561370b34808603820a063fc6e8b17dbe2 +Author: Thomas Hellstrom +Date: Thu Dec 21 10:40:25 2006 +0100 + + Improve memory manager accounting printout formatting. + +commit a467d248293f9384092ab39a9214fbf725d21927 +Author: Thomas Hellstrom +Date: Thu Dec 21 10:32:13 2006 +0100 + + Fix buggy aligned allocations. + +commit b7586ab539e5f8d16b473543ab829d0a4441f87c +Author: Ben Skeggs +Date: Thu Dec 21 17:43:48 2006 +1100 + + nouveau: save/restore endianness flag on FIFO switch + + This makes my G5 survive glxinfo and nouveau_demo - airlied + +commit 9acd4a13f2355e8f550669702a5c6db16cc14b0f +Author: Thomas Hellstrom +Date: Wed Dec 20 19:33:50 2006 +0100 + + Remove the stupid root_node field from the core memory manager. + +commit 672593f611df484af89e425ff5f1ea0ea074f2bb +Author: Thomas Hellstrom +Date: Wed Dec 20 14:40:36 2006 +0100 + + Replace vmalloc_32. + + The vmalloc_32 function together with the memset to clear + the new pages are replaced with a vmalloc_user. + + A pre-2.6.18 compat vmalloc_user is added. + + Please replace any breakage on machines with > 1GB of memory. + +commit 3b47b27558915a3a28591209e324b977e09d7c03 +Author: Thomas Hellstrom +Date: Wed Dec 20 13:04:21 2006 +0100 + + Some via PCI posting flushes. + +commit e5c4a26a29a9af301cb8b0aebbba84e70f995b83 +Merge: 3b7508d... dc1b68a... +Author: Dave Airlie +Date: Wed Dec 20 10:30:16 2006 +1100 + + Merge branch 'nouveau-1' + +commit dc1b68aacbfc8d53d78f7388e0e52da1747a1f71 +Author: Dave Airlie +Date: Wed Dec 20 10:29:43 2006 +1100 + + fixup symlinks via Makefile + +commit 744f9ac9c74f1571b54e08f9eaaaff22dd3230c8 +Author: Dave Airlie +Date: Wed Dec 20 10:28:55 2006 +1100 + + add nouveau symlinks via git + +commit 3b7508d1bf2c78f19d882beffa6d8b4f58bd19a8 +Author: Dave Airlie +Date: Wed Dec 20 10:22:43 2006 +1100 + + remove unused via/sis files from lk build + +commit 3b8e6ccd2573a027aa30c10d08253de1756540c2 +Author: Thomas Hellstrom +Date: Tue Dec 19 23:45:59 2006 +0100 + + Security fix. Zero pages before they are handed to user space. + + TTM pages were not cleared when allocated and handed to user space. + Sensitive information may leak. + +commit 72b5d1507a7e9c18fc0141c13819ea01c0813924 +Author: Thomas Hellstrom +Date: Tue Dec 19 23:23:17 2006 +0100 + + Security fix. Zero pages before they are handed to user space. + + Shared memory areas were not cleared when they are allocated and + handed to user space. Sensitive information may leak. + +commit 81251bf78f06dc26e26c3edb09639850371fe540 +Author: Thomas Hellstrom +Date: Tue Dec 19 23:14:11 2006 +0100 + + Reclaim buffers locked fixup. + + Avoid calling reclaim_buffers_locked if we don't have a + hardware lock. + + Improve reclaim_buffers_locked deadlock error formatting. + +commit 737c73d1a081823f5c95a6fd68173b56a304eae5 +Author: Dave Airlie +Date: Tue Dec 19 22:10:34 2006 +1100 + + add kcalloc compat for before 2.6.10 + +commit bc4c83573111361e9817d6a7414bd84f73ca7cce +Author: Dave Airlie +Date: Tue Dec 19 21:51:30 2006 +1100 + + remove do munmap 4 args + +commit 7458909beae274198ca2a29b510a808ce2feca0a +Author: Dave Airlie +Date: Tue Dec 19 21:48:18 2006 +1100 + + fixup i915 return values from kernel + +commit 98799f862e58e02ef07f0d0db0863e7c91c7e5b0 +Author: Dave Airlie +Date: Tue Dec 19 21:48:06 2006 +1100 + + fixup i915 defines in create script + +commit 6333bfdb58b300494b2ec6f7b5a3ea5b392a210a +Author: Dave Airlie +Date: Tue Dec 19 21:37:50 2006 +1100 + + fixup inclusion of agp.h + +commit aa07b2ab0e1c8a24fb1694ca3b13eb9ea4618fbe +Author: Dave Airlie +Date: Tue Dec 19 21:33:47 2006 +1100 + + remove drm pci from 2.5 days + +commit ff4b5ccdb4ef985c29e3f0d36e1c5094d02733e2 +Author: Dave Airlie +Date: Tue Dec 19 21:30:27 2006 +1100 + + remove legacy taskqueue code + +commit 86ff2aeb9bfea357d5748b3587ab224e813b37b6 +Author: Dave Airlie +Date: Tue Dec 19 20:29:03 2006 +1100 + + drm: remove all 2.4 support for drm development tree. + + Bye bye 2.4 you served us well.. + +commit 656c3a3737180d507bec352d56fbd9ef8b8a4feb +Author: Dave Airlie +Date: Tue Dec 19 18:27:20 2006 +1100 + + [SPARC]: Respect vm_page_prot in io_remap_page_range(). + + Make sure the callers do a pgprot_noncached() on + vma->vm_page_prot. + + Pointed out by Hugh Dickens. + + Signed-off-by: David S. Miller + +commit 0ab48b0841de138f4a428a6d32d3e4d3e552db53 +Author: Dave Airlie +Date: Tue Dec 19 18:24:44 2006 +1100 + + [PATCH] mm: incorrect VM_FAULT_OOM returns from drivers + + Some drivers are returning OOM when it is not in response to a memory + shortage. + + Signed-off-by: Nick Piggin + +commit 303307d25484f3f7179e6967697d28369a73dca9 +Author: Dave Airlie +Date: Tue Dec 19 18:03:20 2006 +1100 + + fix irq args compatiblity with pre 2.6.19 + +commit 1a3316f667963fca2f9a3bffcbee39cb01bf5f09 +Author: Dave Airlie +Date: Tue Dec 19 17:57:16 2006 +1100 + + use unifdef to clean up some code + +commit 07635f26a9310d2a4f0f65c5e773e6cfa92346bc +Author: Dave Airlie +Date: Tue Dec 19 17:57:01 2006 +1100 + + fix comment in r128 + +commit c52dea9a7d9ea978307441842b02c09c97720467 +Author: Dave Airlie +Date: Tue Dec 19 17:46:10 2006 +1100 + + fix some sizes in sis_drv.h + +commit 2253e334cc6f8cf7dff6dbe398dd9ecbbcb4c5fe +Author: Dave Airlie +Date: Tue Dec 19 17:42:45 2006 +1100 + + make sizeof match the copy struct + +commit 8cc82c50332d62d1c58bbc4f184b1ab4ecfa9efc +Author: Dave Airlie +Date: Tue Dec 19 17:22:04 2006 +1100 + + remove inline from large function + +commit 13659357adeae90dbeb1b3284f08667f6edd4cad +Author: Dave Airlie +Date: Tue Dec 19 17:03:42 2006 +1100 + + make a savage function static from kernel + +commit 6c8712ba8a3c3c2c2fd9dd1ff5ab71e30ecdf50a +Author: Dave Airlie +Date: Tue Dec 19 16:58:48 2006 +1100 + + use spin_lock_init in via dmablit + +commit cb280ad3c0b048fe5b024439af70e9fcc8d04269 +Author: Dave Airlie +Date: Tue Dec 19 16:58:27 2006 +1100 + + fix missing DRM_ERR from kernel + +commit 696f2bfbd1b6da73893bce082308a43878e6ab75 +Author: Dave Airlie +Date: Tue Dec 19 16:44:57 2006 +1100 + + Revert "drm: ioremap balanced with iounmap for drivers/char/drm" + + This reverts cc22cd8bde39f3e4be8ca9f726a773b0270ebdbc commit. + + I put this patch incorrectly in .. will fix now + +commit cc22cd8bde39f3e4be8ca9f726a773b0270ebdbc +Author: Dave Airlie +Date: Tue Dec 19 16:39:13 2006 +1100 + + drm: ioremap balanced with iounmap for drivers/char/drm + + ioremap must be balanced by an iounmap and failing to do so can result + in a memory leak. + + Tested (compilation only) to make sure the files are compiling without + any warning/error due to new changes + + Signed-off-by: Amol Lad + Signed-off-by: Dave Airlie + +commit b3c88d31e1e83458c6125a02b80f2e57ebcf750d +Author: Michael Buesch +Date: Fri Dec 15 14:24:24 2006 +0100 + + drm/linux-core: drmP.h compilation fix + + I need the following patch to fix compilation of + latest drm/linux-core on my ppc64 machine. + + /home/mb/develop/git/drm/linux-core/savage_bci.c: In function ‘savage_driver_firstopen’: + /home/mb/develop/git/drm/linux-core/savage_bci.c:587: error: ‘DRM_MTRR_WC’ undeclared (first use in this function) + /home/mb/develop/git/drm/linux-core/savage_bci.c:587: error: (Each undeclared identifier is reported only once + /home/mb/develop/git/drm/linux-core/savage_bci.c:587: error: for each function it appears in.) + /home/mb/develop/git/drm/linux-core/savage_bci.c: In function ‘savage_driver_lastclose’: + /home/mb/develop/git/drm/linux-core/savage_bci.c:664: error: ‘DRM_MTRR_WC’ undeclared (first use in this function) + + I looked at in-kernel drmP.h and it actually + has the same fix in it. + + Signed-off-by: Michael Buesch + +commit 38ed67196f4ba891568c5ff66e67ced341696eb9 +Author: Thomas Hellstrom +Date: Fri Dec 15 12:37:24 2006 +0100 + + Remove the memory caches for fence objects and memory manager nodes, + since the support for memory caches has gone from 2.6.20. + +commit aefc7a34431a8f1540b261e23d8b8d05d824b60a +Author: Michel Dänzer +Date: Thu Dec 14 19:31:56 2006 +0100 + + Unify radeon offset checking. + + Replace r300_check_offset() with generic radeon_check_offset(), which doesn't + reject valid offsets when the framebuffer area is at the very end of the card's + 32 bit address space. Make radeon_check_and_fixup_offset() use + radeon_check_offset() as well. + + This fixes https://bugs.freedesktop.org/show_bug.cgi?id=7697 . + +commit 1a40f3318c2660b83f64f7ed189d0f1692644ee4 +Author: Ben Skeggs +Date: Tue Dec 12 00:11:42 2006 +1100 + + Port remaining NV4 RAMIN access from the ddx into the drm. + + Should fix lockups seen on NV4 cards. + +commit 30acb90a6077798b1e0c4927273067500905d6d1 +Author: Stephane Marchesin +Date: Sun Dec 3 10:02:54 2006 +0100 + + Merge the pciid work. + Add getparams for AGP and FB physical adresses. + Fix the MEM_ALLOC issue properly. + Fix context switches for nv44. + Change the DRM version to 0.0.1. + +commit 74a92bbf6ea9b9766a2b827f22605559791569b8 +Author: Michel Dänzer +Date: Fri Dec 1 11:00:32 2006 +0100 + + Core build fix for BSD. + +commit a97bb85c2a6852e37ed560e6cbe1242e5f68ad8d +Author: Michel Dänzer +Date: Fri Dec 1 10:46:21 2006 +0100 + + Unshare drm_drawable.c again for now. + + The current version didn't build on BSD, where the new functionality isn't used + yet anyway. Whoever changes that will hopefully be able to make the OSes share + this file as well. + +commit 4a0e61d91013f88ca9555a280e2363bed14aec02 +Author: Michel Dänzer +Date: Sat Oct 21 16:14:20 2006 +0200 + + Track linux-core symlinks in git. + +commit 80d75cf6950acf1a00a031ceb6511b26dcc9b056 +Author: Ben Skeggs +Date: Thu Nov 30 10:31:42 2006 +1100 + + Use nouveau_mem.c to allocate RAMIN. + +commit b1a9a769711d83af8ab4c7ba4eec52a05a351533 +Author: Ben Skeggs +Date: Thu Nov 30 08:35:42 2006 +1100 + + Wrap access to objects in RAMIN. + + This will make it easier to support extra RAMIN in vram at a later point. + +commit f48a7685bd7a241001cec89acd8cce6cdefa941e +Author: Matthieu Castet +Date: Tue Nov 28 21:32:03 2006 +0100 + + For nv10, bit 16 of RAMFC need to be set for 64 bytes fifo context. + When cleaning a fifo, we shouldn't assume everybody use nv40 ;) + Fill DMA_SUBROUTINE fill correct value. + +commit ddcb994c3eac97e153922e2a4c71384404f68597 +Author: Michel Dänzer +Date: Thu Oct 26 13:15:30 2006 +0200 + + i915_vblank_tasklet: Try harder to avoid tearing. + + Previously, if there were several buffer swaps scheduled for the same vertical + blank, all but the first blit emitted stood a chance of exhibiting tearing. In + order to avoid this, split the blits along slices of each output top to bottom. + +commit 63c0f3946056d044b7c5688fa5cb670782212c77 +Author: root +Date: Mon Nov 27 15:55:32 2006 +0800 + + ARB_Occlusion_query(MMIO ioctl) support + + Zou Nan hai + +commit 0a364be289c27c81a1d157c94291bdf60b43299e +Merge: 5e7f584... adf71cb... +Author: Stephane Marchesin +Date: Tue Nov 21 23:32:58 2006 +0100 + + Merge branch 'nouveau-1' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drm into nouveau-1 + +commit adf71cb29b72b7d199f737b7b00eb7e80939ea4b +Author: Ben Skeggs +Date: Tue Nov 21 11:41:46 2006 +1100 + + Don't spam dmesg if PMC_INTSTAT is 0 + +commit 9ac7a8b0b4c0431b605c3f8d0b4a696903010c51 +Author: Ben Skeggs +Date: Sat Nov 18 10:09:29 2006 +1100 + + Only return FIFO number if the FIFO is marked as in use.. + +commit e9194dd1b068666dd94e73d95dc3cd031a89a6b7 +Author: Ben Skeggs +Date: Sat Nov 18 10:03:45 2006 +1100 + + Check some return vals, fixes a couple of oopses. + +commit 18bba3fa29187bb5122ed057989203dc05bc46aa +Author: Ben Skeggs +Date: Fri Nov 17 08:05:23 2006 +1100 + + Dump some useful info when a PGRAPH error occurs. + + The "channel" detect doesn't work on my nv40, but the rest + seems to produce sane info. + +commit 5e7f58474dbc766632a71c3eb556e24ead6c6afc +Merge: 5a0cdf7... 2fd812f... +Author: Stephane Marchesin +Date: Thu Nov 16 14:47:52 2006 +0100 + + Merge branch 'nouveau-1' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drm into nouveau-1 + +commit 2fd812f8ef8adb09fd8d17cab869f9fc8b047d75 +Author: Ben Skeggs +Date: Tue Nov 14 09:00:31 2006 +1100 + + Completely untested NV10/20/30 FIFO context switching changes. + +commit 7002082944a69e1d11b0146b1176fd4293581dcd +Author: Ben Skeggs +Date: Tue Nov 14 08:11:49 2006 +1100 + + Restructure initialisation a bit. + + - Do important card init in firstopen + - Give each channel it's own cmdbuf dma object + - Move RAMHT config state to the same place as RAMRO/RAMFC + - Make sure instance mem for objects is *after* RAM{FC,HT,RO} + +commit 35bf8fb5cf8ab4d4e055cdef26531d86dbf822dc +Merge: 9ef4bbc... 1123ab0... +Author: Ben Skeggs +Date: Tue Nov 14 04:52:08 2006 +1100 + + Merge branch 'nouveau-1' of git+ssh://git.freedesktop.org/git/mesa/drm into nouveau-1 + +commit 9ef4bbc66c1b055b4450ea9354945d784751cef7 +Author: Ben Skeggs +Date: Tue Nov 14 04:51:13 2006 +1100 + + Hack around yet another "X restart borkage without nouveau.ko reload" problem. + + On X init, PFIFO and PGRAPH are reset to defaults. This causes the GPU to + loose the configuration done by the drm. Perhaps a CARD_INIT ioctl a proper + solution to having this problem again in the future.. + +commit 5a0cdf7db34fc679160a58b257afc9e9b216907e +Merge: 1123ab0... d51e1bb... +Author: Stephane Marchesin +Date: Sat Nov 11 01:57:05 2006 +0100 + + Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drm into nouveau-1 + +commit 14e3f2711e90fe9a9c315d96abd4c7681539936a +Merge: e2ea721... d51e1bb... +Author: Nian Wu +Date: Thu Nov 9 21:21:17 2006 -0800 + + Merge branch 'master' into crestline + + Conflicts: + + shared-core/i915_dma.c + +commit 1123ab089075af3141c794696ec394fa46b4353f +Author: Stephane Marchesin +Date: Fri Nov 10 02:18:38 2006 +0100 + + Fix memory detection on TNT2 M64/TNT2 vanta. + +commit d51e1bb56ca2f7858cdeac6f61a7b747c1e15b1e +Author: Dave Airlie +Date: Thu Nov 9 08:55:58 2006 +1100 + + libdrm: add drmOpenOnce + drmCloseOnce to libdrm + +commit 79038751ffe47ed1ce82766e027d98fd2f0e2c6a +Author: Dave Airlie +Date: Wed Nov 8 15:08:09 2006 +1100 + + libdrm: add support for server side functionality in libdrm + + This adds APIs to allow the X server to use libdrm from the system + rather than its own in-built copy. + +commit 584acab6d6103552711bd6b5596ee4ccad305bc2 +Author: Eric Anholt +Date: Tue Nov 7 09:36:40 2006 -0800 + + Add drm_u64_t typedef on non-linux to fix libdrm build. + +commit f7affda35bb0c47fbc973725e05847669e215d46 +Author: Dave Airlie +Date: Mon Nov 6 11:44:36 2006 +1100 + + drm: fixup page alignment on SAREA map on ppc64 + +commit 2dd3c039fdbe86db4043abcc69babf768edb3ab8 +Author: Dave Airlie +Date: Mon Nov 6 11:42:15 2006 +1100 + + fixup fifo size so it is page aligned + +commit 5e55594061b24521551c45838fbe6c3df57050d1 +Author: Dave Airlie +Date: Mon Nov 6 11:41:51 2006 +1100 + + use a uint64_t for this not a pointer + +commit 1e90b7ee8cefff59b70e285557aa7920dea77e81 +Merge: 0c34d0f... 7b6cd95... +Author: Dave Airlie +Date: Mon Nov 6 08:03:18 2006 +1100 + + Merge branch 'master' into nouveau-1 + + Conflicts: + + linux-core/Makefile.kernel + +commit 0c34d0f31a691bb649ed69f19e93fc1a723aa1d4 +Author: Ben Skeggs +Date: Mon Nov 6 05:46:03 2006 +1100 + + Leave the bottom 64kb of RAMIN untouched. + + The binary driver will screw up either it's init or shutdown, leaving the + screen(s) in an unusable state without this. Something important in there? + +commit 94ab96c4d8203c236c6a5a8d8a6a761ccf808662 +Author: Dave Airlie +Date: Sun Nov 5 20:38:44 2006 +1100 + + nouveau: add compat ioc32 support + +commit 665c8385c7865dcc4f92b9c212d6e2b35d7fa9f0 +Author: Dave Airlie +Date: Sun Nov 5 19:46:53 2006 +1100 + + add powerpc mmio swapper to NV_READ/WRITE macros + +commit 1e118aeb39076a103c6581640b04a9b7e2a8209a +Author: Dave Airlie +Date: Sun Nov 5 19:46:30 2006 +1100 + + remove config.h + +commit 06639801ce1d515f790739a70b051498c8615288 +Author: Stephane Marchesin +Date: Sat Nov 4 20:39:59 2006 +0100 + + Add some getparams. + +commit 3ea0500be1ab7a058c90be35b5d8d2be26692f6a +Author: Stephane Marchesin +Date: Sat Nov 4 16:56:10 2006 +0100 + + Move the context object creation flag handling to the drm. + +commit 7b6cd95bb6c41653aed78952da0a461bd4791413 +Author: Alan Hourihane +Date: Tue Oct 31 10:01:53 2006 +0000 + + Fix bug #8839 - a comment + +commit 4b04c0cc45f7a89c757ce442e4f2742b9d3aa293 +Author: Thomas Hellstrom +Date: Mon Oct 30 11:18:44 2006 +0100 + + Bugzilla Bug #8819 + Build fixes for powerpc. + Reported by Katerina Barone-Adesi + +commit 56563c22d658b6dcb7926fd41513618cd46c31a6 +Author: Thomas Hellstrom +Date: Sun Oct 29 15:39:11 2006 +0100 + + Minor bugfix, indentation and removal of unnused variables. + +commit decacb2e6415029fe87a3680c8f967483ba05281 +Author: Thomas Hellstrom +Date: Fri Oct 27 13:08:31 2006 +0200 + + Reserve the new IOCTLs also for *bsd. + Bump libdrm version number to 2.2.0 + +commit f6d5fecdd20b9fd9e8744d8f43fa276b73a1da78 +Author: Thomas Hellstrom +Date: Fri Oct 27 11:28:37 2006 +0200 + + Last minute changes to support multi-page size buffer offset alignments. + This will come in very handy for tiled buffers on intel hardware. + Also add some padding to interface structures to allow future binary backwards + compatible changes. + +commit e09544a2d3f44e96d01ed2bdcb4a4eb8eec26225 +Author: Thomas Hellstrom +Date: Thu Oct 26 21:20:34 2006 +0200 + + New mm function names. Update header. + +commit 47dbfc4e4a3e8ce2ec468bc3874f74f7e2b13476 +Author: Thomas Hellstrom +Date: Thu Oct 26 21:17:43 2006 +0200 + + Add improved alignment functionality to the core memory manager. + This makes an allocated block actually align itself and returns any + wasted space to the manager. + + Also add some functions to grow and shrink the managed area. + This will be used in the future to manage the buffer object swap cache. + +commit b4fba1679b6156e3ca6f053b44cae0b003febe7f +Author: Thomas Hellstrom +Date: Thu Oct 26 21:14:23 2006 +0200 + + Add a one-page hole in the file offset space between buffers. + +commit 7ea059ae076c50f2012dee2ccbb8d41745705383 +Merge: 9ed4656... a8909a0... +Author: Thomas Hellstrom +Date: Sat Oct 21 14:20:28 2006 +0200 + + Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm + +commit 9ed4656799043f24f4d64615ebb8128bedc99799 +Author: Thomas Hellstrom +Date: Sat Oct 21 14:17:51 2006 +0200 + + The CPU cache must be flushed _before_ we start modifying the kernel map ptes, + otherwise data will be missing, which becomes apparent when the kernel evicts + batch buffers which are likely to be written into in the evicted state, + and then rebound to the AGP aperture. + This means we cannot rely on the AGP module to flush the + cache for us. + +commit a8909a0ebcc21ad6b92b93ffe87878ece4b56506 +Author: Tilman Sauerbeck +Date: Fri Oct 20 17:05:07 2006 +0200 + + Bug #1746: Set dev_priv_size for the MGA driver. + +commit 9321592149c031694c459bb05e7a31d1197fe5cb +Author: Thomas Hellstrom +Date: Fri Oct 20 15:07:21 2006 +0200 + + We apparently need this global cache flush anyway. + +commit 3624e43282b0c6aad32829f116fd8f7bce66fbb6 +Author: Thomas Hellstrom +Date: Fri Oct 20 15:06:31 2006 +0200 + + Bug #8707, 2.6.19-rc compatibility for memory manager code. + +commit d70347bfc07bb5e34e36684b95560df37d669db4 +Merge: 5de4665... 561e23a... +Author: Thomas Hellstrom +Date: Thu Oct 19 17:07:26 2006 +0200 + + Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm + +commit 5de4665747c441b2a8e82b020cc386f2d974499d +Merge: e22b04f... e8ba62d... +Author: Thomas Hellstrom +Date: Thu Oct 19 17:00:03 2006 +0200 + + Importing fixes from drm-ttm-0-2-branch + +commit e8ba62db722eb0b915377269d7e1c3a039928669 +Author: Thomas Hellstrom +Date: Thu Oct 19 16:58:00 2006 +0200 + + Make sure delayed delete list is empty on lastclose. + Fix some refcounting errors. + Fix some error messages. + +commit e22b04f807b9869c8c89b6316214517f5da13322 +Merge: 11aaa35... e172945... +Author: Thomas Hellstrom +Date: Wed Oct 18 17:33:19 2006 +0200 + + Merging drm-ttm-0-2-branch + + Conflicts: + + linux-core/drmP.h + linux-core/drm_drv.c + linux-core/drm_irq.c + linux-core/drm_stub.c + shared-core/drm.h + shared-core/i915_drv.h + shared-core/i915_irq.c + +commit 11aaa358a0f56afb64df44c737ec331d90118537 +Author: Thomas Hellstrom +Date: Wed Oct 18 17:18:23 2006 +0200 + + Remove stray softlink. + +commit e172945d668f1de1243ac2ae91ab77f3b2bda40a +Author: Thomas Hellstrom +Date: Wed Oct 18 16:54:17 2006 +0200 + + Avoid driver-specific AGP user-populated types, since we don't know what AGP + driver we're on. + Avoid global cache flushes before inserting pages. + In general, they are never mapped, and not accessed through the kernel map, so + a cache flush should not be necessary. The exception is pages that are bound + cached. We might need a cache flush for those. + +commit 25fe4a80490bba709099f0401535d2f96ac7729c +Author: Thomas Hellstrom +Date: Tue Oct 17 20:04:41 2006 +0200 + + Remove some debugging messages. + +commit c34faf224b959bf61e4c3eb29c66a12edbd31841 +Author: Thomas Hellstrom +Date: Tue Oct 17 20:03:26 2006 +0200 + + Remove max number of locked pages check and call, since + that is now handled by the memory accounting. + +commit 89b944179856fadf8667587eff142129c2c6b826 +Author: Thomas Hellstrom +Date: Tue Oct 17 19:57:06 2006 +0200 + + Lindent. + +commit f22f89e6b3c970a29197d3a53c170fb7d0340cbe +Author: Thomas Hellstrom +Date: Tue Oct 17 19:52:34 2006 +0200 + + Add vma list memory usage to memory accounting. + Use byte unit for /proc printout of memory usage for small sizes to be + able to detect memory allocation bugs more easily. + +commit d515936ea7f98f6aaa9217699796beadef9d664b +Author: Thomas Hellstrom +Date: Tue Oct 17 19:40:57 2006 +0200 + + Add memory usage accounting to avoid DOS problems. + +commit b5cf0d635c81d2c99510ce5e3f67f4aa593cd6d7 +Author: Ben Skeggs +Date: Wed Oct 18 02:37:19 2006 +1100 + + Remove hack which delays activation of a additional channel. The previously active channel's state is saved to RAMFC before PFIFO gets clobbered. + +commit 725984364bd899c2dee1ca9b44f56fc70ccba3ad +Author: Ben Skeggs +Date: Wed Oct 18 01:07:48 2006 +1100 + + Oops, we have more than 4 subchannels.. + +commit 5443dbe35f182b9286a96d24d29037d5cb625e3d +Author: Thomas Hellstrom +Date: Tue Oct 17 16:00:25 2006 +0200 + + Implement mm_lock and mm_unlock functions. + The mm_lock function is used when leaving vt. It evicts _all_ buffers. + Buffers with the DRM_BO_NO_MOVE attribute set will be guaranteed to + get the same offset when / if they are rebound. + +commit 55de3f763f0de66b99f1afde9872f0072a84a9e3 +Author: Ben Skeggs +Date: Tue Oct 17 23:44:05 2006 +1100 + + Useful output on a FIFO error interrupt. + +commit 07059f427819755e13b051e1422c6e8671c70f92 +Author: Ben Skeggs +Date: Tue Oct 17 23:08:03 2006 +1100 + + typo + +commit db5c671e86c3db8c99ce5a4954632248e6f849aa +Author: Thomas Hellstrom +Date: Tue Oct 17 11:28:48 2006 +0200 + + Remove the memory manager parameter from the put_block function, as this + makes the client code a lot cleaner. Prepare buffer manager for lock and + unlock calls. + +commit 5881ce1b91034fbdf81dda37a23215cfc1310cdf +Author: Thomas Hellstrom +Date: Tue Oct 17 11:05:37 2006 +0200 + + Extend generality for more memory types. + Fix up init and destruction code. + +commit 561e23a7c2f06b382613d3e2ae8d23104d0949aa +Author: Michael Karcher +Date: Mon Oct 16 22:06:58 2006 -0400 + + dev->agp_buffer_map is not initialized for AGP DMA on savages + bug 8662 + +commit 4b43ee63f90c93701c9f1cdf7fefd1816b316d33 +Author: Ben Skeggs +Date: Tue Oct 17 12:33:49 2006 +1100 + + NV40: *Now* fifo ctx switching works for me.. + Ok, I lied before.. it was a fluke it worked and required magic to repeat it.. + It actually helps to fill in RAMFC entries in the correct place. + + The code also clears RAMIN entirely instead of just the hash-table. + +commit 98e718d48fcd166accf1af3c017c34e331ab09cb +Author: Ben Skeggs +Date: Tue Oct 17 07:29:31 2006 +1100 + + NV40: FIFO context switching now WorksForMe(tm) + +commit 1943f39d8ce27c799f928bab172e521f4d540166 +Author: Ben Skeggs +Date: Tue Oct 17 06:37:40 2006 +1100 + + Setup NV40 RAMFC (in wrong location.. but anyway), rearrange the RAMFC setup code a bit. + +commit 95486bbde05ae51975c4d51fd194111788edee9a +Author: Ben Skeggs +Date: Tue Oct 17 06:12:18 2006 +1100 + + Some info on NV40's RAMFC + +commit 5b2a60f550090a41c13483ceaaa1a84d3a9257f8 +Author: Thomas Hellstrom +Date: Mon Oct 16 14:22:27 2006 +0200 + + Change Intel AGP memory type numbers. + +commit 93fee5cf222ad6d97e0dcb85e13a8d8b84dba81f +Merge: 2c5b91a... a9f57a2... +Author: Stephane Marchesin +Date: Sun Oct 15 00:12:13 2006 +0200 + + Merge branch 'master' of git://anongit.freedesktop.org/git/mesa/drm into nouveau-1 + +commit 2c5b91aecf3d21684ffca758c034cd9a8ed2155d +Author: Stephane Marchesin +Date: Sat Oct 14 16:36:11 2006 +0200 + + Again more work on context switches. They work, sometimes. And when they do they seem to screw up the PGRAPH state. + +commit 1bab514c0a1a535c19d53e3d39e3b351db3ab7a4 +Author: Dave Airlie +Date: Sat Oct 14 23:38:20 2006 +1000 + + remove config.h from build no longer exists kbuild does it + +commit 3a0cd7c7e221f625585675490f626de8677a9dc7 +Author: Stephane Marchesin +Date: Sat Oct 14 01:21:31 2006 +0200 + + Add the missing breaks. + +commit b509abe413f74bd08f6415dec8147bd07e78a84b +Author: Stephane Marchesin +Date: Fri Oct 13 22:35:22 2006 +0200 + + Fix the fifo context size on nv10, nv20 and nv30. + +commit 4988074794531939ec0cb0ad183633b59e9ccff4 +Author: Ben Skeggs +Date: Sat Oct 14 06:57:49 2006 +1100 + + Fix some randomness in activating a second channel on NV40 (odd GET/PUT vals). Ch 1 GET now advances, but no ctx_switch. + +commit a9c6c3f21d90257db94536f202b3a1f03896b2f7 +Author: Stephane Marchesin +Date: Thu Oct 12 21:18:55 2006 +0200 + + Oops. + +commit 7ef44b2b8dd1745f5b228e6161ebd989844c3088 +Author: Stephane Marchesin +Date: Thu Oct 12 17:31:49 2006 +0200 + + Still more work on the context switching code. + +commit 540c64c378daafaad1c3f63faf5af81f39388665 +Author: Thomas Hellstrom +Date: Thu Oct 12 16:10:47 2006 +0200 + + Bugfixes. + +commit 10150df02b7062b9975661ccd82b475cd23c8839 +Author: Thomas Hellstrom +Date: Thu Oct 12 12:09:16 2006 +0200 + + Simplify the AGP backend interface somewhat. + + Fix buffer bound caching policy changing, Allow + on-the-fly changing of caching policy on bound buffers if the hardware + supports it. + + Allow drivers to use driver-specific AGP memory types for TTM AGP pages. + Will make AGP drivers much easier to migrate. + +commit a749d9d5b49ea0e402848bd6024e5c44826e784f +Author: Stephane Marchesin +Date: Thu Oct 12 01:08:15 2006 +0200 + + More work on the context switch code. Still doesn't work. I'm mostly convinced it's an initialization issue. + +commit 30703893674b3da5b862dee2acd6efca13424398 +Author: Thomas Hellstrom +Date: Wed Oct 11 22:21:01 2006 +0200 + + Compatibility code for 2.6.15-2.6.18. It is ugly but a little comfort is that + it will go away in the mainstream kernel. + Some bugfixes, mainly in error paths. + +commit f2db76e2f206d2017f710eaddc4b33add4498898 +Author: Thomas Hellstrom +Date: Wed Oct 11 13:40:35 2006 +0200 + + Big update: + Adapt for new functions in the 2.6.19 kernel. + Remove the ability to have multiple regions in one TTM. + This simplifies a lot of code. + Remove the ability to access TTMs from user space. + We don't need it anymore without ttm regions. + Don't change caching policy for evicted buffers. Instead change it only + when the buffer is accessed by the CPU (on the first page fault). + This tremendously speeds up eviction rates. + Current code is safe for kernels <= 2.6.14. + Should also be OK with 2.6.19 and above. + +commit dd473411f889cc16af255437d2a61c616bcee695 +Author: Stephane Marchesin +Date: Wed Oct 11 00:28:15 2006 +0200 + + Context switching work. + Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet). + Removed the PFIFO_REINIT ioctl. I hope it's that a good idea... + Requires the upcoming commit to the DDX. + +commit c58574c60505a699e19e1ed59e1b441be2594e53 +Author: Thomas Hellstrom +Date: Tue Oct 10 10:37:26 2006 +0200 + + Use a nopage-based approach to fault in pfns. + +commit a9f57a2b9c5897cbf568bf75342204b780566de0 +Author: Roland Scheidegger +Date: Tue Oct 10 02:24:19 2006 +0200 + + only allow specific type-3 packets to pass the verifier instead of all for r100/r200 as others might be unsafe (r300 already does this), and add checking for these we need but aren't safe. Check the RADEON_CP_INDX_BUFFER packet on both r200 and r300 as it isn't safe neither. + +commit cee659afb56e7ac443402ac791144f391721061e +Author: Thomas Hellstrom +Date: Tue Oct 3 12:08:07 2006 +0200 + + Get rid of all ugly PTE hacks. + +commit c9e3aa961eb90265ec024ff57013786e4d47d0e7 +Author: George Sapountzis +Date: Mon Oct 2 06:13:38 2006 +0300 + + Bug 6242: [mach64] Use private DMA buffers, part #4. + + mach64_state.c: convert the DRM_MACH64_BLIT ioctl to submit a pointer to + user-space memory rather than a DMA buffer index, similar to DRM_MACH64_VERTEX. + + This change allows the DDX to map the DMA buffers read-only and eliminate a + security problem where a client can alter the contents of the DMA buffer after + submission to the DRM. + + This change also affects the DRI/DRM interface. Performace-wise, it basically + affects PCI mode where I get a ~12% speedup for some Mesa demos I tested. + This is mainly due to eliminating an ioctl for allocating the DMA buffer. + + mach64_dma.c: move the responsibility for allocating memory for the DMA ring + in PCI mode to the DDX. + + This change affects the DDX/DRM interface and unifies a couple of PCI/AGP code + paths for ring memory in the DRM. + + Bump the mach64 DRM version major and date. + +commit f3deef730d52c94ce21ada7e4ceb63aa28a8601b +Author: George Sapountzis +Date: Mon Oct 2 05:46:42 2006 +0300 + + Bug 6242: [mach64] Use private DMA buffers, part #3. + + Add DRM_PCI_BUFFER_RO flag for mapping PCI DMA buffer read-only. An additional + flag is needed, since PCI DMA buffers do not have an associated map. + +commit 25760c30d4aedb370423d0bb03c014cab47b5d4f +Author: George Sapountzis +Date: Mon Aug 28 05:44:37 2006 +0300 + + Bug 6242: [mach64] Use private DMA buffers, part #2. + + Factor out from mach64_dma_dispatch_vertex() the code to reclaim an unsed + buffer, in preperation for using it in mach64_dma_dispatch_blit() also. + +commit eea150e776657faca7d5b76aca75a33dc74fbc9d +Author: George Sapountzis +Date: Sun Jul 16 02:15:02 2006 +0300 + + Bug 6242: [mach64] Use private DMA buffers, part #1. + + Factor out from mach64_freelist_get() the code to reclaim a completed buffer, + this is to improve readability for me. + +commit d1b31a228b72b8dd8e588f0a0cc8eeabc3845f70 +Author: George Sapountzis +Date: Sun Jul 16 01:02:06 2006 +0300 + + Bug 6209: [mach64] AGP DMA buffers not mapped correctly. + + Map the DMA buffers from the same linear address as the vertex bufs. If + dev->agp_buffer_token is not set, mach64 drm maps the DMA buffers from + linear address 0x0. + +commit 16be6ba63a41f03e98a741464d3b51eefb277373 +Author: Michel Dänzer +Date: Mon Oct 2 15:33:19 2006 +0200 + + Fix type of second argument to spin_lock_irqsave(). + (cherry picked from f6238cf6244b32bd84e3d2819963d7f5473867c8 commit) + +commit f6238cf6244b32bd84e3d2819963d7f5473867c8 +Author: Michel Dänzer +Date: Mon Oct 2 15:33:19 2006 +0200 + + Fix type of second argument to spin_lock_irqsave(). + +commit eacedf41a65f135722e7bee6f1a66a803619237f +Author: Thomas Hellstrom +Date: Mon Oct 2 15:06:35 2006 +0200 + + Make the user_token 44-bit for TTMs, and have them occupy a unique file space + starting at 0x00100000000. This will hopefully allow us to use + unmap_mapping_range(). Note that user-space will need + 64-bit file offset support. + +commit a31046b8734f12ed22127ef5f6ca4fc33df72ec1 +Author: Thomas Hellstrom +Date: Mon Oct 2 14:03:15 2006 +0200 + + Add a buffer object manager for TTM maps. + +commit d85b99435f0ea7a17b3b7be31b53c00632c07177 +Author: Thomas Hellstrom +Date: Mon Oct 2 13:49:43 2006 +0200 + + Allow for 44 bit user-tokens (or drm_file offsets) + +commit 418b81c65c55601d4e414b351db5b8d76db8a109 +Author: Thomas Hellstrom +Date: Mon Oct 2 13:37:54 2006 +0200 + + Add a comment to previos commit. + +commit c6be27401fbc12ec72bac13d07e3cc93bd63732a +Author: Thomas Hellstrom +Date: Mon Oct 2 13:34:30 2006 +0200 + + Trap and be verbose about a deadlock that occurs with AIGLX and drivers that + use drm_reclaim_buffers_locked(). + +commit 58a23d193f7d25d23c76a58c192c814a415a843b +Author: Felix Kühling +Date: Mon Oct 2 10:50:40 2006 +0200 + + drm_rmdraw: Declare id and idx as signed so testing for < 0 works as intended. + (cherry picked from d58389968124191a546a14b42ef84edc224be23d commit) + +commit 3a16e615cabfed18b1891a732e7243ef41dc0ad0 +Author: Michel Dänzer +Date: Mon Oct 2 11:04:42 2006 +0200 + + Make locked tasklet handling more robust. + + Initialize the spinlock unconditionally when struct drm_device is filled in, + and return early in drm_locked_tasklet() if the driver doesn't support IRQs. + +commit d58389968124191a546a14b42ef84edc224be23d +Author: Felix Kühling +Date: Mon Oct 2 10:50:40 2006 +0200 + + drm_rmdraw: Declare id and idx as signed so testing for < 0 works as intended. + +commit 8e908eaf50d5331ee875fefbf793dbe07d99786a +Author: Thomas Hellstrom +Date: Fri Sep 29 14:21:51 2006 +0200 + + Bump driver date. + +commit 17a640419a447083470880f1266e14063cd5acd0 +Author: Michel Dänzer +Date: Fri Sep 29 10:27:29 2006 +0200 + + i915: Only schedule vblank tasklet if there are scheduled swaps pending. + + This fixes issues on X server startup with versions of xf86-video-intel that + enable the IRQ before they have a context ID. + (cherry picked from 7af93dd9849442270ec89cb4bbeef5bfd4f9e424 commit) + +commit 48367fdfe677adada52ad61d850e2980e1070632 +Author: Michel Dänzer +Date: Thu Sep 28 19:13:59 2006 +0200 + + i915: Only initialize IRQ fields in postinstall, not the PIPE_SET ioctl. + + Some other minor changes in preparation for actually disabling user interrupts. + +commit 3620a3ec85033d3d1d1a44ec32492fb2ef20fd8a +Author: Michel Dänzer +Date: Thu Sep 28 19:05:58 2006 +0200 + + i915: Bump minor again to differentiate from vsync changes. + +commit 390184df92915d232cab90469937de875ee65b91 +Author: Michel Dänzer +Date: Wed Sep 27 18:22:10 2006 +0200 + + i915: Avoid mis-counting vblank interrupts when they're only enabled for pipe A. + + It looks like 'after a while', I915REG_INT_IDENTITY_R for some reason always has + VSYNC_PIPEB_FLAG set in the interrupt handler, even though pipe B is disabled. + So we only increase dev->vbl_received if the corresponding bit is also set in + dev->vblank_pipe. + (cherry picked from 881ba569929ceafd42e3c86228b0172099083d1d commit) + +commit c0bff9f9cd08066df7f3bccd77d4d4dd4edb4163 +Author: Michel Dänzer +Date: Mon Sep 18 12:15:38 2006 +0200 + + i915: Bump minor for swap scheduling ioctl and secondary vblank support. + + (cherry picked from 2627131e5d0c8cd5e3f0db06451c2e7ae7569b1b commit) + +commit 0a7d9edcfb427724f0cad5ff6d0a4493d266b4e8 +Author: Michel Dänzer +Date: Wed Sep 13 08:59:35 2006 +0200 + + i915_vblank_swap: Add support for DRM_VBLANK_NEXTONMISS. + + (cherry picked from 0356fe260dcf80f6d2d20e3384f2a1f4ee7f5b30 commit) + +commit c47ebd970783873164578126fa5481a166cd837e +Author: Michel Dänzer +Date: Fri Sep 1 11:48:07 2006 +0200 + + Only return EBUSY after we've established we need to schedule a new swap. + + (cherry picked from 50a0284a61d4415c0ebdb02decee76ef3115007a commit) + +commit cef0f243251103be81c914d5b83ee3401c2a9c34 +Author: Michel Dänzer +Date: Fri Sep 1 11:35:31 2006 +0200 + + Core vsync: Don't clobber target sequence number when scheduling signal. + + It looks like this would have caused signals to always get sent on the next + vertical blank, regardless of the sequence number. + (cherry picked from cf6b2c5299e9be3542d4deddfd05d5811f11d2ef commit) + +commit ed82172378666d35ca60e6094fdecb59511a135f +Author: Michel Dänzer +Date: Fri Sep 1 11:27:14 2006 +0200 + + Core vsync: Add flag DRM_VBLANK_NEXTONMISS. + + When this flag is set and the target sequence is missed, wait for the next + vertical blank instead of returning immediately. + (cherry picked from 89e323e4900af84cc33219ad24eb0b435a039d23 commit) + +commit c4c47a7eacf8e8cb96b2fb63164e28f0db7353ad +Author: Michel Dänzer +Date: Fri Sep 1 11:24:38 2006 +0200 + + Fix 'sequence has passed' condition in i915_vblank_swap(). + + (cherry picked from 7f09f957d9a61ac107f8fd29128d7899a3e8a228 commit) + +commit f9aa4f5973d6098b95e92f606dc1967c627897db +Author: Michel Dänzer +Date: Thu Aug 31 18:33:04 2006 +0200 + + Add SAREA fileds for determining which pipe to sync window buffer swaps to. + + (cherry picked from c2bdb76814755c9ac6e66a8815f23af0fe4f3a91 commit) + +commit 316e73676861c0e019d52ec7bf7b7b1451eaed97 +Author: Michel Dänzer +Date: Thu Aug 31 18:32:08 2006 +0200 + + Add definition of DRM_VBLANK_SECONDARY. + + (cherry picked from 84b38b63f05e04ade8b1ddfb770047fd86de0d64 commit) + +commit 4a3d270862f6dbc52ca3e16ba66fdb24667b2aa2 +Author: Michel Dänzer +Date: Thu Aug 31 18:30:55 2006 +0200 + + Make handling of dev_priv->vblank_pipe more robust. + + Initialize it to default value if it hasn't been set by the X server yet. + + In i915_vblank_pipe_set(), only update dev_priv->vblank_pipe and call + i915_enable_interrupt() if the argument passed from userspace is valid to avoid + corrupting dev_priv->vblank_pipe on invalid arguments. + (cherry picked from 87c57cba1a70221fc570b253bf3b24682ef6b894 commit) + +commit 1f3493f65ba0959e401191c648f57501216eeb0a +Author: Michel Dänzer +Date: Wed Aug 30 19:33:28 2006 +0200 + + DRM_I915_VBLANK_SWAP ioctl: Take drm_vblank_seq_type_t instead of pipe number. + + Handle relative as well as absolute target sequence numbers. + + Return error if target sequence has already passed, so userspace can deal with + this situation as it sees fit. + + On success, return the sequence number of the vertical blank when the buffer + swap is expected to take place. + + Also add DRM_IOCTL_I915_VBLANK_SWAP definition for userspace code that may want + to use ioctl() instead of drmCommandWriteRead(). + (cherry picked from d5a0f107511e128658e2d5e15bd7e6215c507f29 commit) + +commit 00531cecad3cf9a1ec230f7f33535d153b9d9bd0 +Author: Michel Dänzer +Date: Wed Aug 30 19:24:04 2006 +0200 + + Change first valid DRM drawable ID to be 1 instead of 0. + + This makes it easier for userspace to know when it needs to allocate an ID. + + Also free drawable information memory when it's no longer needed. + (cherry picked from df7551ef7334d728ec0371423661bb403d3e270a commit) + +commit 7d487602a31dd886037417db088b6e643ed86918 +Author: Michel Dänzer +Date: Mon Aug 28 18:19:58 2006 +0200 + + Add copyright notice. + + (cherry picked from d04751facea36cb888c7510b126658fdbc4277d5 commit) + +commit da75d59cd65764c6076ab9b96ad8195ed71ed80b +Author: Michel Dänzer +Date: Fri Aug 25 19:01:05 2006 +0200 + + i915: Add ioctl for scheduling buffer swaps at vertical blanks. + + This uses the core facility to schedule a driver callback that will be called + ASAP after the given vertical blank interrupt with the HW lock held. + (cherry picked from 257771fa290b62d4d2ad896843cf3a207978d0bb commit) + +commit d7389a9758944ab0d241d3c1108adfeeec9eee76 +Author: Michel Dänzer +Date: Fri Aug 25 18:55:55 2006 +0200 + + Locking and memory management fixes. + + (cherry picked from 23d2833aaa37a33b9ddcf06cc796f59befc0d360 commit) + +commit ca3a1b5ec4a417785238fb7c0cb4c3570dbcb31a +Author: Michel Dänzer +Date: Fri Aug 25 18:55:06 2006 +0200 + + Drop tasklet locked driver callback when uninstalling IRQ. + + (cherry picked from b9f3009160d8bd1a26a77d6f1616f1679c7b969d commit) + +commit f93e4822694b066427f70c23216b78f92edb1bff +Author: Michel Dänzer +Date: Wed Aug 23 19:00:26 2006 +0200 + + Export drm_get_drawable_info symbol from core. + + (cherry picked from 43f8675534c7e95efbc92eaf2c8cc43aef95f125 commit) + +commit 67e88e5628d02cd94561e31fd68e02b6bde66e6f +Author: Michel Dänzer +Date: Wed Aug 23 16:05:47 2006 +0200 + + Hook up DRM_IOCTL_UPDATE_DRAW ioctl. + + (cherry picked from 98a89504589427a76c3f5cfa2266962a1a212672 commit) + +commit baa26c5faa3d5903569d1c94ad93b843d6979ba5 +Author: Michel Dänzer +Date: Wed Aug 23 16:04:41 2006 +0200 + + Only reallocate cliprect memory if the number of cliprects changes. + + Also improve diagnostic output. + (cherry picked from af48be1096221d551319c67a9e782b50ef58fefd commit) + +commit 9810ec2737de6aa81e764225f580e4ea39de437a +Author: Michel Dänzer +Date: Tue Aug 22 16:40:07 2006 +0200 + + Add support for tracking drawable information to core + + Actually make the existing ioctls for adding and removing drawables do + something useful, and add another ioctl for the X server to update drawable + information. The only kind of drawable information tracked so far is cliprects. + (cherry picked from 29598e5253ff5c085ccf63580fd24b84db848424 commit) + +commit a7b8c8d523d7f726b8fb74cb37f807d2316cf5dd +Author: Michel Dänzer +Date: Wed Aug 16 15:47:22 2006 +0200 + + Add support for interrupt triggered driver callback with lock held to DRM core. + + (cherry picked from d817cc1f30060fcc4a85a05b2de8a2a1687421b5 commit) + +commit 596d7e998403f565a796c431dbbcaf9e0c49908b +Author: Michel Dänzer +Date: Fri Aug 11 18:06:46 2006 +0200 + + Add support for secondary vertical blank interrupt to i915 driver. + + When the vertical blank interrupt is enabled for both pipes, pipe A is + considered primary and pipe B secondary. When it's only enabled for one pipe, + it's always considered primary for backwards compatibility. + (cherry picked from 0c7d7f43610f705e8536a949cf2407efaa5ec217 commit) + +commit 2735f9e2908b786586d18f6384371b991bdce430 +Author: Michel Dänzer +Date: Fri Aug 11 17:57:59 2006 +0200 + + Add support for secondary vertical blank interrupt to DRM core. + + (cherry picked from ab351505f36a6c66405ea7604378268848340a42 commit) + +commit ae96e264198323916ee58e293468c9b924feca75 +Author: Thomas Hellstrom +Date: Fri Sep 29 11:46:45 2006 +0200 + + Add a new buffer flag. + Fix up some comments. + +commit 3802f9adbf9a7e3d5c356f74b0c1ee966476fb97 +Author: Thomas Hellstrom +Date: Fri Sep 29 11:15:59 2006 +0200 + + Fix buffer manager takedown error. + Prepare for the possibility to evict all buffers from vram / agp. + This will be used by the X server when, for example, switching vts. + +commit 7af93dd9849442270ec89cb4bbeef5bfd4f9e424 +Author: Michel Dänzer +Date: Fri Sep 29 10:27:29 2006 +0200 + + i915: Only schedule vblank tasklet if there are scheduled swaps pending. + + This fixes issues on X server startup with versions of xf86-video-intel that + enable the IRQ before they have a context ID. + +commit 881ba569929ceafd42e3c86228b0172099083d1d +Author: Michel Dänzer +Date: Wed Sep 27 18:22:10 2006 +0200 + + i915: Avoid mis-counting vblank interrupts when they're only enabled for pipe A. + + It looks like 'after a while', I915REG_INT_IDENTITY_R for some reason always has + VSYNC_PIPEB_FLAG set in the interrupt handler, even though pipe B is disabled. + So we only increase dev->vbl_received if the corresponding bit is also set in + dev->vblank_pipe. + +commit 2627131e5d0c8cd5e3f0db06451c2e7ae7569b1b +Author: Michel Dänzer +Date: Mon Sep 18 12:15:38 2006 +0200 + + i915: Bump minor for swap scheduling ioctl and secondary vblank support. + +commit 0356fe260dcf80f6d2d20e3384f2a1f4ee7f5b30 +Author: Michel Dänzer +Date: Wed Sep 13 08:59:35 2006 +0200 + + i915_vblank_swap: Add support for DRM_VBLANK_NEXTONMISS. + +commit 50a0284a61d4415c0ebdb02decee76ef3115007a +Author: Michel Dänzer +Date: Fri Sep 1 11:48:07 2006 +0200 + + Only return EBUSY after we've established we need to schedule a new swap. + +commit cf6b2c5299e9be3542d4deddfd05d5811f11d2ef +Author: Michel Dänzer +Date: Fri Sep 1 11:35:31 2006 +0200 + + Core vsync: Don't clobber target sequence number when scheduling signal. + + It looks like this would have caused signals to always get sent on the next + vertical blank, regardless of the sequence number. + +commit 89e323e4900af84cc33219ad24eb0b435a039d23 +Author: Michel Dänzer +Date: Fri Sep 1 11:27:14 2006 +0200 + + Core vsync: Add flag DRM_VBLANK_NEXTONMISS. + + When this flag is set and the target sequence is missed, wait for the next + vertical blank instead of returning immediately. + +commit 7f09f957d9a61ac107f8fd29128d7899a3e8a228 +Author: Michel Dänzer +Date: Fri Sep 1 11:24:38 2006 +0200 + + Fix 'sequence has passed' condition in i915_vblank_swap(). + +commit c2bdb76814755c9ac6e66a8815f23af0fe4f3a91 +Author: Michel Dänzer +Date: Thu Aug 31 18:33:04 2006 +0200 + + Add SAREA fileds for determining which pipe to sync window buffer swaps to. + +commit 84b38b63f05e04ade8b1ddfb770047fd86de0d64 +Author: Michel Dänzer +Date: Thu Aug 31 18:32:08 2006 +0200 + + Add definition of DRM_VBLANK_SECONDARY. + +commit 87c57cba1a70221fc570b253bf3b24682ef6b894 +Author: Michel Dänzer +Date: Thu Aug 31 18:30:55 2006 +0200 + + Make handling of dev_priv->vblank_pipe more robust. + + Initialize it to default value if it hasn't been set by the X server yet. + + In i915_vblank_pipe_set(), only update dev_priv->vblank_pipe and call + i915_enable_interrupt() if the argument passed from userspace is valid to avoid + corrupting dev_priv->vblank_pipe on invalid arguments. + +commit d5a0f107511e128658e2d5e15bd7e6215c507f29 +Author: Michel Dänzer +Date: Wed Aug 30 19:33:28 2006 +0200 + + DRM_I915_VBLANK_SWAP ioctl: Take drm_vblank_seq_type_t instead of pipe number. + + Handle relative as well as absolute target sequence numbers. + + Return error if target sequence has already passed, so userspace can deal with + this situation as it sees fit. + + On success, return the sequence number of the vertical blank when the buffer + swap is expected to take place. + + Also add DRM_IOCTL_I915_VBLANK_SWAP definition for userspace code that may want + to use ioctl() instead of drmCommandWriteRead(). + +commit df7551ef7334d728ec0371423661bb403d3e270a +Author: Michel Dänzer +Date: Wed Aug 30 19:24:04 2006 +0200 + + Change first valid DRM drawable ID to be 1 instead of 0. + + This makes it easier for userspace to know when it needs to allocate an ID. + + Also free drawable information memory when it's no longer needed. + +commit d04751facea36cb888c7510b126658fdbc4277d5 +Author: Michel Dänzer +Date: Mon Aug 28 18:19:58 2006 +0200 + + Add copyright notice. + +commit 257771fa290b62d4d2ad896843cf3a207978d0bb +Author: Michel Dänzer +Date: Fri Aug 25 19:01:05 2006 +0200 + + i915: Add ioctl for scheduling buffer swaps at vertical blanks. + + This uses the core facility to schedule a driver callback that will be called + ASAP after the given vertical blank interrupt with the HW lock held. + +commit 23d2833aaa37a33b9ddcf06cc796f59befc0d360 +Author: Michel Dänzer +Date: Fri Aug 25 18:55:55 2006 +0200 + + Locking and memory management fixes. + +commit b9f3009160d8bd1a26a77d6f1616f1679c7b969d +Author: Michel Dänzer +Date: Fri Aug 25 18:55:06 2006 +0200 + + Drop tasklet locked driver callback when uninstalling IRQ. + +commit 43f8675534c7e95efbc92eaf2c8cc43aef95f125 +Author: Michel Dänzer +Date: Wed Aug 23 19:00:26 2006 +0200 + + Export drm_get_drawable_info symbol from core. + +commit 98a89504589427a76c3f5cfa2266962a1a212672 +Author: Michel Dänzer +Date: Wed Aug 23 16:05:47 2006 +0200 + + Hook up DRM_IOCTL_UPDATE_DRAW ioctl. + +commit af48be1096221d551319c67a9e782b50ef58fefd +Author: Michel Dänzer +Date: Wed Aug 23 16:04:41 2006 +0200 + + Only reallocate cliprect memory if the number of cliprects changes. + + Also improve diagnostic output. + +commit 29598e5253ff5c085ccf63580fd24b84db848424 +Author: Michel Dänzer +Date: Tue Aug 22 16:40:07 2006 +0200 + + Add support for tracking drawable information to core + + Actually make the existing ioctls for adding and removing drawables do + something useful, and add another ioctl for the X server to update drawable + information. The only kind of drawable information tracked so far is cliprects. + +commit d817cc1f30060fcc4a85a05b2de8a2a1687421b5 +Author: Michel Dänzer +Date: Wed Aug 16 15:47:22 2006 +0200 + + Add support for interrupt triggered driver callback with lock held to DRM core. + +commit 0c7d7f43610f705e8536a949cf2407efaa5ec217 +Author: Michel Dänzer +Date: Fri Aug 11 18:06:46 2006 +0200 + + Add support for secondary vertical blank interrupt to i915 driver. + + When the vertical blank interrupt is enabled for both pipes, pipe A is + considered primary and pipe B secondary. When it's only enabled for one pipe, + it's always considered primary for backwards compatibility. + +commit ab351505f36a6c66405ea7604378268848340a42 +Author: Michel Dänzer +Date: Fri Aug 11 17:57:59 2006 +0200 + + Add support for secondary vertical blank interrupt to DRM core. + +commit b15bc8a0bad43c68dd1bbff27e7a7bd54e9e6938 +Author: Thomas Hellstrom +Date: Thu Sep 28 12:19:54 2006 +0200 + + Libdrm version bump and naming. + +commit c52fafa6288b4e6ecfce27151969749113a41f0b +Author: Thomas Hellstrom +Date: Thu Sep 28 11:33:03 2006 +0200 + + Don't enable fence / buffer objects on non-linux systems. + Bump driver minor and date. + +commit 1c6f0ea43c47603c2265248ce8a91698c8982f3c +Author: Thomas Hellstrom +Date: Wed Sep 27 19:11:27 2006 +0200 + + Activate error message that was never hit since it was masked + by drm_lock_transfer. + Ifdef out drm_lock_transfer. I see no use for it currently. Should be removed. + +commit f2c03ecae627df77db25391fe85fcd8a2a4bdc0c +Author: Thomas Hellstrom +Date: Wed Sep 27 19:07:55 2006 +0200 + + Fix racy buffer object destruction. + +commit c97149b45be9d0e9385d4c6721aa70dad68a1aa1 +Author: Thomas Hellstrom +Date: Wed Sep 27 09:31:39 2006 +0200 + + Fix tt fixed size that slipped through in previous commit. + +commit 235f6fc650e9974211843b9196a903963dae0211 +Author: Thomas Hellstrom +Date: Wed Sep 27 09:27:31 2006 +0200 + + Adapt to architecture-specific hooks for gatt pages. + +commit bd8ca12b7baff778d5bb7b4ad1d38d16b60a4d5a +Author: Thomas Hellstrom +Date: Tue Sep 26 16:00:22 2006 +0200 + + Silence valgrind. + +commit 26528627a6cea7f92a949e89e5db6e17ef9560c2 +Author: Thomas Hellstrom +Date: Tue Sep 26 14:40:11 2006 +0200 + + Remove the call to drm_lock_transfer, since it is not used anymore. + Fix up drm_lock_free to retain the last locking context information. + +commit 711f077b7423c1a436d703885c6d18a2ad2940aa +Author: Thomas Hellstrom +Date: Tue Sep 26 14:36:53 2006 +0200 + + Allow for a driver to overload the ttm backend object methods. + +commit 273eb7833d69db2d72430d5c96c21cebd05c206e +Author: Thomas Hellstrom +Date: Mon Sep 25 11:51:08 2006 +0200 + + Add /proc filesystem buffer / fence object accounting. + Check for NULL pointer in the i915 flush handler. + Remove i915_sync_flush declaration. + +commit a02155a0d92d3933d42a3655db261446bfe72b44 +Author: Thomas Hellstrom +Date: Fri Sep 22 09:25:36 2006 +0200 + + Fix proc formatting broken by last commit. + GPU lockup error reporting. + +commit 62f6ea225615392098dedee47d4ccdd69e126a43 +Author: Felix Kuhling +Date: Fri Sep 22 03:46:54 2006 +1000 + + bug 5942: add stubs for drm_mtrr_add/del for non-MTRR configured linux + +commit 255f3e6f76dfd267a14765dd1293229184298d89 +Author: Anish Mistry +Date: Fri Sep 22 03:43:34 2006 +1000 + + bug 7092 : add pci ids for mach64 in Dell poweredge 4200 + +commit 1f71b8d7a456fe3ec4bfc2fed70b7420cdd0d55a +Author: Roland Scheidegger +Date: Wed Sep 20 19:44:57 2006 +0200 + + do a TCL state flush before accessing VAP_CNTL to prevent lockups on r200 when enabling/disabling vertex programs + +commit fa511a3ff5150d932fd963594d1ef67a94bb8b1f +Author: Thomas Hellstrom +Date: Wed Sep 20 16:31:15 2006 +0200 + + Allow for 64-bit map handles of ttms and buffer objects. + +commit aac918e7c72a46a1b0f2329380e2d6b4196d04e4 +Author: Thomas Hellstrom +Date: Mon Sep 18 21:50:00 2006 +0200 + + Fence handler fix + +commit ca1b15d645c74e20f638f5a09981bcf02f58caee +Author: Thomas Hellstrom +Date: Mon Sep 18 20:43:31 2006 +0200 + + Alternative implementation of page table zeroing using zap page_range. + (Disabled for now) + Fix bo_wait_idle bug. + Remove stray debug message. + +commit c4fad4c96168a3dfabaa8a7e97758fefd014c8a7 +Author: Thomas Hellstrom +Date: Mon Sep 18 16:02:33 2006 +0200 + + More verbose error reporting in some cases. + Add a buffer object waitIdle user-space function. + Fix some names and minor glitches. + +commit ef98a8e20dad8ae7e38f397d63c13bd24105ce53 +Author: Dave Airlie +Date: Mon Sep 18 21:22:12 2006 +1000 + + drm: put domain number back to 0, domain support is seriously fubar.. + +commit 22382bd8c540231641bfc75d778a50ddf1463783 +Author: Ben Skeggs +Date: Sun Sep 17 13:00:27 2006 +1000 + + Add pciid for GeForce Go 6150 (0x0244). + +commit 6ba9127753eff7615ba553fbc567aec98ecf8104 +Author: Michel Dänzer +Date: Fri Sep 15 16:37:47 2006 +0200 + + Use register writes instead of BITBLT_MULTI packets for buffer swap blits. + + This takes up two more ring buffer entries per rectangle blitted but makes sure + the blit is performed top to bottom, reducing the likelyhood of tearing. + +commit f613022ceef1814cb734bb3375f01962fd3bcf10 +Author: Thomas Hellstrom +Date: Fri Sep 15 16:47:09 2006 +0200 + + Allow a "native type" to be associated with a fence sequence. + In the intel case, we can associate a flush with a sequence. + +commit 49fbeb339c232804866cd548d6023fe559597353 +Author: Thomas Hellstrom +Date: Fri Sep 15 11:18:35 2006 +0200 + + Some bugfixes. + Change the fence object interface somewhat to allow some more flexibility. + Make list IOCTLS really restartable. + Try to avoid busy-waits in the kernel using immediate return to user-space with an -EAGAIN. + +commit 7223b4e264a64df2df70715d8777f2ccaa883d5e +Author: Thomas Hellstrom +Date: Thu Sep 14 16:42:00 2006 +0200 + + Simplify ttm alloc and free. + +commit 682c6ed0293771b093452597540118f47fda1adf +Author: Thomas Hellstrom +Date: Thu Sep 14 12:17:38 2006 +0200 + + Remove the use of reserved pages, and use locked pages instead. + Update compatibility for latest linux versions. + +commit 9adc9584a7e0b61b16a943720bef31a71faeaef4 +Author: Thomas Hellstrom +Date: Tue Sep 12 17:39:44 2006 +0200 + + Fix some debug messages. + +commit 861b26578cd5e497fb506ad5952fa62bd03ea201 +Author: Thomas Hellstrom +Date: Tue Sep 12 16:28:34 2006 +0200 + + Use lazy fence wait when possible even for RW fences. Saves some CPU. + Lindent. + +commit 191e284709ee792a32124e96e43d5876406b93dc +Author: Thomas Hellstrom +Date: Tue Sep 12 12:01:00 2006 +0200 + + More bugfixes. + Disable the i915 IRQ turnoff for now since it seems to be causing problems. + +commit 3cc64a943a7240c73c92ab103ba0502b9ec07fee +Author: Dave Airlie +Date: Tue Sep 12 06:13:14 2006 +1000 + + drm: use radeon specific names for radeon flags + +commit aa80e2f48f291aa41524dfb53023499c91473705 +Author: Ben Skeggs +Date: Sat Sep 9 07:35:55 2006 +1000 + + Add copyright notices while I still remember.. + +commit 99acb7936660843090ea8a9f22d2d50d9433e0de +Author: Thomas Hellstrom +Date: Fri Sep 8 17:24:38 2006 +0200 + + Various bugfixes. + +commit 0ef29768ca909421539c3d8f65bb8e94912fa597 +Author: Ben Skeggs +Date: Thu Sep 7 23:59:19 2006 +1000 + + Fix second start of X server without module reload beforehand, and a couple of other fixes. + + - Mark the correct RAMIN slots as free (oops) + - Remove a VRAM alloc that shouldn't have been there (oops) + - Move HT init out of firstopen() and into dma_init() + - Setup PFIFO_RAM{HT,FC,RO} in pfifo_init() + +commit dddacd7a3a4bd0c453b346cee70d1d36a401e539 +Author: Eric Anholt +Date: Wed Sep 6 23:26:50 2006 -0700 + + Use the DRM_INIT_WAITQUEUE argument (needed on Linux) to avoid a warning. + +commit 55057660f035a03078910d678e5fd9b0cb0b795a +Author: Eric Anholt +Date: Wed Sep 6 23:25:14 2006 -0700 + + Put the PCI device/vendor id in the drm_device_t. + + This helps us unbreak FreeBSD DRM from the 965 changes. + +commit d5726761858b1ff0fd6e6ee92ec1648fbb958a53 +Author: Eric Anholt +Date: Wed Sep 6 23:08:29 2006 -0700 + + Add a typedef for u64. + +commit d89c623f8e739815ea952adc77cfe5c0f7204407 +Author: Stephane Marchesin +Date: Thu Sep 7 00:35:17 2006 +0200 + + Remove a 64 bit div. + +commit e2ea72187e470c2c13adbd3fba4177bd4a0ecc37 +Author: Wang Zhenyu +Date: Wed Sep 6 22:57:17 2006 +0800 + + Adding pci id for Crestline + +commit e3f54ecdd9d266607afd7d8b62960b2154b63e9d +Author: Thomas Hellstrom +Date: Tue Sep 5 19:36:45 2006 +0200 + + Multithreaded application note. + +commit 604215396847a7964fd7d68aa89d4f778b3bf22b +Author: Thomas Hellstrom +Date: Tue Sep 5 18:00:25 2006 +0200 + + Fence all unfenced buffers function. + +commit 034fc31292edaa25779a938ab3e92ef34697eaf9 +Author: Thomas Hellstrom +Date: Tue Sep 5 14:23:18 2006 +0200 + + i915: Only turn on user IRQs when they are needed. + +commit 8c613a8363963330fbf701186f654007d6208bba +Author: Thomas Hellstrom +Date: Tue Sep 5 11:00:52 2006 +0200 + + Fix memory cache initialization. + +commit f88c32fd4cb93fe8b9dfa543a26d74733d0cd8ef +Author: Thomas Hellstrom +Date: Mon Sep 4 22:05:21 2006 +0200 + + Libdrm function headers. Some renaming. + +commit 550f51b4bf9920718aab2c611b15de3020537f92 +Author: Thomas Hellstrom +Date: Mon Sep 4 21:50:12 2006 +0200 + + Buffer object wait IOCTL operation. + Remove option to wait for fence / buffers and block signals. + +commit a6b8e3eaf49044e135a0b9288192525f301458d5 +Author: Thomas Hellstrom +Date: Mon Sep 4 16:57:20 2006 +0200 + + Make memory caches global so that they can be used with + multiple heads. + +commit b119966ae65c9ee74096cf0b246bf7703cb58ec4 +Author: Ben Skeggs +Date: Sun Sep 3 06:36:06 2006 +1000 + + Allow cmdbuf location(AGP,VRAM) and size to be configured. + +commit 97291a6ad05848b05af69e52453d93db1e96473b +Author: Ben Skeggs +Date: Sat Sep 2 22:25:26 2006 +1000 + + Use DMA_IN_MEMORY for DMA objects. This is needed for a DDX change that will + be committed soon after this. Without the change, MEMFORMAT_DMA_OUT appears + to have no effect. + +commit a96b61fdc4fc3df50c91ca489f45f12cdad74f69 +Author: Thomas Hellstrom +Date: Fri Sep 1 18:11:34 2006 +0200 + + Lindent drm_bo.c + +commit 405b5d9ca8cc9f6c5c7bb764c684bf74ba7660c6 +Author: Thomas Hellstrom +Date: Fri Sep 1 18:11:05 2006 +0200 + + Flag bit pattern bugfixes. Remove some error messages. + +commit ef8e618cf30ab7dcbe8c7211e0c2508c5520a669 +Author: Thomas Hellstrom +Date: Fri Sep 1 16:38:06 2006 +0200 + + Export buffer info on map and validate ioctls. + Add an info ioctl operation. + +commit 11f51a9a877d1231551e8c6482a6f70daf380cdd +Author: Thomas Hellstrom +Date: Fri Sep 1 15:41:55 2006 +0200 + + Bugfixes, + Memory allocation optimizations. + Buffer manager takedown. + +commit 4edb95d6e0a00a9a8885603cab2c99e3c6daa705 +Author: Thomas Hellstrom +Date: Fri Sep 1 11:23:21 2006 +0200 + + Various bugfixes. + +commit 44f6d08988a77a640bea40d09cb61eec7566a5ce +Author: Thomas Hellstrom +Date: Thu Aug 31 21:42:29 2006 +0200 + + Validation and fencing. + +commit 03c137c5f8d44c374406efe19c01105fcf34d583 +Author: Thomas Hellstrom +Date: Thu Aug 31 15:36:40 2006 +0200 + + Remove the buffer manager mutex. Use dev->struct_mutex instead. + Add a function to free buffers on hold for destruction if their + fence object has expired. + Add a timer to periodically call that function when there are + buffers pending deletion. + +commit ec8c79b79de6544cc09b5a2c85213a5f30e0d906 +Author: Thomas Hellstrom +Date: Thu Aug 31 14:10:13 2006 +0200 + + More mapping synchronization. + libdrm validate and fencing functions. + +commit ed9de124cc88cee398b7013de6b822bfaa3f397e +Author: Thomas Hellstrom +Date: Wed Aug 30 21:31:38 2006 +0200 + + Lindenting drm_bo.c and drm_ttm.c + +commit 914a77a15aae07cc305cc5da5ad6c7a639cbc121 +Author: Thomas Hellstrom +Date: Wed Aug 30 21:30:47 2006 +0200 + + Buffer object binding. + Some code reordering. + +commit 611662ab287c279a95ae33442325626e0191e2c5 +Author: Thomas Hellstrom +Date: Wed Aug 30 20:23:40 2006 +0200 + + Buffer eviction. + Reworked map refcounting so that any process waiting on buffer object unmap + will allow in other processes to unmap the buffer object. + +commit d39055174b5a487f0d848e1af4c3459fb4261bf1 +Author: Thomas Hellstrom +Date: Wed Aug 30 17:40:07 2006 +0200 + + Remove the buffer object hint field and use it only + as an argument. + Validate stub. + +commit ff95ea5536d70f9bc8eac12f2c97dae71fb97066 +Author: Thomas Hellstrom +Date: Wed Aug 30 15:11:50 2006 +0200 + + Add missing map flags. + +commit 14a835be616183e733a2d6a7dcc697b8a6f46caf +Author: Thomas Hellstrom +Date: Wed Aug 30 15:08:40 2006 +0200 + + Buffer object mapping and mapping synchronization for multiple clients. + +commit e47a4fda2ef7aada45b7799ad20e8012102dc12e +Author: Thomas Hellstrom +Date: Wed Aug 30 13:04:08 2006 +0200 + + Memory manager init and takedown. + +commit 033bda07e9a4eab5058fb919b375deb57b08b5be +Author: Thomas Hellstrom +Date: Wed Aug 30 09:57:35 2006 +0200 + + Buffer object reply fill in. + Lindent of drm_bo.c drm_ttm.c + +commit 24dddc27549f2b8cf837305ee84dd1ca97df98e7 +Author: Ben Skeggs +Date: Wed Aug 30 16:55:02 2006 +1000 + + Add stub {get,set}param ioctls. + +commit de144ba23c1245cf021a63cc739c7c9903568272 +Author: Thomas Hellstrom +Date: Tue Aug 29 21:57:37 2006 +0200 + + Part of buffer object libdrm interface. + +commit 23f01c9fe8e6170459fe46ad5fc9757bbe967d96 +Author: Thomas Hellstrom +Date: Tue Aug 29 18:40:08 2006 +0200 + + Checkpoint commit. Buffer object flags and IOCTL argument list. + +commit 0dedfc2cd03f50b435476e56637b333d345fddbd +Author: Thomas Hellstrom +Date: Tue Aug 29 14:52:02 2006 +0200 + + Checkpoint ttm addition to buffer objects. + +commit 279e8d26c6cf7347aa9cb6d50d025a41dff9a5be +Author: Thomas Hellstrom +Date: Tue Aug 29 10:45:34 2006 +0200 + + 64-bit IOCTL integer (Michel Dänzer & Brian Paul) + +commit 205740647060bc3bdec2b4402a666eb1015932ff +Author: Thomas Hellstrom +Date: Mon Aug 28 17:51:53 2006 +0200 + + Buffer object creation. + +commit 0d67356de4e0c9e0d068ea9c16cf33df4fd13776 +Author: Thomas Hellstrom +Date: Mon Aug 28 16:36:37 2006 +0200 + + Proper TTM dereferencing + Initial buffer object creation. + +commit 3cfab681b3c82c7951f1cc337d2021a6f0d08b1e +Merge: 8892838... 9b984b3... +Author: Dave Airlie +Date: Tue Aug 29 00:01:19 2006 +1000 + + Merge branch 'master' into nouveau-1 + +commit 05536a64785223ee8c57556300a14ba9c89837ae +Author: Thomas Hellstrom +Date: Mon Aug 28 13:51:39 2006 +0200 + + Buffer object idle and mapping synchronization. + +commit 480ea65ee4b02fa21d1ddf3bea09ac23085618cc +Author: Thomas Hellstrom +Date: Mon Aug 28 10:58:21 2006 +0200 + + Checkpoint buffer object IOCTL stub. + +commit e181f594a4a75790ce1d2a8e907f9fcc5e88b419 +Author: Thomas Hellstrom +Date: Mon Aug 28 09:49:09 2006 +0200 + + Add a 64-bit drm unsigned type for 64-bit clean IOCTLS. + Conversion functions in drmP.h and xf86drm.c. + +commit 4ddabd15620e6e4638a6a37a3a2b5bced626fcf9 +Merge: 886d3b3... 9b984b3... +Author: Thomas Hellstrom +Date: Mon Aug 28 09:28:10 2006 +0200 + + Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into drm-ttm-0-2-branch + + Conflicts: + + linux-core/drmP.h + +commit 9b984b34e99f694e10251e15bc2ec1bc844dcca4 +Author: Dave Airlie +Date: Sat Aug 19 17:59:18 2006 +1000 + + drm: lots of small cleanups and whitespace issues fixed up + + remove a mach64 warning, align a lot of things from linux kernel + +commit 60ddaaf2e07b57997bcbaef0576005b52130bd24 +Author: Dave Airlie +Date: Sat Aug 19 16:56:03 2006 +1000 + + add static function, and remove bad attributions + +commit 3586ecd060d9468eba73c203c5e9de965fe904fb +Author: Dave Airlie +Date: Sat Aug 19 16:55:30 2006 +1000 + + fix const pointer warnings with file_operations + +commit 205c573e449b38d759273f6a51eb8c1131585ece +Author: Dave Airlie +Date: Sat Aug 19 16:55:00 2006 +1000 + + remove local copies of pci domain/bus/slot/num + +commit b4feb2c04efdcf31d094b03ea32327a06d9dcdd2 +Author: Dave Airlie +Date: Sat Aug 19 16:43:16 2006 +1000 + + remove some DRM_ARRAY_SIZE from linux core code + +commit 3a91e1a5fbfbca4654cca0ef41dc016fd8be80dd +Author: Dave Airlie +Date: Sat Aug 19 16:36:26 2006 +1000 + + fixup some of the comments in drm_context.c + +commit 27c72b67eceec7517c34d2ca456c7474a353d6e6 +Author: Dave Airlie +Date: Sat Aug 19 16:31:34 2006 +1000 + + drm: i810_dma.c: fix pointer arithmetic for 64-bit target + + First warning result from open-coded PTR_ERR, + the rest is caused by code like this: + + *(u32 *) ((u32) buf_priv->kernel_virtual + used) + + I've also fixed a missing PTR_ERR in i830_dma.c + + From: Denis Vlasenko + Signed-off-by: Dave Airlie + +commit 886d3b3061cdf53f5a353cbaac843f63104d2658 +Author: Thomas Hellstrom +Date: Sun Aug 27 22:01:33 2006 +0200 + + Bugfixes. + +commit 928bdc6c1c9cd1e60f0b070533768aaca56c84d8 +Author: Thomas Hellstrom +Date: Sun Aug 27 21:21:06 2006 +0200 + + Initialize i915 saved flush flags. + +commit b4b7b997605f88f3ffdcb0cc7cd1271e0cb24073 +Author: Thomas Hellstrom +Date: Sun Aug 27 21:16:13 2006 +0200 + + Remove the ioctl multiplexing, and instead allow for generic + drm ioctls 0x80 - 0xFF. + +commit ac26b51503dfedf422d6ae49518adcf41dff1af3 +Author: Thomas Hellstrom +Date: Sun Aug 27 19:45:38 2006 +0200 + + Have TTM create and reference ioctl call return the actual TTM size. + +commit 4fa58aa15242333a635cb590762c6e6312945745 +Author: Thomas Hellstrom +Date: Sun Aug 27 19:07:38 2006 +0200 + + Add TTM map handle on reference. + +commit 65e7274008446d2059b7fd7cd6d7b1d6b04da0ce +Author: Thomas Hellstrom +Date: Sun Aug 27 19:03:20 2006 +0200 + + ttm create / destroy / ref / unref ioctl. + +commit 88928380c87e60d22a0a9698c468036f180f0761 +Author: Dave Airlie +Date: Sun Aug 27 08:59:50 2006 +1000 + + add pci ids for nouveau + +commit fef9b30a2b437c0103c33443566604027529b91d +Author: Dave Airlie +Date: Sun Aug 27 08:55:02 2006 +1000 + + initial import of nouveau code from nouveau CVS + +commit b99e332236ca5fcc11e8d7c89566bbf3bcf959ee +Author: Michel Dänzer +Date: Sat Aug 26 12:21:11 2006 +0200 + + Bug #7595: Avoid u32 overflows in radeon_check_and_fixup_offset(). + + The overflows could cause valid offsets to get rejected under some + circumstances, e.g. when the framebuffer resides at the very end of the card's + address space. + +commit c488e25ceb421c6f84f110d786d9814ac4dba1b2 +Author: Thomas Hellstrom +Date: Fri Aug 25 20:03:39 2006 +0200 + + More ioctl stubs. + Buffer object locking order documentation. + +commit 35c8ce6c2945ff09dc52dbc2a7382798ba64c1da +Author: Thomas Hellstrom +Date: Fri Aug 25 19:03:42 2006 +0200 + + ttm and buffer objects ioctl stubs. + +commit 1d3cf107d20cb11ad07667622785ef8341ab9c2a +Author: Thomas Hellstrom +Date: Fri Aug 25 18:14:22 2006 +0200 + + Module protection map access is moving into mainline kernels. + Update drm_compat accordingly. + (Reported by Dave Airlie) + +commit 4c03030b12bae28dad50d69bd271de632c43ff13 +Author: Thomas Hellstrom +Date: Fri Aug 25 18:05:35 2006 +0200 + + Checkpoint commit + Buffer object code. + +commit ea5709997329a6c425261dcc454cf7dd97a81167 +Author: Thomas Hellstrom +Date: Wed Aug 23 13:49:13 2006 +0200 + + Fix previous commit: Only fall back to hashed handles + when there is a duplicate handle error. Not for other errors. + +commit 8fa43d4b2ff4137bab743bfaf6282aa327f16830 +Merge: e201511... 459b234... +Author: Thomas Hellstrom +Date: Wed Aug 23 13:31:45 2006 +0200 + + Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into drm-ttm-0-2-branch + +commit 459b234d79daaa8a003da9ea48775a5587d5ba2a +Author: Thomas Hellstrom +Date: Wed Aug 23 11:31:10 2006 +0200 + + Allow multiple addMaps with the same 32-bit map offset. + (Reported by Dave Airlie) + +commit 8dfe917cb26bbeddda0e1b52060d8dce188468f3 +Author: Thomas Hellstrom +Date: Wed Aug 23 11:21:33 2006 +0200 + + Fix hashtab implementation leaking illegal error codes to user space. + (Reported by Dave Airlie) + +commit e201511a0fbeb177a9ecd7f77d177fc88c1616fb +Author: Thomas Hellstrom +Date: Tue Aug 22 11:57:08 2006 +0200 + + More ttm cleanups. + +commit ca4e34e532e818921f7b2d36fc6886874b7f7924 +Author: Thomas Hellstrom +Date: Tue Aug 22 11:19:53 2006 +0200 + + ttm code cleanup. + Fix the sleep-in-page-table-spinlock bug discovered by Dave Airlie + +commit a6535c8db4614376ce8ecb7d889b92db066a96cc +Author: Thomas Hellstrom +Date: Tue Aug 22 10:44:09 2006 +0200 + + Add a fence object class field for future use (For example VSYNC fence objects) + +commit 7058d06317e17253d874bf4df7b09d0d52a5fd74 +Author: Thomas Hellstrom +Date: Tue Aug 22 10:24:48 2006 +0200 + + Initial i915 buffer object driver + +commit b81ca5e031b2fbd9c5c401057c72f5857f7f5a3a +Author: Thomas Hellstrom +Date: Tue Aug 22 10:09:57 2006 +0200 + + AGP backends for TTM. + +commit 700bf80ca9fadf2c1404c220addebd92d9ad799d +Author: Thomas Hellstrom +Date: Tue Aug 22 09:47:33 2006 +0200 + + Bring in stripped TTM functionality. + +commit 8d5b7c77f9b31aa9bcf81536d39769f4f3feeb63 +Author: Thomas Hellstrom +Date: Mon Aug 21 21:37:43 2006 +0200 + + Allow longer sequence lifetimes. + +commit e089de33e8efd87b30d59c571b9ab9aa302b23e1 +Author: Thomas Hellstrom +Date: Mon Aug 21 21:36:00 2006 +0200 + + i915 fence object driver implementing 2 fence object types: + 0x00 EXE fence. Signals when command stream interpreter has reached the point + where the fence was emitted. + 0x01 FLUSH fence. Signals when command stream interpreter has reached the point + where the fence was emitted, and all previous drawing operations have been + completed and flushed. + Implements busy wait (for fastest response time / high CPU) and + lazy wait (User interrupt or timer driven). + +commit 6571f74a4906ae4f5f92916d64cc2cce3c8e0043 +Author: Thomas Hellstrom +Date: Mon Aug 21 21:12:29 2006 +0200 + + Remove some accidently included TTM code. + +commit 657bacc3953e8e51a0a15bd872e9818c9dbcbc10 +Author: Thomas Hellstrom +Date: Mon Aug 21 21:04:36 2006 +0200 + + Add missing fence type define. + Add drm_fence.o to Makefile + +commit 166da9355d95affe427a6cff3525df60e80a99df +Author: Thomas Hellstrom +Date: Mon Aug 21 21:02:08 2006 +0200 + + User / Kernel space fence objects (device-independent part). + +commit 1c787f0d396c309131d5f34939598d657ee2459f +Author: Thomas Hellstrom +Date: Mon Aug 21 20:38:57 2006 +0200 + + Backwards compatibility code for ttms. + +commit 42c2cfcf7d5730a2961d425228e042f533b312fa +Author: Thomas Hellstrom +Date: Mon Aug 21 20:30:19 2006 +0200 + + Generic DRM support base-class support for user-space objects, like + fence objects and buffer objects: + Refcounting, + Inter-process sharing, + Synchronization + Destruction. + +commit 11f9e404fb66927146de30227fa05c5485aa1726 +Author: Thomas Hellstrom +Date: Mon Aug 21 17:02:44 2006 +0200 + + Avoid using vmalloc for small hash tables. + +commit 0afb877a37a33e8493628ddc267fb00650fd1840 +Author: Dave Airlie +Date: Sat Aug 19 17:59:18 2006 +1000 + + drm: lots of small cleanups and whitespace issues fixed up + + remove a mach64 warning, align a lot of things from linux kernel + +commit 78634c14a8f92fbbc404442ce6d7b170e6a6e561 +Author: Dave Airlie +Date: Sat Aug 19 16:56:03 2006 +1000 + + add static function, and remove bad attributions + +commit d90a55fe3488020967a4d1b1699ef1f42d50b422 +Author: Dave Airlie +Date: Sat Aug 19 16:55:30 2006 +1000 + + fix const pointer warnings with file_operations + +commit 3a681bb4c12ee1042eb31ec565a3eb2ecccddd3d +Author: Dave Airlie +Date: Sat Aug 19 16:55:00 2006 +1000 + + remove local copies of pci domain/bus/slot/num + +commit cc71393559b94ba491059822d7cad388460a0ddf +Author: Dave Airlie +Date: Sat Aug 19 16:43:16 2006 +1000 + + remove some DRM_ARRAY_SIZE from linux core code + +commit 4b38f72672c53ed64f016241dcb5d770894657b8 +Author: Dave Airlie +Date: Sat Aug 19 16:36:26 2006 +1000 + + fixup some of the comments in drm_context.c + +commit f89a576aece919f2f9bd42b7d36a5df62cb0d68e +Author: Dave Airlie +Date: Sat Aug 19 16:31:34 2006 +1000 + + drm: i810_dma.c: fix pointer arithmetic for 64-bit target + + First warning result from open-coded PTR_ERR, + the rest is caused by code like this: + + *(u32 *) ((u32) buf_priv->kernel_virtual + used) + + I've also fixed a missing PTR_ERR in i830_dma.c + + From: Denis Vlasenko + Signed-off-by: Dave Airlie + +commit 0316f93d51abc52b816e936e0ece304ac47799c3 +Author: Thomas Hellstrom +Date: Wed Aug 16 16:36:56 2006 +0200 + + Remove hash tables on DRM exit. + +commit 4daa024918d461ab8d173631fa5187dc50253b67 +Author: Thomas Hellstrom +Date: Mon Aug 14 17:11:14 2006 +0200 + + Avoid kernel oops in some error paths calling drm_lastclose(). + +commit 0d60cd0036c6bc5383cdc1dad719950afd68cbbf +Author: Dave Airlie +Date: Mon Aug 14 11:52:34 2006 +1000 + + remove all TRUE instances as well + +commit 18a48a9267826a3c81e87a5fa9bba79ea0cd295c +Author: Dave Airlie +Date: Mon Aug 14 11:49:52 2006 +1000 + + remove all TRUE/FALSE no need for this in the drm, use 0 or 1 + +commit 7a46d4139982cc82559ccf9a1bc09a52bdf12223 +Author: Dave Airlie +Date: Thu Aug 10 14:38:50 2006 +1000 + + i965 code and Linux coding style < 0 + + smack my whitespace up. + +commit 5340a7022766f3437fcaf9d8d4d83944befc2fa2 +Author: Dave Airlie +Date: Thu Aug 10 14:32:18 2006 +1000 + + cleanup some whitespace issue and move compat code to compat header + +commit df7378d7fa9d048aea6911a3fe4973050003401b +Author: Dave Airlie +Date: Thu Aug 10 14:31:56 2006 +1000 + + clean up script to create an lk drm directory + +commit 28069ff10f288d06eb15ce0425def3625157187f +Author: Dave Airlie +Date: Thu Aug 10 14:31:22 2006 +1000 + + drm: ati_pcigart cleanup + + use NULL instead of 0, cleanup some whitespace + +commit 48cb9aceed782a4e9c557f30429e65f845dd777d +Author: Alan Hourihane +Date: Tue Aug 8 15:05:54 2006 -0700 + + Add support for Intel i965G chipsets. + + This is a patch prepared by Guangdeng Liao based off of Tungsten Graphics's + final code drop. + +commit e524028630013bb0f436bcdca0396289745843cf +Author: Dave Airlie +Date: Mon Aug 7 21:34:40 2006 +1000 + + drm: whitespace cleanup in new files + +commit 4b3ea90bc4ceeae440c64e0af8b59cf77ea7b622 +Author: Dave Airlie +Date: Mon Aug 7 21:00:13 2006 +1000 + + drm: remove extra whitespace from drm_mm.c + +commit 248d1a32a2462904bcaf040320b490570b4b0be6 +Author: Dave Airlie +Date: Mon Aug 7 20:56:38 2006 +1000 + + drm: fixup whitespace and style for Linux kernel import + +commit 35066b51efeb0d2ae9b4ba7fba066f80f798539d +Author: Michel Dänzer +Date: Wed Jul 26 18:21:32 2006 +0200 + + Revert "Make sure busmastering gets disabled on module unload." + + This reverts af7b89d7246efbed7d05c38fcaa6a13c4b89db90 commit. It causes an oops + on X server shutdown here, and for the reporter of bug #7629 as well. + +commit 645453ce11f819c4e9dd9be95ce9d621dc7d466b +Author: Michel Dänzer +Date: Wed Jul 26 18:14:20 2006 +0200 + + Bug #7629: Fix for CHIP_IS_AGP getting 'restored' with non-AGP cards + + Commit 2a47f6bfecea5dabcbf79d5e1aaf271f50070b89 caused the CHIP_IS_AGP flag to + get 'restored' with PCI(e) cards. I can't think of a way to fix this without + introducing a (otherwise redundant) CHIP_IS_PCI flag. + +commit 09c901e4bdf2bd18110f963ef3759f6759f15317 +Author: Dave Airlie +Date: Mon Jul 24 11:09:41 2006 +1000 + + remove incorrect exit marking on cleanup pci as this is called from other paths + +commit 5cfbd5dbab4fe9668771377cb22da04c6103459e +Author: Dave Airlie +Date: Mon Jul 24 10:51:27 2006 +1000 + + switch drm to use Linux mutexes instead of semaphore. + + I hope the fallback compat code works if not shout at me. + +commit 6677e2a10b820a5ccfd375cc627b8e41453a71da +Author: Adam Jackson +Date: Wed Jul 19 16:19:25 2006 -0400 + + Delete the pre-core DRM code with extreme prejudice. + +commit af7b89d7246efbed7d05c38fcaa6a13c4b89db90 +Author: Adam Jackson +Date: Wed Jul 19 15:35:31 2006 -0400 + + Make sure busmastering gets disabled on module unload. + +commit d5e0f8bdaf8769642950b8219f0e80f6b523817d +Author: Michel Dänzer +Date: Wed Jul 19 19:18:32 2006 +0200 + + Use RADEON_RB3D_DSTCACHE_CTLSTAT instead of RADEON_RB2D_DSTCACHE_CTLSTAT. + + The latter seems to be a read-only mirror of the former. + +commit 2a47f6bfecea5dabcbf79d5e1aaf271f50070b89 +Author: Michel Dänzer +Date: Wed Jul 19 19:16:26 2006 +0200 + + Make sure CHIP_IS_AGP flag is set when not overriding to PCI mode. + + This allows using AGP after overriding to PCI mode in a previous session + without reloading the DRM. + +commit c91748e702af1c59d88a4b6c2afb20a781dc6660 +Author: Michel Dänzer +Date: Wed Jul 19 19:13:00 2006 +0200 + + When writeback isn't used, actually disable it in the hardware. + + Not doing this might waste bus bandwidth or even cause memory corruption or + system crashes on systems that check bus transfers. No such incident has been + reported though. + +commit e337eadcec9c1e2cf885167c076ab2407bd6c090 +Author: Michel Dänzer +Date: Wed Jul 19 19:07:06 2006 +0200 + + Implement RADEON_PARAM_SCRATCH_OFFSET getparam. + + When this succeeds, userspace can read the scratch register contents from the + mapped writeback page directly. + +commit 7dea64677b62418b14d34c41399cdb8bf8b817cd +Author: Michel Dänzer +Date: Wed Jul 19 19:01:33 2006 +0200 + + Some debug output when the getparam ioctl is called with an unknown parameter. + +commit b9243ce3d5ed6bd70851a132871387d4d2e886bc +Author: Michel Dänzer +Date: Wed Jul 19 18:31:43 2006 +0200 + + .cvsignore -> .gitignore + + Sort the merged file, remove the redundant explicit .ko lines and add + some generated symlinks. + +commit 126673d62afad6da84e833daa644a352d88a5e37 +Author: Thomas Hellstrom +Date: Tue Jul 11 14:37:37 2006 +0000 + + Keep hashed user tokens, with the following changes: + 32-bit physical device addresses are mapped directly to user-tokens. No + duplicate maps are allowed, and the addresses are assumed to be outside + of the range 0x10000000 through 0x30000000. The user-token is identical + to the 32-bit physical start-address of the map. + 64-bit physical device addressed are mapped to user-tokens in the range + 0x10000000 to 0x30000000 with page-size increments. The user_token should + not be interpreted as an address. + Other map types, like upcoming TTM maps are mapped to user-tokens in the + range + 0x10000000 to 0x30000000 with page-size increments. The user_token should + not be interpreted as an address. + This keeps compatibility with buggy drivers, while still implementing a + hashed map lookup. The SiS and via device driver major bumps are + reverted. + +commit a392349691ec2aa3f83d8a9fc4a485e4dbef4bbe +Author: Thomas Hellstrom +Date: Mon Jul 10 13:00:21 2006 +0000 + + Change drm Map handles to be arbitrary 32-bit hash tokens in the range + 0x10000000 to 0x90000000 in PAGE_SIZE increments. + Implement hashed map lookups. + This potentially breaks both 2D and 3D drivers. If so, the corresponding + 2D and 3D driver should be fixed, and it's corresponding drm device driver + should have its major bumped as soon as possible. + Bump sis and via drm device driver majors. + The SiS and Unichrome 3D drivers are fixed in Mesa CVS HEAD and + mesa_6_4_branch. + +commit c21a7b763ad31c3473ba2c9a1a01bb729bc13bb5 +Author: Thomas Hellstrom +Date: Wed Jul 5 15:52:35 2006 +0000 + + SiS 315 Awareness. + +commit 264f60ded4921e00f83198fa48e82037f26e818c +Author: Thomas Hellstrom +Date: Wed Jul 5 14:39:22 2006 +0000 + + Add missing semaphore release. + +commit 56b073385213d187535fbbd24adaf9ebeb7c752f +Author: Adam Jackson +Date: Tue Jun 27 21:04:50 2006 +0000 + + Disable building static libraries. Bump to 2.0.2 for header updates. + +commit aafedbf7c57903949e74fc7123a1f1fc1e94ea47 +Author: Alan Hourihane +Date: Fri Jun 23 16:29:39 2006 +0000 + + Fix compilation problem on 2.6.9 kernels (bug #6211) + +commit da143d0606e321e48037d39e0c82355a4695328a +Author: Keith Packard +Date: Thu Jun 22 21:34:44 2006 +0000 + + Remove spurious debug messages from i915 vblank config paths + +commit f8891ef802e3417c4ecda08d597e081485d75060 +Author: Keith Packard +Date: Wed Jun 21 00:15:10 2006 +0000 + + i915: Save vblank pipe configuration to restore on resume + +commit 83f256e60e44d83304df44cead6617212fe437b4 +Author: Keith Packard +Date: Mon Jun 19 20:15:53 2006 +0000 + + Add i915 ioctls to configure pipes for vblank interrupt. + i915 vblanks can be generated from either pipe a or b, however a disabled + pipe generates no interrupts. This change allows the X server to select + which pipe generates vblank interrupts. + +commit 58b63ee5ccc1427a6835ef5112fe556faa9e1be3 +Author: Thomas Hellstrom +Date: Mon Jun 19 09:12:50 2006 +0000 + + Fix buffer cleanup on close. Move memory manager reset from final_context + to lastclose. + +commit 96f272884d6caf7940c9bc3c95dcac75b0a8cd3f +Author: Thomas Hellstrom +Date: Mon Jun 19 09:01:31 2006 +0000 + + via: Bump version number and date. + +commit 0203edaa21451c2840d3c4116fb0bdbec82cb0fe +Author: Thomas Hellstrom +Date: Fri Jun 16 15:20:20 2006 +0000 + + via: Return the requested size instead of the correct size of the allocated + regions. The 2D driver and XvMC lib has problems when the returned size + is not the same as the allocated size. + +commit ca1a77683d523dc1d2268531b19ea23b3e1ae4f0 +Author: Thomas Hellstrom +Date: Thu Jun 15 18:37:05 2006 +0000 + + via: + -Remove out of memory error message. + -Move sman cleanup from final_context to lastclose. + -Add the P4VM800PRO (?) PCI ID. + +commit 6c7faf5814547169dec2b865abf1f63b83aaeb05 +Author: Thomas Hellstrom +Date: Tue Jun 6 17:52:03 2006 +0000 + + s/list_entry/drm_hash_entry/ for "drm_hash_item"s. + +commit 1a9e5bae109b476f9ee34975242c8938aaac4146 +Author: Thomas Hellstrom +Date: Tue Jun 6 17:46:17 2006 +0000 + + Fix drm_remove_magic potential memory leak / corruption. Move drm + authentication token hashing to new generic hash table implementation. + +commit 6bacb180cef00573fc41a1e79bdd5b89d6f1c1f5 +Author: Thomas Hellstrom +Date: Tue Jun 6 14:19:00 2006 +0000 + + Merge in the drm-sman-branch + +commit 838b03f7aad579bcb593c06e44ade02a0583d3ce +Author: Thomas Hellstrom +Date: Sun May 28 16:20:29 2006 +0000 + + file via_mm.c was initially added on branch drm-sman-branch. + +commit 7fbfb53c00c3acd5965badf1e62e8a4bb836ee22 +Author: Thomas Hellstrom +Date: Sun May 28 16:20:29 2006 +0000 + + file drm_sman.h was initially added on branch drm-sman-branch. + +commit 09872c9ab3bb597c37a83edd3bf365db46e6d507 +Author: Thomas Hellstrom +Date: Sun May 28 16:20:29 2006 +0000 + + file sis_mm.c was initially added on branch drm-sman-branch. + +commit 36160c80604a4c10c70877afb5be98210096636e +Author: Thomas Hellstrom +Date: Sun May 28 16:20:29 2006 +0000 + + file drm_sman.c was initially added on branch drm-sman-branch. + +commit 31a80d39e52097a599e77b3e52bac70da8315308 +Author: Thomas Hellstrom +Date: Fri May 26 19:33:02 2006 +0000 + + file drm_hashtab.h was initially added on branch drm-ttm-branch. + +commit f4e6e4499c1b7a26de2bbf36568f75315faec212 +Author: Roland Scheidegger +Date: Wed May 24 18:36:24 2006 +0000 + + Add support for r200 vertex programs (R200_EMIT_VAP_PVS_CNTL, and new + packet type for making it possible to address whole tcl vector space + and have a larger count) + +commit 9e0320a0ad926202f1598698ad9bc728949ba0e7 +Author: Roland Scheidegger +Date: Sat May 20 09:20:05 2006 +0000 + + add forgotten register define for previous commit + +commit e1b627c17e31bb659fe8aeffeaa2e301d5e2a88c +Author: Roland Scheidegger +Date: Sat May 20 09:08:18 2006 +0000 + + Do a tcl state flush before accessing tcl vector space. This fixes some + more problems with flickering (bug #6637). drm may not be appropriate + place for this, since doing that flush there might both be overkill and + insufficient in some cases. However, it's hard to figure out when that + flush is needed, so this has to suffice. There does not seem to be a + performance penalty associated with it. + +commit 79e596917290807f11ba6f529abc30b7c6336e52 +Author: Dave Airlie +Date: Fri May 19 04:11:22 2006 +0000 + + rip out unneeded back compat code + +commit b1a64b8136b3dafb843d9b677becfdb5f2ac1eb8 +Author: Dave Airlie +Date: Thu May 18 07:32:37 2006 +0000 + + add consts to radeon microcode. + From: tilman + +commit bdd381a7cea814d12d3207a67503cc1a5e353bed +Author: Eric Anholt +Date: Wed May 17 06:07:57 2006 +0000 + + Set entry->virtual for sg maps, fixing ATI PCI/PCIE GART support. + PR: kern/97056 Submitted by: Stanislav Sedov + +commit dcfcf1a84d400f9c1ade36a233f0a18131115921 +Author: Eric Anholt +Date: Wed May 17 05:44:39 2006 +0000 + + Add the bits for vblank support on FreeBSD, which most importantly avoids + chasing a NULL pointer at the first 3d app invocation. + +commit 7ea4a88fa30d9608b09dc0052b20e54301db547a +Author: Eric Anholt +Date: Wed May 17 05:41:48 2006 +0000 + + Add the workaround that's in the kernel to suppress GCC's warning about + refusal to inline functions that (in some cases, at least) aren't that + large. + +commit d365f031292d0f50755a3049c410443b1075fff5 +Author: Dave Airlie +Date: Sun Apr 23 09:05:05 2006 +0000 + + fixup GFP_COMP for older kernels and get_page/put_page for newer + +commit 30a5787d3671fba89d14efb638695c2dd61adf03 +Author: Dave Airlie +Date: Sun Apr 23 08:07:57 2006 +0000 + + Fix from Benh for ppc r300 scratch + +commit 4a49e6c3668dd281f70a13fb382fac93452758e2 +Author: Brian Paul +Date: Thu Apr 20 14:26:59 2006 +0000 + + check for __FreeBSD_kernel__ (bug 3810) + +commit 1327222f9b5521c2d98f7550eb335b68e2af3aea +Author: Eric Anholt +Date: Tue Apr 18 06:12:22 2006 +0000 + + Err, use "ifndef" rather than "if !", to avoid compiler warning. + +commit 2abd1f270bccfdda6e87021000ba88e07f54c181 +Author: Eric Anholt +Date: Tue Apr 18 06:08:17 2006 +0000 + + Reorder the DRM_*_AGP enum to match linux's numbers (oops). Fixes i915 + attachment. Make our mga_drv.c use them, while I'm here. + Submitted by: Jonathan Fosburgh + +commit 40b70e324430e36f10d6229793acf66d9104aff7 +Author: Eric Anholt +Date: Tue Apr 18 05:57:28 2006 +0000 + + Use __LP64__ instead of checking the linux-specific BITS_PER_LONG. + +commit 63c4d0257616c799d4f0bb84be3f17dbaf867495 +Author: Eric Anholt +Date: Sun Apr 9 20:10:32 2006 +0000 + + Revert a change that accidentally went in with whitespace changes from + Linux, which broke on FreeBSD. DRM_COPY_*_IOCTL checks for the size + parameter matching the ioctl's command size there, since the copin/out + happened earlier. + +commit 6cb366b5a83996fc7f4ceb6b4af1a89473407866 +Author: Eric Anholt +Date: Sat Apr 8 09:45:43 2006 +0000 + + Compile fixes for FreeBSD. + +commit 299aad03c2148bb3e9efdb29b89e70b712a2e055 +Author: Dave Airlie +Date: Wed Apr 5 08:34:24 2006 +0000 + + coverity bugfix from the kernel + +commit 4f53bf35454422db7cdd8db52b95016a9ec0dd2e +Author: Dave Airlie +Date: Wed Apr 5 01:23:57 2006 +0000 + + remove stupid init and exit flags.. + +commit ac5bd25208d2f636edb45b71de11decdde781862 +Author: Dave Airlie +Date: Mon Apr 3 08:06:51 2006 +0000 + + make add context non master... + +commit 985738f203f06aa630feaf4ef15b794ea50d3ee9 +Author: Dave Airlie +Date: Sat Mar 25 07:16:14 2006 +0000 + + radeon fix up the PCI ids for new memory map like the kernel one.. not + perfect but should be very safe... align some other kernel bits i810 + align with kernel + +commit 9c92b55953836589184f72f5a0c509f72af94786 +Author: Adam Jackson +Date: Mon Mar 20 21:40:54 2006 +0000 + + Bump driver date to reflect airlied's last fix. + +commit 6bb92ab086c7e21fe90b835f20e6ba493e988cf6 +Author: Dave Airlie +Date: Sun Mar 19 07:53:46 2006 +0000 + + fix issue in mga from kernel + +commit 8c8f937b3de12185e3c0041726a9f6fd5f3d21ff +Author: Dave Airlie +Date: Sun Mar 19 07:52:53 2006 +0000 + + make some functions static in via driver + +commit 38376c7fa66234107ab6d69b828eb4ca8a3ad0ea +Author: Roland Scheidegger +Date: Fri Mar 17 01:35:34 2006 +0000 + + Add missing pci ids for new radeons (most but not all are pcie, r420, + rv380, rv410), with the exception of the rs400 igps. Hopefully they no + longer lock up with new ddx, but no guarantees... (bug #5413) + +commit 14d1219442c679c754fcc4e27460610ae219951a +Author: Adam Jackson +Date: Wed Mar 15 01:02:54 2006 +0000 + + Avoid walking off the end of the hash table. (Coverity report #465) + +commit ea40d3dd41cb3c562caf404fead9fdaa0b97565c +Author: Dave Airlie +Date: Wed Mar 8 23:01:32 2006 +0000 + + Fix bug I reintroduced + +commit ef835973b2f26410f9c9d3abed3b3f4828a716c1 +Author: Dave Airlie +Date: Wed Mar 8 06:03:45 2006 +0000 + + fix some use before NULL check + +commit 4436ab86d8c0e1177bbec276c605d133e7c82ff0 +Author: Aapo Tahkola +Date: Tue Mar 7 01:08:35 2006 +0000 + + ia64 support for r300_scratch. (not tested) + +commit b3fdf9bb7acd023060e0dba07d3b439c3b64faef +Author: Aapo Tahkola +Date: Mon Mar 6 20:08:50 2006 +0000 + + Add general-purpose packet for manipulating scratch registers (r300) + +commit 02f76f41b12e1465db4e4a48c0b81977a8bd3d8d +Author: Thomas Hellstrom +Date: Wed Mar 1 22:22:25 2006 +0000 + + file xf86mm.c was initially added on branch drm-ttm-branch. + +commit 0f13b3e1b1765b150ffe42b759355687b040210e +Author: Thomas Hellstrom +Date: Wed Mar 1 22:22:25 2006 +0000 + + file xf86mm.h was initially added on branch drm-ttm-branch. + +commit 06e8bd2a0d668487f4124cde16629610f8f557ff +Author: Roland Scheidegger +Date: Sat Feb 25 09:51:15 2006 +0000 + + Add all radeon pci ids known by ddx, but only r350/rv350 and below (new + chips may be problematic). Leave the existing entries for new chips in + though. Remove ids not known by ddx (secondary ids, non-existant,...). + Correct some entries (name/family). Make the radeon family enum look + more alike the ddx/dri versions. See #5413 + +commit 9c0634bbadca0216749a336e587fd51b12307637 +Author: Dave Airlie +Date: Tue Feb 21 11:10:05 2006 +0000 + + set dma pages reserved + +commit abd3904bf0c5bcbf2f2ec117a3d2216dd5f830ef +Author: Dave Airlie +Date: Tue Feb 21 10:28:47 2006 +0000 + + use coherent memory for PCI allocations with COMP flag + +commit 22e41ef08338ae6dd59acbe6d4d8e50d83672816 +Author: Adam Jackson +Date: Mon Feb 20 23:09:00 2006 +0000 + + Formatting cleanup, dead code removal. Remove N() namespacing macro, + useless. Remove SIGIO handling functions as they're server-only and + properly belong in libdri. + +commit 0a211db23c0d7e22946aa25f22e9aeab6783b617 +Author: Dave Airlie +Date: Sun Feb 19 12:08:14 2006 +0000 + + experimental PCI DMA fixes use proper Linux interfaces + +commit 4c1c05ad96bd174d82ab94da7a0645bc448442f6 +Author: Dave Airlie +Date: Sun Feb 19 12:06:27 2006 +0000 + + missed a piece of benh patch + +commit a25667894a8b8cab1dc8a48994cd9a61ecaba152 +Author: Dave Airlie +Date: Sat Feb 18 05:43:19 2006 +0000 + + make some functions static from the kernel + +commit d75fa645ed03ee0e2ffddc629b050626ddde5776 +Author: Dave Airlie +Date: Sat Feb 18 05:30:03 2006 +0000 + + fix brace placement + +commit b2523e7aa103d7d0451ae460d4ab5c7556eebf8e +Author: Dave Airlie +Date: Sat Feb 18 04:18:45 2006 +0000 + + always enable and set master on pci device + +commit eb5666b089ac0defe9a8ae3d218c9d4a098f683b +Author: Dave Airlie +Date: Sat Feb 18 04:13:36 2006 +0000 + + clear i915 interrupts sources on server exit + +commit 7c18b2565ed3fc1952356967a1e057d86df6484a +Author: Dave Airlie +Date: Sat Feb 18 03:21:29 2006 +0000 + + add proper checking for bitblt multi + +commit 9fad101da95bfd37987b797020f71fe306c6f876 +Author: Dave Airlie +Date: Sat Feb 18 03:04:30 2006 +0000 + + add benh's memory management patch + +commit 08fafc424a6266fa5e3d6ba755dea22e384e9683 +Author: Dave Airlie +Date: Sat Feb 18 03:01:38 2006 +0000 + + fix build wrong function call + +commit 4791dc885619b1a6460c1fcf48f648945feea4d3 +Author: Dave Airlie +Date: Sat Feb 18 02:53:36 2006 +0000 + + major realigment of DRM CVS with kernel code, makes integration much easier + +commit 585f34c3e533cafd687beba161d6d0379b52bb47 +Author: Dave Airlie +Date: Sat Feb 18 02:38:07 2006 +0000 + + fix card unload + +commit ff9ecc09f98a345078554bac2992f96adde9038f +Author: Dave Airlie +Date: Sat Feb 18 02:34:53 2006 +0000 + + Fixup test for memory at end of memory space + +commit 659e9a091d3ea61d291d6e2f0fbfb20e685dbcbf +Author: Thomas Hellstrom +Date: Fri Feb 17 17:25:41 2006 +0000 + + via: Change via_drm.h versioning scheme after lenghty discussion on + unichrome-users. + +commit 75bf1c268fc56352631ddb10f8bedb5c9b2c8105 +Author: Thomas Hellstrom +Date: Fri Feb 17 16:54:37 2006 +0000 + + file i915_ttm.c was initially added on branch drm-ttm-branch. + +commit 292d4a5b28af80f24f0db0e85c93f8067ed47b26 +Author: Keith Whitwell +Date: Thu Feb 9 23:14:16 2006 +0000 + + Update the hardware breadcrumb in the sarea on irq reception so that + clients can avoid an ioctl waiting on fences that have already been + received. Would be even better if the hardware did the update itself. + +commit f99fc2c12d3cb36706700fb70ff5301f956d1cb8 +Author: Thomas Hellstrom +Date: Wed Feb 1 12:58:38 2006 +0000 + + file drm_mm.c was initially added on branch drm-ttm-branch. + +commit 07e1126bde7c4a9e9737894748822f98e914922f +Author: Alan Hourihane +Date: Thu Jan 26 12:14:09 2006 +0000 + + add missing name, desc, date, major, minor and patchlevel entries + +commit 1f0da9dacaa8a98958f9922729c0cf597a561399 +Author: Alan Hourihane +Date: Tue Jan 24 21:24:53 2006 +0000 + + fix an error message typo Unkown -> Unknown + +commit f19c9eecd115f5535b62a37a8ab79a2b3f73c5b0 +Author: Alan Hourihane +Date: Tue Jan 24 21:18:41 2006 +0000 + + other part of revert + +commit 788750fc8cb2647d616aad75b3255d497b356f36 +Author: Alan Hourihane +Date: Tue Jan 24 21:16:54 2006 +0000 + + put back some of Dave's code related to vblank support - accidentally + reverted. + +commit 3e8918adc8ba9405e9f496d50a3f4060b31d1dfb +Author: Thomas Hellstrom +Date: Tue Jan 24 14:08:05 2006 +0000 + + file Makefile.am was initially added on branch drm-ttm-branch. + +commit 8a9ecf45fa9be2879c4b0c08c8407a538d1be147 +Author: Thomas Hellstrom +Date: Tue Jan 24 11:20:05 2006 +0000 + + file drm_hashtab.c was initially added on branch drm-ttm-branch. + +commit 270cffbe43955033a54dd54695ca1108194e087e +Author: Alan Hourihane +Date: Mon Jan 23 10:05:22 2006 +0000 + + Fix CMDBUFFER path, add heap destroy and flesh out sarea for rotation + (Tungsten Graphics) + +commit 9a01593f1aeda40abc5815b70fff9f909702501c +Author: Aapo Tahkola +Date: Fri Jan 20 21:45:28 2006 +0000 + + Add support for texture cache flushes (R300_TX_CNTL) + +commit 534bfb3742459af8d9a30579d8f9b6ab18b475d0 +Author: Aapo Tahkola +Date: Fri Jan 20 21:30:07 2006 +0000 + + Sync from r300_reg.h from Mesa. + +commit e9732865b7c05f2930a0c8b1751aad7929a2f3a7 +Author: Alan Hourihane +Date: Thu Jan 19 14:14:06 2006 +0000 + + add Intel i945GM support + +commit d394c9fa082407591586856afbaeb0833f5a7534 +Author: Thomas Hellstrom +Date: Thu Jan 12 19:08:16 2006 +0000 + + via: direction bug in get_user_pages call in via_dmablit.c fixed. Bumped + minor since this causes the via DDX to fail with vlc video player. + +commit 2e0c281d1aabdf5b775a2f7de804d2f34a500124 +Author: Thomas Hellstrom +Date: Fri Jan 6 11:57:40 2006 +0000 + + via: Version via_drm.h Alter the drm_via_dmablit_t IOCTL arg. + +commit a019c10c303bb1b2741a1da5b582ae45977085a5 +Author: Thomas Hellstrom +Date: Fri Jan 6 11:52:01 2006 +0000 + + via: Last commit really required a bump of minor. Fix. + +commit 661004544c004090edfbb8541850303b4780b8b4 +Author: Thomas Hellstrom +Date: Fri Jan 6 11:19:06 2006 +0000 + + via: Combine PCI DMA transfers with stride==width (Idea from Luc + Verhaegen). A somewhat saner PCI DMA transfer size check. Fix some + typos. Bump patchlevel. + +commit 3f23f9b99db5d62fac6ab0f1e61f32f23ba5021b +Author: Dave Airlie +Date: Mon Jan 2 09:17:41 2006 +0000 + + nothing from VIA or S3 in this + +commit 2a9dbb2895c4ba78a6e7553fc0fb385f981b3d27 +Author: Dave Airlie +Date: Mon Jan 2 05:55:31 2006 +0000 + + make max minor more rational + +commit 92150972e5472cdf039c875dae4afee6613ee915 +Author: Dave Airlie +Date: Mon Jan 2 05:54:10 2006 +0000 + + use drm_cards_limit instead of cards_limit + +commit 781d96c61fdcc5bafe65053878d351100bf130e1 +Author: Dave Airlie +Date: Mon Jan 2 05:52:17 2006 +0000 + + use common read/write routines + +commit 8fef6fe4f02838447edbf6e99fd16df31a486772 +Author: Dave Airlie +Date: Mon Jan 2 05:43:04 2006 +0000 + + sparse cleanups + +commit bbcba83ef70013ea2e5daad86142d1fdc84939e4 +Author: Dave Airlie +Date: Mon Jan 2 05:39:19 2006 +0000 + + The radeon DRM wasn't passing sparse checking in the kernel, this fixes it + by adding a new kernel internal cmd buffer type, that has no userspace + members, and passes it around. + +commit dcbcc60864fbe592a949a1c250e1494e73504724 +Author: Dave Airlie +Date: Mon Jan 2 05:38:03 2006 +0000 + + align spacing with kernel + +commit 1ad5dfc369a4202d51fc471cd0050b299d1fab8b +Author: Dave Airlie +Date: Mon Jan 2 05:22:50 2006 +0000 + + whitespace cleanup/aligment with kernel + +commit b2be72c44468f67e37e434a1e30b811963274f9c +Author: Dave Airlie +Date: Mon Jan 2 03:44:23 2006 +0000 + + some fixes from linux kernel + +commit fb91c500bfee9777421be5706e0a3b3e5049d6de +Author: Dave Airlie +Date: Mon Jan 2 03:32:03 2006 +0000 + + complete fix for historic attribution + +commit 1d86c36655f3c5821e62a24d4a320b5bc0e1be64 +Author: Dave Airlie +Date: Mon Jan 2 03:30:57 2006 +0000 + + complete fix for attribution + +commit 42cd50fa905aea4fcdbab9ce39a54551a9a1baa9 +Author: Dave Airlie +Date: Mon Jan 2 03:25:49 2006 +0000 + + Realign via driver with changes in Linux kernel (mainly whitespace) + +commit 26462b9aa47179e724e78f0b3b1c86fd07f61d8d +Author: Eric Anholt +Date: Sat Dec 31 11:48:12 2005 +0000 + + Initialize sv.drm_dd_minor to "don't care" along with dd_major, to appease + valgrind. + +commit 7f2c7f9977d3e62c594d47ca8a5d7fefac2fc4de +Author: Eric Anholt +Date: Fri Dec 30 02:17:05 2005 +0000 + + Merge patch from jhb to catch up with FreeBSD-current vgapci master device + changes. + +commit 780e90e4a265532cf96c887267b80c691f016996 +Author: Dave Airlie +Date: Thu Dec 29 00:17:51 2005 +0000 + + add radeon card type get param so userspace can avoid walking PCI + +commit b14d15ac41c0af5093e37a47124f0995e10c3016 +Author: Dave Airlie +Date: Wed Dec 28 23:49:59 2005 +0000 + + Add vblank support to i915 DRM.. + +commit 4c988520a851ed42c1dd9e9f7cda2e79f5a23fc7 +Author: Dave Airlie +Date: Wed Dec 28 22:36:51 2005 +0000 + + step back one reported bugs against that patch + +commit 274fdf482ba5b33167213f76e6c17943ddf51985 +Author: Dave Airlie +Date: Fri Dec 16 08:02:17 2005 +0000 + + fix radeon memory mapping from Ben Herrenschmidt + +commit e7b0176584bc116faadcb59b7086a99e24651eb6 +Author: Dave Airlie +Date: Fri Dec 16 07:59:13 2005 +0000 + + Lindent some via files + +commit 2911edaed70b164c5886ee4f71df769c5e02e0c0 +Author: Eric Anholt +Date: Mon Dec 5 10:53:06 2005 +0000 + + Remove driver.device_is_agp code duplicated in drm_device_find_capability, + when it really wanted to live in drm_device_is_agp. + +commit 0b4fdc81d15c1ff8acfe6fcdfcdd58a13fb3696e +Author: Dave Airlie +Date: Mon Dec 5 01:11:20 2005 +0000 + + add texrect support for r300 + +commit be16e93537d746365a43479de3a997af7969bb84 +Author: Dave Airlie +Date: Sun Dec 4 01:24:23 2005 +0000 + + Fix from SuSE for issue with context creation failure + +commit f5a9f27bf6c831f244bc27f82ed49f35d832178e +Author: Eric Anholt +Date: Fri Dec 2 23:55:21 2005 +0000 + + Add RV410 X700PRO PCI ID + Submitted by: Adam K Kirchhoff + +commit 20fcbae5ac86b2d10b23253245f5e88b78d2c76f +Author: Eric Anholt +Date: Fri Dec 2 23:41:47 2005 +0000 + + Finish the last bits necessary to get the i915 DRM port working on FreeBSD + Submitted by: Alexey Popov + +commit 422002dc8434061729b1558ac846648041c46ab3 +Author: Eric Anholt +Date: Fri Dec 2 08:47:04 2005 +0000 + + FreeBSD PR kern/85479: Restore the enabling of debugging by default by the + DRM_DEBUG kernel option. It remains controlled by hw.dri.*.debug no + matter what. + +commit 7d735a8c9fde5fe4401067791926bdae16473587 +Author: Adam Jackson +Date: Wed Nov 30 18:44:54 2005 +0000 + + Bump package and DSO numbers to 2.0 to reflect 32/64 ABI change + +commit f28dddb5515cb1c16f8c29e025195ea29d9f01d4 +Author: Adam Jackson +Date: Wed Nov 30 03:51:46 2005 +0000 + + Resync from Xorg head: conditional include of xorg-config.h + +commit ea08b613bdc496b0e1aa3b723f8462d2c40ed8e5 +Author: Adam Jackson +Date: Wed Nov 30 02:55:14 2005 +0000 + + Resync from Xorg head (Bug #3815, GNU/kFreeBSD hack) + +commit b3189730e7b0e574a28bd4947c407457cec4f7c8 +Author: Adam Jackson +Date: Tue Nov 29 21:10:59 2005 +0000 + + Add TODO based on my email from a while ago + +commit 6941b375e86542d669366a45553ec536f9d98e48 +Author: Adam Jackson +Date: Tue Nov 29 20:03:38 2005 +0000 + + Remove redundant #ifdef stanza + +commit 48198970ce449165fe1c7294108ca3afc775563d +Author: Adam Jackson +Date: Tue Nov 29 20:02:34 2005 +0000 + + Error checking for drmStrdup (Tilman Sauerbeck) + +commit 7ede209ce0cbbc65f79d02e2cc43cfcb3abb6e99 +Author: Dave Airlie +Date: Tue Nov 29 09:50:47 2005 +0000 + + fixup xf86drm.c for new headers + +commit 0db80529d540fabd148275f8f9c999615153edbe +Author: Dave Airlie +Date: Tue Nov 29 09:46:27 2005 +0000 + + Fix from Hugh Dickins for consistent mapping + +commit 645e2d411d4cb79db307351169413004d8b5a2ea +Author: Dave Airlie +Date: Tue Nov 29 09:19:20 2005 +0000 + + fixes from Egbert for 64bit + +commit c6344e8df5a6f2010c691bcd8aed0241a3426585 +Author: Eric Anholt +Date: Mon Nov 28 23:10:41 2005 +0000 + + Assert an MIT copyright on sis_drm.h, since one was lacking and I created + that particular file. Its contents have changed a good bit since the + original sis code, and the original sis code didn't care much about + attribution since it routinely disclaims Precision Insight/VA Linux + from responsibility. Also, adjust formatting around license headers + (have a comment open immediately before the "Copyright" line, not as a + runon of any previous comments) for automatic processing into FreeBSD, + where /*- is used to signal the beginning of license headers for + automatic compilation of license lists. + +commit ec0ef9a78d0205ff771fe05d78d7a67462abbfd2 +Author: Adam Jackson +Date: Mon Nov 28 22:18:12 2005 +0000 + + remove xf86drmCompat.*, unused since about XFree86 4.2. + +commit 1835dff04a69509c0ea5fdb94abe0eaa61e7ab5a +Author: Eric Anholt +Date: Mon Nov 28 21:15:46 2005 +0000 + + Fix AGP support guessing: Implement the same bridge checking in the MGA + driver as Linux uses, and actually use the driver's device_is_agp if + available (hopefully fixing i915). + +commit 0472ac5d117908a4ef612722960411c58e824999 +Author: Brian Paul +Date: Mon Nov 28 17:33:01 2005 +0000 + + fix mem leak in HashHash() (bug 5171) + +commit a5747964ec29ece7cccb981330e073748f2fd447 +Author: Thomas Hellstrom +Date: Wed Nov 16 10:55:53 2005 +0000 + + Fixed long standing 64-bit bug in via memory manager. Bumped via date and + patchlevel. + +commit c8261e3d2486050dcd76fb769f6806982260df96 +Author: Thomas Hellstrom +Date: Tue Nov 15 11:20:47 2005 +0000 + + Loosen via dmablit alignment checks somewhat. Adapt stride check to maximum + sceen size for EXA. + +commit c575b7e19ec83e663af91b431ac8c0a9e16a3a5d +Author: Eric Anholt +Date: Tue Nov 15 09:22:09 2005 +0000 + + Fix compiling and reenable build of i915 driver. + +commit 19c5c56779250e5615a88e3581dc3bd89598b9be +Author: Eric Anholt +Date: Tue Nov 15 04:37:51 2005 +0000 + + Fix Savage DRI without ShadowStatus NO by allowing the shadow area to be + mapped. + +commit b5d71f63cdced53a8b492c3269e966088b8a3b45 +Author: Dave Airlie +Date: Fri Nov 11 12:23:18 2005 +0000 + + enable i915 32/64 bit ioctls + +commit 224ebd2c8d5916bdc782a60542ac04b86320a624 +Author: Dave Airlie +Date: Fri Nov 11 10:56:31 2005 +0000 + + RV200 < R200 + +commit eff1b8fbdf7a4251998a75a93069c56f7fc1fd78 +Author: Dave Airlie +Date: Fri Nov 11 10:52:23 2005 +0000 + + i810 should be fine with i810.. no idea what this crack is .. + +commit 97528041dfaa26b95c1ff8c86e66f7071d5eb9f7 +Author: Dave Airlie +Date: Fri Nov 11 10:02:10 2005 +0000 + + fix up radeon whitespace + +commit cc1a4dd856a00a041d9321ca2dd6f996f90cfdd8 +Author: Eric Anholt +Date: Fri Nov 11 09:36:58 2005 +0000 + + Fix breakage from the move of driver ioctl externs to header files. + +commit cd4a9ad8e2d7667ea5eff9f1f54c0aca68d40a9e +Author: Dave Airlie +Date: Fri Nov 11 09:21:05 2005 +0000 + + whitespace align with kernel + +commit 3eb577c7c52b560cc3fa9dcf5d5a02b8b3edcef7 +Author: Dave Airlie +Date: Fri Nov 11 09:20:34 2005 +0000 + + mixing breaks in r128 driver.. fixed in kernel + +commit 59924b2f409ac2e6d48c0903f858d208d30097e6 +Author: Dave Airlie +Date: Fri Nov 11 09:10:06 2005 +0000 + + copy correct Kconfig + +commit a204d5acb224eec2a9abcac73fb48f20819ea593 +Author: Dave Airlie +Date: Fri Nov 11 09:09:03 2005 +0000 + + realign whitespace with kernel + +commit cec83bf6d3fc42a83705e72b02dda0a3001ecaca +Author: Dave Airlie +Date: Fri Nov 11 09:07:08 2005 +0000 + + remove extra spaces + +commit 36356df3cbca8e7e703afadf91046214d7755a07 +Author: Dave Airlie +Date: Fri Nov 11 08:59:57 2005 +0000 + + A bunch of create_proc_dir_entry() calls creating directories had crept in + since the last sweep; converted to proc_mkdir(). + From: Al Viro (via kernel) + +commit ea07fefcbf6a07048bde6e25af6b891d51bd6f9e +Author: Dave Airlie +Date: Fri Nov 11 08:42:36 2005 +0000 + + convert to use __set_current_state, align some header includes + +commit 33fbf8b7e2a75237d9d8f4faa71d1776f8a6bbc3 +Author: Dave Airlie +Date: Fri Nov 11 08:07:11 2005 +0000 + + whitespace align closer with kernel + +commit 9a91674d453fab1fbddc6225f5aa4f7ff7484f91 +Author: Dave Airlie +Date: Fri Nov 11 07:45:46 2005 +0000 + + cleanup ioctl/max_ioctl to use header file for extern symbols + +commit b84daa8f326c1120728bb912cdf6a80524b0a8fa +Author: Dave Airlie +Date: Thu Nov 10 10:14:48 2005 +0000 + + Fix cpu_to_le32 same as kernel not sure it is correct for ppc + +commit fb22dfbfc1cf04bc5f54603a88c244ec018bced6 +Author: Dave Airlie +Date: Thu Nov 10 10:13:25 2005 +0000 + + cleanup / whitespace align with kernel + +commit 6481a2e4cda67732ce7c6fe30aa4dc50d3cc7ed0 +Author: Eric Anholt +Date: Tue Nov 8 21:40:03 2005 +0000 + + Correct a LOR issue on FreeBSD by allocating temporary space and doing a + single DRM_COPY_FROM_USER rather than DRM_VERIFYAREA_READ followed by + tons of DRM_COPY_FROM_USER_UNCHECKED. I don't like the look of the + temporary space allocation, but I like the simplification in the rest + of the file. Tested with glxgears, tuxracer, and q3 on a savage4. + +commit c7af46cf7d464ff89c64ab864fcd2af51d462812 +Author: Eric Anholt +Date: Tue Nov 8 21:36:54 2005 +0000 + + Correct another LOR issue with resource allocation. This leaves the + drm_get_resource_* resource allocation a little racy, but they're + getting called at either X Server startup or driver load, so it's + serialized anyway. + +commit a10d8178e32528e0fd8a7afa24e71a35b1c0582d +Author: Eric Anholt +Date: Tue Nov 8 20:25:00 2005 +0000 + + Initial port of savage to FreeBSD for the AGP and !ShadowStatus case. Adds + drm_mtrr_{add,del} for handling the MTRR setup. Still has a LOR issue + with DRM_VERIFYAREA_READ/DRM_COPY_FROM_USER_UNCHECKED in savage_bci.c + -- this won't work with the fine-grained locking in use, and just doing + a single copyin to a temporary will probably work fine. Also note that + the module leaks approximately 4 kb on unload. + +commit 2c6308fe54c10075379cb00506d5519e0ced1076 +Author: Eric Anholt +Date: Tue Nov 8 09:02:02 2005 +0000 + + Correct a LOR on FreeBSD by allocating a temporary buffer and doing a + single COPY_FROM_USER into it, rather than VERIFYAREA followed by many + COPY_FROM_USER_UNCHECKEDs. + +commit 4b2235d2e089a512b26ecd66ae42ea279fbb1df2 +Author: Eric Anholt +Date: Tue Nov 8 06:11:55 2005 +0000 + + Correct a LOR related to the PCI resource allocations by simply moving the + uninit to unload time rather than lastclose. + +commit 71f9b7357cb3d4ea7bb5b396840de3985bc13ad4 +Author: Eric Anholt +Date: Tue Nov 8 05:29:26 2005 +0000 + + Fix FreeBSD DRM for latest MGA changes to agp support, which cleans things + up a good bit, I think. Also, remove the agp_uninit() function which + has lain around as a noop for years now. The FreeBSD DRM is now all + compiling, with the exception of via. One known sleeping-with-lock-held + issue remains. + +commit 1a256df4804e4e987f81226a5d8e0573363607ee +Author: Eric Anholt +Date: Tue Nov 8 02:38:01 2005 +0000 + + Catch FreeBSD up to the pcie gart changes. Required minor modification to + radeon_cp.c to use a drm_local_map_t-type mapping (drm_core_ioremap + rather than drm_ioremap), which contains private device mapping + information on BSD. I also changed the ati_pcigart interface to use + "void *" for pointers to kva rather than "unsigned long". While PCIGART + support appears to be broken on FreeBSD currently, I think this is not + new, and BusType PCI remains working on my r100 in Linux. + +commit 145b23b55220bdfc6639d3279ad96310faa650a3 +Author: Eric Anholt +Date: Tue Nov 8 01:12:08 2005 +0000 + + Correct a recursion on non-recursive mutex in drm_addmap from radeon's + firstopen, by making drm_addmap require the drm device lock to be held. + Also, make matching of kernel maps match linux by requiring shm matches + to have the contains_lock flag set if the offset doesn't match. + +commit 3fce085e13d6559adaed98420c35a1313636cff5 +Author: Alan Hourihane +Date: Mon Nov 7 13:17:41 2005 +0000 + + Fix bug #4908 for now. Alternative is highlighted in this bug report as the + better future direction. + +commit 900a7e4c364d86a10dcce535f0533dac7a7a97aa +Author: Eric Anholt +Date: Sun Nov 6 06:32:25 2005 +0000 + + Re-disable the via driver while it's broken on BSD. + +commit 39615ec06e8ca9280b4feefc42e008c9795541bd +Author: Ian Romanick +Date: Thu Nov 3 00:38:25 2005 +0000 + + Converts the remaining drm_agp_foo functions to be a drm_agp_foo and + drm_agp_foo_ioctl pair. Modifies the MGA DRM to use the drm_agp_foo + functions instead of the drm_foo_agp functions. The drm_foo_agp + functions are no longer exported by drm.ko. + Ensures that dma->seg_count and dma->page_count are properly set in + drm_addbufs_{agp,sg,fb}. drm_addbufs_pci was already correct. + Ensures that mga_do_agp_dma_bootstrap correctly sets agp_buffer_token. + At this point PCI DMA is still broken. + Xorg bug: #4797 Reviewed by: Dave Airlie, Eric Anholt Signed-off-by: Ian + Romanick + +commit 10ec05793f9b0ca47ce0a07aa445f8799d2ceba1 +Author: Adam Jackson +Date: Mon Oct 31 17:48:11 2005 +0000 + + Bump to 1.0.5 for new via header + +commit bcbf5ff797f061e84223556bdcf5f6a045516355 +Author: Dave Airlie +Date: Sun Oct 23 04:07:50 2005 +0000 + + we don't use this stuff anymore .. remove 1k buffer from driver .. + +commit b63b771285a91e85c2dc7daf77191c423fb4d2a5 +Author: Thomas Hellstrom +Date: Sat Oct 22 15:12:05 2005 +0000 + + via: Sync via_drm.h with 3D driver. Bump via patchlevel and date. + +commit 79f30e79ec5b05b2052988e3e6edba8624e3d1c5 +Author: Adam Jackson +Date: Sat Oct 22 05:50:22 2005 +0000 + + Bug #328: Silence read-from-uninitialized warnings in DRM_CAS on Alpha. + (David Dawes) + +commit 00d4957d62607873c2bf0c506fab4ff6c384b414 +Author: Alan Hourihane +Date: Fri Oct 21 08:59:56 2005 +0000 + + Don't set MTRR's for intel hardware + +commit 6cd0282f6440fac661dd92a6e96e4fd82e4489b4 +Author: Dave Airlie +Date: Thu Oct 20 22:41:26 2005 +0000 + + fix G550 cards + +commit 419fc9930b5145e61c5b77c6e8f76c40af62fbc4 +Author: Adam Jackson +Date: Thu Oct 20 17:55:02 2005 +0000 + + Bump to 1.0.4. + +commit d74376779f0b421478072fa7657d4f31a5e16c12 +Author: Adam Jackson +Date: Thu Oct 20 17:53:02 2005 +0000 + + Remove the remaining references to Xlib. libdrm is totally independent now. + +commit ea83db57e3625d54ee206561803a966d074d8296 +Author: Adam Jackson +Date: Thu Oct 20 17:51:57 2005 +0000 + + via and r300 still need installed reg headers. + +commit cf8ce0888acf34afb5705faf1b6cb8d2f2945402 +Author: Thomas Hellstrom +Date: Thu Oct 20 17:37:32 2005 +0000 + + via: PCI DMA bugfixes and DOS due to too many mapped pages checks. + +commit b3631ba02cc55e0f4a4212d7075de62689bd1f43 +Author: Adam Jackson +Date: Thu Oct 20 17:32:31 2005 +0000 + + Remove bogus Xlib dependency. + +commit 763d726c439537ad3f8b1b668cf55b799a6f36db +Author: Dave Airlie +Date: Thu Oct 20 02:35:08 2005 +0000 + + dma access also needs some work + +commit 727e88c4f4e55be435e47759bb3b1e75fc42d43d +Author: Dave Airlie +Date: Thu Oct 20 01:54:38 2005 +0000 + + the old init path needs to set WAGP_ENABLE by default + +commit 4b3ee6c50ed8b9382d3f253669470a5c82e8f0bc +Author: Ian Romanick +Date: Fri Oct 14 05:01:19 2005 +0000 + + Doig a full clean up from mga_do_dma_bootstrap when + mga_do_agp_dma_bootstrap fails causes problems if + mga_do_pci_dma_bootstrap succeeds. This commit makes it possible to do + a "minimal" clean up instead. I'm still trying to figure out what is + causing the failures in mga_do_agp_dma_bootstrap... + Signed-off-by: Ian Romanick + +commit 1505e316afc68da0167c1d2db1a862ac580c65f1 +Author: Ian Romanick +Date: Fri Oct 14 01:25:38 2005 +0000 + + Fixed a cut-and-paste bug that could cause an oops in mga_do_cleanup_dma + when mga_do_init_dma fails. Still trying to determine why + mga_do_init_dma is failing. + Signed-off-by: Ian Romanick + +commit 725e329cb2aa93812e3e622a6cf2c92c0fffde9d +Author: Adam Jackson +Date: Thu Oct 13 21:03:31 2005 +0000 + + Better pkgconfig-fu: -ldrm in Libs: + +commit 0a24095cd6dff3f4934c87feb34cee4f0350c07d +Author: Dave Airlie +Date: Thu Oct 13 11:21:31 2005 +0000 + + Add X300 RV370 + +commit 308b40ea094d89660c25bf1dc16d70f5d3cc66c2 +Author: Ian Romanick +Date: Tue Oct 11 17:34:49 2005 +0000 + + The Linux 2.6.9 (and earlier) fops structure does not contain a + .compat_ioctl field. This change makes the DRM build on those kernels. + Signed-off-by: Ian Romanick + +commit 62a467303408286deef97b288ec286e21dda3761 +Author: Adam Jackson +Date: Thu Oct 6 23:31:29 2005 +0000 + + Skeleton nv drm driver, to enable DMA in EXA. (Lars Knoll, minor updates by + me) + +commit 908ad0ed96c6d1be567bff7332ec38d6b4b8db0a +Author: Dave Airlie +Date: Thu Oct 6 23:08:58 2005 +0000 + + remove version not used anymore + +commit ace8b912fbeaae9195892762a375f0ae1fbf558f +Author: Dave Airlie +Date: Fri Sep 30 09:09:03 2005 +0000 + + fix header this is now a c file + +commit 483dc9bb9298588ccd3521c8f95a8032939fbd08 +Author: Dave Airlie +Date: Fri Sep 30 07:10:16 2005 +0000 + + now I've lindented kernel it might be useful again + +commit f42cdc8dcb4ae85c15580dd0bc2a07495d8f049e +Author: Dave Airlie +Date: Fri Sep 30 06:41:10 2005 +0000 + + Add support to turn writeback off via radeon module option + +commit 6ff57e2d7cd0b9b513070f72ffd894e8d6f57149 +Author: Dave Airlie +Date: Fri Sep 30 06:35:09 2005 +0000 + + fix pci overriding from userspace + +commit 856bdf0f673510c33a23b4c4d4fff91d95eb149e +Author: Dave Airlie +Date: Fri Sep 30 03:39:02 2005 +0000 + + fixup bens fix so it works.. + +commit 68b4ad3cce6e184549988d48e85985507c8dc5ed +Author: Dave Airlie +Date: Fri Sep 30 03:14:18 2005 +0000 + + Add Bens fix for radeon maps on ppc + +commit 9d24d951f7894aacf589892b5a6848d9961339b1 +Author: Thomas Hellstrom +Date: Sun Sep 25 14:38:07 2005 +0000 + + via: fix stray error printout message. + +commit 903e5701ffbc613373f3ad3c3b7e14d493ec9dbe +Author: Thomas Hellstrom +Date: Sun Sep 25 12:54:12 2005 +0000 + + Add the via PCI DMA blit code. + +commit d4dec1db808095f42b6fd776b2582c6f27bebb9a +Author: Dave Airlie +Date: Sun Sep 25 08:54:31 2005 +0000 + + hopefully fix server recycling on PCIE + +commit c1b7df95be1194efcfd0d9ffd63da1ce27272565 +Author: Dave Airlie +Date: Sun Sep 25 05:19:06 2005 +0000 + + add __ATTR + +commit 3a0230ef9c933e07246e65a542681fc9549514f8 +Author: Dave Airlie +Date: Sun Sep 25 03:09:51 2005 +0000 + + use linux kernel macros don't make our own + +commit cd16d9685678dbb7e3d1442e62357d0b5bb98008 +Author: Dave Airlie +Date: Sun Sep 18 09:31:06 2005 +0000 + + remove pci_find_class use for alpha + +commit f5c81b262020200d4b7970d12b6c202ae0f8faee +Author: Dave Airlie +Date: Sat Sep 17 04:16:51 2005 +0000 + + compat for pci_pretty_name + +commit acb6abcc6d862224f3e91ede82909c099efdfb1f +Author: Dave Airlie +Date: Mon Sep 12 06:21:24 2005 +0000 + + update autogen from xserver tree + +commit 4b2a94db46dc4814e03d14e25ab0aed41e28a375 +Author: Eric Anholt +Date: Mon Sep 12 05:35:51 2005 +0000 + + Fix the spelling of DRM_AUTH so that the bsd core stuff builds again. Next + up is pcigart. + +commit f1276d3b4338bdfd2173bb76e931334da6075784 +Author: Dave Airlie +Date: Mon Sep 12 04:37:52 2005 +0000 + + add some pci express chips + +commit ba8f4fb778e88dfa275e35f0d2e01e4ca99e65bd +Author: Dave Airlie +Date: Mon Sep 12 04:35:31 2005 +0000 + + make PCI Express work on 64-bit machines, thanks to Alex Deucher (agd5f) + +commit 3f6fcbc6766e3032bfb0421675169cc2e732e399 +Author: Dave Airlie +Date: Sun Sep 11 09:58:19 2005 +0000 + + back out change as gart is now in framebuffer for PCIE + +commit 5565a00916122bb131ce89a2ca8f7f81ddc9387c +Author: Dave Airlie +Date: Sun Sep 11 08:51:23 2005 +0000 + + Add GART in FB support for ati pcigart, and PCIE support for r300 + +commit 29326c1a8990ffb512a891d8deecf4cd4046915c +Author: Dave Airlie +Date: Sun Sep 11 07:08:46 2005 +0000 + + fix makefile bug + +commit 53c8037786a64eede00a8944ccaa42768609b66b +Author: Roland Scheidegger +Date: Fri Sep 9 22:35:49 2005 +0000 + + Add support for GL_ATI_fragment_shader, new packets R200_EMIT_PP_AFS_0/1, + R200_EMIT_PP_TXCTLALL_0-5 (replaces R200_EMIT_PP_TXFILTER_0-5, 2 more + regs) and R200_EMIT_ATF_TFACTOR (replaces R200_EMIT_TFACTOR_0 (8 consts + instead of 6) + +commit c8b5a9f8cc3f55faf135be70e7ff0f7f062ca408 +Author: Vladimir Dergachev +Date: Fri Sep 9 12:53:44 2005 +0000 + + Add another R300 PCI id. Submitted by: Daniel Estévez + +commit 0d346a07a87ef7bf6b77adda7c776e2ac5849266 +Author: Dave Airlie +Date: Sat Sep 3 03:27:14 2005 +0000 + + convert ioctl flags to use flags instead of separate ints + +commit 80ed93c7bf9f8c8d42cbcc26e82020cfcd92fb77 +Author: Dave Airlie +Date: Sat Sep 3 02:21:22 2005 +0000 + + check is the map containing the lock + +commit 22ec8ebb17d959486e4a865b17115e609eb688ee +Author: Eric Anholt +Date: Fri Aug 26 23:27:19 2005 +0000 + + - Don't try to allocate mappings of less than a PAGE_SIZE in MGA DMA code. + - Comment out the "is this mapping/bufs in allocated AGP" bits in BSD + because they break mga (which uses AGP allocation that doesn't track + entries). It's not a security issue when we still have the related + ioctls marked root-only. + - Apply some power-of-two alignment restrictions to hopefully avoid some + panicing in bad cases of drm_pci_alloc() on FreeBSD. + - Add verbosity to some error handling that I found useful while debugging. + +commit c425ad1a34439d019edd589c32a7161d01b4d822 +Author: Eric Anholt +Date: Fri Aug 26 20:56:11 2005 +0000 + + Previously, drm_get_resource_start() and drm_get_resource_len() would + allocate the resource RF_ACTIVE, pull out the appropriate value, and + return it. However, allocating large framebuffers RF_ACTIVE would run + the system out of KVA, and this also left open the possibility of the + resource getting moved after getting the offset. Instead, when either + of these are called, allocate the resource if it isn't allocated + already (non-RF_ACTIVE) and store it in the DRM device, to be cleaned + up on lastclose. + +commit 5105f9ea59179c7129d3bf97734eb37e26ec68b0 +Author: Eric Anholt +Date: Fri Aug 26 19:07:03 2005 +0000 + + Fix a lack of parenthesis in macro usage that showed up with INVARIANTS + turned on, i.e. in a kernel build. + +commit 55bea952b326b88f2fa6502321f605f96ee9be66 +Author: Eric Anholt +Date: Fri Aug 26 00:16:01 2005 +0000 + + [1] Fix BSD DRM for the nonroot changes. [2] Don't attempt to acquire the + DMA lock in a non-DMA driver, as it will be uninitialized. + Submitted by: [1] jkim (minor changes by me) + +commit 9942cad1f6078c24bb69a126795635b2f34d65b5 +Author: Eric Anholt +Date: Thu Aug 25 23:11:28 2005 +0000 + + Add missing .cvsignore files for autotoolery. + +commit 7d5130d8fb24538e555689fb8e98f767406e0a2c +Author: Eric Anholt +Date: Thu Aug 25 02:59:21 2005 +0000 + + Include appropriate CFLAGS to find X headers, needed to build libdrm. + +commit 5a52e533e1f42072b91544fdbca785ed2c9ad76b +Author: Dave Airlie +Date: Tue Aug 23 04:10:50 2005 +0000 + + add options for x86_64 and amd will small letters + +commit 1163975f090725a0f2cddb313cc23d7e424f766f +Author: Alan Hourihane +Date: Mon Aug 22 09:52:18 2005 +0000 + + remove the README in the linux-2.6 directory + +commit 01e4364a8fec6cb2c11de4e5cb7def10b58348ae +Author: Alan Hourihane +Date: Mon Aug 22 09:50:12 2005 +0000 + + remove i915_pm code as it causes too many issues with current software + suspend, and the DDX driver re-inits the board successfully anyway. + +commit 54947504ac70e135a38f303420b7b66eed8c23a3 +Author: Dave Airlie +Date: Sun Aug 21 11:07:03 2005 +0000 + + allocating the PCIE table from GFP_DMA seems to stop it NMI'ing + +commit e2dc70593f0d12cecac747c9044c6fb130ad6af8 +Author: Dave Airlie +Date: Sun Aug 21 03:04:32 2005 +0000 + + We don't need to install all the internal headers files only drm.h and + *_drm.h have user space interfaces + +commit 5c4ce6d93c93032dad7f5a60f8b7867980d3f7f5 +Author: Dave Airlie +Date: Sat Aug 20 07:38:11 2005 +0000 + + add x86_64 to the list as well + +commit d12768f79ac2dbf9e31a32107f6e5379cb9484e4 +Author: Dave Airlie +Date: Sat Aug 20 07:33:07 2005 +0000 + + remove checks that make ppc64 not work properly... also fix ppc64 check.. + we should be safe doing this.. + +commit 2e9bd9ac18e17e91bec4e3b777503a53a3faf952 +Author: Dave Airlie +Date: Sat Aug 20 07:12:45 2005 +0000 + + add powerpc64 to the list of archs that this test doesn't make sense on + +commit 017174085f162484277b2f798d35d3436a26e005 +Author: Adam Jackson +Date: Sat Aug 20 03:32:09 2005 +0000 + + Fix silly install issue by moving the header install rules for shared-core + into shared-core/Makefile.am. Bump to 1.0.3. + +commit 1abd165f5bd627a6eebf333135d5a1b5a32d7aa3 +Author: Adam Jackson +Date: Fri Aug 19 20:14:10 2005 +0000 + + Add r300_reg.h. Bump to 1.0.2. + +commit 8ac2fcb193c79ea8b2bd4d99b595d56f557c15f3 +Author: Dave Airlie +Date: Wed Aug 17 22:59:00 2005 +0000 + + add agp buffer token + +commit 7779659390afc5608655e617aa3f2c88b7e071c5 +Author: Dave Airlie +Date: Wed Aug 17 10:48:38 2005 +0000 + + revert reversion of a part of a patch from Jon, that I did last night while + checking things in in my sleep + +commit 279e7c113ced4f2f4dcc14801aa3084698a417bd +Author: Dave Airlie +Date: Wed Aug 17 00:14:18 2005 +0000 + + commit toggle switch to make Linux drm_handle_t unsigned int + +commit 91c9c847299a1f27c92f8663902fcee72a65f9e4 +Author: Eric Anholt +Date: Tue Aug 16 17:20:18 2005 +0000 + + Remove the long-stale BSD non-core bits. + Prodded by: CVS breakage resulting in complaints about this directory. + +commit 7af0186f4ccef285c2158770781ebfc3a26ddd66 +Author: Dave Airlie +Date: Tue Aug 16 12:51:57 2005 +0000 + + add Egberts 32/64 bit patch (its in kernel already...) + +commit 8c21b783c3e38aa2c2d16e11ec01cf695f8e7f8a +Author: Eric Anholt +Date: Mon Aug 15 18:07:12 2005 +0000 + + Port the VIA DRM to FreeBSD. Original patch by Jake, with some cleanup by + me to match other drivers and avoid ifdeffing. The linux via_drv.c will + be moved from shared-core to linux-core soon by repocopy. + Submitted by: Jake Burkholder Tested by: unichrome + +commit 4f5961eeeee806a2d6e08e159c56262d4f060cba +Author: Thomas Hellstrom +Date: Sun Aug 14 09:52:09 2005 +0000 + + VIA bugvixes by Joris van Rantwijk Initial commit. + +commit 4050f5066a706bda74ed93ab858bbc9fc0b1477b +Author: Eric Anholt +Date: Fri Aug 12 17:18:08 2005 +0000 + + Fix build after linux-side checkin of master/root-only split. Still only + cares about root on the BSD side, but should be secure. + +commit cdf49e57329803709fe26cbc103c318bc9292ddb +Author: Thomas Hellstrom +Date: Fri Aug 12 14:19:33 2005 +0000 + + Reverting the previous via security-fix commit, since the assumption of + contexts registered with the callers filp was wrong. + +commit 4931d785ed0bf9f75200ed530c4061efe2d24a63 +Author: Thomas Hellstrom +Date: Thu Aug 11 13:05:12 2005 +0000 + + Missing symbol export from previous via context check commit. + +commit d5e8ab13ff5399531eb1927dcd4535aeeed18c94 +Author: Thomas Hellstrom +Date: Wed Aug 10 19:46:46 2005 +0000 + + Security fix on via: Checking that the specified context belongs to the + caller on fb / agp memory alloc and free. Otherwise malicious clients + can register allocations on other clients or free memory used by other + clients which will lead to severe memory manager inconsistensies. + +commit 0d81954b0e4430428eddc00c6097e614e51ba0b1 +Author: Jon Smirl +Date: Tue Aug 9 01:40:45 2005 +0000 + + Make sure savage has 3rd ioctl parameter + +commit 3a61e9f96ce50101f05a5ca2cb0e34b2aa001b55 +Author: Dave Airlie +Date: Sun Aug 7 05:37:25 2005 +0000 + + make some functions static in the savage drm driver + +commit 1cbe97eea1a7ffcbf19767e83dce09da56c454f6 +Author: Dave Airlie +Date: Sun Aug 7 05:32:06 2005 +0000 + + fix ioctl in r128 drm direction from Egbert Eich. + +commit fcdb53867df4937a55e4a771328fa5a9388aee44 +Author: Dave Airlie +Date: Sun Aug 7 04:38:11 2005 +0000 + + remove bus address + +commit 99c3f88c69e5a9ac7cddd0bb24e8be3415616656 +Author: Dave Airlie +Date: Fri Aug 5 13:04:21 2005 +0000 + + Fix bug in return to userspace resctx code + From: Egbert Eich + +commit c789ea1521ac9e935f2a1c6c043619d89bae9c16 +Author: Eric Anholt +Date: Fri Aug 5 03:50:23 2005 +0000 + + Rename the driver hooks in the DRM to something a little more + understandable: preinit -> load postinit -> (removed) presetup -> + firstopen postsetup -> (removed) open_helper -> open prerelease -> + preclose free_filp_priv -> postclose pretakedown -> lastclose + postcleanup -> unload release -> reclaim_buffers_locked version -> + (removed) + postinit and version were replaced with generic code in the Linux DRM + (drivers now set their version numbers and description in the driver + structure, like on BSD). postsetup wasn't used at all. Fixes the savage + hooks for initializing and tearing down mappings at the right times. + Testing involved at least starting X, running glxgears, killing + glxgears, exiting X, and repeating. + Tested on: FreeBSD (g200, g400, r200, r128) Linux (r200, savage4) + +commit 143622a987745ca2084f7a188e9993ffd5f28fe3 +Author: Jon Smirl +Date: Thu Aug 4 14:48:43 2005 +0000 + + Implement permanent sarea maps + +commit 28e123eb3af21b1ea73bdc2176220bb669118e09 +Author: Jon Smirl +Date: Thu Aug 4 14:39:25 2005 +0000 + + Tighten up AGP security. Verify that all uses of AGP are done inside + buffers that have been allocated from AGP. This includes some new + capable(CAP_SYS_ADMIN) checks, these functions are also protected by + the root requirement on the IOCTL macros. + +commit bb9502ab01e7258c021f161b3caac8a508979dd8 +Author: Jon Smirl +Date: Thu Aug 4 13:59:48 2005 +0000 + + Mark some radeon init variables deprecated. These used to be passed in but + the driver already knew their correct value. For example the physical + address of the framebuffer and registers. + +commit ea2c7a895d6456c83ee8489e1db7ae5a800f0abf +Author: Jon Smirl +Date: Thu Aug 4 13:15:27 2005 +0000 + + Split the control of master vs root priv. Everything is still marked as + needing root. + +commit 3ffd0c188bc35263f0b53345a0a4a261f4ae1b71 +Author: Eric Anholt +Date: Thu Aug 4 07:46:11 2005 +0000 + + Whitespace fixups. + +commit b0da5df90a76e4e79c356fdbc90211a8e21f095c +Author: Eric Anholt +Date: Thu Aug 4 07:42:01 2005 +0000 + + Fix the MGA driver on BSD by passing in the proper chipset flags to the + driver's preinit routine, and by using DRM_COPY_TO_USER_IOCTL when + copying out to an ioctl's data pointer. Pulled from the latest version + of my drm-hook-rename.diff and only compile-tested after that. + +commit 49bbb6d86178890a03040d618a8c9c76c96d3d3f +Author: Eric Anholt +Date: Thu Aug 4 07:31:21 2005 +0000 + + Add a debugging error message from testing new MGA code on BSD. + +commit 40515fc93c479599f32485630b4063422106358f +Author: Adam Jackson +Date: Mon Aug 1 20:36:58 2005 +0000 + + version bump + +commit 8b4691ee13cc30893f694103e8a90c33655e5cf1 +Author: Adam Jackson +Date: Mon Aug 1 20:31:35 2005 +0000 + + Fix the pkgconfig info. (Donnie Berkholz) + +commit 1cc1f49825e7fc157f8cfecfb4c5168056f5f738 +Author: Eric Anholt +Date: Thu Jul 28 01:44:17 2005 +0000 + + Fix issues with buffer aging when more than one dma buffer is discarded in + a cmdbuf, which could lead to hangs. + Submitted by: Aapo Tahkola + +commit 942545721f9bf14941f7e2ed81c79c4f0709749a +Author: Eric Anholt +Date: Wed Jul 27 20:20:30 2005 +0000 + + Correct a couple of descriptions of files in comments (were just + copy'n'pasted). + Submitted by: jkim + +commit fccd351c8f17f69dd4ce986f0a626b42bbcb4ef0 +Author: Eric Anholt +Date: Wed Jul 27 20:19:29 2005 +0000 + + Link in the savage files from shared-core. + Submitted by: jkim + +commit 096e0349eaa56f1941edddf10ab3915b785d8281 +Author: Roland Scheidegger +Date: Wed Jul 27 18:19:11 2005 +0000 + + fix driver date and drm minor version for r300 support + +commit ab59dd285c4ccdec92adadfcb869fc83edd96e86 +Author: Eric Anholt +Date: Wed Jul 20 21:17:47 2005 +0000 + + Add latest r300 support from r300.sf.net CVS. Patch submitted by volodya, + with BSD fix from jkim and the r300_reg.h license from Nicolai Haehnle. + Big thanks to everyone involved! + +commit 026e12ea937865748d54d3b8a7a3b77ccc4e3efb +Author: Eric Anholt +Date: Tue Jul 19 20:59:57 2005 +0000 + + Add .cvsignore file. + +commit d3d3184fe4b2fa72ed55813bd7eac72659f2375e +Author: Dave Airlie +Date: Sat Jul 16 03:11:53 2005 +0000 + + revert last change due to me bring up too early + +commit 9803eb179c8edd8d62b038f550c63a4aa589615e +Author: Dave Airlie +Date: Sat Jul 16 02:07:14 2005 +0000 + + up the version + +commit d6d67dbf92d64a4c662dcad52d720883da9d5e19 +Author: Dave Airlie +Date: Sat Jul 16 02:03:03 2005 +0000 + + Egbert noticed this issue, but changing the IOW to IOWR mess up + compatiblity with userspace.. + +commit 567113788c030b367a28ea9253fbf34beef2789e +Author: Thomas Hellstrom +Date: Fri Jul 15 21:22:51 2005 +0000 + + VIA: Fix sparse warnings (Alexey Dobriyan) + +commit 5a5478de7ab4ee2eef0308d8b4ce5c53222cd55e +Author: Adam Jackson +Date: Wed Jul 13 00:13:12 2005 +0000 + + distcheck fixes + +commit 7130662aa0c476a56a4a053c6dda19bc3a91060a +Author: Jon Smirl +Date: Mon Jul 11 18:27:39 2005 +0000 + + IRQ must be assigned and enabled or this will hang + +commit 07d23f9c60f9358f064eab7d944f3b28484b51ef +Author: Adam Jackson +Date: Sun Jul 10 22:42:42 2005 +0000 + + autoconfiscate libdrm + +commit 04fea060023a539c6c6766ec184b59f32c97d474 +Author: Jon Smirl +Date: Sun Jul 3 18:07:03 2005 +0000 + + Simplify the sysfs code + +commit d41af11ee30413f90064cfffb5687be92a28021c +Author: Jon Smirl +Date: Sun Jul 3 17:16:12 2005 +0000 + + Add sysfs attribute dri_library_name on Linux. code in share-core/via_drv.c + is ok to be shared, it will be passive on BSD. + +commit e2ba08d28335b43515ccbefcc21052ed0d5a7e47 +Author: Jon Smirl +Date: Thu Jun 30 16:00:35 2005 +0000 + + release can happen before dev->ctxlist is allocated + +commit 1b4ce02506afa65494956468afb0eb7f93b74fbc +Author: Ian Romanick +Date: Wed Jun 29 23:20:30 2005 +0000 + + Remove the AGP requirement from Makefile and Kconfig for MGA. Remove the + AGP requirement from Kconfig for SIS. There never was a requirement in + Makefile, and Eric Anholt confirms that the Makefile was correct. + +commit eeaeefca54b2f8299fbe8f99b5ca71e695430ba7 +Author: Alan Hourihane +Date: Wed Jun 29 13:19:47 2005 +0000 + + add remaining calls + +commit fc83d76e5a5ce2700d2b95aa177d3eec57dc1bec +Author: Alan Hourihane +Date: Wed Jun 29 13:13:22 2005 +0000 + + add i915_ioc32.c + +commit 6496c5d1e74532d8208774653a3a2a477d7fc50c +Author: Alan Hourihane +Date: Wed Jun 29 13:00:29 2005 +0000 + + silence warning + +commit 6975571c3b740e3a3813058a856fc6bd8b7fbd14 +Author: Dave Airlie +Date: Wed Jun 29 12:02:18 2005 +0000 + + fix some warnings from cross compiler + +commit 62b55eb433a211c565367b8ae717666e0acaf8fe +Author: Dave Airlie +Date: Wed Jun 29 11:56:42 2005 +0000 + + make r128/mga compile properly on sparc cross-compiler + +commit 2b427bee9bb4de9dba6ab96b68c66d22144669a5 +Author: Alan Hourihane +Date: Wed Jun 29 11:36:37 2005 +0000 + + Move to linux specific directory + +commit 964c57e71f641da854636c3f9549ef8cc2f5a143 +Author: Dave Airlie +Date: Wed Jun 29 11:22:39 2005 +0000 + + add mga and r128 32/64 bits + This is Egberts code, ported to Pauls framework by me.. + +commit ae7d8d8a85a4465fe641d28a7f5d8d64146f8d97 +Author: Dave Airlie +Date: Wed Jun 29 03:06:47 2005 +0000 + + these don't need reclaim buffers their release functions handle it + +commit 2ce5ddec833195bc17c8ed062ce622460ffe0d6a +Author: Dave Airlie +Date: Wed Jun 29 02:57:18 2005 +0000 + + Bug in conversion from old DRM to core DRM.... + +commit c798a382f1e11a0fd60a78924db0663f8e988a1b +Author: Eric Anholt +Date: Wed Jun 29 02:54:19 2005 +0000 + + Get the BSD DRM compiling again after MGA and mapping changes. Note that + i915 has been disabled for the moment, rather than working around + linux-specific code in the shared dir. + +commit 5d96c74ff1fe9b2d37e22dbea9882791aae389bf +Author: Eric Anholt +Date: Tue Jun 28 20:58:34 2005 +0000 + + - Remove drm_initmap and replace its usage with drm_addmap. This reduces + code duplication, and it also hands you the map pointer so you don't + need to re-find it. + - Remove the permanent maps flag. Instead, for register and framebuffer + maps, we always check whether there's already a map of that type and + offset around. Move the Radeon map initialization into presetup (first + open) so it happens again after every takedown. + - Remove the split cleanup of maps between driver takedown (last close) and + cleanup (module unload). Instead, always tear down maps on takedown, + and drivers can recreate them on first open. + - Make MGA always use addmap, instead of allocating consistent memory in + the PCI case and then faking up a map for it, which accomplished nearly + the same thing, in a different order. Note that the maps are exposed to + the user again: we may want to expose a flag to avoid this, but it's + not a security concern, and saves us a lot of code. + - Remove rmmaps in the MGA driver. Since the function is only called during + takedown anyway, we can let them die a natural death. + - Make removal of maps happen in one function, which is called by both + drm_takedown and drm_rmmap_ioctl. + Reviewed by: idr (previous revision) Tested on: mga (old/new/pci dma), + radeon, savage + +commit 6397722f1990856a9ee268cadd65d78b44b24835 +Author: Dave Airlie +Date: Tue Jun 28 13:02:20 2005 +0000 + + add compat code from Paul Mackerras + +commit 827806f697855c65a8c9821ad410467c48e25d35 +Author: Dave Airlie +Date: Tue Jun 28 12:52:41 2005 +0000 + + Add compat to Makefile + +commit 170bf94a367935046d72f7d2a21872bb88543a04 +Author: Dave Airlie +Date: Tue Jun 28 12:50:15 2005 +0000 + + Add drm and radeon 32/64-bit compat code from Paul Mackerras + +commit b6b270a2607088997a0ec74cb1d618f140a382f7 +Author: Alan Hourihane +Date: Tue Jun 28 08:03:33 2005 +0000 + + Given that BenH says using the sysdev approach for DRM is bogus, I'll yank + the code for it, rather than introducing something that isn't going to + work 100% of the time. + +commit 75ba453365380851d3297a9d553302021af923b2 +Author: Alan Hourihane +Date: Tue Jun 28 07:34:49 2005 +0000 + + Comment out the .resume function as without programming their dependent + registers things tend to lock up in certain situations. + The BIOS repost will fix things up. + +commit e2d76b0642d88c4f47ace52ee5eb3163c4e478d5 +Author: Alan Hourihane +Date: Mon Jun 27 15:17:12 2005 +0000 + + Reverse the pm_message_t patch for now, it appears that the 2.6.12 release + didn't have it. + +commit 1a6780348c9e61833ca240ce6fb80aaa6e75fb92 +Author: Alan Hourihane +Date: Mon Jun 27 12:39:02 2005 +0000 + + Check for 2.6.12 suspend/resume changes (pm_message_t) + +commit fa24ccccf4beeef41d8de23a345408b7b047ae3f +Author: Alan Hourihane +Date: Mon Jun 27 11:41:40 2005 +0000 + + Check dev_priv + +commit d6af2016635ced096812030547a930433e9382eb +Author: Alan Hourihane +Date: Mon Jun 27 11:39:44 2005 +0000 + + Save state of registers for suspend/resume. + +commit afdabdabf588267c8c8d4f1378a8e9824d58d2d0 +Author: Jon Smirl +Date: Sun Jun 26 13:31:15 2005 +0000 + + removed dev->sysdev_registered + +commit 9deb276a0680a79540f05c1547a9d703e9c08190 +Author: Jon Smirl +Date: Fri Jun 24 22:48:16 2005 +0000 + + Ref count the sysdev class to support multiple DRM cards + +commit 2b845f25c5c3a36ed6e49b9145e38a4738ce2572 +Author: Jon Smirl +Date: Fri Jun 24 21:50:40 2005 +0000 + + Make sysdev class only register when fbdev detected + +commit 5b0e93de32e9da390702df13d95ab63274294233 +Author: Jon Smirl +Date: Fri Jun 24 19:31:06 2005 +0000 + + More err path clean up for drm_pm Add mandatory sysdev shutdown function + +commit fe42d43a63d95243fa911f88bb01c383d5e6716e +Author: Alan Hourihane +Date: Fri Jun 24 09:28:50 2005 +0000 + + Fix the sysdev approach for power management. + We need to use the container_of() call to access our device private. + +commit cdc50eba6ac666447a93471fb2db25959f9c2775 +Author: Alan Hourihane +Date: Fri Jun 24 08:56:12 2005 +0000 + + Fix suspend problem when i915 private hasn't been initialized yet. + +commit 7586a655fc7d8e89a4fe37ec7926f4fbc13f358d +Author: Jon Smirl +Date: Thu Jun 23 05:29:16 2005 +0000 + + Fix drm_memory_debug.c to compile, doesn't seem to be working Clean up + error return path in drm_stub.c + +commit 4152605ea174291f469c0c8a6fc433fd90194e71 +Author: Jon Smirl +Date: Wed Jun 22 05:49:56 2005 +0000 + + Get the power management hooks into the right place so that everything gets + freed correctly. + +commit 9fb77e869f530f3c9679dd63db07514e2f45efc7 +Author: Jon Smirl +Date: Tue Jun 21 02:20:02 2005 +0000 + + Change initialization of savage register access to _DRM_READ_ONLY. Flags of + zero does not mean no privs, instead it grants write access + _DRM_READ_ONLY only applies to non-root users. Problem is only in CVS, + initmaps are not in the kernel yet. + +commit 298b6fcedbc3a521c2218404a96de0754dbb4f02 +Author: Jon Smirl +Date: Mon Jun 20 15:40:48 2005 +0000 + + Change initialization of radeon register access to _DRM_READ_ONLY. Flags of + zero does not mean no privs, instead it grants write access + _DRM_READ_ONLY only applies to non-root users. Problem is only in CVS, + initmaps are not in the kernel yet. + +commit ae2264d3c9a4938b1202c4301587c7214c2c4293 +Author: Jon Smirl +Date: Sun Jun 19 04:15:58 2005 +0000 + + Remove I2C support from radeon driver. Same support is available from + radeonfb. + +commit 71df0eed3476d4430a59ce21ca641ac8eecf54e2 +Author: Dave Airlie +Date: Fri Jun 17 09:09:17 2005 +0000 + + fix up drm_alloc_agp to take a dev arg and not pass crappy agpgart around + +commit 0569fe7a528e5e0753d9f72807a8f4310c6c9782 +Author: Jon Smirl +Date: Fri Jun 17 04:47:30 2005 +0000 + + Fix 810/830 build + +commit 53e950b344d84a98fda4cff6d03b90651a625f18 +Author: Alan Hourihane +Date: Thu Jun 16 19:58:00 2005 +0000 + + Force AGP always for Intel chipsets. + Fixes bug #3552 + +commit 1567753415d420c626ae145457539bfee1414df8 +Author: Ian Romanick +Date: Wed Jun 15 17:47:33 2005 +0000 + + Re-sync (and correct!) shared/mga_drm.h with shared-core/mga_drm.h. + +commit 72cfc797b51e59ecf8a2787c6a176838241cc94b +Author: Ian Romanick +Date: Tue Jun 14 22:34:11 2005 +0000 + + Adds support for PCI cards to MGA DRM + This patch adds serveral new ioctls and a new query to get_param query to + support PCI MGA cards. + Two ioctls were added to implement interrupt based waiting. With this + change, the client-side driver no longer needs to map the primary DMA + region or the MMIO region. Previously, end-of-frame waiting was done by + busy waiting in the client-side driver until one of the MMIO registers + (the current DMA pointer) matched a pointer to the end of primary DMA + space. By using interrupts, the busy waiting and the extra mappings are + removed. + A third ioctl was added to bootstrap DMA. This ioctl, which is used by the + X-server, moves a *LOT* of code from the X-server into the kernel. This + allows the kernel to do whatever needs to be done to setup DMA buffers. + The entire process and the locations of the buffers are hidden from + user-mode. + Additionally, a get_param query was added to differentiate between G4x0 + cards and G550 cards. A gap was left in the numbering sequence so that, + if needed, G450 cards could be distinguished from G400 cards. According + to Ville Syrjälä, the G4x0 cards and the G550 cards handle + anisotropic filtering differently. This seems the most compatible way + to let the client-side driver know which card it's own. Doing this very + small change now eliminates the need to bump the DRM minor version + twice. + http://marc.theaimsgroup.com/?l=dri-devel&m=106625815319773&w=2 + A number of ioctl handlers in linux-core were also modified so that they + could be called in-kernel. In these cases, the in-kernel callable + version kept the existing name (e.g., drm_agp_acquire) and the ioctl + handler added _ioctl to the name (e.g., drm_agp_acquire_ioctl). + This patch also replaces the drm_agp_do_release function with + drm_agp_release. drm_agp_release (drm_core_agp_release in the previous + patch) is very similar to drm_agp_do_release, and I saw no reason to + have both. + This commit *breaks the build* on BSD. Eric said that he would make the + required updates to the BSD side soon. + Xorg bug: 3259 Reviewed by: Eric Anholt + +commit 3585bdf7d81a92c729bb5bcbc7cfca6048d640ce +Author: Dave Airlie +Date: Sat Jun 11 10:08:39 2005 +0000 + + fix up drm.h for C++ include as this can be included in user programs + +commit f4aa8ab715cdb2382609f51dda4d832de417894a +Author: Dave Airlie +Date: Fri Jun 10 01:21:23 2005 +0000 + + add dragonfly #define from Xorg CVS + +commit 28759fd872842c41f38edaf77a140a798609dd20 +Author: Ian Romanick +Date: Thu Jun 9 21:24:34 2005 +0000 + + Synchronize with the shared-core version. + +commit dfc650bd80da28b430b65cd26a1bf418074e2086 +Author: Ian Romanick +Date: Thu Jun 9 21:18:56 2005 +0000 + + Completely re-initialize DMA settings + There were two problems. First, the 'warp' and 'primary' pointers weren't + cleared, so mga_do_cleanup_dma, which gets called multiple times, would + try to ioremapfree them multiple times. This resulted in the new error + messages to syslog. The second problem was the, since the dev_private + structure isn't reallocated and cleaned out in mga_do_init_dma, when + the server is reloaded idle-waits would wait for impossible values. + I have given this patch some more riggorous testing. This includes: + - Load module, start server, run GL app, stop server, unload module. + - Load module, start server, run GL app, stop server, unload module, reload + module, restart server, run GL app. + - Load module, start server, run GL app, stop server, restart server, run + GL app, stop server, unload module. + In all three cases, everything worked as expected. Please let me know if + there are any further regressions with this patch. + Xorg bug: 3408 Reported by: Chris Rankin + +commit 1252890ff1d62544a250560f0c2985454bf888b5 +Author: Jon Smirl +Date: Thu Jun 9 13:22:12 2005 +0000 + + drm_mem_init should be done at core load, not driver init + +commit 9f2f010763170890c69e1d2f9dd1f550db0400b1 +Author: Dave Airlie +Date: Mon Jun 6 11:35:43 2005 +0000 + + fix some issues with radeon interrupt handling + From: Dave Airlie + Benjamin Herrenschmidt + +commit 246c617c87a5407f0bb8375e217443fc38aee405 +Author: Alan Hourihane +Date: Mon Jun 6 09:18:44 2005 +0000 + + Fix copyrights + +commit 751765dba5b15f431a12308e09237d895c65e471 +Author: Eric Anholt +Date: Mon Jun 6 06:45:41 2005 +0000 + + Add a few more bits of Tonnerre's NetBSD port (Still need to deal with the + device attachment). + +commit 805a07714f05833a1ed4e4a01f8086fafd46e849 +Author: Dave Airlie +Date: Sat Jun 4 06:18:11 2005 +0000 + + misc cleanup patch from Adrian Bunk + +commit 83cb1504498ad2ca327bc8341bc21ed6cdb54756 +Author: Dave Airlie +Date: Sat Jun 4 06:14:58 2005 +0000 + + Remove warnings about code mixed with declerations.. + +commit 1d678a518ee97fef3a3f9816cddf199ad7e37509 +Author: Ian Romanick +Date: Fri Jun 3 22:53:32 2005 +0000 + + Minor clean-ups. The drm_mga_fullscreen_t stuff has been dead for a looong + time. Remove it and an out-dated comment. + +commit 8e7c130ef71b6300a99f6404d23e7ff8646066be +Author: Ian Romanick +Date: Fri Jun 3 22:45:21 2005 +0000 + + Move the deallocation of dev_private. Since dev_private is allocated when + the driver is loaded and is always expected to be around, it should + only be deallocated when the driver is unloaded. + Xorg bug: #3408 Reported by: Chris Rankin + +commit 9cad6fb4e043ba6140d4c61f09ca0cf0ba8d18c0 +Author: Eric Anholt +Date: Sat May 28 20:36:22 2005 +0000 + + Bugzilla #3217: Create a new __drm_pci_free which is used internally in + linux-core to free pci memory without freeing the structure. Linux-core + internals often create pci dma handle structures on the stack due to + the lack of a drm_local_map_t to store them in properly. Fix the + original drm_pci_free to actually free the dma handle structure instead + of leaking it. + Signed-off-by: Sergey Vlasov + +commit d7756397d695e5573647258f8412e9ecfb2645d4 +Author: Eric Anholt +Date: Sat May 28 20:25:04 2005 +0000 + + Bugzilla #3217: The size field in the new dma handle structure was + uninitialized, and its use in drm_pci_free later resulted in panics. + Signed-off-by: Sergey Vlasov + +commit 54fbf85125ef231f77b333d9e72cbc56b5bc012d +Author: Alan Hourihane +Date: Sat May 28 00:08:53 2005 +0000 + + Actually check for drm_fb_loaded before trying to initialize the sysdev + approach. + +commit 45f1db8db9d1280dff51cdfb680bff2754195483 +Author: Alan Hourihane +Date: Sat May 28 00:00:08 2005 +0000 + + Re-implement the power management. + There's two choices when fb is or isn't loaded as we treat ourselves as a + PCI driver in the latter case. + If we are a PCI driver, then register the suspend/resume functions + directly. If not, then we register as a sysdev and pick up the + suspend/resume actions and pump them down into a generic *power + function. + It'll be nice when this little mess is sorted out with regard to being a + real PCI driver ;-/ + +commit 4a84416c458027462ee6112a5fa442415597f6c2 +Author: Ian Romanick +Date: Fri May 27 23:42:11 2005 +0000 + + Modify drm_driver::device_is_agp to return a tri-state value to indicate + that a device absolutely is, absolutely is not, or may or may not be + AGP. Modify the i915 DRM to use this to force all i9x5 devices to be + "AGP" (even the PCI-e devices). + Reported by: Lukas Hejtmanek + +commit c9abd2fec509c271339d1ca3addd95df884df80a +Author: Dave Airlie +Date: Fri May 27 07:23:44 2005 +0000 + + add radeon registers from VHA code these are the "unknown" registers + +commit e1fd79b31e130e9e4bafcab914491973147b7f86 +Author: Thomas Hellstrom +Date: Mon May 23 20:56:54 2005 +0000 + + VIA: + 64-bit fixes. Bumped driver date and patchlevel. + +commit 955791f0645d4b61bd20d817c532dda3a40aaddd +Author: Ian Romanick +Date: Sun May 22 04:36:33 2005 +0000 + + Refactor the routines for "calculating" the size of the WARP microcode. The + two routines (one for G200 and one for G400) were replaced with static + const variables and a single function that returns the correct size. + The code to generate an error if the allocated WARP region is too small + was refactored from mga_warp_install_{g200,g400}_microcode to + mga_wrap_install_microcode. + mga_warp_microcode_size is global to the MGA DRM because it will soon be + used by code in another file. + +commit 75cb43ccd73dd2c8c196d209862b8a3ea4e433cb +Author: Ian Romanick +Date: Sat May 21 02:31:08 2005 +0000 + + Forgot to bump the patchlevel and driver date on last commit. + +commit a686be5bc8c5d8a260513b680f322e3b790aadf7 +Author: Ian Romanick +Date: Sat May 21 02:27:51 2005 +0000 + + Change the MGA initialization and cleanup a bit. The dev_private structure + is now allocated (and partially filled in) by the new + mga_driver_preinit function. + This allows the driver to detect the type of card (i.e., G200 class vs. + G400 class) on its own. The chipset value passed to mga_dma_init is now + ignored. This same technique is used by the radeon DRM. + As a result of this, mga_driver_pretakedown was converted to + mga_driver_postcleanup. This routine gets called in some other places + than might be expected, and it sets the dev_private pointer to NULL. + That little gem took over an hour to track down. :( + +commit fced784140c7b347ea9d3091a8bc0c06c1a760f7 +Author: Ian Romanick +Date: Fri May 20 00:17:40 2005 +0000 + + Refactor common, boilerplate ioctl code from drm_addbufs_* functions into + drm_addbufs. This makes the code more like the BSD code, and makes the + drm_addbufs_* functions callable in-kernel. + Reviewed by: Dave Airlie + +commit 4ca48cb4d8341b699ffffc8ccd8d70006733936a +Author: Dave Airlie +Date: Wed May 18 06:35:16 2005 +0000 + + Add i945G pci ids to drm + From: Christopher Allen Wing Signed-off-by: Dave + Airlie + +commit 6d4b9a830bb5678460621b652e914cbcb16d8c4c +Author: Felix Kuehling +Date: Tue May 17 02:08:02 2005 +0000 + + Savage doesn't require AGP any more. Enable build even without CONFIG_AGP. + +commit e051cd19c00ed28997ff6fece0d1d4308b171229 +Author: Ian Romanick +Date: Mon May 16 17:37:10 2005 +0000 + + Added device_is_agp callback to drm_driver. This function is called by the + platform-specific drm_device_is_agp function. Added implementation of + this function the the Linux-specific portion of the MGA driver to + detect PCI G450 cards. Added code to the Linux-specific portion of the + generic DRM layer to not initialize AGP infrastructure if the card is + not AGP (this matches what already existed in BSD). + Bumped the driver date and the driver patch-level for MGA. + This mostly fixes bugzilla #3248. The BSD side still needs an + implementation of mga_driver_device_is_agp. + +commit bd72c6990f22381af61f62bffe70619f726d5923 +Author: Dave Airlie +Date: Sun May 15 10:19:21 2005 +0000 + + wrap config.h include with defined for KERNEL + +commit e0fc400b681cb6b04ba0769c58f279a2aa4326a5 +Author: Thomas Hellstrom +Date: Sun May 8 20:33:04 2005 +0000 + + VIA: Fix for oops when AGP ring-buffer initialization is called and there + is no AGP memory acquired. + +commit 6aae7bd5b061c6a8130787ba3ea5aa07c744eda9 +Author: Eric Anholt +Date: Tue Apr 26 15:27:58 2005 +0000 + + Convert NOMAN to the new preferred spelling NO_MAN to quiet warnings. + +commit 2fcf66a02fb0f6f31c0d02026c8c7a4d36b45f58 +Author: Eric Anholt +Date: Tue Apr 26 06:03:39 2005 +0000 + + Clean up some const qualifier cast warnings. + +commit ec111d70fee0647c4c68a02c723d4a3729c93b56 +Author: Eric Anholt +Date: Tue Apr 26 05:19:11 2005 +0000 + + Convert BSD code to mostly use bus_dma, the dma abstraction for dealing + with IOMMUs and such. There is one usage of the forbidden vtophys() + left in drm_scatter.c which will be fixed up soon. This required a KPI + change for drm_pci_alloc/free() to return/use a drm_dma_handle_t that + keeps track of os-specific bits, rather than just passing around the + vaddr/busaddr/size. + Submitted by: Tonnerre Lombard (partially) Tested on: FreeBSD: Rage128 + AGP/PCI Linux: Savage4 AGP/PCI + +commit 31a06d0baca9e378a773ca8bd350860546dd8a79 +Author: Eric Anholt +Date: Tue Apr 26 05:11:20 2005 +0000 + + Use msleep instead of tsleep to drop the DRM device lock and avoid a + sleep-with- mutex held. This probably ought to be an os-independent + sleep function ala DRM_USLEEP. + +commit be9e67a927ed9583380107b2fb9ddf3bd8a5f128 +Author: Eric Anholt +Date: Sun Apr 24 19:09:09 2005 +0000 + + Fix a panic on startup with non-initmapping drivers by assigning the + drm_ioremap return value to the map handle again. + Submitted by: Tor Egge, tegge at freebsd dot org + +commit 699d4ad53a62e46344b672365dda0be4001edd99 +Author: Thomas Hellstrom +Date: Wed Apr 20 18:50:49 2005 +0000 + + A fix for a locking bug which is triggered when a client tries to lock with + flag DMA_QUIESCENT (typically the X server), but gets interrupted by a + signal. The locking IOCTL should then return an error, but if + DMA_QUIESCENT succeeds it returns 0, and the client falsely thinks it + has the lock. In addition The client waits for DMA_QUISCENT and + possibly DMA_READY without having the lock. + +commit 2b8dc25dc549533f1567093fb7dffc06d6f55268 +Author: Thomas Hellstrom +Date: Wed Apr 20 10:16:52 2005 +0000 + + VIA: Interrupt handler bugfixes. Bumped patchlevel to 2.6.2. + +commit b0c461c8e374d7e92e5013a03fc6096595a74700 +Author: Dave Airlie +Date: Tue Apr 19 00:31:16 2005 +0000 + + Revert last commit, it affect via things + +commit a08343e3e053d5ab27398013781f489cdf7f60de +Author: Thomas Hellstrom +Date: Mon Apr 18 08:26:00 2005 +0000 + + VIA: + 1) Security fix: Stopped possible MMIO access to PCI DMA area for the + unichrome Pro. + 2) Fixed an odd cpu usage problem by padding small AGP DMA submissions. + Bumped patchlevel. + +commit 10ddbc8c8c9e540cf4802cab36d0c46f0aa0b6d8 +Author: Eric Anholt +Date: Sat Apr 16 03:02:52 2005 +0000 + + Use /*- to begin license blocks in BSD code to reduce diffs against FreeBSD + CVS. + +commit 926298e8220b43158c433c75ffca74909a33c42b +Author: Eric Anholt +Date: Wed Apr 13 04:20:08 2005 +0000 + + Fix build on FreeBSD-current, thanks to jhb@. + +commit a0454aba714ba0314b85faad2801f7b047fa3b02 +Author: Dave Airlie +Date: Mon Apr 4 04:08:29 2005 +0000 + + mirror changes made in main tree.. just happened to be doing this myself + +commit cb5f6c22b5a0190c845029a772a2eb2a3faa5d1c +Author: Thomas Hellstrom +Date: Tue Mar 29 09:48:12 2005 +0000 + + Missing file via_video.c commited. + +commit 0a5e02c7b5fbbc7a7cc3654f5820d0dd50381de9 +Author: Adam Jackson +Date: Tue Mar 29 01:47:38 2005 +0000 + + Add skeletal imagine driver (but don't build it yet). + +commit 532ccb98b5f2946f574a747b90c39edbe783f888 +Author: Thomas Hellstrom +Date: Mon Mar 28 21:21:42 2005 +0000 + + Via updates: + New PCI command parser. Moved from via_dma.c to via_verifier.c so functions + with similar functionality are close to eachother. + Moved video related functions to via_video.c, which might be extended in + the future, as new video functionality is added. + New device-specific generic IRQ IOCTL, similar to the general VBLANK IOCTL, + but with support for multiple device IRQ sources and functionality. + Support for Unichrome Pro PM800/CN400 video DMA commands in verifier and + PCI parser. + Support for Unichrome Pro PM800/CN400 HQV IRQs in the new generic IRQ + IOCTL. + Bumped minor. New version 2.6.0. + +commit c6161eff86b250f3113791edcc162dc97322c401 +Author: Dave Airlie +Date: Sun Mar 27 07:05:28 2005 +0000 + + Description: Rather than use custom code in DRM_WAIT_ON() to do exactly + what wait_event_interruptible_timeout() does, use the function and just + change the return values appropriately. + Signed-off-by: Nishanth Aravamudan + +commit 385f927692beb395ae3866538b2b0f8f8e436eba +Author: Dave Airlie +Date: Sun Mar 27 06:58:12 2005 +0000 + + Some ia64 platforms may not support write combining on all type of memory, + so we need to consult the EFI memory map before we try to set the write + combine attribute of a page. This patch will try to map a page write + combined if it's not an AGP page and the EFI memory map says it's ok, + otherwise it falls back to a regular, uncached mapping. Can someone + please apply this to the drm tree? + From: Jesse Barnes + +commit 459ef4862978800f3dbff76af134593350cad6aa +Author: Alan Hourihane +Date: Fri Mar 25 13:44:47 2005 +0000 + + Don't know who set the i915GM PCI ID incorrectly but it should be 0x2592 + +commit 9182891b26f1847664f4a797db12c63ec065df7a +Author: Dave Airlie +Date: Fri Mar 25 13:16:38 2005 +0000 + + From Xorg CVS realign the i915_drv.h + From: Tungsten Graphics Signed-off-by: Dave Airlie + +commit 20dce568dced6cb38a9bab850b45989e86b0f1e6 +Author: Dave Airlie +Date: Fri Mar 25 13:06:53 2005 +0000 + + use linux-core for 2.6 not this stuff.. + +commit 956a701544d22c7885e53678531448cd04aba5f5 +Author: Dave Airlie +Date: Fri Mar 25 09:48:34 2005 +0000 + + fix up AGP multi-head support for kernel 2.6.12 + +commit 2ad83874287622875f6979da3cd505d18b697704 +Author: Dave Airlie +Date: Fri Mar 25 09:47:36 2005 +0000 + + verify_area is deprecated, replaced by access_ok. Seems I missed this one + when I did the big overall conversion. + Signed-off-by: Jesper Juhl + +commit ca04fbc7bad746b5f323a36407b4d99a3a2afd02 +Author: Dave Airlie +Date: Fri Mar 25 09:05:10 2005 +0000 + + fix bug with XFree86 4.3 on core drm + Signed-off-by: Dave Airlie + +commit c8d2d5d41901ba8072b4f03617c39cbb52f9224b +Author: Dave Airlie +Date: Fri Mar 25 09:02:20 2005 +0000 + + 3dfx DRM depends on PCI + Signed-off-by: Geert Uytterhoeven + +commit df6ef4836ead254487a834e889d4595d915c4818 +Author: Dave Airlie +Date: Fri Mar 25 09:01:27 2005 +0000 + + For 2.6.12 and 2.6.11.x: + Remove incorrect "drm_"-prefix from parameter description. + Signed-off-by: Magnus Damm + +commit ab396776fbf2777d31c4253001e882d2faee0c3b +Author: Michel Daenzer +Date: Fri Mar 18 22:51:43 2005 +0000 + + Add support for production version of ATI RN50/ES1000. (ATI Technologies + Inc.) + +commit 34563921dd0b41d4ccf08374227e31d765b40353 +Author: Roland Scheidegger +Date: Tue Mar 15 22:12:30 2005 +0000 + + add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear filtering on + r200 + +commit d2fd9200956a94cfd91a39e76994f326bdfc6ac0 +Author: Thomas Hellstrom +Date: Mon Mar 14 22:50:21 2005 +0000 + + via changes: + 1. Initialize futex locks to zero on device init. + 2. Remove some stray defines from via_drm.h + 3. Prepare via_drm.h for drm client inclusion. The goal is to share a + common file with common definitions. + 4. Sync shared / shared-core via_drm.h + 5. Bump minor, because of the futex lock initialization. + +commit a396617dbc15abafdc172b972a02c04007ad579f +Author: Felix Kuehling +Date: Sun Mar 13 02:16:10 2005 +0000 + + Command DMA optimizations: + - don't waste DMA memory when small command buffers are flushed + - minimized padding with noops + - slightly simplified faked DMA flushing + +commit 7d3c42b58940b56efa9bfc13a08b5e67797fc771 +Author: Dave Airlie +Date: Tue Mar 8 23:47:11 2005 +0000 + + Fix for bug 2673 from Egbert Eich - memset the version + +commit 95fa851769b2a3461fb710f6d035bc5b2bf164e0 +Author: Felix Kuehling +Date: Mon Mar 7 12:19:49 2005 +0000 + + Tracked down random lockups related to command DMA that occurred in Quake3 + after ~5min: buffer aging was subtly broken. Part of this may have also + affected vertex DMA buffer aging and client-side texture heap aging, + though with less fatal consequences. Bumped minor version and driver + date. + +commit 32b6823a2540da83553f49a1daf89159c425c93e +Author: Dave Airlie +Date: Mon Mar 7 09:40:18 2005 +0000 + + minor pointer cast typo + +commit 15995234b4d6cb848d919b0342b5697fffe80c89 +Author: Felix Kuehling +Date: Sun Mar 6 01:41:06 2005 +0000 + + Added support for command DMA on Savage4-based hardware. Unfortunately + command and vertex DMA don't work at the same time. Command DMA + performance is superior and works with all vertex formats. Bumped minor + version and driver date. + +commit 26f04a16645edb366fce16060f6d5d01f2ff54b3 +Author: Dave Airlie +Date: Fri Mar 4 03:04:37 2005 +0000 + + add some idct type 3 packets for reference + +commit bc54ede0a865d55b3cc39db79aae3a8bc12bbcc0 +Author: Felix Kuehling +Date: Wed Feb 23 16:34:30 2005 +0000 + + Use wrap counter to extend 16-bit hardware event tags to 32-bit logical + event counters in the SAVAGE_EVENT_EMIT/WAIT ioctls. This is needed for + reliable client-side texture heap aging. Slightly simplified DMA buffer + aging while at it. Bumped minor version and driver date. + +commit f3cf4bc5f2bd556689ef197877de596b83dbd3d9 +Author: Thomas Hellstrom +Date: Sun Feb 20 00:05:43 2005 +0000 + + Fix VIA K8M800 PCI ID. + +commit 56cdeff23181772142a56268e50ceff691c7934d +Author: Eric Anholt +Date: Sat Feb 19 22:07:07 2005 +0000 + + Fix a couple of gcc warnings in DRM_INFOs. + +commit baeb76076e79dae0ed78f12e294336deaa3af9e7 +Author: Eric Anholt +Date: Sat Feb 19 20:00:55 2005 +0000 + + Merge r1.26 from FreeBSD: Now that mem(4) is a kernel module, we need to + depend on it. + +commit 49e19c8d001c34f675b8d81ffde8f0792292f6ff +Author: Michel Daenzer +Date: Fri Feb 18 20:06:10 2005 +0000 + + fd.o bug #2576: Add support for ATI RN50/ES1000. (ATI Technologies Inc.) + +commit b646515d6124b906f5a0c2cf76f8fda590884ef0 +Author: Adam Jackson +Date: Fri Feb 18 16:40:54 2005 +0000 + + Bug #2567: Fix reversed memset arguments. (David Krause) + +commit 80d844d99250e7bc26fbae7ca4a274ad46f7676f +Author: Keith Whitwell +Date: Tue Feb 15 13:15:08 2005 +0000 + + Run depmod after installing new modules + +commit 3e8792e7051090b442d29444fa2e5dfe46847c34 +Author: Eric Anholt +Date: Mon Feb 14 03:28:01 2005 +0000 + + Use fuword32 for DRM_GET_USER_UNCHECKED when available. May help on 64-bit + platforms. + Submitted by: Jung-uk Kim, jkim at niksun dot com + +commit ed082798f481b43d9745aaae15306e94a9acb169 +Author: Eric Anholt +Date: Mon Feb 14 03:26:52 2005 +0000 + + Use the proper API to get PCI vendor/device number for a dev. + PR: ports/76879 Submitted by: Alex, lesha at intercaf dot ru. + +commit 2f7cd38c122b2f7f790e51b78a51cc935c9b2f18 +Author: Eric Anholt +Date: Mon Feb 14 03:22:58 2005 +0000 + + Initialize kbuf to NULL to quiet the compiler about uninit variables + (wasn't an issue). Don't forget to free kbuf if the copyin fails. + +commit 650c0fe391b09479afd787e0b1db0a3e22cc4fcd +Author: Thomas Hellstrom +Date: Sun Feb 13 23:03:48 2005 +0000 + + Fixed Futex release bug. Bumped driver date and patchlevel. + +commit 0d2eb2b90c092eaef00c95a9403ed7f0c8f7b3a6 +Author: Eric Anholt +Date: Sun Feb 13 01:18:25 2005 +0000 + + Fix bad copy'n'pastage of copyrights -- don't disclaim anything for VA + Linux or PI in my copyrights when I should be doing it for myself. + +commit ba18d68ff512f672520b0c78aa955ad1f9a9d7d0 +Author: Eric Anholt +Date: Sun Feb 13 01:08:29 2005 +0000 + + Add the first bits necessary for a port of savage to FreeBSD. More to + follow later. + +commit 5d5acf28d8225a4a8a440e63abba8136e344b852 +Author: Roland Scheidegger +Date: Thu Feb 10 19:29:58 2005 +0000 + + add support for texture micro tiling for radeon/r200. Add support for cube + maps for r100. (Stephane Marchesin's port of the core version). + +commit 732cdc5cef25b1ea518fec9c9028d3a9806b690a +Author: Roland Scheidegger +Date: Thu Feb 10 19:22:43 2005 +0000 + + add support for texture micro tiling on radeon/r200. Add support for r100 + cube maps (since it also requires a version bump) at the same time. + +commit 08790293b13bb4562307309461400dad22c72eaf +Author: Keith Whitwell +Date: Thu Feb 10 11:02:56 2005 +0000 + + Stephane's port of Eric's race fix + +commit 2cdfb2cc8527a6a805b159006885268607383448 +Author: Roland Scheidegger +Date: Tue Feb 8 22:46:56 2005 +0000 + + fix incorrect PCI id for ATI radeon + +commit 81459d6e50a02b87ed95073659536eefa1e09fdf +Author: Eric Anholt +Date: Tue Feb 8 04:17:14 2005 +0000 + + Close a race which could allow for privilege escalation by users with DRI + privileges on Radeon hardware. Essentially, a malicious program could + submit a packet containing an offset (possibly in main memory) to be + rendered from/to, while a separate thread switched that offset in + userspace rapidly between a valid value and an invalid one. + radeon_check_and_fixup_offset() would pull the offset in from user + space, check it, and spit it back out to user space to be copied in + later by the emit code. It would sometimes catch the bad value, but + sometimes the malicious program could modify it after the check and get + an invalid offset rendered from/to. + Fix this by allocating a temporary buffer and copying the data in at once. + While here, make the cliprects stuff not do the VERIFYAREA_READ and + COPY_FROM_USER_UNCHECKED gymnastics, avoiding a lock order reversal on + FreeBSD. Performance impact is negligible -- no difference on r200 to + ~1% improvement on rv200 in quake3 tests (P4 1Ghz, demofour at + 1024x768, n=4 or 5). + +commit dc4defe742387dc3081557111b67a1ab99455dbb +Author: Dave Airlie +Date: Mon Feb 7 22:55:54 2005 +0000 + + Invalid bound check of driver defined ioctls in drm_ioctl + Bug 2489 Reporter: Aapo Tahkola + +commit a36d5b33aaa7731621a288a6a9a02bf86c8c80e4 +Author: Roland Scheidegger +Date: Mon Feb 7 21:11:59 2005 +0000 + + Cast user data to correct type in radeon_surface_free's copyin. + +commit 03ddea5b274a515528ea58db62f7b5f779430c5b +Author: Dave Airlie +Date: Mon Feb 7 11:20:43 2005 +0000 + + change DRIVER_ to CORE_ makes things look nicer, also change it so the + driver name is marked on resource allocations + +commit 300e0866d68d40af9271a588bd93522e4e7a339c +Author: Dave Airlie +Date: Mon Feb 7 10:44:28 2005 +0000 + + fix agp detection on linux + +commit 5a332a0f61760d8c13a01ba9f9208fafcafc3bb4 +Author: Eric Anholt +Date: Mon Feb 7 03:10:03 2005 +0000 + + Restore a debugging message to DRM_DEBUG instead of DRM_ERROR. + +commit 2239c55a304416dbf83e7fd545df5c3dde3ff058 +Author: Eric Anholt +Date: Mon Feb 7 01:14:42 2005 +0000 + + Remove some annoying trailing whitespace. + +commit 080a547d4d42d42e08a525aca9a62b5ece7616d5 +Author: Eric Anholt +Date: Sat Feb 5 08:00:14 2005 +0000 + + - Implement drm_initmap, and extend it with the resource number to help + FreeBSD. Add drm_get_resource_{start|len} so linux-specific stuff + doesn't need to be in shared code. + - Fix mach64 build by using __DECONST to work around passing a const + pointer to useracc, which is unfortunately not marked const. + - Get rid of a lot of maplist code by not having dev->maplist be a pointer, + and by sticking the link entries directly in drm_local_map_t rather + than having a separate structure for the linked list. + - Factor out map uninit and removal into its own routine, rather than + duplicating in both drm_takedown() and drm_rmmap(). + - Hook up more driver functions, and correct FreeBSD-specific bits of + radeon_cp.c, making radeon work. + - Baby steps towards using bus_space as we should. + +commit 270ca5f3cee387c10a06a4d58e50c5d0e1cea837 +Author: Thomas Hellstrom +Date: Thu Feb 3 10:51:22 2005 +0000 + + Via driver: Add missing drm_poll function to via driver in core. + +commit 7f7bbdcbed4f752bb2063fd1c650121e368797fc +Author: Eric Anholt +Date: Thu Feb 3 01:06:10 2005 +0000 + + Declare r128_do_cleanup_pageflip static since it's only used here and its + prototype went away. + +commit ed31275144b9d322f7339700a5f5cf1167ee8322 +Author: Eric Anholt +Date: Thu Feb 3 01:05:34 2005 +0000 + + Cast user data to correct type in radeon_surface_free's copyin. + +commit caa4212faa659a30d543a15781428bd8b4c2c882 +Author: Adam Jackson +Date: Tue Feb 1 22:09:46 2005 +0000 + + momentary revert. libdrm build may be broken now, but no one uses it yet... + +commit 0d6b7fcb79e9bf6f823b5802f8317056015faeec +Author: Dave Airlie +Date: Tue Feb 1 11:08:31 2005 +0000 + + cleanup patch from Adrian Bunk + +commit 1dd948f280b52645b320ea0745ec48b8d98c9d9b +Author: Dave Airlie +Date: Tue Feb 1 10:43:42 2005 +0000 + + make functions static in i915, remove unused functions + +commit 62e0a58ecf03fe85de6e671fe2fc7f613ba39b37 +Author: Dave Airlie +Date: Tue Feb 1 10:33:51 2005 +0000 + + update i830 similiar to the kernel, add statics + +commit 8d4c731aa1e0936d8187ad77b5c779a79e22566d +Author: Dave Airlie +Date: Tue Feb 1 10:18:27 2005 +0000 + + make more functions static in i810 and fix pageflip cleanup + +commit 4b23b5fc3ebe5660ad8d5eed8057877a9c7592ea +Author: Adam Jackson +Date: Sun Jan 30 03:30:45 2005 +0000 + + Final pass of libdrm.so work: + - Add $(DESTDIR) for distributors doing package creation + - Remove OS-specific include path from build + - Add /usr/include/drm for driver-kernel API + - Install all of shared-core/*.h in /usr/include/drm + - Rename xf86drm.h to libdrm.h since we're not X biased anymore + - Include backwards compat for xf86drm.h name, with a warning + - Fix libdrm source to account for drm.h living in /usr/include/drm + +commit 41cbbb47afa898cd4bfe5f39fad57199088a5727 +Author: Dave Airlie +Date: Sat Jan 29 23:05:35 2005 +0000 + + fix radeon drv + +commit cd9ef39c769202f161619ee7a95674371c57cd48 +Author: Thomas Hellstrom +Date: Thu Jan 27 22:48:47 2005 +0000 + + Fixed multiple devices DMA bug. Fixed PCI path FIRE command detection + +commit 77045dc51672715115f179c099dfb8d7b4d304d4 +Author: Dave Airlie +Date: Thu Jan 27 09:13:42 2005 +0000 + + fix incorrect PCI id for ATI radeon + +commit 43c3223de690b892759901386d8dc936b0dfbad1 +Author: Roland Scheidegger +Date: Wed Jan 26 17:48:59 2005 +0000 + + (Stephane Marchesin,me) Add radeon framebuffer tiling support to radeon + drm. Add new ioctls to manage surfaces which cover the tiled areas + +commit 408376b2031cf301f1a8e35e89ceefc72f2fdc94 +Author: Roland Scheidegger +Date: Wed Jan 26 14:19:24 2005 +0000 + + replace magic number with macro constant RADEON_ZBLOCK16 + +commit 310abb39b24159be9839156b4034426cea6a7449 +Author: Dave Airlie +Date: Mon Jan 24 08:39:22 2005 +0000 + + use libdrm after it was updated + +commit 311da0f2124104dfac5fe59bf0ffd7fd88280945 +Author: Dave Airlie +Date: Mon Jan 24 01:05:07 2005 +0000 + + hopefully fix drm_core setversion ioctl... pointed out by Eric on irc + +commit 3df805bd4ab492537e3aa0b9ac5ae99491ee38d6 +Author: Adam Jackson +Date: Sat Jan 22 08:24:36 2005 +0000 + + Add drm.h to the install target. + +commit 39d5c831a01dbffca268e5938c255e26a860bab1 +Author: Felix Kuehling +Date: Thu Jan 20 23:33:24 2005 +0000 + + Removed one bogus Savage3D PCI ID. Corrected another one. Restored + numerical ordering. + +commit 36ec8d82e73215cb49034c5ec540dee170752ee0 +Author: Adam Jackson +Date: Thu Jan 20 19:05:42 2005 +0000 + + Add a Savage3D PCI ID + +commit 858e68fbdc4597f6c0dce9dd092a85078d1fb6c6 +Author: Felix Kuehling +Date: Thu Jan 20 12:23:25 2005 +0000 + + Corrected some confusion of vb_stride and vtx_size + Implemented SAVAGE_CMD_DMA_IDX and SAVAGE_CMD_VB_IDX for ELTs support in + the _savage_render_stage of the 3D driver + Bumped minor version and driver date + +commit 9620a0b8bb2447bc17bf9a5aa9174720bf2ced68 +Author: Alan Hourihane +Date: Wed Jan 19 10:03:33 2005 +0000 + + Fix cut & paste problem + +commit f5914ad67bd87db8128a47fd74da3573b1306f27 +Author: Alan Hourihane +Date: Wed Jan 19 08:55:53 2005 +0000 + + Fix a cut & paste problem + +commit d29e2369be1a8643d12ab93997757fe3aafaa655 +Author: Jose Fonseca +Date: Mon Jan 17 21:46:32 2005 +0000 + + Some code commenting concerning the FIFO & DMA engine. + +commit 7d0cb01cbf620e090230978ccee6cf7a882c832c +Author: Eric Anholt +Date: Mon Jan 17 20:24:52 2005 +0000 + + Add detection of whether the device is AGP by walking the capabilities + list. + +commit c74052cfae9cf3929e692551ce657f8fb55b6f08 +Author: Adam Jackson +Date: Mon Jan 17 00:02:04 2005 +0000 + + Add xf86drm.h to the install target. + +commit e5cc0b8f6f561b6eab91ab653cdce38dc160398f +Author: Adam Jackson +Date: Sun Jan 16 23:50:58 2005 +0000 + + Shared libdrm work: + - create libdrm.so target + - build it by default + - drop xf86drmCompat.c from the build + - make 'clean' target never fail + - use pattern rules for .c -> .o for parallelism + - add 'install' target + +commit 37318f167511248315675ac45ba7d4c8fc4efcfc +Author: Dave Airlie +Date: Sun Jan 16 07:49:55 2005 +0000 + + remove duplicate drm_sysfs.o + +commit 0867ce78f6ec31b718f58ce80c56822c40cb68ca +Author: Dave Airlie +Date: Sun Jan 16 06:41:34 2005 +0000 + + This table is in radeon_drv.h along with the version number so remove it + from here + +commit 354dd17d2505fd3b9754f6ccc960671e1f9363d9 +Author: Dave Airlie +Date: Sun Jan 16 05:40:12 2005 +0000 + + The patch makes drmAddBufs/drmMapBufs can handle buffers in video memory + The attached patch adds a new buffer type DRM_FB_BUFFER. It works like AGP + memory but uses video memory. + From: austinyuan@viatech.com.cn (fd.o bug 1668) Signed-off-by: Dave Airlie + + +commit 9514ee39f7e5063383b99de580e7e3115645e886 +Author: Felix Kuehling +Date: Sun Jan 16 01:22:09 2005 +0000 + + Fixed a bug that prevented the driver from ever emitting triangle strips or + fans. Bumped patchlevel and driver date. + +commit ffc51f1f32c57a99f2a8b02c0a9aa211362ec9b2 +Author: Felix Kuehling +Date: Sat Jan 15 16:55:01 2005 +0000 + + Setup MTRRs for frame buffer and aperture manually on Savage3D and + Savage4-based cards. Automatic setup in drm_initmap doesn't work due to + the weird alignment and size of the aperture. + +commit 6c8a3194f40fc673b1055f1f2b70b45209881e7f +Author: Dave Airlie +Date: Thu Jan 13 01:26:16 2005 +0000 + + due to backways compat crap for IRQ_HANDLED etc.. this wouldn't build on + 2.4 + +commit d4a8f16eb6a2fe13f2576f224e6c1a8b3ba89719 +Author: Felix Kuehling +Date: Wed Jan 12 16:07:49 2005 +0000 + + Use virt_to_page instead of vmalloc_to_page in drm_do_vm_shm_nopage for + consistent pages allocated with drm_pci_alloc. + +commit ee576367632b582e29f2b3d42f2eb9250cfdf219 +Author: Keith Whitwell +Date: Tue Jan 11 10:59:01 2005 +0000 + + Import Thomas' changes upto 2.4.3 to shared. Small tweak to install target. + +commit 9904319b95794088fe1db34e86ed62bc20f863e7 +Author: Keith Whitwell +Date: Tue Jan 11 10:42:52 2005 +0000 + + import Thomas' shared-core via changes up to 2.4.1 + +commit 17d893f567787914add42c221996c631455cdb25 +Author: Felix Kuehling +Date: Mon Jan 10 22:46:02 2005 +0000 + + Only try to find the agp_buffer_map if dma_type is AGP. This is all that's + needed on the DRM side to support PCI Savages. Bumped patch level and + driver date. + +commit d6af902ff74d4a384c2dd9acb9540d637f588bc6 +Author: Felix Kuehling +Date: Sun Jan 9 19:49:21 2005 +0000 + + Improved workaround for Savage3D DMA lockup to emit NOPs only before the + first indexed drawing command of a cmdbuf or if a wait command was + emitted since the last indexed drawing command. + +commit 6e38fd357625ef002cf1f4570296dc66ba2631c6 +Author: Jon Smirl +Date: Sun Jan 9 17:30:44 2005 +0000 + + Adjust 4 level page check for <= 2.6.10 + +commit e7ba83bd6f3a1ab9981948a64e9a09940d25e281 +Author: Felix Kuehling +Date: Sat Jan 8 23:28:27 2005 +0000 + + Fixed off-by-one error in savage_bci_wait_fifo_shadow. + +commit fb6a4d0a7dfd8e996dca6d45bb820979f231c82c +Author: Thomas Hellstrom +Date: Fri Jan 7 11:37:01 2005 +0000 + + via updates: moved the verifier state struct to dev_priv. Implemented AGP + alignment check. + +commit ca2b94cfa2f07c4fd1188d85d8d916318e15e7f2 +Author: Thomas Hellstrom +Date: Fri Jan 7 08:21:29 2005 +0000 + + Updated via DRM with check for stray FIRE commands primitive list. + +commit fcece3cf34ed5cc7e82d324362a40b3dd5493bbe +Author: Alan Hourihane +Date: Thu Jan 6 17:51:32 2005 +0000 + + Add i915GM support Add resume functionality (must be used with later DDX) + Bump to 1.2 + +commit c6c7496ca090dd56599de5bb1398f69762569d5e +Author: Jon Smirl +Date: Thu Jan 6 17:09:22 2005 +0000 + + Adjust drm-memory for 4 level page tables in 2.6.10 ifdef'd to use 3 levels + in kernels older than 2.6.10 + +commit 50a6ffa8789ca12029da1db86ad8c90ce62cd241 +Author: Thomas Hellstrom +Date: Thu Jan 6 15:53:38 2005 +0000 + + via DRM: Updated the verifier to check the vertex lists more thorough. This + should hopefully stop it from getting out of sync. + The PCI command parser is still not updated. + +commit ae1bc4a6da92ab31c933baa0b3f6c17c9bd16eb5 +Author: Felix Kuehling +Date: Wed Jan 5 23:45:42 2005 +0000 + + 3D scissor regs are now managed by the DRM to iterate over clip rects + passed to the cmdbuf ioctl (try xeyes on top of glxgears ;-) + Tightened the texture state check + Bumped Savage DRM version to 2.1.0 so that DRI driver can (theoretically) + depend on the DRM to manage the scissor registers + +commit 4818014ab10e5ab27fe7c87f7936a932526612a6 +Author: Thomas Hellstrom +Date: Wed Jan 5 17:46:34 2005 +0000 + + Bumped driver date and minor version. + +commit e34b5601912ce4b611d429304d5271fcf6f9f457 +Author: Thomas Hellstrom +Date: Wed Jan 5 17:44:43 2005 +0000 + + VIA update: + Release video futexes when context is destroyed (This was previously done + by the X server). + Added New Unichrome Pro VIDEO DMA commands to the verifier. + Added Quiescent heavyweight lock mode. + +commit 094f02c568fb2096a93b30adf291f82e0b87bbce +Author: Felix Kuehling +Date: Wed Jan 5 14:34:12 2005 +0000 + + Fixed the DMA buffer age test. Should fix occasional "soft" lockups. Bumped + patch level and driver date. + +commit 04842e8bcf0cc1b3553ba380c450ad1f22b8b463 +Author: Felix Kuehling +Date: Sat Jan 1 20:22:58 2005 +0000 + + Completeley rewritten Savage DRM which can be considered secure (modulo + implementation errors). Direct hardware (MMIO, BCI) access is no longer + needed in the Mesa driver. Bumped version to 2.0.0. Corresponding + changes to the DDX and Mesa drivers are being committed. + +commit ed165a25292740d5d3ef7e78dc04a6a3402562aa +Author: Felix Kuehling +Date: Sat Jan 1 20:03:15 2005 +0000 + + Added a new DRM map type _DRM_CONSISTENT for consistent PCI memory. It uses + drm_pci_alloc/free for allocating/freeing the memory. Only implemented + in the Linux DRM so far. + +commit fe4ade81bb7a1242b18b84e012c1a293eea0420b +Author: Dave Airlie +Date: Sat Jan 1 12:07:51 2005 +0000 + + i810/i830 bug with Jon's file operations changes + +commit e19fa7ada122a68d6bedf3d678e96545ed41a39f +Author: Thomas Hellstrom +Date: Fri Dec 31 11:44:27 2004 +0000 + + VIA DRM: verifier: Added verbose palette error reporting, and support for + stipple palettes together with rudimentary checks for texture palette + sizes. + other: Bumped version patchlevel and driver date. + +commit 590b23011910e27664c8bc6ebac4b2b150d81519 +Author: Thomas Hellstrom +Date: Fri Dec 31 11:27:57 2004 +0000 + + VIA DRM: Stability enhancements and cleanups in via_dma.c Added explicit + licence notice in via_dma.c + +commit 02c35ec0a28b4fffcfc09ca444f7dc0c0912216d +Author: Thomas Hellstrom +Date: Tue Dec 21 17:13:22 2004 +0000 + + via DRM: Tightened the security for some functions of the + DRM_IOCTL_VIA_DMA_INIT IOCTL. Bumped patchlevel and driver date. + XFree86 bug: 2119 + +commit 47c178da08c01501890e23219cbac8319992a453 +Author: Keith Whitwell +Date: Mon Dec 20 12:03:02 2004 +0000 + + Copy HC_ParaType_Auto change to shared-core. Bump version numbers and + dates. + +commit c4c48a8a5bb27cee0592aebcc032abe7858604c8 +Author: Keith Whitwell +Date: Mon Dec 20 11:57:10 2004 +0000 + + Add a very simple install target. I expect there are more correct ways to + do this. + +commit ae0db704b4ada67f9df81e208308c7d92c29396e +Author: Thomas Hellstrom +Date: Sun Dec 19 19:13:47 2004 +0000 + + via changes: Fixed typecasting bug in via_dma.c, and possible short-circuit + bug in the cmdbuf_size ioctl. Modified ring-buffer jump code AGAIN, due + to new oddities discovered on the Unichrome Pro with faster processors. + Bumped patchlevel and driver date. + +commit eaaf0a5211883608e2e698cde04bcb0da4c4a4ee +Author: Keith Whitwell +Date: Fri Dec 17 14:11:05 2004 +0000 + + Add the 'Auto' pageflipping command to the verifier. I don't think any + verification is required for the arguments of this packet from a + security point of view. + +commit ebd3b867deed789bd4b3fe98f88c20a9454f0061 +Author: Alan Hourihane +Date: Thu Dec 16 11:07:20 2004 +0000 + + drm_pciids.h should only 'cleaned' when the shared/ directory exists. Which + the Makefile already knows about, but it was cleaning this file anyway. + +commit 3e65f52bda674bec43b807d50b41a537c9e93959 +Author: Eric Anholt +Date: Wed Dec 15 03:34:09 2004 +0000 + + Use SYSCTL_ADD_OID macro instead of calling function directly. + Submitted by: reffie@FreeBSD.org + +commit aff0a2548561ecbe3411b57cd31f46cbb1b4f6b8 +Author: Thomas Hellstrom +Date: Mon Dec 13 13:53:12 2004 +0000 + + VIA drm updates: + 1. Improved security check of AGP texture adresses. + 2. Hopefully last fix of ring-buffer jump oddities. + 3. Added ioctl to check available space and command regulator lag in + ring-buffer. This is needed for 3D application responsiveness. + +commit b4782ba76b8ee48dca9948abe8ba5cd1f42617e7 +Author: Dave Airlie +Date: Fri Dec 10 11:53:24 2004 +0000 + + Use wbinvd macro instead of assembly for it, + From: Stefan Dirsch Signed-off-by: Dave Airlie + + +commit c4a87c6883ede7bbf486743efe3e9325d96f8e54 +Author: Roland Scheidegger +Date: Wed Dec 8 16:43:00 2004 +0000 + + (Stephane Marchesin, me) add hyperz support to radeon drm. Only fast z + clear and z buffer compression are working correctly, hierarchical-z is + not. + +commit 98d01f9542d7f70aa10d68c0e41e631b5f156770 +Author: Thomas Hellstrom +Date: Tue Dec 7 12:18:47 2004 +0000 + + Patch from Jon Smirl from Nov. 2nd that makes older X servers behave well + with linux-core. Without this, they will fail on their second + invocation since the drm already has a busID assigned. + Submitted by: Jon Smirl + +commit bf6eb1c0d47e670658c42e439434c0c25caabcfb +Author: Thomas Hellstrom +Date: Tue Dec 7 12:09:11 2004 +0000 + + Fix up linux 2.4 series Makefiles for via_verifier.c + +commit 1fbfd9eb32220a10d66373b77172965cfeccd4f7 +Author: Thomas Hellstrom +Date: Mon Dec 6 11:19:23 2004 +0000 + + Security and optimization fixes for the via drm: + 1. The command verifier was never initialized in the non-core source tree. + 2. Check added that the AGP ring buffer has been initialized before + accepting command buffer. + 3. Free space check in the AGP buffer is moved to after command + verification, which is more optimal in most cases. + +commit 267e0645272720344eb7556a948e72112edbe2ec +Author: Thomas Hellstrom +Date: Fri Dec 3 23:03:36 2004 +0000 + + Added 3D functionality to the via command verifier. Modified the via + ring-buffer code somewhat to workaround hardware problems. Bumped via + minor version number. + +commit f197110e07b0be03d5d79329779b665ac46433d5 +Author: Dave Airlie +Date: Fri Dec 3 10:22:15 2004 +0000 + + Make 1-bit fields be unsigned (no sign bit :). sparse complains about them: + drivers/char/drm/sis_ds.h:88:12: warning: dubious one-bit signed + bitfield drivers/char/drm/sis_ds.h:89:16: warning: dubious one-bit + signed bitfield + Signed-off-by: Randy Dunlap Signed-off-by: Dave Airlie + + +commit 4f8fa6028631fa1d799e9a68ed710fbc98976656 +Author: Thomas Hellstrom +Date: Sat Nov 27 22:55:31 2004 +0000 + + Reworked PCI MMIO command buffer parser, and imported code from the Mesa + driver. It can now handle the 3D OpenGL commands from the Mesa + unichrome driver. + Added vsync frequency detection support. This will be used in the future + for XvMC and better frame timing. + Bumped minor version number and driver date. + +commit f0a86288fa4d7b951f33f7b1a6ef36106c7df788 +Author: Dave Airlie +Date: Thu Nov 11 11:09:11 2004 +0000 + + patch from bug 1803 - will try and push to kernel soon + +commit 4b4df875b26bd08ae62f26b8ced6a050425752ac +Author: Jon Smirl +Date: Tue Nov 9 16:58:02 2004 +0000 + + Fix more build problems on linux-core + +commit 76b1a7f2b423eef828e911f93f1ef38927a5507e +Author: Jon Smirl +Date: Tue Nov 9 03:36:06 2004 +0000 + + make linux-core build again + +commit 6483e7a1ac8395828eb3a13f763cf99d6ef89535 +Author: Roland Scheidegger +Date: Tue Nov 9 00:54:19 2004 +0000 + + add missing CHIP_RV350 to radeon_enums + +commit a1d9e5abafe60ca2b7f96cadd1013695ada4ac41 +Author: Eric Anholt +Date: Sun Nov 7 04:11:15 2004 +0000 + + Refine the locking of the DRM. Most significant is covering the driver + ioctls with dev_lock, which is a major step toward being able to remove + Giant. Covers some new pieces (dev->unique*) in the core, and avoids + one call down into system internals with the drm lock held, which is + usually bad (FreeBSD LOR #23, #27). + +commit c5bededa5130a58273448188c04c15bc9c1097f3 +Author: Dave Airlie +Date: Sun Nov 7 02:19:58 2004 +0000 + + add some more r300 pci ids + +commit c21cdee38a6b9124d01662b36207450aa5fbb626 +Author: Dave Airlie +Date: Sun Nov 7 02:15:11 2004 +0000 + + respect cc and cflags + +commit 67f6c5e36a93a9cdb18df133f6c31bab521c152a +Author: Eric Anholt +Date: Sun Nov 7 00:30:15 2004 +0000 + + Don't link in files which no longer exist. + +commit fa3fdbd99c6b6e5cec59f1044ce6ce1105b5e8dd +Author: Eric Anholt +Date: Sun Nov 7 00:25:49 2004 +0000 + + Now that the memory debug code is gone, and all 3 BSDs have M_ZERO, stop + using drm_alloc/drm_free in the core and instead use plain malloc/free. + +commit d37457b5996c09d1965f8906501cd1fde6aa9499 +Author: Eric Anholt +Date: Sat Nov 6 23:05:46 2004 +0000 + + Add the drm Makefile and update .cvsignores. + +commit cb5aaa89871c051098ae8067d0e386840b7bdc59 +Author: Eric Anholt +Date: Sat Nov 6 23:02:07 2004 +0000 + + Convert more drivers for bsd-core, moving the ioctl definitions to shared + code. Remove the "drv" from sisdrv, as it's unnecessary. Use the + drm_pci functions in i915 instead of per-os implementations of the + same. Avoid whitespace within fields in drm_pciids.txt (one of the r300 + definitions), since it breaks the bsd pciids script. Tested on sis, + mga, r128. i915 needs more work. + +commit 7ddbd38dde5dc5566ba14f2b1c449611a6d0224f +Author: Eric Anholt +Date: Sat Nov 6 21:44:54 2004 +0000 + + Remove some core stuff that ended up being unnecessary. + +commit 7bdccfd0bb192200ba022c368f85f73e5a989e7a +Author: Eric Anholt +Date: Sat Nov 6 21:18:49 2004 +0000 + + Get r128 basically working: Hook up the driver's dma ioctl, use the proper + offset into the driver ioctl array, and don't make the ctx bitmap + conditional. + +commit ae7a1713139f1eacec9cc1629cacef0394e270cc +Author: Eric Anholt +Date: Sat Nov 6 20:27:19 2004 +0000 + + Move the lock/unlock ioctls to a more logical place, in drm_lock.c. + +commit cca29ac9becffc7d5fc8204c706621b842c3557d +Author: Eric Anholt +Date: Sat Nov 6 20:21:55 2004 +0000 + + Connect up r128_ioctls in driver config. + +commit 069f53a93b2c47c55c54dc8092ef23a9e7461033 +Author: Jon Smirl +Date: Sat Nov 6 16:55:41 2004 +0000 + + Move radeon i2c include to top of file + +commit 642a8106d270e74ec8ee1a809657d66f4fe6f542 +Author: Jon Smirl +Date: Sat Nov 6 16:51:36 2004 +0000 + + Export missing r128 ioctl symbol + +commit 000c8eb18ef7ee9cecb34909be52281ec88a5486 +Author: Jon Smirl +Date: Sat Nov 6 16:41:24 2004 +0000 + + Fix Linux build. Why won't this complile? extern int const foo; static + struct drm_driver driver = { .var = foo }; error says foo is not + constant + +commit b2f275b46e575766c7b5dab22ba30a367a182c9e +Author: Eric Anholt +Date: Sat Nov 6 11:50:08 2004 +0000 + + Hook the debug output up to a sysctl, so you can choose to enable at + runtime. + +commit 7adee84064d55207dbf7893cc8cb579bfa1a7631 +Author: Eric Anholt +Date: Sat Nov 6 11:19:38 2004 +0000 + + Add file missed in last commit: Commit first pieces of port to OpenBSD, + done by Martin Lexa (martin at martinlexa dot cz). Now that we've got + porting for all three major BSDs (and the fourth being very similar to + FreeBSD), move the mostly-duplication drm_os_* files into drmP.h. + Remove some cruft from linux heritage and from pieces of the DRM that + have since been removed. + Note that things are still not quite working for even FreeBSD, but these + are first steps at cleanup, and just a WIP checkpoint. + +commit d7510ea4136a031b16fb25a32bd77970d315707a +Author: Eric Anholt +Date: Sat Nov 6 11:16:26 2004 +0000 + + Commit first pieces of port to OpenBSD, done by Martin Lexa (martin at + martinlexa dot cz). Now that we've got porting for all three major BSDs + (and the fourth being very similar to FreeBSD), move the + mostly-duplication drm_os_* files into drmP.h. Remove some cruft from + linux heritage and from pieces of the DRM that have since been removed. + Note that things are still not quite working for even FreeBSD, but these + are first steps at cleanup, and just a WIP checkpoint. + +commit cf259f10aa8dbd83a4c086963fee7138280a9688 +Author: Eric Anholt +Date: Sat Nov 6 02:00:04 2004 +0000 + + Remove the vestiges of the memory-debug code. + +commit c9202c89653b8dac2ac322c3d3a7389945e1c94c +Author: Eric Anholt +Date: Sat Nov 6 01:41:47 2004 +0000 + + Commit WIP of BSD conversion to core model. Compiles for r128, radeon, but + doesn't run yet. Moves the ioctl definitions for these two drivers back + to the shared code -- they aren't OS-specific. + +commit 39a23640b2de9e59e99d48e6de8c9edae0231856 +Author: Jon Smirl +Date: Fri Nov 5 17:29:14 2004 +0000 + + Move ati_pcigart shared routines into drm-core module + +commit f08a01c0e21431e1b7990584ce2f61f0e711c093 +Author: Thomas Hellstrom +Date: Wed Nov 3 13:37:37 2004 +0000 + + Fixed bug in via_dma.c. The code didn't check that the lock was held by the + caller. Just that it was held. + +commit 9409d8231c3be346ce7148275ce0ee86ec171716 +Author: Thomas Hellstrom +Date: Mon Nov 1 20:48:49 2004 +0000 + + Reworked the jump-code in via_dma.c. The command regulator now seems to + pause correctly after a jump. Removed the debug message from within the + interrupt handler of via_irq.c + +commit 08758b2fb76bc4e862f25d0164ae9f523d2dec20 +Author: Keith Whitwell +Date: Mon Nov 1 10:52:18 2004 +0000 + + correct historic mis-attribution of copyright + +commit 5128542814215b26ed342e3a4ac2217606fe5e76 +Author: Felix Kuehling +Date: Sun Oct 31 15:16:44 2004 +0000 + + Allow drivers to override reclaim_buffers in an OS-independent way by + passing drm_device_t* as first parameter, like in the BSD version. + +commit 8264e2c8aa6b2811bca0e45c50ac3328d14bfbf7 +Author: Thomas Hellstrom +Date: Sat Oct 30 13:01:48 2004 +0000 + + Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the + rewind jump with a reinitialization. This makes the code stable on + CLE266 and KM400. + +commit 816a2917099b3ff214dc357c5b41984f34902cf3 +Author: Jon Smirl +Date: Fri Oct 29 17:09:54 2004 +0000 + + Switch SPIN_LOCK_UNLOCKED to spin_lock_init() + +commit c611cb9f171df3b9ad19e57e614f35c67e73ceb1 +Author: Jon Smirl +Date: Fri Oct 29 14:38:07 2004 +0000 + + Add include of moduleparam.h + +commit b974e2cd683fa798970cd1bdc5e20acfb7a34a9c +Author: Jon Smirl +Date: Thu Oct 28 15:52:31 2004 +0000 + + Break poll() to make it match the Xserver's broken expectations. + +commit 486a84d70c31423a849cd88dbd91ced2dcf83742 +Author: Dave Airlie +Date: Thu Oct 28 09:50:39 2004 +0000 + + fix for 2.4 build + +commit b37efdadca5da66cfd442a88353fa92c9e7aec24 +Author: Jon Smirl +Date: Sat Oct 23 18:12:34 2004 +0000 + + Round 2 of getting rid of inter_module_get() + +commit 43cbf43a5f9e54decbfd837d0b5984454f2d61bf +Author: Jon Smirl +Date: Sat Oct 23 14:43:06 2004 +0000 + + Revert symbol_get() changes from drm_drv + +commit 4b29f857685e4fc6c8901a061c6de7b86ee3e993 +Author: Dave Airlie +Date: Sat Oct 23 14:00:53 2004 +0000 + + fix inter module put/get + +commit 1473556e065b1970196b8bb542574cd1e275bb00 +Author: Dave Airlie +Date: Sat Oct 23 07:02:29 2004 +0000 + + actually 2.6.10 introduced pfn range so it should work now.. + +commit 182a0e5dac5e2ae3751abc2eaa0398aa0150a131 +Author: Dave Airlie +Date: Sat Oct 23 06:59:15 2004 +0000 + + fix pfn vs page for older kernels (2.6.9-rc kernels many not work..) + +commit 8d7e798d4c73650ed240a3ad194744b94043e31f +Author: Dave Airlie +Date: Sat Oct 23 06:25:56 2004 +0000 + + Apply radeon r300 microcode patch to non-core + +commit 9ea6fe7aa6ba27cc7003c9cd141e9146a492416d +Author: Jon Smirl +Date: Sat Oct 23 04:21:27 2004 +0000 + + Prepare to eliminate inter_module_get("agp") + +commit ad87dd8427b6142c42d7b97c7a4170c89b6728ec +Author: Jon Smirl +Date: Fri Oct 22 16:03:21 2004 +0000 + + Bring in patch from kernel for remap_pfn_range + +commit d76f734f68eeea32c94de6ad4979a94ca8e320db +Author: Jon Smirl +Date: Thu Oct 21 16:58:28 2004 +0000 + + Fix up the radeon i2c error handing + +commit 17ce33835a0b582d87343fab331d80342f268d4d +Author: Jon Smirl +Date: Wed Oct 20 16:23:42 2004 +0000 + + Don't release an i2c channel that has not initialized correctly + +commit 7ebbebf3d3a3af3c363a1396d737d5a61634124b +Author: Jon Smirl +Date: Wed Oct 20 05:11:49 2004 +0000 + + Switch linux-core from using dev->pdev->driver->name to + dev->driver->pci_driver.name. This avoids the stealth mode case where + pdev is pointing to the wrong driver or no driver. + +commit 5ae6c5af751780fbf424b848aa2355bc303a5b73 +Author: Jon Smirl +Date: Wed Oct 20 04:41:38 2004 +0000 + + Fix dd vs di version typo in drm_setversion + +commit 157a814be6f3065a2463141f1592fa8948765334 +Author: Jon Smirl +Date: Tue Oct 19 18:18:02 2004 +0000 + + Add a protective check against a possible buffer overflow + +commit bcfbd73536e8e44b028953e4e04c83d143612a10 +Author: Jon Smirl +Date: Tue Oct 19 16:30:02 2004 +0000 + + Fix missing I2C busses to be non-fatal error. + +commit ca1ec9268f9de783daf3f2db86a4fb47108d609a +Author: Jon Smirl +Date: Tue Oct 19 02:50:14 2004 +0000 + + drm-core, Clean up bug error path on stealth mode exit + +commit 0d89b19325d533a7c1817fcb568a1879fd28a865 +Author: Jose Fonseca +Date: Mon Oct 18 14:16:41 2004 +0000 + + Update Doxygen configuration & comments. + +commit d403173005fd345ba8b83f19497a8aaf07e7eee6 +Author: Ville Syrjala +Date: Sat Oct 16 11:21:56 2004 +0000 + + Fixed off by one errors in clipping. + +commit 52fdf10fd79c2223c05e2146431343132b4db964 +Author: Ville Syrjala +Date: Sat Oct 16 10:54:58 2004 +0000 + + Fixed bad formatting. + +commit a8b2c94c181a8f398a824aa3267144a29ffaca33 +Author: Jon Smirl +Date: Fri Oct 15 20:37:01 2004 +0000 + + Remove drm_init.c + +commit 91aa32742c49db0c553b5836afd28c8ea2436014 +Author: Jon Smirl +Date: Fri Oct 15 20:36:15 2004 +0000 + + Move drm_cpu_valid out of drm_init. drm_init is empty now. + +commit fa50e2b5132b84353ae964a39c3b10ea270d15e8 +Author: Jon Smirl +Date: Fri Oct 15 02:59:35 2004 +0000 + + Switch linux-core over to 2.6 parameter model to enable debug use + drm_debug=1 + +commit 5e8838fd115879174567c4c2db8ad25331619994 +Author: Jon Smirl +Date: Wed Oct 13 16:40:53 2004 +0000 + + Add a poll function that alternates between zero and normal poll return to + bring DRM into conformance with normal poll(). + +commit bbfe18e3bf7b45543c9f59f7363c1ed5b6bca719 +Author: Thomas Hellstrom +Date: Tue Oct 12 18:46:26 2004 +0000 + + Via updates. Fixed unlikely but possible uint32_t overflow in ring-buffer + code. bumped patchlevel. + +commit ad70dc676ebf8f2f86d171dccb873a04a3e5b87b +Author: Jon Smirl +Date: Tue Oct 12 03:59:17 2004 +0000 + + Breakout heads into their own data structures. + +commit ad549c5ae62fd75aa2bdb8bf5efc4913c476cb02 +Author: Jon Smirl +Date: Sun Oct 10 22:54:55 2004 +0000 + + Rename fn_tbl to driver. Core driver now uses pci_driver name which + reflects the personality name. + +commit 3f02a793514a866401119efc74c20512f4732703 +Author: Dave Airlie +Date: Sun Oct 10 05:52:19 2004 +0000 + + Vladimir requested support so we can at least load r300 microcode for + helping + 2D operations. + Ups radeon to version 1.12.0, Vladimir, you might want to add any extra + pciids... + Approved-by: Dave Airlie + +commit 5654a78547d0903c0ea2c290cbfac6ea9e777b9a +Author: Jon Smirl +Date: Sun Oct 10 02:49:06 2004 +0000 + + Forgot to add the new Makefile + +commit b5e02f8eb3b9c178014e510e5999fab671031a6c +Author: Jon Smirl +Date: Sun Oct 10 00:09:31 2004 +0000 + + Make the test programs build + +commit 8727326371621c8c2b9f794532ca543a708ed71f +Author: Dave Airlie +Date: Sat Oct 9 12:42:52 2004 +0000 + + cleanup VIA driver to look a bit like others before kernel merge + +commit efcb9fb7ae3caad341bd8c82febf9d65b2a73933 +Author: Dave Airlie +Date: Sat Oct 9 11:16:20 2004 +0000 + + fix up whitespacing in Kconfig + +commit fec94a82748b3603da7239e39d247a9654765659 +Author: Dave Airlie +Date: Sat Oct 9 11:12:24 2004 +0000 + + Lindent the via stuff so I can include it in kernel + +commit e09229d6c85bcb8b899f09fd70f264b4e1d6d0bd +Author: Dave Airlie +Date: Sat Oct 9 10:58:19 2004 +0000 + + remove unused dma remnants that were gamma only - these could cause an oops + on via + +commit d24194e904cbfc85147efae6922e497e0102b2eb +Author: Thomas Hellstrom +Date: Fri Oct 8 21:11:02 2004 +0000 + + Changed unsigned to uint32_t in some ioctl parameters. Introduced first + rudimentary command verifier for dma buffers. Changed the decoder futex + ioctl parameters. Bumped the via major version number. + +commit 3981f17227aa72b263d27e79aede307b1e2980a8 +Author: Jon Smirl +Date: Fri Oct 8 14:31:25 2004 +0000 + + Fix refcount bug in stealth mode + +commit 6619c5d941b86452405222a5b44a546dd0aa45c7 +Author: Jon Smirl +Date: Thu Oct 7 00:40:16 2004 +0000 + + Fix drm_exit to allow for DRM(global) being deleted when framebuffer is + loaded. + +commit 61d36f6179f535de4a37c58cb7dade2b6035883d +Author: Jon Smirl +Date: Wed Oct 6 16:27:55 2004 +0000 + + Revert back to drm_order() instead of using kernel get_order(). The + functions are not identical. + +commit 4dbc1e87288987f0506087c7971639c33af8fe3e +Author: Dave Airlie +Date: Tue Oct 5 12:12:01 2004 +0000 + + Patch for Kconfig for making i830/i915 not build together + +commit 6dee8401a65c2b976dad8937985439fb8f0887be +Author: Jon Smirl +Date: Tue Oct 5 02:58:14 2004 +0000 + + enable the device in the right order, remove __devinit from drm_int + +commit aba12cfc0e80694457347dc9d0ed78cd78192ea3 +Author: Jon Smirl +Date: Sat Oct 2 19:11:30 2004 +0000 + + janitor-list_for_each-drivers-char-drm-radeon_memc.patch from mm kernel + +commit e17abf5d5dc7c9895ed9aea0efb4ac501171fa54 +Author: Jon Smirl +Date: Thu Sep 30 23:47:45 2004 +0000 + + Make the debug memory functions compile for the core model. + +commit a36a6a291d3627bf1ad036fa4a7a33ea99e8ed5d +Author: Jon Smirl +Date: Thu Sep 30 21:27:59 2004 +0000 + + Remove DRM() macros from core ffb driver. DaveA says he'll make it compile + someday. + +commit 9f9a8f1382711a05ec000b639d971b619d8bc305 +Author: Jon Smirl +Date: Thu Sep 30 21:12:10 2004 +0000 + + Lindent of core build. Drivers checked for no binary diffs. A few files + weren't Lindent's because their comments didn't convert very well. A + bunch of other minor clean up with no code implact included. + +commit 368493edc9e47ce63edf955e9fa9d096500c4e8e +Author: Jon Smirl +Date: Thu Sep 30 21:06:53 2004 +0000 + + savage.h not used in core builds + +commit e1d74a98994963b0427486391fad4f6473d39c9f +Author: Jon Smirl +Date: Thu Sep 30 20:46:59 2004 +0000 + + core ffb.h is not used anymore + +commit b3d70ad6a7b6f4bd1216929200ddfc8e348529cb +Author: Jon Smirl +Date: Thu Sep 30 20:25:13 2004 +0000 + + Remove unused drm_module.h + +commit 1c0a437fa20e8c3fb971cd8947754a9b274bea76 +Author: Jon Smirl +Date: Thu Sep 30 19:26:35 2004 +0000 + + Move things around to reduce public symbols and even out files. Switch to + get_order from drm_order. + +commit 3aef3841d0c8099a97a56a285f0a21d9147405bd +Author: Jon Smirl +Date: Thu Sep 30 18:13:33 2004 +0000 + + Make fops per driver instead of global, remove default flush, poll, read + functions + +commit 0bff0d9eb6317ccccafc79cac7b235b4cb4c9161 +Author: Jon Smirl +Date: Tue Sep 28 22:25:06 2004 +0000 + + Getting the AGP module is a global resource. Make sure a dual PCI/AGP + driver doesn't release it on unload since an AGP driver may also be + loaded. + +commit 9e421181ddfc2d91859e9959487baf2df851e743 +Author: Jon Smirl +Date: Mon Sep 27 20:14:31 2004 +0000 + + Fix the shared directory I accidentally stomped on + +commit 6d6526fdf9a4390fab3edbca79d6a0b80b84ddd1 +Author: Jon Smirl +Date: Mon Sep 27 19:53:51 2004 +0000 + + core needs three new files + +commit fa6b1d129e7bf8acf41e66c9c665ae9f9c1d5b0d +Author: Jon Smirl +Date: Mon Sep 27 19:51:38 2004 +0000 + + First check in for DRM that splits core from personality modules + +commit 77fa7b9548bf7a5bf5e49515f1a478c27ede07a7 +Author: Jon Smirl +Date: Mon Sep 27 15:42:48 2004 +0000 + + Flip the 2.4 check so that it looks for 2.6 instead. This will allow builds + where we can't determine the version through. + +commit edbfb46c0bfcc2a5a20d9f23d7088a4acce52b8d +Author: Jon Smirl +Date: Fri Sep 24 04:31:25 2004 +0000 + + README with hints on how to make a 2.6 specific version of a 2.4/2.6 shared + file + +commit 1d6392f1fdcd8ed7e2936af815387d12ee124cab +Author: Jon Smirl +Date: Fri Sep 24 04:21:21 2004 +0000 + + Makefile reminder to build in 2.6 when on 2.6 + +commit 74f063fc9d445f263242063e7acab1864ff75205 +Author: Jon Smirl +Date: Fri Sep 24 03:12:17 2004 +0000 + + Create new linux-2.6 build. Move all gpl files into the 2.6 build. If you + edit files for 2.6 be sure and break the link to the 2.4 directory and + copy the cvs history. + +commit 36a257cfe9e45e7a2022f19100a193eb73e30d4b +Author: Jon Smirl +Date: Thu Sep 23 17:22:27 2004 +0000 + + Remove 2.6 code that allow DRM major device number to be shared. We can add + it back later if needed. Checked DRM on both 2.4 and + 2.6 to ensure that it builds and runs. + +commit 55c5e240892bb9673cce602e7deb323f29aa8031 +Author: Jon Smirl +Date: Thu Sep 23 05:40:05 2004 +0000 + + Add new sysfs support files + +commit c158a36c4cfef024ba1be05a163cfd4b00ebea21 +Author: Jon Smirl +Date: Thu Sep 23 05:39:15 2004 +0000 + + 1) switches from class_sysfs to drm sysfs implementation to allow + customization + 2) compiles again on 2.4, but doesn't work + +commit af326f6f0c26191b4aef2183fb485e58495b29a5 +Author: Felix Kuehling +Date: Wed Sep 22 22:51:18 2004 +0000 + + Create permanent maps of framebuffer, aperture and MMIO registers. Added + chipset-type information in driver data field of Savage PCI-IDs. Added + missing PCI-ID 0x8d03 (ProSavageDDR on Pentium boards). Don't require + AGP. + +commit 27fc998f7d16e7197f38b2d7d1ce65938e06423d +Author: Jon Smirl +Date: Wed Sep 22 19:13:02 2004 +0000 + + Remove hotplug reset support from DRM driver. This will be handled by the + VGA driver when it gets written. + +commit 184a50368505bb74f3efac3cf48e72db41487342 +Author: Eric Anholt +Date: Wed Sep 22 16:45:44 2004 +0000 + + Add *.flags to cvsignore. + +commit 2ad068005aa9785dd86e0023354f68e970f04e9f +Author: Jon Smirl +Date: Tue Sep 21 05:13:21 2004 +0000 + + Make DRM permanent maps match broken X behavior. X is mapping regions that + are both smaller and larger than what the hardware supports. If DRM + tries to fix these requests X will fail. + +commit 6f31c42fe923ff3f79a55d8c859e6ccfd3bd322d +Author: Jon Smirl +Date: Mon Sep 20 19:23:27 2004 +0000 + + Remove size restriction on permanent addmap + +commit 59cc1d8256fb3b6e2374e52eb24da12b046aea91 +Author: Jon Smirl +Date: Mon Sep 20 17:09:26 2004 +0000 + + Felix's fix for map request smaller than permanent map size + +commit 5654880eeed0646a53655b093f4d3bf5608ebcc7 +Author: Dave Airlie +Date: Mon Sep 20 11:29:16 2004 +0000 + + remove HAVE_COUNTERS + +commit fa75a81c9acbae7282e2ea5596f04a6b359c95e9 +Author: Dave Airlie +Date: Mon Sep 20 10:45:53 2004 +0000 + + another fix after the macro stuff + +commit c15b1d15ffbf41ed60cd807d13f031c8f270f887 +Author: Jon Smirl +Date: Sat Sep 18 16:44:43 2004 +0000 + + Fix from: Nishanth Aravamudan replace direct assignment with + __set_current_state() + +commit 993a75a5d148cb0a93bbed677b550bfb4d57fe4a +Author: Jon Smirl +Date: Fri Sep 17 20:01:59 2004 +0000 + + Makefile and missing file to build libxf86drm.a + +commit f10f8821014bc7a05e8bbc9f199e0f60b1541a0e +Author: Jon Smirl +Date: Fri Sep 17 04:25:19 2004 +0000 + + Add the two GPL licensed I2C support files. + +commit 0c6fb0fbe1fff43af60634b785cd5b7196c8dd03 +Author: Jon Smirl +Date: Fri Sep 17 04:02:28 2004 +0000 + + Add linux sysfs i2c support to radeon driver. This patch adds GPL licensed + files to the linux build but not to the BSD directories. + +commit c7c9d3ef7b82215696c007415a018c670d54041e +Author: Jon Smirl +Date: Thu Sep 16 18:42:03 2004 +0000 + + Let's try adding the dyn-minor patch again. This patch will reuse minor + numbers if a card is hotplugged in/out instead of just having them + increase. + +commit 5dfd89ae0a4894a3b9de17c17bb75c47e6509b8e +Author: Jon Smirl +Date: Thu Sep 16 14:32:17 2004 +0000 + + Fix drm_scatter to properly report it's availability + +commit eeb0ef1a7076e7744655954e95a65532eb4b7ebe +Author: Jon Smirl +Date: Wed Sep 15 17:44:30 2004 +0000 + + Back dyn-minor patch out for now. fops handling is broken on some cards + +commit 941d2cf431d0534ec53f90e627bb0445b6f0260e +Author: Jon Smirl +Date: Wed Sep 15 16:06:50 2004 +0000 + + Don't use module_param if it isn't defined in older kernels. + +commit 64ef12c55cfca7885108950eb975c4d6625a0570 +Author: Jon Smirl +Date: Wed Sep 15 00:20:21 2004 +0000 + + Dynamic device minor support. Minor device numbers will be reused if the + device is hotplugged in/out of the system + +commit 03c2e674e43db5fcf4cb4b641005c329c7b343a9 +Author: Jon Smirl +Date: Tue Sep 14 03:59:25 2004 +0000 + + Add chip family names to the radeon driver + +commit 13cb3f1b006d24e4578aca25522fd224aed5cd9c +Author: Jon Smirl +Date: Sun Sep 12 19:24:08 2004 +0000 + + Fix error path in probe() to release resources if there is an error. + +commit 15407efd468b8745354a346544aba5f25448103a +Author: Jon Smirl +Date: Sun Sep 12 03:30:30 2004 +0000 + + Make the comment match the code + +commit 36050cc958596ca81d667d8a51e124e9ea9eb866 +Author: Jon Smirl +Date: Sun Sep 12 03:23:50 2004 +0000 + + Fix DRM to compile cleanly with recent kernel changes in PCI IO and + DRM_COPY_FROM_USER. PCI IO changes in 2.6.9-rc1 bk currently. + +commit e6d468ad7f398a72e8be227564f3a450de873cc6 +Author: Jon Smirl +Date: Fri Sep 10 16:44:28 2004 +0000 + + More general patch to mark resources in use by all DRM drivers. Makes the + code Linux specific. + +commit 1fb27632c3338ff974c27fd88e2098a5193bb145 +Author: Jose Fonseca +Date: Wed Sep 8 20:57:39 2004 +0000 + + Update doxygen configuration file. Minor documentation updates/fixes. + +commit 3bf785c9126a0bbc38b794096dbbddab5682c251 +Author: Jon Smirl +Date: Wed Sep 8 01:49:06 2004 +0000 + + Adjust permanent mapping code to account for more than one framebuffer map + +commit b0c73b7fcb3f2504f2ab747bae75a98112071491 +Author: Thomas Hellstrom +Date: Tue Sep 7 16:48:44 2004 +0000 + + Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor + version number. + +commit c33f4449fc893d5478d9541bc6a80124c8f96ea5 +Author: Dave Airlie +Date: Sun Sep 5 23:33:57 2004 +0000 + + missed fix as part of last checkin + +commit eeae6a0a3885f9af9efba7c1e1bcb1e633635717 +Author: Dave Airlie +Date: Sun Sep 5 10:54:59 2004 +0000 + + merge back bunch of whitespace and misc changes from kernel + +commit f96e00595dff85e18697205686f568042e0b083b +Author: Dave Airlie +Date: Sun Sep 5 10:10:34 2004 +0000 + + bad code copy for alpha.. fix the member names + +commit 3dcbc1f4a13e2f8d5ddb2a9ae8bc83c48a30a2b7 +Author: Dave Airlie +Date: Sun Sep 5 02:36:48 2004 +0000 + + make the AMD64 check a compat thing + +commit 4499ea42eae887c45403cd9ea364fccf311fee8e +Author: Dave Airlie +Date: Sat Sep 4 23:21:40 2004 +0000 + + Fixup OS_HAS_AGP/OS_HAS_MTRR along lines of patches going to kernel, as + suggested by Arjan.. + Signed-off-by: Dave Airlie + +commit 3d9e16aa6e074fdaa7a74f2fb6b0c46f1dd04172 +Author: Dave Airlie +Date: Sat Sep 4 13:15:40 2004 +0000 + + doh.. that makes no sense.. thinko in removal of OS_HAS_AGP + +commit 8825579f1c23f5165270fa284e11efd62437e34a +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_core.h was initially added on branch drmlib-0-0-1-branch. + +commit fba81d4482303ba0f88c07871635c8a6583257cb +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_agpsupport.c was initially added on branch drmlib-0-0-1-branch. + +commit 0c955c00c7722bb611eac7876433f66e7d1d0e83 +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_core_memory.h was initially added on branch drmlib-0-0-1-branch. + +commit be11d2b18561fa4a3e55d178b925820c244a1b54 +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_headers.h was initially added on branch drmlib-0-0-1-branch. + +commit 91be7bd6de6a7958780bdb6886205ffe0287e7c3 +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_memory.c was initially added on branch drmlib-0-0-1-branch. + +commit b13574a0f38537958fb08006088ef3d9009a3ff7 +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_memory_debug.c was initially added on branch drmlib-0-0-1-branch. + +commit 02ab8dd7f7edaf6626ebb61320380fec3cb4da77 +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drm_proc.c was initially added on branch drmlib-0-0-1-branch. + +commit 9ed4e7854bb2e785412488a88a41df5659faad56 +Author: Dave Airlie +Date: Fri Sep 3 14:54:53 2004 +0000 + + file drmcore_exports.c was initially added on branch drmlib-0-0-1-branch. + +commit 838bb7af71b5730de55549a74c8198215c1f1475 +Author: Dave Airlie +Date: Thu Sep 2 12:33:03 2004 +0000 + + oops called ctor instead of dtor.. found this on the kernel merge + +commit a070d15b530da87b835f4a439886eea3c606ac2f +Author: Jon Smirl +Date: Thu Sep 2 04:11:27 2004 +0000 + + Fix ref count problem in stealth mode. pci_get_subsys() with last parameter + set does the pci_dev_put for you. + +commit 244b3e6c7cf61d3de56267e5813b0a1821ca0ac0 +Author: Dave Airlie +Date: Tue Aug 31 05:02:23 2004 +0000 + + Apply patch from Bryan Stine bugzilla #1227 + +commit da6b44849763fac5ccb7d7511128454c6c2a92c7 +Author: Dave Airlie +Date: Mon Aug 30 11:34:51 2004 +0000 + + implement drm_core_check_feature and use it .. looks lots nicer + +commit 7809efc8c32520e6b25c143ee3276edbf534ed14 +Author: Dave Airlie +Date: Mon Aug 30 09:01:50 2004 +0000 + + drm-memory patch, cleans up alloc/free and makes calloc look more libc like + +commit 08de6e5b04c1950a5f396315e59d2476726e26d8 +Author: Erdi Chen +Date: Mon Aug 30 04:58:24 2004 +0000 + + Fix copy_from_user return value ignored warning at via_dma.c:168. + +commit 0844f3e9f37bacf650fab4953482923e9480aae3 +Author: Dave Airlie +Date: Sun Aug 29 12:39:17 2004 +0000 + + add context include so fn are defined + +commit b9c82926bc5fe91cac9091a5af3f68b797bd95d1 +Author: Dave Airlie +Date: Sun Aug 29 12:37:11 2004 +0000 + + fix up some small things ffb (no idea if it works or not ..) + +commit 55c6e72306efd960eb28870c8f7520360275d444 +Author: Dave Airlie +Date: Sun Aug 29 12:17:26 2004 +0000 + + remove hacky context thing that was gamma only + +commit 1430163b4bbf7b00367ea1066c1c5fe85dbeefed +Author: Dave Airlie +Date: Sun Aug 29 12:04:35 2004 +0000 + + Drop GAMMA DRM from a great height ... + +commit 6916572c1c32cd030258ab917f0a568517d5006b +Author: Dave Airlie +Date: Sun Aug 29 10:09:23 2004 +0000 + + fixup issue caused by fntbl-2 merge + +commit 4a89c75456b1d7d0dd20bae0e0f5dd47bdc5417e +Author: Jon Smirl +Date: Sat Aug 28 23:59:51 2004 +0000 + + Initialize pdev to NULL correctly so that pci_get_subsys() will work. + +commit 73e606753fcece20f905281d44067504d5f2fabc +Author: Dave Airlie +Date: Fri Aug 27 09:14:30 2004 +0000 + + run i915 through lindent + +commit 019fd38a3c032774a1e80b3aed7de3710ba84e0a +Author: Dave Airlie +Date: Fri Aug 27 09:11:07 2004 +0000 + + __NO_VERSION__ hasn't been needed since 2.3 days ditch it... + +commit 60f23ebc5cd5d78f594b20b2ddb330b5158c0902 +Author: Jon Smirl +Date: Fri Aug 27 02:26:07 2004 +0000 + + Make DRM detect vesafb and revert to stealth mode to avoid resource + conflicts + +commit e068fcbfddaf95e96be7999e1a66062fab6fcb46 +Author: Jon Smirl +Date: Thu Aug 26 03:54:01 2004 +0000 + + Rearrange things so that via_dma.c will compile with inline via_check_dma + +commit d4dbf457813e97531ded3bf24f3b6ad421189c69 +Author: Dave Airlie +Date: Tue Aug 24 11:15:53 2004 +0000 + + Merged drmfntbl-0-0-2 + +commit eac498baeaf9b57b448065b0fb9f4eeadbb9aa6b +Author: Dave Airlie +Date: Tue Aug 24 10:43:45 2004 +0000 + + addmap-base-2 patch from Jon Smirl: + sets up the DRM to have the ability to have permanent maps while the driver + is loaded... + +commit 25e319c1ef5b6c002ddfe55338cd920240cc1dad +Author: Erdi Chen +Date: Tue Aug 24 01:44:37 2004 +0000 + + This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: + DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH + The first ioctl sets up an area in AGP memory that will be used as the ring + buffer. The second ioctl copies a command buffer from user space memory + to the ring buffer. The third ioctl waits for engine idle until it + returns. + The motivation for this patch is to avoid the wait for engine idle call + before each buffer flush in the current DRI driver. With this patch, + the DRI driver can continue to flush its buffer as long as there is + free space in the ring buffer. + This patch adds an additional copy operation on the command buffer. This + buffer copying is necessary to support multiple DRI clients rendering + simultaneously. Otherwise, more CPU time will be spent in the busy loop + waiting for engine idle between DRI context switch. Even in the single + client case, the tradeoff is reasonable in comparision to the kernel + call to check for free buffer space for the client to render directly + to the ring buffer. + +commit 7fe4f607681e9a5593e91915953a9b6c45e5f08c +Author: Dave Airlie +Date: Mon Aug 23 10:05:01 2004 +0000 + + set pointers to NULL after freeing, remove some extra debugging + +commit 5c9ed8309493acb099463d25b32fabb5b7c004af +Author: Dave Airlie +Date: Tue Aug 17 13:10:05 2004 +0000 + + Merged drmfntbl-0-0-1 + +commit 93e8c201afac565942f9d3523ac808d3220d6d0e +Author: Dave Airlie +Date: Tue Aug 17 11:24:50 2004 +0000 + + preparation patch for radeon permanent mapping registers/framebuffer makes + dev_priv live always, and add AGP detection in kernel patch: + radeon-pre-2.patch From: Jon Smirl + +commit 02ef96053ccbe4c20827ec8006455906e7fb2360 +Author: Dave Airlie +Date: Tue Aug 17 10:36:46 2004 +0000 + + 2.6.8.1 has changed the links in /lib/modules + +commit c360d6f4f2075c90d42b109e3da932ac5d69699c +Author: Jon Smirl +Date: Sun Aug 15 15:46:28 2004 +0000 + + Fix warning about unused ddev variable + +commit 23bbff24aa427d6d0c16707dbe99c28ba2075894 +Author: Jon Smirl +Date: Sun Aug 15 15:35:14 2004 +0000 + + Add dev to DRIVER_CTX_DTOR( dev, pos->handle) so that sis driver will + compile #if 0 get_pci_driver use in hotplug function until fbdev work + around is written + +commit 740ddb9c5d5506bc921d10742cf41b5aa143f84e +Author: Eric Anholt +Date: Sat Aug 14 00:56:34 2004 +0000 + + Remove unused pcigart/sg header stuff from i915 driver. + +commit dd83f39f034756e7eb8e002dbfb0047f88aa79e4 +Author: Eric Anholt +Date: Sat Aug 14 00:46:15 2004 +0000 + + Add a "dev" argument to DRIVER_CTX_[CD]TOR. This will be used in an + upcoming commit for the SiS driver. + +commit 2376ec4ef8d280cf6fba44ba0163989eff739187 +Author: Eric Anholt +Date: Sat Aug 14 00:03:32 2004 +0000 + + Hopefully proper fix for corrupted driver name in memcontrol list. + Reported by: Jung-uk Kim + +commit 211c37e250af6f8645a247ef1cce4dee041f3fd1 +Author: Eric Anholt +Date: Fri Aug 13 23:32:39 2004 +0000 + + Fix apparent copy'n'paste-o of the card attributes commit that broke the + FreeBSD build. + +commit d78db7c930c4652f45584098747efa8feb4cd280 +Author: Eric Anholt +Date: Fri Aug 13 23:17:17 2004 +0000 + + Enable MTRR usage on AMD64, and use DELAY() instead of rolling our own + udelay code. + Submitted by: Jung-uk Kim + +commit fd62869a0f600f2fd477d5aa365f7732686f5542 +Author: Adam Jackson +Date: Wed Aug 11 23:23:35 2004 +0000 + + Bug #979: Don't include on linux, it occasionally emits + makedev() as a function call that elfloader can't resolve. Originally + Gentoo Bug #41962, reported by Ryan Breen, fix feedback from Ryan + Lortie. + +commit ecf1458b2ce431227807b07844b44e8c9171636d +Author: Dave Airlie +Date: Wed Aug 11 09:07:36 2004 +0000 + + minor patch from Jon Smirl : sets up some things for later use + +commit 9277f9eef388ffef26000ab455d30260bdf41c93 +Author: Dave Airlie +Date: Tue Aug 10 11:14:07 2004 +0000 + + Patch from Jon Smirl to add attribute field to the pciids, and use this for + certain radeon combinations - intel drivers can probably use this for + dual head capable devices etc.. + +commit 42e91874608f28246367207815eb7334574d7aa7 +Author: Dave Airlie +Date: Wed Aug 4 10:56:48 2004 +0000 + + 2.4 compat + +commit be3e54bc15aadf26743a8d0150b8fa38952863b4 +Author: Dave Airlie +Date: Wed Aug 4 10:53:21 2004 +0000 + + 2.4 hotplug compat + +commit 6c9715eaf502587c58acfaea420a4fdf29bd7221 +Author: Dave Airlie +Date: Tue Aug 3 11:26:38 2004 +0000 + + bring over fix from i865-agp branch, it now probes the driver, X hangs + box.. + +commit 4f8f02a1922653b2ce5c115c4469e927b5d826fa +Author: Dave Airlie +Date: Tue Aug 3 09:21:11 2004 +0000 + + fix for drm in /proc - from Jon Smirl + +commit 33b740ad9946ce6fdedeed45287e488f95fb7b42 +Author: Dave Airlie +Date: Mon Aug 2 11:45:23 2004 +0000 + + forgot to check these in.. thanks to Jon for reminding me .. + +commit 5e7e41819eb4d4b18201bbb46d0c6e359c4039cd +Author: Jon Smirl +Date: Sat Jul 31 15:45:00 2004 +0000 + + Add a hotplug event to DRM. Parameters match the ones from the general PCI + hotplug event plus the addition of one requesting RESET. Put your + scripts in /etc/hotplug.d/drm to run. kernel class_simple generates the + ADD/REMOVE events. No cards currently request RESET, the flag is there + to stop you from resetting your boot display. + +commit bd71ba642890856aff339482a9422ecea1ef55d1 +Author: Dave Airlie +Date: Sat Jul 31 08:38:39 2004 +0000 + + patch from RH xorg-x11 tree ported to drm.h + +commit cc4d03930ce753302a88fc9722473a5d9fac7b44 +Author: Dave Airlie +Date: Sat Jul 31 08:12:39 2004 +0000 + + Patch picked up from Redhat xorg release: + Patch by John Dennis which fixes DRI locking bug on + ia64 architecture. + https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=104338 + http://bugs.xfree86.org/show_bug.cgi?id=778 + +commit eb3d0635d4830969d10d5fe8aef17cebb2f3fd15 +Author: Dave Airlie +Date: Sat Jul 31 07:26:52 2004 +0000 + + fixes for using userspace pointers found by sparse utility + From: Dave Airlie + +commit dc4508c33845602e4c94c3e125536d01fe9110b1 +Author: Dave Airlie +Date: Sat Jul 31 07:25:58 2004 +0000 + + athe patch below optimises the drm code to not do put_user() on memory the + kernel allocated and then mmap-installed to userspace, but instead + makes it use the kernel virtual address directly instead. + From: Arjan van de Ven + +commit 1cec18a5cd3bcd37aab71c255d63fd394143bc5e +Author: Dave Airlie +Date: Thu Jul 29 13:00:48 2004 +0000 + + add read/write 16 + +commit b1cf4ca7e540bcf28beaf3f5a70915a810a75b1b +Author: Dave Airlie +Date: Thu Jul 29 12:49:54 2004 +0000 + + change to agp not pci ... still not working + +commit 0b02bf9d45b70af3b7e236526143c7b78a6fca8b +Author: Dave Airlie +Date: Thu Jul 29 11:09:22 2004 +0000 + + initial port of i915 to BSD, not finished doesn't work.. no idea why... + +commit 862fcee057a4602a0a9fdc54266f63fe33b0fd8b +Author: Dave Airlie +Date: Sun Jul 25 08:57:15 2004 +0000 + + check for __user if not there define it + +commit 02df04d71d373f1f779ebfd5d383a704ebb397ee +Author: Dave Airlie +Date: Sun Jul 25 08:47:38 2004 +0000 + + sync up with current 2.6 kernel bk tree - mostly __user annotations + +commit 1f132b7849c453d3aebd227866f743cbcf7f3881 +Author: Dave Airlie +Date: Sun Jul 25 05:52:22 2004 +0000 + + whitespace merge with kernel + +commit c54ba5691a573ba273498217323f19c35b1637d8 +Author: Dave Airlie +Date: Sun Jul 25 05:41:44 2004 +0000 + + if the driver has already register don't do another intermodule register + +commit 6ba31fb4813116e94f8fc94574ffd81743cf8832 +Author: Dave Airlie +Date: Sun Jul 25 05:36:45 2004 +0000 + + Patch from Tom Arbuckle for missing bus_address + +commit 1e5354e867d1dde8c86273e7434f49b57779ef36 +Author: Keith Whitwell +Date: Fri Jul 23 16:12:27 2004 +0000 + + Correct a couple of packet length calculations. + +commit 6ed7e36f4c6933cc29b0f5c8cb810490dd93a8fc +Author: Dave Airlie +Date: Thu Jul 22 12:07:13 2004 +0000 + + another logic error returns 0 or greater for success + +commit ea2155a2e1c31f634d80701a00fb19af6d3402c3 +Author: Dave Airlie +Date: Wed Jul 21 09:36:16 2004 +0000 + + ATI Rage 128 and Radeon DRM unconditionally depend on PCI + Signed-off-by: Geert Uytterhoeven + +commit c9911beb0957c7ccf93c73f77f349f3f8788b526 +Author: Dave Airlie +Date: Wed Jul 21 09:30:43 2004 +0000 + + add some more debugging fix ++ and -- + +commit a776c5ec0464e264bba3f3a4794a067d3c667097 +Author: Dave Airlie +Date: Tue Jul 20 12:43:12 2004 +0000 + + first set of __user annotations from kernel (Al Viro) + +commit b35cba47d5e927c3ff1944fadef1816b9b1e1dd7 +Author: Dave Airlie +Date: Tue Jul 20 11:48:25 2004 +0000 + + Add NULLs instead of 0 for i915 + +commit 9266bf53019b29a92c7e6c65e7b89bdae365b70d +Author: Dave Airlie +Date: Tue Jul 20 11:35:29 2004 +0000 + + Kconfig update add i915 bring over some stuff from kernel + +commit b20b00d4bc49534ba6e3695fb05cfc240bd3f0af +Author: Dave Airlie +Date: Tue Jul 20 11:26:13 2004 +0000 + + add x86_64 architecture defines from kernel (leave AMD64 defines in for + backwards compat) + +commit fdb6ae31cb721a928d058d7419444f55eb60a542 +Author: Dave Airlie +Date: Tue Jul 20 11:22:26 2004 +0000 + + fix some more NULLs from kernel + +commit 7ee263b94f77cadab659207344c82d5528d498cb +Author: Dave Airlie +Date: Tue Jul 20 10:59:02 2004 +0000 + + attempt to clean up stub_register, register_chrdev isn't good enough to + make the decision for multiple cards with one drm .. + +commit 8efddd01e8a2254b4ed00dff0d55827b6f2b35ce +Author: Dave Airlie +Date: Thu Jul 15 13:03:55 2004 +0000 + + sparse cleanups from kernel: Al Viro + +commit bb5112b616080033ab9f09092098527f2aa09b70 +Author: Dave Airlie +Date: Wed Jul 14 12:34:55 2004 +0000 + + Fix reference counting for stub for new Linux PCI probe + +commit e86fc9f47f05f47375d5a306fe979012e3b7e8e4 +Author: Dave Airlie +Date: Wed Jul 14 12:14:37 2004 +0000 + + allow O= usage for Linux 2.6 kernel building in another directory + +commit 6c16cbd40469d2690b293ef854de7a1f7246b998 +Author: Dave Airlie +Date: Sun Jul 11 10:17:34 2004 +0000 + + split out backwards compat into a separate file makes it easier for merging + to 2.6 + +commit f9e2fe84700c155a744d7ae3db4ebe12d5db9b10 +Author: Dave Airlie +Date: Sun Jul 11 09:58:49 2004 +0000 + + fix issue in 2.4 kernels with returning NULL from this function + +commit 6e4bf5ead5a342426020a1d48d93b8deae2a9e73 +Author: Jon Smirl +Date: Thu Jul 8 20:18:10 2004 +0000 + + Add two items to Makefile clean XFree86 bug: Reported by: Submitted by: + Reviewed by: Obtained from: + +commit 8696e71db2d79eb318c00abde625d7b61d6800a1 +Author: Jon Smirl +Date: Wed Jul 7 04:36:36 2004 +0000 + + Make drm/libdrm/xf86drm.c match + xc/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c so + that it matches the prototypes in xf86drm.h XFree86 bug: Reported by: + Submitted by: Reviewed by: Obtained from: + +commit deed1eca099eab19f48e40a5b0e7c15c2304b3d4 +Author: Jon Smirl +Date: Wed Jul 7 04:22:17 2004 +0000 + + Add xf86drm.h back to drm/libdrm until it's true home can be found. + mesa-solo needs this file to build. XFree86 bug: Reported by: Submitted + by: Reviewed by: Obtained from: + +commit eaccc05b267670a0934675064e37bbd590e1028e +Author: Eric Anholt +Date: Tue Jul 6 00:25:19 2004 +0000 + + Fix module loading on alpha by not referencing MTRR symbols on + !__REALLY_HAVE_MTRR. + +commit 694291fbd39e0e6ad9a9698794485003648c7fd0 +Author: Eric Anholt +Date: Tue Jul 6 00:23:42 2004 +0000 + + MFC as of 20040705: dev_t -> struct cdev * change. + +commit f3527e9256ab6494e3bffebfa29d870891266c4c +Author: Dave Airlie +Date: Mon Jul 5 12:10:25 2004 +0000 + + align with kernel + +commit 3c9fb37e655f5556c9c002535f1a85c4f248fb2c +Author: Dave Airlie +Date: Mon Jul 5 11:56:51 2004 +0000 + + fixes from kernel for 0 vs NULL - mika + +commit 4cfd0d5ceed49f834a09b22756c100b77bcfa327 +Author: Dave Airlie +Date: Mon Jul 5 11:44:30 2004 +0000 + + whitespace align with kernel + +commit 87832bc81a56ad8abb135628ac906ba9aa4a155b +Author: Dave Airlie +Date: Mon Jun 21 11:46:52 2004 +0000 + + fix bug with pci_disable_device in the wrong place (Paul Mackerras) remove + hack code from me.. + +commit 1ee210e3b5b2d0b9101e371ec1401cdc34b2f25d +Author: Dave Airlie +Date: Sat Jun 12 02:30:52 2004 +0000 + + dirty hack to make mach64 work, (don't worry I'll get around to fixing it + asap..) + +commit 373d67702c1fd6c6258ce03d3fb4fc167ff947cb +Author: Keith Whitwell +Date: Thu Jun 10 12:48:35 2004 +0000 + + A few changes for recent redhat. + +commit 0faa00ae648647b93202b1726864787e383a2ede +Author: Keith Whitwell +Date: Thu Jun 10 12:47:50 2004 +0000 + + i915 drm module + +commit 291ffeae9a2b95cf35835ddd0f25e434e4c26f44 +Author: Keith Whitwell +Date: Thu Jun 10 12:45:38 2004 +0000 + + i915.o drm driver + +commit 78d0fd6526bb725151d8dce86006af7616ee4758 +Author: Dave Airlie +Date: Thu Jun 10 09:43:53 2004 +0000 + + gamma_dma_priority and gamma_dma_send_buffers both deref d->send_indices + and/or d->send_sizes. When these functions are called from gamma_dma, + these pointers are user pointers and are thus not safe to deref. This + patch copies over the pointers inside gamma_dma_priority and + gamma_dma_send_buffers. + Submitted-by: Robert T. Johnson Signed-off-by: + Dave Airlie + +commit cfa5bf31290edad723e1ce388d3840f495f3ccff +Author: Dave Airlie +Date: Mon Jun 7 01:42:35 2004 +0000 + + The dev->devname being passed to request_irq in drm_irq.h is null. With the + old DRM interface, the devname was set in DRM(setunique), but with the + current DRM interface >=1.1 the devname is not being set in + DRM(set_busid). + From: Alan Swanson Approved-by: Dave Airlie + +commit 52e3a8a5d9ac8e91eb66872a008d1f7d5d67a326 +Author: Ian Romanick +Date: Wed Jun 2 17:41:52 2004 +0000 + + Added some comments copied from xf86drm.h. + +commit f994b1f31bb64f0fb56a778c350b6ff05c93501f +Author: Ian Romanick +Date: Tue Jun 1 16:17:32 2004 +0000 + + Replace size_t with an ugly, ugly hack. This was done so that code in the + core X-server would compile. Hopefully, this will soon be replaced with + explicitly sized types (i.e., uint32_t) and everyone will be happy. + +commit 024fd4b15022236fe3f79eba23fec5d6177d0cb4 +Author: Dave Airlie +Date: Sun May 30 23:38:08 2004 +0000 + + 2.4 compat + +commit 412f9909c6127db1ab03716f74cc51c4ac3a603e +Author: Dave Airlie +Date: Sun May 30 23:34:23 2004 +0000 + + fixes from kernel: Make users of page->count use the provided macros + +commit 43c244ebbad842d0ebf3756376bfc6ab1fd11b9f +Author: Roland Scheidegger +Date: Tue May 18 23:30:46 2004 +0000 + + fix whitespace issue in previous patch + +commit aa142ff1b5ac1488221830bb9b512c2d22f6675f +Author: Roland Scheidegger +Date: Tue May 18 23:03:22 2004 +0000 + + add R200_EMIT_RB3D_BLENDCOLOR state packet to support GL_EXT_blend_color, + GL_EXT_blend_func_separate and GL_EXT_blend_equation_separate on r200 + +commit 8350382cb1a5aba150c411be3b662dfe444cb84a +Author: Dave Airlie +Date: Tue May 18 09:46:31 2004 +0000 + + another 2.4 fix + +commit df6c37fc88c659691230d1f589aff93e69e6c63e +Author: Dave Airlie +Date: Tue May 18 09:42:22 2004 +0000 + + 2.4 compat fix + +commit 13894755a74454187f2c84f553b5b9d4a83fb7e3 +Author: Erdi Chen +Date: Fri May 14 23:54:31 2004 +0000 + + Add PCI id entry for VIA CN400 (UnichromePro) chip. XFree86 bug: Reported + by: Submitted by: Reviewed by: Obtained from: + +commit 853adb8be338de113301d7db3c10058476f3bff7 +Author: Eric Anholt +Date: Tue May 11 04:43:43 2004 +0000 + + Merge from FreeBSD-current. Mostly 64-bit cleanliness fixes, but a few + driver interface changes from -current. + +commit 485b259b4492ed6b7abdf063d1d5cefe01d3a3b0 +Author: Eric Anholt +Date: Tue May 11 04:23:02 2004 +0000 + + Add missing DRM_ERR()s. + +commit a1160ba2793b6c17a8aeb31b0d4cc17f3439cf9a +Author: Dave Airlie +Date: Mon May 10 11:16:26 2004 +0000 + + do some real testing and fix the DRM initialising and unloading + +commit c47b611b08327da4a5249d222079be07c26fb2ff +Author: Eric Anholt +Date: Sun May 9 22:36:19 2004 +0000 + + Add mach64 DRM module for BSD (untested, but compiles). + +commit dfdf8e14d3f8e4ceb0cad396efc8b4ecb587d5f6 +Author: Eric Anholt +Date: Sun May 9 22:29:55 2004 +0000 + + Add .cvsignore files. + +commit 51ed2f593703164b7bb7f9d0522f273f3f628c03 +Author: Eric Anholt +Date: Sun May 9 22:16:11 2004 +0000 + + Warning fixes. + +commit d477cc007cacbf95d7db295f579e23fafb423f02 +Author: Eric Anholt +Date: Sun May 9 22:14:07 2004 +0000 + + - Link in shared files as necessary and clean them up. + - Generate drm_pciids.h automatically. + +commit c093a03d47a50c5f178caff6dd20f7c03cddeb40 +Author: Eric Anholt +Date: Sun May 9 22:07:58 2004 +0000 + + Catch up with sis's DRM tag change. + +commit 7bfce0c357360ef3035b6782d48d93a2ad40bd22 +Author: Eric Anholt +Date: Sun May 9 21:59:36 2004 +0000 + + Remove after repocopy to Makefile, now that we don't have to worry about + conflicting with imake's output. + +commit b9dcb5b18713e6fe12130f780535d1b56b8b89cf +Author: Eric Anholt +Date: Sun May 9 21:57:58 2004 +0000 + + No /bin/bash on BSD. + +commit 29f2b1c1cfc13ffc3176d049eb7f235604c70cb1 +Author: Eric Anholt +Date: Sun May 9 21:56:19 2004 +0000 + + drm_hw_lock_t is now defined in drm.h, remove from here. + +commit a2f7a9fa5f7a5dacbc9e04d132f26dd70201fb45 +Author: Dave Airlie +Date: Sun May 9 06:45:17 2004 +0000 + + Commit sysfs and drm PCI changes for 2.6 kernel + +commit d7e777b696e55def668834d4fcfff94b1a89cc54 +Author: Dave Airlie +Date: Sun May 9 06:36:55 2004 +0000 + + make drm pciids + +commit 0b481856dd30fce905759e470b0abff4e186782e +Author: Dave Airlie +Date: Mon May 3 00:06:04 2004 +0000 + + use drm.. not dri for class... + +commit a9d2438999b79419772a00d0deb1caab30334765 +Author: Dave Airlie +Date: Sun May 2 13:03:51 2004 +0000 + + fix 2.4 build + +commit a3612f450be04ca73e5acb3afc4eff65194612df +Author: Dave Airlie +Date: Sun May 2 12:27:17 2004 +0000 + + better device class support from Jon Smirls patches.. + +commit 06332524b5c023db2a6952c25c5bc8a905b093cb +Author: Dave Airlie +Date: Mon Apr 26 06:43:53 2004 +0000 + + add another tdfx + +commit d40443534c3cab2ea1435556c85ef38503eb63ac +Author: Dave Airlie +Date: Thu Apr 22 12:41:43 2004 +0000 + + Add __user annotations from kernel + +commit 87812e82f45d5ca81fd0603d6bd54854831c9174 +Author: Dave Airlie +Date: Thu Apr 22 11:31:55 2004 +0000 + + add sparc ffb files from kernel just to keep things in sync + +commit 0edc2abf8414f6fa414aa4071f4fa9ccbee186a7 +Author: Dave Airlie +Date: Wed Apr 21 23:45:18 2004 +0000 + + add new files to generate pci ids + +commit 2d9bbba0e10642a149297498c4e03fc43bac1280 +Author: Dave Airlie +Date: Wed Apr 21 12:18:42 2004 +0000 + + bug from Linux kernel list caught by checker + +commit 93bd67ef62e95a32f8b7e2fd7d9dadee52664160 +Author: Dave Airlie +Date: Wed Apr 21 12:13:31 2004 +0000 + + centralise pci ids into one place and use scripts to generate files for + kernel + +commit 0f32a8852712e405f64c5917bcebefc441aa1ba3 +Author: Michel Daenzer +Date: Sun Apr 18 22:59:01 2004 +0000 + + Move Makefile.linux to Makefile. + Get rid of Makefile juggling hacks which are no longer necessary. + +commit 6f6d2a553a776068a53332e409fa19e83f6be964 +Author: Thomas Hellstrom +Date: Mon Apr 12 10:18:18 2004 +0000 + + 1. Added a PCI ID. + 2. Big change to the XvMC part of the SAREA. OpenGL clients will not suffer + from this, and via XvMC is still alpha. Needed to make future additions + to XvMC (More decoders and overlays) possible. + 3. Bumped version number to 1.3.0. + +commit 6fa5c5d958688fba801bc08e75345edd51bf27c7 +Author: Dave Airlie +Date: Mon Apr 12 05:44:16 2004 +0000 + + more files for mach64 + +commit 873e1c4d38c78e8b4a5df42d983f285cfb3ae4cc +Author: Dave Airlie +Date: Mon Apr 12 05:27:40 2004 +0000 + + Add mach64 to the trunk + +commit 7e39628577d7478644c51bba2ef1d5e2e029bbbb +Author: Michel Daenzer +Date: Sat Apr 10 16:20:00 2004 +0000 + + Have CVS ignore some files produced by the build. + +commit 3306abbde7565596528e863d2cf906a4a49f3271 +Author: Dave Airlie +Date: Sat Apr 10 13:52:43 2004 +0000 + + white space changes to align with kernel + +commit 7e0f883501ad11d16762763a555a9502f76ffba3 +Author: Dave Airlie +Date: Sat Apr 10 13:25:30 2004 +0000 + + include highmem.h + +commit 2b0292c73995a4892812fe632abdaf46c49279e0 +Author: Dave Airlie +Date: Sat Apr 10 12:58:18 2004 +0000 + + update gamma_dma with patch from davej in 2.6 + +commit e375a3dc10eb8945e05577df8b40072dfffaba81 +Author: Dave Airlie +Date: Sat Apr 10 08:15:48 2004 +0000 + + patch from Andrew Morton tree from Arjan van de Ven fixes some oopses seen + with 4G/4G split + +commit 23ec8875fce631e4554a72161937dca735c2d675 +Author: Dave Airlie +Date: Sat Apr 10 07:41:19 2004 +0000 + + align code with Linux kernel. + +commit 6aad146173e2442eb0dbb10d02ddcd8a62808937 +Author: Dave Airlie +Date: Sat Apr 10 07:39:00 2004 +0000 + + remove unused code + +commit fd473357980b9ba40bef089aadb78136faaa2008 +Author: Dave Airlie +Date: Sat Apr 10 07:36:30 2004 +0000 + + update from linux kernel for ia64 + +commit f673c9280c2691063534062fb9fdea74ad85b18a +Author: Alan Hourihane +Date: Fri Apr 9 00:21:43 2004 +0000 + + remove Imakefile + +commit 596cf634ae9be821c90688f982ae84b6145696c9 +Author: Alan Hourihane +Date: Thu Apr 8 23:22:05 2004 +0000 + + fix build problem + +commit ce601f364723ad361706be59fb7e09d9f6ca444a +Author: Alan Hourihane +Date: Thu Apr 8 23:19:15 2004 +0000 + + disable PCI DMA ioctls as they are not used currently until SAVAGE_CMD_DMA + is made to work. + +commit c47597b484866deb7698eb5575348ecd83088314 +Author: Dave Airlie +Date: Thu Apr 8 14:15:36 2004 +0000 + + big whitespace .. this aligns all the whitespace in this file with the bk + checkout linux tree + +commit 13724f032e127fbaf6d47bb2b6ba8933df23ffe8 +Author: Dave Airlie +Date: Thu Apr 8 13:11:04 2004 +0000 + + 2.6 sysfs patches + stubs in drmP.h for 2.4 compatibility + +commit c3e2685e822f70976fa57db2955cdd98dc5730f4 +Author: Dave Airlie +Date: Thu Apr 8 12:25:31 2004 +0000 + + long dev_t patches from 2.6 tree + +commit 9cff4b45e77c9259a4161ddb55564336f8b99361 +Author: Dave Airlie +Date: Thu Apr 8 12:22:22 2004 +0000 + + 2.6 patches for larger dev_t + +commit 3e0f3c1fbb9b10bcc8e037f79f25d5e491dcfd91 +Author: Dave Airlie +Date: Thu Apr 8 12:20:39 2004 +0000 + + more 2.4 compat fns + +commit 1bc7576474a85b649e2f3291d72890363e6d1483 +Author: Dave Airlie +Date: Thu Apr 8 12:09:10 2004 +0000 + + patch from Linux kernel 2.6.5 + +commit bc1428035ceb5300df429d09a64a20a2a7e903b2 +Author: Dave Airlie +Date: Thu Apr 8 12:05:25 2004 +0000 + + fixes from Linux kernel + +commit ee2889ec0d2f8b6138f916df3c3d8b7e208cc1f7 +Author: Dave Airlie +Date: Thu Apr 8 11:26:52 2004 +0000 + + patch from lk + +commit 994fa063cd3ad2f55ea26beef7e31403c68ae78a +Author: Thomas Hellstrom +Date: Wed Mar 31 22:05:57 2004 +0000 + + VIA module fixes: + 1. Fixed up PCI-id's. + 2. Fixed 2.6 warning in kernel Makefile. + +commit 20163c2b10f5a1d9c8647f5592ac11e4e9867dfc +Author: Dave Airlie +Date: Fri Mar 26 15:52:11 2004 +0000 + + copy correct Makefile + +commit 9b7bf9127e94e0c57a760aacef15db0ae3d6f1b3 +Author: Thomas Hellstrom +Date: Fri Mar 26 13:42:48 2004 +0000 + + Added via driver to drm/linux/Config.in Reported by: Terry Barnaby + +commit 1da595d797f797ff071d98ebf6a4eaad38bb1347 +Author: Thomas Hellstrom +Date: Wed Mar 24 23:22:22 2004 +0000 + + Exported symbols cause compilation failure of via_mm.c on 2.4 kernels. + Added via_mm.o to export-objs: + Reported by: HMX, Via Arena Forum + +commit b15deb239213d28f28a50abe44204836f64d7aed +Author: Thomas Hellstrom +Date: Wed Mar 24 10:07:37 2004 +0000 + + Modified linux/Kconfig to include the via drm driver. + +commit 89d67d90873d1baff48fbd671d5b3a4cb354ada5 +Author: Thomas Hellstrom +Date: Tue Mar 23 21:14:17 2004 +0000 + + Merged via-1-2-0: Altered Makefiles in drm/linux + +commit 6cd8831f7accbcc3efb019d7d288c5b6cc28a230 +Author: Thomas Hellstrom +Date: Tue Mar 23 21:08:48 2004 +0000 + + Merged via-1-2-0 + +commit 681da75af9837fd433d4773c86df52de1c8dba60 +Author: Dave Airlie +Date: Tue Mar 23 11:17:03 2004 +0000 + + make sure in DRM toplevel + +commit dfc71cbd42fe4b4b445bd16087c05e525c38f509 +Author: Dave Airlie +Date: Tue Mar 23 11:06:47 2004 +0000 + + initial shell script to create linux kernel drm from the DRI one + +commit ab66cbc1c5403129b2510208e02146bb062d7b76 +Author: Jon Smirl +Date: Wed Mar 17 01:03:26 2004 +0000 + + Adjust shared path in makefile XFree86 bug: Reported by: Submitted by: + Reviewed by: Obtained from: + +commit 537ac1a39e16c2fe1d1ac513666a4f95798b3c08 +Author: Jon Smirl +Date: Tue Mar 16 00:59:24 2004 +0000 + + Makefile the makefile really clean everything XFree86 bug: Reported by: + Submitted by: Reviewed by: Obtained from: + +commit 0b6f155dbdfe661142307a72aa07a52bde6ec08f +Author: Jon Smirl +Date: Tue Mar 16 00:52:24 2004 +0000 + + Add a missing ifdef CTX to get rid of the waring in the gamma driver build. + XFree86 bug: Reported by: Submitted by: Reviewed by: Obtained from: + +commit 24115068e465cf0d788d870a3c1c24bb68a9cb14 +Author: Jon Smirl +Date: Fri Mar 12 21:22:52 2004 +0000 + + Fixes need to clean up the mess I made with the mesa merge. This code + allows the mesa drivers to use a single definition of the DRM + sarea/IOCTLS located in the drm driver directory. Adjustments were made + to the 2D drivers to not include these changes. Changes to the mesa + copy of DRM were copied to the DRI copy. XFree86 bug: Reported by: + Submitted by: Reviewed by: Obtained from: + +commit f47ed991432672b7353e73b9d3194f255b957bee +Author: Michel Daenzer +Date: Sat Feb 28 14:29:44 2004 +0000 + + Remove extraneous code accidentally added with revision 1.86 + +commit b61f07def349644ec8077cb12b303d444e223c1b +Author: Michel Daenzer +Date: Sat Feb 28 11:52:19 2004 +0000 + + More differentiated error codes for DRM(agp_acquire) + Obtained from: Linux kernel + +commit ce21dca4aaecac73490f26491b8f06a74d0ee0f5 +Author: Felix Kuehling +Date: Tue Feb 24 14:24:07 2004 +0000 + + Use DO_MUNMAP_4_ARGS macro defined in Makefile.linux (Steve Holland). + Silence a warning about a format-argument mismatch in printk. + +commit 3dea36d8437726fd57cc006e351ed8982b091d76 +Author: Felix Kuehling +Date: Sun Feb 22 16:20:16 2004 +0000 + + Merged the Savage DRM driver from the savage-2-0-0-branch into the trunk. + +commit d0031f22cfecc2cce512aae66bedc9fe337f5d97 +Author: Felix Kuehling +Date: Sat Feb 21 19:54:51 2004 +0000 + + Conditionally add definition of list_for_each_entry_safe for kernel + versions that don't have it. + +commit 82157579b586c8f1e147250e09f0837214019680 +Author: Keith Whitwell +Date: Fri Feb 20 22:55:12 2004 +0000 + + drm_ctx_dtor.patch Submitted by: Erdi Chen + +commit 213247a4416b959738a658f2217d4d01ae9c1e67 +Author: Michel Daenzer +Date: Wed Feb 18 20:56:58 2004 +0000 + + Fix sisfb header location for 2.6 kernels + Submitted by: Andrew Morton + +commit 2b9c12ef83b8de5acba782918212f7fa250c9e45 +Author: Michel Daenzer +Date: Sun Jan 11 00:14:28 2004 +0000 + + Adapt to nopage() prototype change in Linux 2.6.1. + Reviewed by: Arjan van de Ven , additional feedback from + William Lee Irwin III and Linus Torvalds. + +commit 0dea4de28873252221d40e3597997f6d0141171d +Author: Michel Daenzer +Date: Sat Jan 10 20:59:16 2004 +0000 + + Make sure that all state packets are handled in + radeon_check_and_fixup_packets() + Fix state packet IDs of R200 cubic offsets + +commit 7b62ed9aed8794e9efe0059dbf37bc41dc691323 +Author: Michel Daenzer +Date: Sat Jan 10 12:28:06 2004 +0000 + + R200_PP_CUBIC_OFFSET_F1_[0-6] state packets only contain 5 offsets, not 6 + (thanks to Andreas Stenglein for spotting this) + +commit fb7b802ddaa1440fdba829eff5373c7d9425f582 +Author: Eric Anholt +Date: Tue Jan 6 04:54:25 2004 +0000 + + Fix some misuse of NULL where 0 is intended. + Obtained from: FreeBSD CVS + +commit 9fb6986e83a84f6b958e8aba2c20b5988676bd55 +Author: Eric Anholt +Date: Tue Dec 16 08:57:08 2003 +0000 + + Don't ioremap the framebuffer area. The ioremapped area wasn't used by + anything, and took up valuable KVA. While I'm in the area, clean up BSD + MTRR stuff some more. + Suggested by: jonsmirl + +commit 5285b029876a4d3122ae72cc3d81ca8d184ed9ca +Author: Eric Anholt +Date: Tue Dec 16 07:39:43 2003 +0000 + + Add a collection of Radeon and R128 PCI IDs, including the IGP chipsets. + Submitted by: Donnie Berkholz (mostly) + +commit 64006ef86b329183599b06da7705bb0b294a1c1a +Author: Keith Whitwell +Date: Mon Dec 8 16:33:08 2003 +0000 + + Add i865 pci id + +commit 6e56c39371a551af1e05e53231162e0fc42c6ce0 +Author: Eric Anholt +Date: Wed Nov 12 20:30:51 2003 +0000 + + Fix a locking nit, and add asserts in some things that should be called + with locks held. + +commit 1f7598245af7e73b34130a44fbaac230e29d7aad +Author: Eric Anholt +Date: Thu Nov 6 04:48:06 2003 +0000 + + Return EBUSY when attempting to addmap a DRM_SHM area with a lock in it if + dev->lock.hw_lock is already set. This fixes the case of two X Servers + running on the same head on different VTs with interface 1.1, by making + the 2nd head fail to inizialize like before. + +commit 2c1172a31794e20f7ba1a2ab234d4dab2f84005b +Author: Eric Anholt +Date: Thu Nov 6 04:35:08 2003 +0000 + + Remove unused variable. + +commit a41a479f74f3fadf1539d1adaefb933ba9a6112c +Author: Alan Hourihane +Date: Wed Nov 5 20:47:28 2003 +0000 + + Changes to DRM(irq_install)...... wrap dev->dma usage with __HAVE_DMA in + irq handler, fixes kernel ooops. comment out some setting of flags that + are done in DRM(setup) (not sure why both of the above is done in the + irq handler) + +commit 66c9e3053f857df340a982edaa8ea57b229efeed +Author: Eric Anholt +Date: Wed Nov 5 08:13:52 2003 +0000 + + - Tie the DRM to a specific device: setunique no longer succeeds when given + a busid that doesn't correspond to the device the DRM is attached to. + This is a breaking of backwards-compatibility only for the + multiple-DRI-head case with X Servers that don't use interface 1.1. + - Move irq_busid to drm_irq.h and make it only return the IRQ for the + current device. Retains compatibility with previous X Servers, cleans + up unnecessary code. This means no irq_busid on !__HAVE_IRQ, but can be + changed if necessary. + - Bump interface version to 1.2. This version when set signifies that the + control ioctl should ignore the irq number passed in and enable the + interrupt handler for the attached device. Otherwise it errors out when + the passed-in irq is not equal to the device's. + - Store the highest version the interface has been set to in the device. + - Fix a recursion on DRM_LOCK in irq_uninstall on FreeBSD. This leaves + irq_uninstall being done without the lock in some cases, but it was + racey anyways. + +commit 19ee64add26773f4436440f8fa405a1011eea4c4 +Author: Eric Anholt +Date: Wed Nov 5 02:42:56 2003 +0000 + + Use int64_t instead of s64 -- fixes FreeBSD compile, works on linux. + +commit 8feb046d8c3c9d531e25c3f854b94593f0a1964b +Author: Eric Anholt +Date: Wed Nov 5 02:41:50 2003 +0000 + + Args for the BSD DRM_PUT_USER_UNCHECKED were swapped. + +commit e8f5b01a4087fac1e44f9f34894dc20a1cbf1e49 +Author: Eric Anholt +Date: Wed Nov 5 02:08:31 2003 +0000 + + __linux__ is spelled with a lowercase 'l' + +commit 5864101ab4400aad6ca936bc94000a4607851bb3 +Author: Eric Anholt +Date: Wed Nov 5 01:43:47 2003 +0000 + + Repo-copy linux/drm/kernel/drm.h to shared/drm/kernel/drm.h and use it on + both Linux and *BSD. + +commit e5cad7fced023e9ad6395147d6fff7ba28f11d17 +Author: Eric Anholt +Date: Wed Nov 5 00:49:35 2003 +0000 + + Remove buf_alloc which is unused since the locking commit. + +commit 27f9c5f01659bb643db00ffb17c140ae3bd99df8 +Author: Michel Daenzer +Date: Tue Nov 4 00:59:52 2003 +0000 + + build fix + +commit 2655ccddf4c026f37dcc76754cdfde6f0a4a4c86 +Author: Michel Daenzer +Date: Tue Nov 4 00:46:05 2003 +0000 + + Memory layout transition: + the 2D driver initializes MC_FB_LOCATION and related registers sanely + the DRM deduces the layout from these registers + clients use the new SETPARAM ioctl to tell the DRM where they think the + framebuffer is located in the card's address space + the DRM uses all this information to check client state and fix it up if + necessary + This is a prerequisite for things like direct rendering with IGP chips and + video capturing. + +commit 84dfe702e27e0ef22801f8fe366120bea90adf4f +Author: Eric Anholt +Date: Mon Nov 3 05:11:04 2003 +0000 + + Add i852/i855 PCI ID. Also fix whitespace in the other ID definitions. + +commit 3f7279cb8ec1d4e65028df955ae17b8081940b4f +Author: Eric Anholt +Date: Mon Oct 27 22:05:38 2003 +0000 + + Add a DRM_PUT_USER_UNCHECKED, which will be used by an upcoming radeon + change. + +commit 2423fedcc8d57d02ccf7aa1209a4b31f248792a7 +Author: Eric Anholt +Date: Fri Oct 24 21:49:28 2003 +0000 + + Don't try to use dev->dma_lock unless dma is initialized (dev->dma != NULL) + in bufs_info sysctl handler. dev->dma and dev->dma_lock existence are + protected by DRM_LOCK(). Fixes panic on sysctl hw.dri when the device + is uninitialied (when you aren't in X). + +commit e4a2a9c04024972f21cdf0620f6faa6de157686d +Author: Jon Smirl +Date: Fri Oct 24 17:40:54 2003 +0000 + + Switch pci enumeration call to work on both 2.4 and 2.6 pci_for_each_dev is + not supported on 2.6 + +commit 451a1d3f69a8d19c24382ef2b483517e9ef2c9f6 +Author: Eric Anholt +Date: Fri Oct 24 00:59:31 2003 +0000 + + Move the REALLY_HAVE_AGP endif above the mtrr functions. Broke tdfx module. + +commit b79d1b341f876c982c1cde02e8aff6c675688b49 +Author: Eric Anholt +Date: Thu Oct 23 05:56:13 2003 +0000 + + Move to "old-style" probing as documented in linux/Documentation/pci.txt. + This should resolve the probe problems with radeon framebuffer due to + pci_driver attachment being exclusive. + +commit 69d038eb4989772b9b21736c821dd5abe8232260 +Author: Eric Anholt +Date: Thu Oct 23 05:52:19 2003 +0000 + + Missed the sis.h header in Makefile.linux in the move to shared/. + +commit 92429f6ebea629e8884eb53cb0c64aad555a4d76 +Author: Eric Anholt +Date: Thu Oct 23 05:51:35 2003 +0000 + + The SiS300 pci id also covers the 305, so make the name reflect that. + +commit 06cb132e86dc4a04044c3c76725ba3037008ab34 +Author: Eric Anholt +Date: Thu Oct 23 02:23:31 2003 +0000 + + - Introduce a new ioctl, DRM_IOCTL_SET_VERSION. This ioctl allows the + server or client to notify the DRM that it expects a certain version of + the device dependent or device independent interface. If the major + doesn't match or minor is too large, EINVAL is returned. A major of -1 + means that the requestor doesn't care about that portion of the + interface. The ioctl returns the actual versions in the same struct. + - Introduce DRM DI interface version 1.1. If the server requests version + 1.1, then the DRM sets the unique itself according to the busid of the + device it probed, which may then be accessed as normal using getunique. + - Request version 1.1 in libdrm's drmOpenByBusID, allowing the X Server to + request based on a BusID. Introduce a wrapper for DRM_IOCTL_SET_VERSION + and bump libdrm minor version. + - Pass the busid in DRIScreenInit if libdrm can handle both a busid and + name. This allows drmOpenByBusID to be used to find the DRM instead of + just the driver name, which allows us in the future to tie a DRM more + strongly to the device it probed to. Introduce a function + DRICreatePCIBusID which creates a busid in the form pci:oooo:bb:dd.f + similar to linux's pci_name() function. This matches the format used by + the DRM in version 1.1. libdrm knows how to match both this format and + the old PCI:b:d:f format. + - Use the new DRICreatePCIBusID function in the *_dri.c to request the new, + more exact busid format. + +commit 86e6325e5ab848c15c422f20133445fe6c1caa09 +Author: Eric Anholt +Date: Wed Oct 22 22:08:53 2003 +0000 + + - Add DRM_GET_PRIV_WITH_RETURN macro. This can be used in shared code to + get the drm_file_t * based on the filp passed in ioctl handlers. + - Use this macro on BSD for simplification and improve its error reporting. + Make failure to find the drm_file_t * print as an error, not debug. + This failure may be part of the problem with KDE. + - Make debug and error print macros include the pid on BSD. + +commit 4e6ddcbb698c029b407d5dc43348c6e422a36705 +Author: Eric Anholt +Date: Wed Oct 22 21:50:09 2003 +0000 + + Fix warning about static DRM(bufs_info) defined but not used in the + !__HAVE_DMA case. + +commit ea7b4fdc225ebbbfd77f875fd3bfcfbdcfa9a1f7 +Author: Eric Anholt +Date: Mon Oct 20 05:09:21 2003 +0000 + + Fix the possibility of sleeping with locks held in sysctls by copying the + data into temporary variables with the lock held then outputting to + sysctls with the lock released. Rearranged a little extra code to aid + this. Note that drm_memory_debug.h hasn't had this fix applied, but I + consider that code to be just about dead anyway. + +commit 6b0424fdcdec9d12943718e4542659c8bca019da +Author: Eric Anholt +Date: Mon Oct 20 00:55:56 2003 +0000 + + Clean up BSD MTRR handling. The NetBSD code is untested, but it's my best + shot. + +commit 0cf1887139eb1ce18d09f7be0567aa93d802040d +Author: Eric Anholt +Date: Sun Oct 19 23:35:58 2003 +0000 + + - SMPng lock the DRM. This is only partial -- there are a few code paths + used by root (the X Server) which are not locked. However, it should + deal with lost-IRQ issues on -current which I think people have been + experiencing but I am unable to reproduce (though I understand why they + would occur, because of a bug of mine). Note that most of the locking + (DRM_LOCK()/UNLOCK()) is all covered by Giant still, so it doesn't + matter yet. + - Remove locking on FreeBSD-stable and NetBSD. These are covered by the + fact that there is no reentrancy of the kernel except by interrupts, + which are locked using spldrm()/splx() instead. + +commit 59fbe01fea8f77fc3810643c14a1738d197d4291 +Author: Eric Anholt +Date: Sun Oct 19 22:29:08 2003 +0000 + + Clean up extra zeroing of dev->dma, and use calloc to take advantage of + M_ZERO. + +commit 63ce8af5550950b19db432230910e7a2424fa16f +Author: Eric Anholt +Date: Sun Oct 19 20:06:03 2003 +0000 + + Fix probing on 2.5+ kernels, which require that drivers have .id_table set. + We use PCI_ANY_ID to ask that our probe is called for every available + device. + Submitted by: jonsmirl + +commit 2950f9e6823d43abae151966ae808d1a63e6659c +Author: Eric Anholt +Date: Fri Oct 17 05:13:48 2003 +0000 + + - Move IRQ functions from drm_dma.h to new drm_irq.h and disentangle them + from __HAVE_DMA. This will be useful for adding vblank sync support to + sis and tdfx. Rename dma_service to irq_handler, which is more + accurately what it is. + - Fix the #if _HAVE_DMA_IRQ in radeon, r128, mga, i810, i830, gamma to have + the right number of underscores. This may have been a problem in the + case that the server died without doing its DRM_IOCTL_CONTROL to + uninit. + +commit ff58476011ba8fe72d65e884380d3d86710bfdd4 +Author: Eric Anholt +Date: Fri Oct 17 03:14:39 2003 +0000 + + - Converted Linux drivers to initialize DRM instances based on PCI IDs, not + just a single instance. Moved the PCI ID lists from _drv.c in BSD + to .h. The PCI ID lists include a driver private field, which may + be used by drivers for chip family or other information. Based on work + by jonsmirl. + - Make tdfx_drv.c and tdfx.h match other drivers. + - Fixed up linking of sis shared files. + Tested with Radeon and SiS on Linux and FreeBSD, including a Linux setup + with + 2 SiS cards in a machine, but only one head being used (with DRI) + +commit 355b204de0dbc01308bebc77c4c1c0a9a402cded +Author: Michel Daenzer +Date: Thu Oct 16 14:18:52 2003 +0000 + + Introduce COMMIT_RING() as in radeon DRM, stop using error prone writeback + for ring read pointer (Paul Mackerras) + Get rid of some superfluous stuff, minor fixes + +commit a64dab132375b4bf5d4e8aeecc1bf341879482fa +Author: Eric Anholt +Date: Thu Oct 16 03:20:03 2003 +0000 + + Try that again. It's a long. + +commit a9e1a57d6d03f9fc52357db8af7ac2e7b8a488e4 +Author: Eric Anholt +Date: Thu Oct 16 03:19:06 2003 +0000 + + Debug printf format fix. + +commit 9fbfb7ca6a7da93fda0d086a712108e1b14c99d1 +Author: Eric Anholt +Date: Fri Oct 3 08:08:10 2003 +0000 + + Some code cleanups done while working on locking. Reduces always-true + tests, excessive indenation, convoluted handling of errors, or code + duplication. + +commit 929536172cda4288857cdc29b272e61e02fd47bd +Author: Eric Anholt +Date: Fri Oct 3 07:02:51 2003 +0000 + + Stylistic preparation for SMPng locking work: DRM_LOCK/DRM_UNLOCK have side + effects, so make them look like functions (add parenthesis). + +commit e187d665e4ffee4990d096d8d3722630b2ba2d46 +Author: Eric Anholt +Date: Thu Oct 2 20:52:44 2003 +0000 + + Add an MIT-style copyright, assigned to myself, to these files. I think + I've touched enough of the code here, and there was no previous + copyright. Do some drive-by style fixes while I'm here. + +commit 89dd7be3dd7f73d3bae54a01865e5605a707f823 +Author: Eric Anholt +Date: Thu Oct 2 07:02:34 2003 +0000 + + Axe more old gamma DMA infrastructure. + +commit a6b84f73e18d88524a906a319c6c8e3c44bd7dea +Author: Eric Anholt +Date: Thu Oct 2 04:48:54 2003 +0000 + + Mostly whitespace cleanups and style(9) fixes focused on "if(" -> "if (" + Change some nearby memset()s to bzero()s or to calloc allocations to + take advantage of M_ZERO). Reverse some error tests to reduce high + levels of indentation. Move the sg_cleanup() call out of the maplist + loop in DRM(takedown)-- I can't see any need for it to be inside. + +commit 4dee75ff58a50559cb8a92c276c0b952c2776154 +Author: Eric Anholt +Date: Thu Oct 2 04:12:34 2003 +0000 + + Wrap sys/endian.h usage with __FreeBSD_version >= 480000. + Obtained from: i865-agp-0-1-branch + +commit 4a55e75e97e39256d5cdb561cf01ff7df73fe664 +Author: Eric Anholt +Date: Thu Oct 2 04:07:03 2003 +0000 + + Allow the DRM to attach to a "drmsub" device. This will be provided by the + i810 AGP module, working around the limitation of one driver per + device. + Obtained from: i865-0-1-branch + +commit 8fe6a0d6c9aae796cc1217794644b314a9960a43 +Author: Eric Anholt +Date: Thu Oct 2 03:51:49 2003 +0000 + + MTRR issue with SMP and -stable seems to be resolved. Re-enable MTRRs on + 4.x + +commit e5546d2f26db3eb15b2be1f33a0b07c7ca497337 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_drm.h was initially added on branch cle266-0-0-1-branch. + +commit 87c04835df1ab427c003c5f3d716dbd12a5f4294 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via.h was initially added on branch cle266-0-0-1-branch. + +commit 64828b7fe36f771e124d0a69e022c5d8177b4564 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_drv.c was initially added on branch cle266-0-0-1-branch. + +commit 215a05721bc08eea804c6790a43666ceb297e5d8 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_drv.h was initially added on branch cle266-0-0-1-branch. + +commit 37ff4d7ddeff8dfd303b6dedd591f21e4962745e +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_ds.c was initially added on branch cle266-0-0-1-branch. + +commit 53e11840a54b7b252d56cc8909846a24d53d2366 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_ds.h was initially added on branch cle266-0-0-1-branch. + +commit 097d0a51e2c6e8bc1d77b46afe15b1068d6c9a94 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_map.c was initially added on branch cle266-0-0-1-branch. + +commit 8d9d81680779ce40b96cdfbd83067b797876a981 +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_mm.c was initially added on branch cle266-0-0-1-branch. + +commit d04d1cf313be536dc69d4b807a6503aef1204c6d +Author: Jose Fonseca +Date: Tue Sep 30 22:43:23 2003 +0000 + + file via_mm.h was initially added on branch cle266-0-0-1-branch. + +commit 5d4b13707666701506dcb86e7fc2dfe79ee056ea +Author: Leif Delgass +Date: Sun Sep 28 21:27:09 2003 +0000 + + Fix typo in SiS help message (and testing cvs commit to + dri.freedesktop.org) + +commit 28aee7fb1c5b7a7e59aed8ed8e9dc1e3d4b88561 +Author: Eric Anholt +Date: Thu Sep 25 23:04:10 2003 +0000 + + Whitespace cleanup (spaces before tabs or instead of tabs). + +commit b0fab09c4df5075ebfae3637f39ef595a8a37066 +Author: Eric Anholt +Date: Thu Sep 25 19:08:46 2003 +0000 + + Whitespace cleanup. + Submitted by: Linus Torvalds + +commit a0a38f8bd68792206491a51e708d2d1bd2db8b26 +Author: Eric Anholt +Date: Thu Sep 25 19:08:11 2003 +0000 + + Fix Kconfig for SiS DRM now that it doesn't require sisfb. + Submitted by: Linus Torvalds + +commit b0a928557c91fec527f41ae8b2441174889bf32c +Author: Alan Hourihane +Date: Wed Sep 24 14:39:25 2003 +0000 + + post merge fix + +commit decf9e2297d87d646a4259f5d70290f105a487cd +Author: Alan Hourihane +Date: Sat Sep 13 00:25:59 2003 +0000 + + compatibility layer still uses agp (not gart) + +commit dc17c4cdc358213340947ec0e7e7f4caf7664232 +Author: Alan Hourihane +Date: Fri Sep 12 20:03:17 2003 +0000 + + bsd drm fixes + +commit c5168016cc028f59b417df77f1f169bf06e40271 +Author: Alan Hourihane +Date: Fri Sep 12 20:00:59 2003 +0000 + + linux drm fixes + +commit 85c16d962d8f6011b670d74d0669402ec4708f6f +Author: Alan Hourihane +Date: Fri Sep 12 14:24:17 2003 +0000 + + resolve merge conflicts + +commit 6fc41e25e5acbbfae4d2e93a0d9e6f980f8ae477 +Author: Keith Whitwell +Date: Tue Sep 9 07:45:12 2003 +0000 + + Use spldrm/splx around tsleep() in DRM_WAIT_ON + +commit 4d6d3572029414419289fd512416effb9a9ad832 +Author: Eric Anholt +Date: Sun Sep 7 23:56:20 2003 +0000 + + Correct format in debug printfs (free is a pointer, not an int). + +commit 6f563cd513bfcd35643ebc4f0d5c58f0193cc163 +Author: Eric Anholt +Date: Sun Sep 7 23:27:04 2003 +0000 + + Fix for older -stable. + Obtained from: FreeBSD CVS + +commit ebca51d8da42e7e4882694bc3233bf0f8dbdf301 +Author: Eric Anholt +Date: Fri Aug 29 21:41:32 2003 +0000 + + Update to reflect renaming of SIS ioctls. + +commit f634f687592bca690a9bc045661005c77854647b +Author: Eric Anholt +Date: Fri Aug 29 20:54:26 2003 +0000 + + These files were missed in the SiS DRM commit. + +commit fabc64dd573f01a2160be474b4abc65a3a9aa5ea +Author: Eric Anholt +Date: Fri Aug 29 19:24:36 2003 +0000 + + Port the SiS DRM to FreeBSD. This includes the ability for the DRM to + allocate framebuffer memory without sisfb, and a new ioctl to be used + by the X Server which tells the DRM what region of framebuffer memory + to allocate from. Also fixes a possibility to panic the kernel I + believe. Tested on linux with sisfb and FreeBSD (without sisfb) with + new DRI only. + +commit a7aebb6dac3287374721dd2101a4584f12c63c82 +Author: Eric Anholt +Date: Fri Aug 29 19:16:13 2003 +0000 + + Add DRM(calloc), which is convenient, used by the new sis code, and takes + advantage of M_ZERO on BSDs. + +commit db781291164dfa10538776748df7af901c6b20a2 +Author: Eric Anholt +Date: Fri Aug 29 19:08:06 2003 +0000 + + Update radeon PCI IDs. + +commit bd3bc9f23d7a1895b2bf87d39346c5d4c9615020 +Author: Eric Anholt +Date: Fri Aug 29 19:07:27 2003 +0000 + + This PCI header has been living in dev/pci/ for a while now. + +commit ba804e7864eef2fd1d92cfe75b0bc868302da084 +Author: Michel Daenzer +Date: Thu Aug 28 12:14:17 2003 +0000 + + Remove superfluous TLB flush + +commit b83d2f909e03c7c4a95f19a04d717f7ea8dc288e +Author: Michel Daenzer +Date: Tue Aug 26 16:49:33 2003 +0000 + + Rename agp to gart for radeon + +commit 062751ac472b2721bed0cd1ee48a3ae7d327ff07 +Author: Michel Daenzer +Date: Tue Aug 26 15:44:01 2003 +0000 + + Remove artificial PCI GART limitations, rename AGP to GART where + appropriate + +commit 963ad33cb6b85189f3385bcba46905b6d4d329db +Author: Eric Anholt +Date: Tue Aug 19 02:22:57 2003 +0000 + + Fix the debug build. + +commit ad78a613a49daea936372c75423ac17f9f83b092 +Author: Eric Anholt +Date: Tue Aug 19 00:41:00 2003 +0000 + + - Remove $FreeBSD$ tags as they weren't too useful and merges are now being + done through perforce. + - Add copyright headers to drm_os_*bsd.h, still need to research the other + copyright-less files better. + +commit 07a9b30082d6a64d39964f504e3afc4317e22ef7 +Author: Michel Daenzer +Date: Mon Aug 18 23:46:19 2003 +0000 + + Clean up Radeon DRI resume code + +commit 0f094c33da5054e6be9ccf8bf0f6282c9aed5791 +Author: Eric Anholt +Date: Mon Aug 18 23:42:16 2003 +0000 + + Make r128_do_wait_for_idle static, as it's only used in this file. + Noticed by: CScout + +commit 6298d1a1e0deccf085970e12922430dbde09e5da +Author: Eric Anholt +Date: Mon Aug 18 23:41:05 2003 +0000 + + Remove an unnecessary #define __NO_VERSION__ + Noticed by: CScout + +commit 9d7b01ebbe71ff6ca3ea421d5bff64f403b592ba +Author: Michel Daenzer +Date: Fri Aug 15 10:31:54 2003 +0000 + + Merge from 2.6 kernel (Linus Torvalds) + +commit a073ff7dc73dc98e81e2ae26e8c500ea7141084b +Author: Dave Airlie +Date: Fri Aug 15 01:05:24 2003 +0000 + + DA: loads of whitespace .. some from Linus, some from me + +commit 428cbe0b91b1b446b0878544f30121df9b5bb2ac +Author: Dave Airlie +Date: Wed Aug 13 23:35:40 2003 +0000 + + DA: patch from Matthew upgraded to latest DRI head to solve issue with i810 + compatibility + +commit 03e6674c13f8e7033c891ae8979e7f996fe9a6c1 +Author: Eric Anholt +Date: Tue Aug 12 21:48:16 2003 +0000 + + Whitespace cleanup from the pageflipping commit. + +commit 4c9daf6847b4e263d006154ac1e523c091308a6b +Author: Eric Anholt +Date: Tue Aug 12 21:47:34 2003 +0000 + + Document change in interface version 1.9. + +commit fbdadde0079120d49ca719781817a342bb62801d +Author: Eric Anholt +Date: Tue Aug 12 21:34:03 2003 +0000 + + Document the changes in interface version 2.5. + +commit 02675a470e9fde770418748b14d0a69a7f562d3b +Author: Eric Anholt +Date: Tue Aug 12 21:18:05 2003 +0000 + + Merge from FreeBSD r1.11: We have memset in the kernel, no need to define + it to bzero (which it was always used for). + +commit 447d8c56bb8db6c8139c4c4cb3e99f6674069e09 +Author: Dave Airlie +Date: Mon Aug 11 01:46:02 2003 +0000 + + DA: code cleanups for i810_dma.c from 2.4 kernel + +commit c99acb597fe430305b6bba62467cd3c85a36b8f5 +Author: Ian Romanick +Date: Fri Aug 8 21:06:44 2003 +0000 + + Added some information as to when (which DRM version) various queries were + added. + +commit e7944efc4550416ee53e2f570f759d4e6078834b +Author: Michel Daenzer +Date: Thu Aug 7 10:13:50 2003 +0000 + + build fix for kernels >= 2.6 + +commit da16867c8433516c361944e6e4265bd511ac72c8 +Author: Michel Daenzer +Date: Wed Aug 6 11:46:21 2003 +0000 + + Fix maplist entries being used after they were freed; thanks to Benjamin + Herrenschmidt for tracking this down + +commit 4b60cae90e0f689f68167c2e3419df7574cae1ab +Author: Michel Daenzer +Date: Tue Jul 29 10:11:48 2003 +0000 + + IRQ code cleanup suggested by Linus Torvalds + i830 build fix + +commit c26ffeafca30332520660d2bef1106b56d0ef5e1 +Author: Michel Daenzer +Date: Sat Jul 26 15:59:09 2003 +0000 + + Degrade uninformative error message to debug message, as in other drivers + +commit aaf2105be967ad7f99c643b4be09cf6d3d063b65 +Author: Eric Anholt +Date: Sat Jul 26 03:25:40 2003 +0000 + + Add Rage 128 pageflipping support, defaults to off. DRM version bump to + 2.5.0. It still has some issues, including a flicker in the fps meter + in tuxracer and I've seen garbage left behind after moving/closing + windows. However, it's usable. Add the Option "EnablePageFlip" "YES" to + use it. + +commit 983db58a26c37237acf54af60f28a4243467079a +Author: Eric Anholt +Date: Sat Jul 26 03:18:34 2003 +0000 + + Fix FreeBSD build after IRQ changes. + +commit bef7017749c9d3af733bdca4863a012f5d6506d3 +Author: Michel Daenzer +Date: Fri Jul 25 10:50:39 2003 +0000 + + Compile fixes for recent 2.5/2.6 Linux kernels. I hope this doesn't break + the i830 driver or the BSDs. :) + +commit 32ef0f59a8d62460da338568af347286aa450146 +Author: Michel Daenzer +Date: Fri Jul 25 10:31:37 2003 +0000 + + Fail in DRM(agp_acquire) if the AGP aperture can't be used, such that the X + server falls back to PCI GART or disables the DRI gracefully + +commit 3669639b2162d0ec0d3f9b47b2e443b6d89d1cee +Author: Keith Whitwell +Date: Fri Jul 11 15:27:55 2003 +0000 + + Restore __HAVE_KERNEL_CTX_SWITCH, required for the sparc drm module in the + kernel tree. Added comments to that effect. + +commit 1654bc5752740e54a5e6cfd18021a9f66d7b7df2 +Author: Dave Airlie +Date: Wed Jul 9 23:21:15 2003 +0000 + + DA: fix for bug 484 in Bugzilla, originally from me, reworked by David + Dawes to avoid backword incompatibilities... + +commit f4188a751829926f5901d18a0d95774c8cdecbf8 +Author: Jose Fonseca +Date: Wed Jul 9 09:28:42 2003 +0000 + + file drm_mem.h was initially added on branch newdrm-0-0-1-branch. + +commit 7dc959ed2114f4b92b7e0cb8b067f2a182e9a4d8 +Author: Jose Fonseca +Date: Wed Jul 9 09:26:17 2003 +0000 + + file drm_dma.c was initially added on branch newdrm-0-0-1-branch. + +commit 49d152544e64b9d3802f5efd6e5f53cb93756a10 +Author: Jose Fonseca +Date: Wed Jul 9 09:26:17 2003 +0000 + + file drm_fops.c was initially added on branch newdrm-0-0-1-branch. + +commit 6a0e4854574732ed301a1aa7fb8753b37666def1 +Author: Jose Fonseca +Date: Wed Jul 9 09:26:17 2003 +0000 + + file drm_lock.c was initially added on branch newdrm-0-0-1-branch. + +commit c7f9545482223eb01d9b4c76212305615483150a +Author: Jose Fonseca +Date: Wed Jul 9 09:26:17 2003 +0000 + + file drm_stub.c was initially added on branch newdrm-0-0-1-branch. + +commit cf6e7980c913b0b78cbf020052d9135fc2da0417 +Author: Jose Fonseca +Date: Wed Jul 9 09:26:17 2003 +0000 + + file drm_vm.c was initially added on branch newdrm-0-0-1-branch. + +commit 2daf14765214c50088c16e3538d24e157578d000 +Author: Keith Whitwell +Date: Tue Jul 8 17:10:13 2003 +0000 + + Removed unused __HAVE_KERNEL_CTX_SWITCH, whatever that was. + +commit 39e1c534c0730e451062a9dbcbdf5ab95d1c5c50 +Author: Leif Delgass +Date: Fri Jul 4 18:31:42 2003 +0000 + + Don't need to include linux/wrapper.h - we only use Set/ClearPageReserved + from linux/mm.h now and wrapper.h has been removed in 2.5.69 and later. + +commit 01d6ae90d6a8b5ed32739b39334079d5f1c3d95e +Author: Jose Fonseca +Date: Tue Jul 1 18:56:57 2003 +0000 + + file drm_agp.c was initially added on branch newdrm-0-0-1-branch. + +commit a145363ee175757ff0309a50157a9d75e97fda26 +Author: Jose Fonseca +Date: Tue Jul 1 18:56:57 2003 +0000 + + file drm_bufs.c was initially added on branch newdrm-0-0-1-branch. + +commit 7c565e4961c194d9b432d4a6790883ac5c061867 +Author: Jose Fonseca +Date: Tue Jul 1 18:56:57 2003 +0000 + + file drm_mem.c was initially added on branch newdrm-0-0-1-branch. + +commit 43d3934ac86bdd7319b140b7dae823579a3bc43c +Author: Jose Fonseca +Date: Tue Jul 1 18:56:57 2003 +0000 + + file drm_pci.c was initially added on branch newdrm-0-0-1-branch. + +commit 8ec900afb4ea0d0ab3f7f1e7e71f41de210da3bf +Author: Jose Fonseca +Date: Tue Jul 1 18:56:57 2003 +0000 + + file drm_sg.c was initially added on branch newdrm-0-0-1-branch. + +commit 66d39b549eef3bdaaa3b6a99992659e0b381b4aa +Author: Alan Hourihane +Date: Mon Jun 23 16:34:14 2003 +0000 + + file savage_dma.c was initially added on branch savage-1_0_0-branch. + +commit 5640adddc896c89ae25c7db38c796bde21a37bdc +Author: Alan Hourihane +Date: Mon Jun 23 16:34:14 2003 +0000 + + file savage_state.c was initially added on branch savage-1_0_0-branch. + +commit 1b0eb5e3561f3cdabae73c8152fe0b5b72863922 +Author: Jose Fonseca +Date: Sat Jun 21 15:27:51 2003 +0000 + + file drm_pci_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit dab537cbb1817f6a229640cf2584e64495b7a186 +Author: Jose Fonseca +Date: Sat Jun 21 14:01:43 2003 +0000 + + file drm_stub_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit b568f838490ef2558e7297a1950e6e9e26093d24 +Author: Jose Fonseca +Date: Sat Jun 21 13:18:47 2003 +0000 + + file drm_memory_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit 7014016e08c3d98aa348e21f7ce1937535db2e13 +Author: Jose Fonseca +Date: Sat Jun 21 13:09:08 2003 +0000 + + file drm_vm_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit b816fa625fc05afd0ffa62a2a5d0784c024c3319 +Author: Jose Fonseca +Date: Sat Jun 21 12:49:34 2003 +0000 + + file drm_dma_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit d64200e830586990cb1ae5436bdfec9127f2a731 +Author: Jose Fonseca +Date: Sat Jun 21 12:27:27 2003 +0000 + + file drm_lock_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit e7334f927f1f5fc6ed1df1abf2c345be1682c3f8 +Author: Jose Fonseca +Date: Thu Jun 19 00:14:25 2003 +0000 + + file drm_bufs_tmp.h was initially added on branch newdrm-0-0-1-branch. + +commit 93522f6d3ad6924cbf413915491e4f8228502d98 +Author: Jose Fonseca +Date: Thu Jun 19 00:09:52 2003 +0000 + + Revert the janitorial - that works is now on the new branch + newdrm-0-0-1-branch. + +commit 0a995b624d325055abf5ba09d39ac8d85866d85a +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_compat.c was initially added on branch i865-agp-0-1-branch. + +commit 22e5f8d765745ff3f41d1b8016e1c0b889bb52d1 +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830.h was initially added on branch i865-agp-0-1-branch. + +commit 2efebc956c68e5b5ef28690ea1829d9d993dd33f +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_dma.c was initially added on branch i865-agp-0-1-branch. + +commit a9611f09037e3966aace29fdfff296dae82e642f +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_drm.h was initially added on branch i865-agp-0-1-branch. + +commit 900bd6e4377d70cb6a26905d5310304c6c1a4d71 +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_drv.c was initially added on branch i865-agp-0-1-branch. + +commit cf840e71f2e7d8b8814a605020ca3b0d03964295 +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_drv.h was initially added on branch i865-agp-0-1-branch. + +commit 4d0e244f8f6fbc710703413cf358942a06cbe843 +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_irq.c was initially added on branch i865-agp-0-1-branch. + +commit fbde3dc0e6649f83173a6f39a01338288e8e56f1 +Author: Keith Whitwell +Date: Wed Jun 18 15:07:31 2003 +0000 + + file i830_mem.c was initially added on branch i865-agp-0-1-branch. + +commit 9e7d6177d1e57f8ab08da3232568597d5005709c +Author: Keith Whitwell +Date: Mon Jun 16 10:40:52 2003 +0000 + + Possibly fix stanford checker complaints about sarea + +commit fdf320a1b8025dd4b33670fddae9df2890ee6c5b +Author: Jose Fonseca +Date: Sat Jun 14 15:18:49 2003 +0000 + + Move the linux AGP includes into drm_agp.h and only define the AGP data + structures if AGP support is enabled in the kernel (__REALLY_HAVE_AGP). + This fixes the compile errors on kernels without AGP support. + +commit 0b01c70d59f6e038b8f90f7be98fb77d771ecc1a +Author: Keith Whitwell +Date: Tue Jun 10 18:54:17 2003 +0000 + + Texture rectangle support for r100 + +commit 98840144b120691423038a29e1f0afdc8606cce7 +Author: Keith Whitwell +Date: Mon Jun 9 23:12:33 2003 +0000 + + Revert bogus last commit + +commit 1062b9930f2c0ddb9f5f0db29796aba0e247c80d +Author: Keith Whitwell +Date: Mon Jun 9 23:11:23 2003 +0000 + + Don't activate blend fallbacks unless blending is enabled + +commit 1a2bb4332972c57c0d810e879e251d74a538f13b +Author: Jose Fonseca +Date: Sat Jun 7 12:45:55 2003 +0000 + + Verify 'drm_agp' is not NULL for all its wrappers - this causes no overhead + and must be done if in future a driver tries to talk to the AGP + directly from kernelspace instead of userspace, and the AGP is not + present. + +commit e3a149f08095f1a7321fce890b1337098485f254 +Author: Jose Fonseca +Date: Sat Jun 7 12:30:22 2003 +0000 + + Check that the AGPGART "drm_agp" symbol pointer is valid before + initializing the DRM device - this was causing a kernel oops when the + AGPGART module wasn't loaded. + +commit f723f743c55156039525a5f49dfe6e0fd141c8df +Author: Dave Airlie +Date: Sat Jun 7 01:44:15 2003 +0000 + + fix pitch compile error + +commit 8eaa2d245077d5e949679e48897b57f8dc505a25 +Author: Dave Airlie +Date: Thu Jun 5 23:31:40 2003 +0000 + + add page flipping support to the DRM, up version number to 1.3.0... + +commit 8e7cd92f35629a6f6d904346b09883173a7bda29 +Author: Jose Fonseca +Date: Tue Jun 3 23:50:23 2003 +0000 + + Added the Doxygen configuration file. Minor documentation fixes. + +commit 6611a5fb7f41f81e38391c77903d98a29937ceed +Author: Jose Fonseca +Date: Tue Jun 3 23:27:01 2003 +0000 + + Split declarations/definitions in drm_scatter.h into drm_sg.h/drm_sg_tmp.h + respectively. Splited the work out of the ioctls and renamed (with the + _ioctl prefix). Added some more documentation. Did the same for + drm_sgpsupport.h. + +commit a709d4c97c2de9d75ba845da41d61f8734ee573b +Author: Keith Whitwell +Date: Tue Jun 3 11:23:58 2003 +0000 + + file i830_mem.c was initially added on branch i865-agp-0-1-branch. + +commit 89463947581a5aad25abd22f36e95391c42972b6 +Author: Keith Whitwell +Date: Fri May 30 12:07:45 2003 +0000 + + file i830_compat.c was initially added on branch i865-agp-0-1-branch. + +commit 518db771de1fd1ac26721197833d33147740edae +Author: Leif Delgass +Date: Wed May 28 02:03:37 2003 +0000 + + Restore change to _DRM_VBLANK_SIGNAL from rev. 1.41, which was reverted + with the documentation merge. + +commit ccf6d6a5136af3d59a9d93566f55058e9c8480b4 +Author: Leif Delgass +Date: Wed May 28 01:44:49 2003 +0000 + + Restore DRM_*MEMORYBARRIER change reverted with documentation merge + +commit d2443b2186712dd7c977b47e06444396e1e493ff +Author: Jose Fonseca +Date: Tue May 27 00:37:33 2003 +0000 + + Merged DRM documentation. + +commit aeb4bc3f5b991d7970dca9417e04df06c0bf008a +Author: Leif Delgass +Date: Mon May 26 20:04:53 2003 +0000 + + Add support to r128 for MESA_ycbcr_texture (Ian Romanick, Leif Delgass) + +commit c0efa1a777baf90561a31957014d760f89146e4f +Author: David Dawes +Date: Tue May 20 22:43:39 2003 +0000 + + DRM part of Radeon DRI suspend/resume support (Charl Botha). + +commit 2134577e314d1dac4b48b78e5b6d6e92f2c76ea8 +Author: David Dawes +Date: Tue May 20 22:42:24 2003 +0000 + + Support for building DRM module on OpenBSD (Wilbern Cobb, Matthieu Herrb). + (resync with XFree86 trunk) + +commit b942999b5915cbad75f16f6c242bab03c33f0c8b +Author: Michel Daenzer +Date: Sat May 17 00:37:34 2003 +0000 + + do allow reading from read only mappings... + +commit e5d3c7f260d18168eec755c73f01ac617390d96c +Author: Michel Daenzer +Date: Fri May 16 23:41:27 2003 +0000 + + Support AGP bridges where the AGP aperture can't be accessed directly by + the CPU (David Mosberger, Benjamin Herrenschmidt, myself, Paul + Mackerras, Jeff Wiedemeier) + +commit 1d5bf7a7de35f87e68cce740151fd46cd8fa2ff3 +Author: Michel Daenzer +Date: Tue May 6 21:10:33 2003 +0000 + + fix warning on machines where sizeof(drm_addr_t) != 4 (Randy Dunlap) + +commit 285b1cdc39d9cc47e3ff74b9f9b56c24317beec5 +Author: Ian Romanick +Date: Wed Apr 30 01:51:00 2003 +0000 + + Merged texmem-0-0-1 + +commit 7e1a4bfab3648a83cf2f8eed01c6ac346829aa3c +Author: Leif Delgass +Date: Tue Apr 29 16:59:00 2003 +0000 + + remove unused variables + +commit 87ed795ff354eb6e9431c87ab315349326c1af79 +Author: Eric Anholt +Date: Mon Apr 28 23:18:43 2003 +0000 + + Fix a typo: On takedown the mtrr operation is MEMRANGE_SET_REMOVE, not + _UPDATE. + +commit 5f1e2399eb5b76537c91fc9aba2569f2c289a284 +Author: Leif Delgass +Date: Mon Apr 28 17:49:26 2003 +0000 + + Restore Eric Anholt's DRM_*MEMORYBARRIER changes from rev 1.11 + +commit a57d3204613922ee07e56209169e4b4ce1f17754 +Author: Leif Delgass +Date: Mon Apr 28 16:20:31 2003 +0000 + + Only free original pagelist in addbufs_pci if one already exists (fixes + oops). + +commit 6eb5364eb81474a6ceac8b44c3283cb0327b2a82 +Author: Alan Hourihane +Date: Mon Apr 28 15:29:46 2003 +0000 + + DRM_READ/WRITEMEMORYBARRIER was given an argument in the bsd tree, fix for + linux + +commit c584292e30f1f3fc22da32117dfbb72bb79cdbe2 +Author: Keith Whitwell +Date: Sun Apr 27 09:53:58 2003 +0000 + + Put back __HAVE_KERNEL_CTX_SWITCH for David Miller's sparc drm driver + (which doesn't live in our cvs). + +commit 22b9b720d572ba6fec288e2a13537aec069cec7f +Author: Eric Anholt +Date: Sun Apr 27 00:43:14 2003 +0000 + + Use real endian conversion functions. + +commit 9828bd24c8f7b9d115acf94e422fa34ec8627b92 +Author: Eric Anholt +Date: Sat Apr 26 23:55:30 2003 +0000 + + Fix formatting of hw.dri sysctl. + +commit 766a1da2e5841959246abab9cf27c79d75636129 +Author: Eric Anholt +Date: Sat Apr 26 23:32:00 2003 +0000 + + Remove the map argument from DRM_*MEMORYBARRIER. Not all of the uses of + DRM_*MEMORYBARRIER we had were related to an MMIO space. This means + arch-specific code on the BSDs, unfortunately. Also add + DRM_MEMORYBARRIER() and change the DRM_READMEMORYBARRIER()s that used + to be read/write barriers to it. + +commit a172ee2a18b715a6de9b8e914aecd8414a4f3b2d +Author: Eric Anholt +Date: Sat Apr 26 23:04:22 2003 +0000 + + MFL: Don't install irq handler unless the driver has been initialized. + +commit ce514e08aa8fdbdf52da2ac2cbdace68e0b25210 +Author: Eric Anholt +Date: Sat Apr 26 22:52:39 2003 +0000 + + Add PCI DMA memory functions and make addbufs_pci and associated code use + it. To do this we need to save the bus address along with the virtual + address in the seglist. Also fix some error handling and a few bits of + whitespace. + +commit f2a0c5438dc83171de1007a68e4f98e35b5a8fbe +Author: Leif Delgass +Date: Sat Apr 26 22:28:56 2003 +0000 + + Ensure driver has been initialized (dev_private != NULL) before installing + irq handler in DRM(irq_install). Modify all drivers to ensure irq + handler is removed before cleanup and cleanup is called at takedown. + Remove unused buffer private struct fields in i810, i830. Check for + lock on init/cleanup in all drivers except i810/i830. The current DDX + for i810 and i830 doesn't hold the lock on kernel init (FIXME?). + +commit a79adaab72bde726ce4c08184997f34b31014d9e +Author: Eric Anholt +Date: Sat Apr 26 22:21:37 2003 +0000 + + Missed files in the last commit: Remove memory debugging sysctl unless + MEMORY_DEBUG is set. + +commit 8621ae310b496a5d5db10236083f3f3d38362719 +Author: Eric Anholt +Date: Sat Apr 26 22:18:39 2003 +0000 + + Move the memory functions with debugging info to drm_memory_debug.h, and + remove a couple of dead functions. + +commit 79a0c5757e400c236b4c365761a377d52393606a +Author: Eric Anholt +Date: Sat Apr 26 21:57:43 2003 +0000 + + Remove #if 0'ed code. + +commit f5844cea13ba330beaeebb171eca1580efba62c6 +Author: Keith Whitwell +Date: Sat Apr 26 21:33:44 2003 +0000 + + 2.5.x sync patch from Linus Torvalds + +commit 2c40a56393102bb0fb21e183bf5a08b0eea35c57 +Author: Keith Whitwell +Date: Sat Apr 26 21:22:08 2003 +0000 + + move prototypes for gamma functions to gamma_drv.h + +commit 2142b7840a5e0c2b6342ef94f285ac9fcf4a87ce +Author: Keith Whitwell +Date: Sat Apr 26 21:21:36 2003 +0000 + + Remove #if 0'd code + +commit e60eb69bc029c04b39ef0de620002d5ba2433d04 +Author: Eric Anholt +Date: Sat Apr 26 06:53:22 2003 +0000 + + Replace the C atomic_cmpset_int compatibility function for -stable with the + real i386 atomic_cmpset_int from -current. FreeBSD-stable won't ever + have DRM support for non-i386. + +commit acb5d6b2732cccfa3734b25dc808ecdc5a6c556c +Author: Eric Anholt +Date: Sat Apr 26 06:39:55 2003 +0000 + + Disable MTRRs on FreeBSD-stable. Without this, it hangs on boot in the MTRR + setting for AGP cards on SMP machines. + +commit cb32dde3be831096e98c66398159f7d7ddf3d672 +Author: Leif Delgass +Date: Fri Apr 25 19:42:47 2003 +0000 + + Fix potential oops and memory leaks when allocations fail in + addbufs_agp/pci. Add support for buffer private structs with PCI DMA + buffers. Also some debug format string fixes. + +commit 77ee73f8cd92aa136488e23424282afba9977160 +Author: Eric Anholt +Date: Fri Apr 25 02:27:21 2003 +0000 + + Merge from FreeBSD-current. + +commit c3092ead6427d04b7067c1d7d95163c7aa7b75b1 +Author: David Dawes +Date: Fri Apr 25 00:57:42 2003 +0000 + + Targets for building dristat and drmstat. + +commit 58650c3a9d53044a0ab463df41864ddb39238bab +Author: Eric Anholt +Date: Fri Apr 25 00:02:14 2003 +0000 + + Clean up the DRM_COPY_TO_USER()ing of DRM(infobufs), making it more + legible. + +commit 781828b26e35e8347e461d2097563823e8f76c88 +Author: Eric Anholt +Date: Thu Apr 24 23:57:29 2003 +0000 + + Clean up the style of the linux-compat code and use ioctl() directly rather + than reimplementing it. + +commit 16fda821eb457818414faa57bf9ccfba93c3a350 +Author: Leif Delgass +Date: Thu Apr 24 23:18:33 2003 +0000 + + Pass dma handle from pci_alloc_consistent to the card for status page, + rather than using virt_to_bus() on the virtual address. + +commit a147df879b3b850612222759c14f4142d2406e74 +Author: Eric Anholt +Date: Thu Apr 24 19:09:55 2003 +0000 + + Remove more gamma DMA infrastructure. Most of this code was copied straight + from linux, so it could be added back if some driver needed it in the + future. + +commit d6a82ff9c160acbb7db5bee2cde45818d1e8548e +Author: Leif Delgass +Date: Thu Apr 24 16:55:22 2003 +0000 + + Remove unused dev->map_count. We always iterate the maplist with + list_for_each() and the count is not updated or used for stats. + +commit 2dc672a7908817f43391703a8341cb873fbb1543 +Author: Leif Delgass +Date: Thu Apr 24 16:47:32 2003 +0000 + + Minor cleanups for dri/drmstat test progs (Both still need targets for new + Makefile) + +commit cd3d6090b79ad5583494938a231cfc4da610ca9b +Author: Leif Delgass +Date: Thu Apr 24 15:29:30 2003 +0000 + + Remove unused variables + +commit 57406077e554d29e56a8a82c54ec7d41cdc07b79 +Author: Keith Whitwell +Date: Thu Apr 24 10:02:18 2003 +0000 + + Move the debug versions of the DRM memory functions to a new file and + implement non-debug ones as standard. + +commit a41594e8dfa029cfba9c518d6c21551f5e0857bc +Author: Keith Whitwell +Date: Thu Apr 24 09:41:33 2003 +0000 + + Remove #if 0'd code and some unused string functions + +commit 01178567ebc428fcf8eb53a62b5ca9c449980491 +Author: Eric Anholt +Date: Thu Apr 24 06:19:54 2003 +0000 + + Remove more gamma DMA code. This isn't all of it, but it's a major portion. + +commit c6d2af70cb30a5cc65aebae2637313158a95346e +Author: Eric Anholt +Date: Thu Apr 24 05:56:44 2003 +0000 + + Move some common code from addbufs_ to addbufs. Make buf_alloc be + protected by the count_lock and make it non-atomic. + +commit af3bfdef26b2d02ea4877e3d57601e57ffa4e95a +Author: Eric Anholt +Date: Thu Apr 24 05:14:05 2003 +0000 + + Remove the ioctl_count variable from the device. A reference is held to the + fp throughout the ioctl syscall, so the device can't be closed out from + under us. + +commit bcd527ee71043478d27ec3e5b611c9f34bf4f191 +Author: Eric Anholt +Date: Thu Apr 24 04:50:07 2003 +0000 + + Remove a bunch of dead code and fix spelling of a couple of comments. + +commit 00522cedd6ee3027d2858909d34e862fa21e6e28 +Author: David Dawes +Date: Thu Apr 24 03:01:40 2003 +0000 + + Single/dual rasterizer quiescence patch for the glint/gamma DRI driver + (#5685, Sven Luther). + +commit 9d603b0abe3d1ab2a383ee9f33f27900f9eb1d5e +Author: David Dawes +Date: Thu Apr 24 02:56:06 2003 +0000 + + break long line + +commit 9b2b2337b3caa006fa95eecb966b8a68eed83b90 +Author: Eric Anholt +Date: Thu Apr 24 00:46:03 2003 +0000 + + Move one definition to drm_drv.h and remove the rest of drm_init.h which + was all unused. + +commit e21473c88853bb6f539ecca1c76e692d748bb722 +Author: Eric Anholt +Date: Thu Apr 24 00:37:35 2003 +0000 + + Remove DRM_DMA_HISTOGRAM and associated code. + +commit 1fc0a5e1e4c43a0e9fe8b0d9860f22ae8e820d46 +Author: Eric Anholt +Date: Thu Apr 24 00:25:36 2003 +0000 + + Make DRM(read) and DRM(poll) stubs and remove DRM(write) and + DRM(write_string). This is the first part of removing much of the + support code for gamma from the BSD DRM, since it appears that no new + drivers are using it and nobody has ever shown interest in gamma on + BSD. + +commit e15b0b6a1b95e4145363b15e1a581ee230b2f9a2 +Author: Keith Whitwell +Date: Wed Apr 23 23:42:29 2003 +0000 + + Install dummy/noop read & poll fops unless the driver has replacements. + +commit 23a76c37594d3d423963c7b8610b64367e3ff9d8 +Author: Michel Daenzer +Date: Wed Apr 23 14:21:17 2003 +0000 + + deal correctly with read() from the DRM failing + +commit d5db1144dd5cb96b7e25d0e08a209b38e0afdc9b +Author: Michel Daenzer +Date: Tue Apr 22 21:45:06 2003 +0000 + + get rid of superfluous fields in struct drm_radeon_ring_buffer + use correct address for ring read pointer writeback (yes, we seem to have + been running with bogus values for the ring read pointer, which + 'worked' because the return value of radeon_wait_ring() is never + checked and the ring usually never fills up) + +commit 5ee61c18f4866bd9257bdc5eddefe6e58e0a1849 +Author: Leif Delgass +Date: Tue Apr 22 21:30:24 2003 +0000 + + Remove AGP dependency in kernel config for radeon, sis. Remove + PCIGART_ENABLED define for radeon, pcigart support now included for any + arch. + +commit 22608a414d7b7ef32ca51b9123be8341ddd5e8ce +Author: Leif Delgass +Date: Tue Apr 22 19:42:27 2003 +0000 + + Only mga, i810, i830 require AGP (should mga define __MUST_HAVE_AGP?) + +commit 879e3d335c09bfe069948754600543291e8f8475 +Author: Alan Hourihane +Date: Tue Apr 22 12:52:17 2003 +0000 + + change PREINSTALL/POSTINSTALL/UNINSTALL irq code to real functions as per + the other drivers + +commit 9c5d16216d35d4b815471ff62de79f7fff2b2a2c +Author: Alan Hourihane +Date: Tue Apr 22 12:42:22 2003 +0000 + + remove unused variable + +commit 0782f0df60b0544a8fb784aa253a4f57f9dfdeeb +Author: Alan Hourihane +Date: Tue Apr 22 12:41:16 2003 +0000 + + fix gamma headers + +commit 73e20998b46bd8aa6ac903bc4701711d9a527f63 +Author: Keith Whitwell +Date: Tue Apr 22 12:14:59 2003 +0000 + + Rename drm_lists.h to gamma_lists.h + +commit 700e880c3dbaf3532287ad423f3158adbac85fb7 +Author: Keith Whitwell +Date: Tue Apr 22 12:07:43 2003 +0000 + + new file + +commit 928c25d14f76ff537bd56f135b91cf681dee326b +Author: Keith Whitwell +Date: Tue Apr 22 12:07:24 2003 +0000 + + Move the excitingly named DRM(flush_block_and_flush) and friends to + gamma-specific code. + Fix templates so i8x0 drivers don't have to define __HAVE_DMA_WAITLIST. + +commit aba6bf7eb3cd53137fab4424ff39e2d68b83dc2a +Author: Keith Whitwell +Date: Tue Apr 22 11:39:34 2003 +0000 + + remove unused __HAVE_KERNEL_CTX_SWITCH code + +commit a1780925fb461c736bae7e51de0d3a1e909548f2 +Author: Keith Whitwell +Date: Tue Apr 22 11:31:55 2003 +0000 + + Move a chunk of gamma-specific code out of drm_dma.h. Remove unused + 'DRM_FLAG_NOCTX' option. + +commit 056762a9104997569b09416c35d9a0bfef175e1f +Author: Keith Whitwell +Date: Tue Apr 22 10:18:29 2003 +0000 + + remove unused dma histogram code + +commit 5141da97f680235d10d74737d5444963d2080072 +Author: Keith Whitwell +Date: Tue Apr 22 10:13:14 2003 +0000 + + Move a bunch of gamma-specific code into a gamma-specific file. Restore the + kooky DRM(write_string) code for gamma. + +commit 13211ad82c184e3daf68c06203412d3f1c949291 +Author: Keith Whitwell +Date: Tue Apr 22 09:49:14 2003 +0000 + + add more get_param queries for embedded project + +commit fc4fb6b51b50e37ff697e872b297b6460c3617af +Author: Keith Whitwell +Date: Tue Apr 22 08:06:14 2003 +0000 + + remove DRM read, poll and write_string + +commit 46e06192a88834a97257d2be5ab3aa7c325a1cfe +Author: Leif Delgass +Date: Mon Apr 21 16:07:17 2003 +0000 + + Check for NULL map before calling DRM(ioremapfree) on cleanup. Prevents an + oops if a map wasn't found (e.g. XFree86 Bugzilla #108) + +commit da35a90d99cf56a8ffc48f87754013d13e1cafcd +Author: David Dawes +Date: Thu Apr 17 18:52:05 2003 +0000 + + Add a Kconfig file as used in recent 2.5.x kernels. + +commit 21af3202874b5938e9c262a906f1eaba08e74b6e +Author: David Dawes +Date: Thu Apr 17 18:48:06 2003 +0000 + + Make Config.in look more like a recent 2.4.x kernel version. + +commit dbb7beb51d8adb4b5616fbcca7999b00d760b839 +Author: David Dawes +Date: Thu Apr 17 18:44:38 2003 +0000 + + Rework the Linux drm kernel module build to leverage off the standard + kernel build system. This is based on suggestions and examples from + David Woodhouse. This approach has the advantage that the build + requirements of a wider range of standard kernels are now supported + transparently, but the disadvantage of some extra complexity to handle + building against clean vendor-distributed kernel source trees. This has + been tested with some recent Red Hat and SuSE distributions. + +commit c2d7ff1bf98f92add98fb76b63d2bdb190f3cf2c +Author: David Dawes +Date: Thu Apr 17 18:41:28 2003 +0000 + + Bring some drm module changes over from the XFree86 trunk: + - Reset 'bound' flag for an agp entry after undbind succeeded in + drm_agpsupport.h (Egbert Eich). + - Ignore hw_lock for drm device if lock was set by a different instance (ie + Xserver) to prevent second server from spinning in driver release + function (currently only relevant for i8xx drm drivers) (David Dawes). + - Use the agpgart "key" for the unique handle for bindings rather than the + memory address (the key is guaranteed to be unique) (David Dawes). + +commit d1b7f551e6d582cd9c44d23883de1f6121907627 +Author: David Dawes +Date: Thu Apr 17 15:27:34 2003 +0000 + + Fix DRM module build on 2.5.41 and later kernels (tqueue -> workqueue). + +commit 48e389f3a5109383ca71c6c7f743b5107965f1d9 +Author: Jose Fonseca +Date: Thu Apr 10 14:58:53 2003 +0000 + + file drm_pci.h was initially added on branch mach64-0-0-5-branch. + +commit 244d4faa1d537a01292c4d2cf6c025b41710908d +Author: Eric Anholt +Date: Tue Apr 8 04:43:29 2003 +0000 + + file mach64_drv.c was initially added on branch mach64-0-0-6-branch. + +commit 353c84d2ddd2b4aff288a5ffd4a766e928322b28 +Author: Eric Anholt +Date: Tue Apr 8 04:23:49 2003 +0000 + + file Makefile was initially added on branch mach64-0-0-6-branch. + +commit 12a52fd8269a07103b6328483577f2487fd7cd01 +Author: Eric Anholt +Date: Tue Apr 8 04:09:47 2003 +0000 + + file drm_linux_list.h was initially added on branch mach64-0-0-6-branch. + +commit 10444e06d4f4edaf8e8cd9370f450ce7c047efac +Author: Leif Delgass +Date: Tue Apr 8 01:30:43 2003 +0000 + + Use list_entry() to get container struct from struct list_head pointers. + Build fix for RedHat 9 kernel (5 args to remap_page_range()). + +commit 3f7769921bd414f489d4487a5760a8d814efd51d +Author: Leif Delgass +Date: Sat Apr 5 19:49:16 2003 +0000 + + add 'SG' map type identifier string (pci scatter/gather) to /proc vm info + +commit 6f88a5351c3f0b8e657708b64060adb833c8a919 +Author: Eric Anholt +Date: Tue Apr 1 18:53:24 2003 +0000 + + Whitespace and remove a dead commented line. + +commit 8e51112fe06cc92a7e4d415c897d53008a935554 +Author: Leif Delgass +Date: Mon Mar 31 04:14:35 2003 +0000 + + Warning fix (use %p format for filp) + +commit 8926acac37025cd89dae2308c566c778fa1cc406 +Author: Eric Anholt +Date: Sun Mar 30 07:23:03 2003 +0000 + + Spelling fixes in comments. + Submitted by: Linus Torvalds + +commit aea0418d0db3338b81f83abf26df99dfd7ac85bc +Author: Eric Anholt +Date: Sat Mar 29 18:22:28 2003 +0000 + + Remove dead vma code and remove the unused devstate struct definition. + +commit 6ef79263b68402687ccc2b7447dd908c00e35057 +Author: Eric Anholt +Date: Sat Mar 29 03:38:47 2003 +0000 + + Add DRMFILE definitions and supply filp for BSD in the + post-drm-filp-0-1-branch world. The filp is a void * cast from the + current pid. This is a temporary solution which maintains the status + quo until a proper solution is implemented. + What is really needed is a unique pointer per open, hopefully with a device + private area. This can be done in FreeBSD for all entry points except + mmap, but is difficult (sys/dev/streams/streams.c is an example). I + have partially completed code for this but have not had time to debug, + so this is a temporary fix. + +commit e27d2f8c7cacf1e9994e9030c7ebb15dc4f4efff +Author: Eric Anholt +Date: Sat Mar 29 03:30:21 2003 +0000 + + buf->filp is a pointer, so make printf format args be %p not %d + +commit 1728bc637df023cce7b5abfeab2796ea481ca7e9 +Author: Keith Whitwell +Date: Fri Mar 28 14:27:37 2003 +0000 + + merged drm-filp-0-1-branch + +commit 37cb114bd92a17112033f4838e86857bcd466024 +Author: Keith Whitwell +Date: Wed Mar 26 16:37:47 2003 +0000 + + Add 2nd arg for DRM_FREE + +commit b3eb34e0ea0ec7c550df5fd6b25efcf9e35c53cd +Author: Alan Hourihane +Date: Tue Mar 25 11:36:43 2003 +0000 + + linux merge for drm + +commit c14006ba9f0522875327998215150067d8ca6ea7 +Author: Alan Hourihane +Date: Tue Mar 25 00:29:14 2003 +0000 + + XFree86 4.3.0 merge + +commit 0bd0dd2300e91707ae5a41a83eb37217fd8ad295 +Author: Eric Anholt +Date: Tue Mar 11 20:51:28 2003 +0000 + + Merge back from FreeBSD-current, adding FreeBSD ID tags to aid future + merging. Also includes an update to radeon PCI IDs. + +commit 638d45d2a0f5101e0b10a4f2761f9e25d2872055 +Author: Eric Anholt +Date: Sat Mar 8 05:05:41 2003 +0000 + + Make dma_addr_t an unsigned long not a uint32, don't try to use memrange + functions on FreeBSD non-x86, and remove a dead define. + +commit bf4b8ba753807eac22e7b14a5581c3c883d9473c +Author: Eric Anholt +Date: Thu Mar 6 19:21:23 2003 +0000 + + Remove the vbl signal code because it's untested (and has lock issues on + -current). + +commit a01d26f39d7e1fcf0ffafc04df832f72ae3d3896 +Author: Eric Anholt +Date: Wed Mar 5 06:06:27 2003 +0000 + + Put cdevsw initialization in line with FreeBSD-current. (From r1.10,r1.11 + of FreeBSD CVS) + +commit 3f786dbd1827d4f399bdf71e57d970ea8124bb0c +Author: Eric Anholt +Date: Wed Mar 5 06:04:50 2003 +0000 + + Update mmap handling for FreeBSD-current (Based on r1.3 of FreeBSD CVS). + +commit 1434bfe4a8e5fb7b6e8f52d3a732582e61216f68 +Author: Eric Anholt +Date: Wed Mar 5 04:14:52 2003 +0000 + + Remove a paste-o in DRM_SPINUNINIT and add a volatile to the compatibility + atomic_cmpset_int. + +commit 51e5f73d2a4020a1bae860057bae2b0eff8e9c70 +Author: Keith Whitwell +Date: Tue Mar 4 11:41:12 2003 +0000 + + DRM_FREE/2 patch from Philip Brown + +commit 708ecd0e4b4b1bc2f78dbb4e004bb4d5ec3effe8 +Author: Jose Fonseca +Date: Sun Mar 2 21:44:26 2003 +0000 + + file savage_drv.h was initially added on branch savage-0-0-1-branch. + +commit 2254ac21b8087c60fbf7d479ba3de2a1e7ac3d17 +Author: Jose Fonseca +Date: Sun Mar 2 21:44:26 2003 +0000 + + file savage_drm.h was initially added on branch savage-0-0-1-branch. + +commit ef6838e92e53530077f3fa946434306b8addde3e +Author: Jose Fonseca +Date: Sun Mar 2 21:44:26 2003 +0000 + + file savage_bci.c was initially added on branch savage-0-0-1-branch. + +commit eb0fd431c82b494cf62012b43306fa7a836f3865 +Author: Leif Delgass +Date: Fri Feb 28 19:39:46 2003 +0000 + + Update object targets + +commit 40de83c52cab6d343533ca0879a062b75ae7d096 +Author: Jose Fonseca +Date: Thu Feb 27 12:52:42 2003 +0000 + + file savage_drv.c was initially added on branch savage-0-0-1-branch. + +commit 1c3f7049057fcbc05a1c64e92329daf754c64691 +Author: Jose Fonseca +Date: Thu Feb 27 12:52:42 2003 +0000 + + file savage.h was initially added on branch savage-0-0-1-branch. + +commit 40bae8bec876086a61763012508298398b27b7c4 +Author: Leif Delgass +Date: Wed Feb 26 09:49:54 2003 +0000 + + file mach64_irq.c was initially added on branch mach64-0-0-6-branch. + +commit b487f30ea5c129eed1dd85f7ad79db3d2485b1f8 +Author: Eric Anholt +Date: Sat Feb 22 18:40:12 2003 +0000 + + Fix build on NetBSD. + +commit cfa778af9c70faea8c13e5cb7f80029eee0d074e +Author: Eric Anholt +Date: Fri Feb 21 23:23:09 2003 +0000 + + Merge from bsd-4-0-0-branch. + +commit a64472d18493de575a7636704b45babe7b4b4572 +Author: Eric Anholt +Date: Sun Feb 16 19:03:04 2003 +0000 + + file mach64_drm.h was initially added on branch mach64-0-0-6-branch. + +commit 5bf6a26aeb2a89b4ed599361f60cb68bf45e3956 +Author: Eric Anholt +Date: Sun Feb 16 19:03:04 2003 +0000 + + file mach64_state.c was initially added on branch mach64-0-0-6-branch. + +commit bd6120a28c30fa0b62c8c07a2fc7a6790834abf3 +Author: Eric Anholt +Date: Sun Feb 16 19:03:04 2003 +0000 + + file mach64_drv.h was initially added on branch mach64-0-0-6-branch. + +commit afcfefa6dc296b4863b1c83ebcf8143750af65ad +Author: Eric Anholt +Date: Sun Feb 16 19:03:04 2003 +0000 + + file mach64_dma.c was initially added on branch mach64-0-0-6-branch. + +commit 314d1d2cbee3fe0851d914c57cc09bf388e8ac37 +Author: Eric Anholt +Date: Sun Feb 16 19:03:04 2003 +0000 + + file mach64.h was initially added on branch mach64-0-0-6-branch. + +commit 639c2d813f91c80aca66b13242b8d45a1ea986e8 +Author: Michel Daenzer +Date: Sat Feb 8 18:02:02 2003 +0000 + + reclaim DMA buffers in DRIVER_RELEASE() (Felix Kühling) + +commit fac2ed4d10e4d8283f818989df5d5722a447aac4 +Author: Michel Daenzer +Date: Thu Feb 6 18:20:00 2003 +0000 + + fix EAGAIN handling in radeon_cp_dispatch_texture() (fixes corruption of + large textures), and get rid of superfluous local y variable + +commit b88cc5da26cf1478e425a6398456b52e27f53626 +Author: Michel Daenzer +Date: Tue Feb 4 19:28:52 2003 +0000 + + disable strict aliasing for building the DRM + +commit 73bf29a6c14d12f86fbce48f6f6bace0de6732a6 +Author: Michel Daenzer +Date: Tue Feb 4 19:20:18 2003 +0000 + + fix PCI and AGP posting problems (based on testing by Chris Ison and + suggestions by Benjamin Herrenschmidt and Arjan van de Ven) + remove radeon_flush_write_combine() which has been unused for a while + +commit f13af50838a2a207269ef46c3561ca1250dc6c12 +Author: Michel Daenzer +Date: Tue Feb 4 15:56:37 2003 +0000 + + only acknowledge interrupts we handle - others could be used outside the + DRM + +commit f3751850c8b5b4216c460474147e0dcfc26a144e +Author: Keith Whitwell +Date: Mon Feb 3 14:30:32 2003 +0000 + + Fix size of VERTEX2 ioctl struct (Egbert Eich) + +commit c7d471b6ae936127311a816a8d15b4565746af48 +Author: Michel Daenzer +Date: Sun Feb 2 03:06:47 2003 +0000 + + don't inflate relative vblank sequence numbers on repeated calls (e.g. when + interrupted by a signal) + +commit 9b9b099471580616e1685bae725f2c297179ae99 +Author: Leif Delgass +Date: Sun Jan 26 22:25:35 2003 +0000 + + Add cast to avoid void * arithmetic warning + +commit 66f57c403c012f55126817bc21d40346d29d2d35 +Author: Eric Anholt +Date: Fri Jan 24 00:49:15 2003 +0000 + + Fix build on -current: Provide M_WAITOK define. + +commit 77ea378b09a86a9fe73d0ecef40f5570068c9af0 +Author: Eric Anholt +Date: Thu Jan 16 06:20:44 2003 +0000 + + Fix radeon for BSD. + +commit 826aad0aba648befe09592f154f75db5009a0cd9 +Author: Michel Daenzer +Date: Sat Jan 11 20:58:20 2003 +0000 + + limit number of pending vblank signals to 100 to prevent DoS, and minor + cleanups + +commit 6f940bc3f8aeb09925354445e92e9c0e74515b13 +Author: Jeff Hartmann +Date: Sat Jan 11 05:42:37 2003 +0000 + + file agp_30_symbols.h was initially added on branch agpgart_2_0_branch. + +commit a1fc6af2d8937fcc4eef25119d777e168e62b2ea +Author: Keith Whitwell +Date: Fri Jan 10 17:04:21 2003 +0000 + + Note that radeon_do_cp_idle() can fail, cope with it. + +commit 4b3051d3f606faf1a78ac85236119a1d2e10fdc7 +Author: Rik Faith +Date: Mon Jan 6 07:38:25 2003 +0000 + + [TRIVIAL] [TRIVIAL PATCH 2.5.48] Remove unused function from radeon_mem.c + Submitted by Rusty Trivial Russell + +commit 320802ebc145c0b821979dc587cd7e90b10b2d55 +Author: Keith Whitwell +Date: Fri Jan 3 11:22:23 2003 +0000 + + more cleanups, free mem heap data on last client exit + +commit 7419aa6e3f639ee47879824f387117d28b4de013 +Author: Keith Whitwell +Date: Thu Jan 2 18:59:43 2003 +0000 + + Bump radeon drm version nr on recent interface relaxation + +commit 14e831baf4ea2a412c9173cd9ec16b4928284232 +Author: Keith Whitwell +Date: Thu Jan 2 18:41:02 2003 +0000 + + Remove printk + +commit 208c0779b65242159bbb87153269faef9370670c +Author: Keith Whitwell +Date: Thu Jan 2 18:38:07 2003 +0000 + + Make the radeon drm module better at cleaning up after itself if all the + clients (particularly the X server) exit without doing so for it. + +commit ab9eb685c002bc875e9a7d81b7ac7bd5fd0be1d4 +Author: David Dawes +Date: Mon Dec 16 19:18:51 2002 +0000 + + file i830_irq.c was initially added on branch mesa-4-0-4-branch. + +commit 05f761fa4fe6d9b34b44e7cfe57a8e11263b0e3c +Author: David Dawes +Date: Thu Dec 12 22:20:30 2002 +0000 + + enums should be ints + +commit 786228bd26d56c13fc2655431ee5ca2d4d0c9863 +Author: Keith Whitwell +Date: Thu Dec 12 16:45:31 2002 +0000 + + bring in jantorial changes from 2.5.51 + +commit fd621fd4a0c0033365353b6d33f132c7ef49b359 +Author: Keith Whitwell +Date: Wed Dec 11 13:40:27 2002 +0000 + + remove agpgart informational + +commit b03fa556b2c7e19d7021c017e35aaacaf24e5694 +Author: Keith Whitwell +Date: Fri Dec 6 12:22:43 2002 +0000 + + Rewrite radeon_cp_dispatch_texture() to avoid pingponging back to userspace + when issue large (multi-buffer) uploads. + +commit a885d6786f40fd0c4dbcb09a17f6e103d0949ed7 +Author: Eric Anholt +Date: Fri Dec 6 02:27:30 2002 +0000 + + Add vblank signal code for BSD DRM. Untested so far, but working with a + 4.2.0 userland at least. + +commit 85025d4f2ad25258fb7678395b8c7ce1be1f0063 +Author: Michel Daenzer +Date: Wed Dec 4 15:39:53 2002 +0000 + + further vertical blank interrupt cleanups: remove unused variable, + non-ambiguous variable names, don't express subtraction in + unnecessarily complicated ways + +commit 4acba63bb7045e6bf665580cf6cea111f0786f77 +Author: Michel Daenzer +Date: Tue Dec 3 00:43:47 2002 +0000 + + vertical blank interrupt cleanups: use spinlock instead of semaphore, send + signal directly from interrupt handler instead of using a taskqueue + (based on feedback by Linus Torvalds) + +commit 40891ac190fb74f389ea1a9758249a2f642fd99b +Author: Michel Daenzer +Date: Sat Nov 30 14:24:07 2002 +0000 + + vertical blank ioctl can send signal instead of blocking + +commit c869f4a1e59c4fa0bed5681cad5ad49e685603eb +Author: Brian Paul +Date: Mon Nov 25 16:03:20 2002 +0000 + + added missing return fd (Alexander Stohr) + +commit a654424ca16dca5d27e91592e2082d1381f6d5f5 +Author: Keith Whitwell +Date: Mon Nov 25 09:34:47 2002 +0000 + + Silence the radeon_freelist_get 'returning NULL' message. It's not an error + & just confuses people. + +commit b96f48a89c8962343ee75b0961a06453d0f8b355 +Author: Michel Daenzer +Date: Sat Nov 23 11:58:33 2002 +0000 + + allow unprivileged clients to use the GETPARAM ioctl (Wang WenRui) + +commit e656655a361acf73c5652fcef8cf6ba61dfe7a50 +Author: Eric Anholt +Date: Wed Oct 30 06:10:34 2002 +0000 + + Kernel support for vblank syncing on Rage 128 and Matrox. + +commit 344c7f6b412c19c963c33709f0d4a3a7205e1d79 +Author: Jens Owen +Date: Tue Oct 29 20:29:05 2002 +0000 + + updated e-mail addresses for Keith, Alan and Jens + +commit 5e1b8ed88ae8fb8b697515140f7a00d022ac2db0 +Author: Michel Daenzer +Date: Tue Oct 29 13:49:26 2002 +0000 + + preserve CRTC{,2}_OFFSET_CNTL in 2D driver to avoid bad effects when + pageflipping after a mode switch + take current page into account in AdjustFrame(); writing the CRTC offset + via the CP was probably a bad idea as this can happen asynchronously, + reverted + take frame offset into account when flipping pages + handle CRTC2 as well for pageflipping (untested) + preserve GEN_INT_CNTL on mode switches to prevent interrupts from getting + disabled + +commit 10900dab7caa593a54d76e5f6abdc3df9bdd0a04 +Author: Eric Anholt +Date: Tue Oct 29 03:20:21 2002 +0000 + + Use bus_alloc_resource/bus_release_resource more properly: save the rid + returned by alloc. + +commit ff25e7016c74ed0be5d47be5bf1937335da2bbf4 +Author: Brian Paul +Date: Mon Oct 28 19:05:40 2002 +0000 + + merge from mesa-4-1-branch to get cube-map registers. bumped version to 1.7 + +commit 516392beff156f87b466ff7931e5573a3a931ca0 +Author: Eric Anholt +Date: Sun Oct 27 05:25:50 2002 +0000 + + s/udelay/DRM_UDELAY/ + +commit 9f21f02217dd8b81886f042ce1af99d61de9a218 +Author: Eric Anholt +Date: Sun Oct 27 05:24:33 2002 +0000 + + Catch up to -current. + +commit b3a20ce219b353aa3e2b7f3b47ffd28b279557c7 +Author: Alan Hourihane +Date: Tue Oct 22 23:38:53 2002 +0000 + + final part of XFree86 4.2.99.2 merge + +commit ff4baa69da278b7f616063f37fbd27febf3eb211 +Author: Alan Hourihane +Date: Tue Oct 22 13:43:45 2002 +0000 + + Import of XFree86 4.2.99.2 + +commit 5e9fad35880e89d428ba917d842d0e9ed9a1be6b +Author: Eric Anholt +Date: Mon Oct 14 23:35:24 2002 +0000 + + Fix reversed test that broke vblank waiting on FreeBSD. + Pointy hat to: anholt + +commit 3d69766ea6df4ab1837f5270beafb13c70ec61e6 +Author: Keith Whitwell +Date: Thu Oct 10 08:25:40 2002 +0000 + + Jonny Strom's mga_dma.c patch + +commit 2af90a581d20c983446d354051f0f098a5d4eacb +Author: Brian Paul +Date: Wed Oct 9 16:29:01 2002 +0000 + + replaced max() macro with conditional expression + +commit aa1ca406d637a1eabbff272c0508bed5eb1147a1 +Author: Keith Whitwell +Date: Tue Oct 8 08:32:06 2002 +0000 + + Fix error condition... + +commit a653224403a9c85b1406697e725226e0d477042a +Author: Keith Whitwell +Date: Tue Oct 8 08:29:47 2002 +0000 + + Call pci_enable_device() in DRM(irq_busid). + +commit 381e0fe7f8ee5a9500fdb91d83ce45915b64db5f +Author: Keith Whitwell +Date: Wed Oct 2 07:55:27 2002 +0000 + + Free correct block in free_block (K. Rasche) + +commit 8c14585fc33f2af781261303780c0df70fbe0db2 +Author: Michel Daenzer +Date: Tue Oct 1 17:31:20 2002 +0000 + + fix wait condition for vertical blank IRQs + +commit 537f2208f00069913c161750baef82964d0e870e +Author: Eric Anholt +Date: Sun Sep 29 23:56:17 2002 +0000 + + Remove some noise being spit to the console. + +commit 506c1c02a43970e8ae891c9015eba7ab581d08f3 +Author: Eric Anholt +Date: Sun Sep 29 23:21:55 2002 +0000 + + Make our set_bit and friends match linux better (cleans up some warnings) + +commit efda4ce3539c9adf5fc798bb5e0ba5e8ce804afb +Author: Eric Anholt +Date: Sun Sep 29 22:47:08 2002 +0000 + + warnings cleanup + +commit 33a51d8518c37833a83225b47ad0b435050edeae +Author: Eric Anholt +Date: Sun Sep 29 22:39:34 2002 +0000 + + Fix some of my silliness in DRM_WAIT_ON (not returning EINTR). + +commit 899df4f53009d8484648ca12133a6ef8b1bd2d52 +Author: Keith Whitwell +Date: Sun Sep 29 21:22:01 2002 +0000 + + Turn boxes off again + +commit 9243e642dabc30ddf4b1743acb8cd4e9e905f351 +Author: Keith Whitwell +Date: Sun Sep 29 21:19:01 2002 +0000 + + Move os-dependent stuff out of radeon_irq.c + +commit e6901cad696cf58ee9f1a48bdc7e9fa047824f8a +Author: Eric Anholt +Date: Sun Sep 29 20:48:18 2002 +0000 + + Fix up BSD irq handling. + +commit ec48dfa83599fa6061bb9cc566f8d8dc1727aced +Author: Michel Daenzer +Date: Sun Sep 29 00:12:28 2002 +0000 + + add support for 16K and 64K page sizes (Bjorn Helgaas) + +commit a33d42e2ba08a97a434c25980449f4e027d0072b +Author: Michel Daenzer +Date: Fri Sep 27 21:47:52 2002 +0000 + + make SW interrupts more robust: write sequence number to scratch register, + acknowledge any lost interrupts before waiting + +commit cc9a169d08c00975f623d717737b499defb4938e +Author: Michel Daenzer +Date: Thu Sep 26 12:49:18 2002 +0000 + + DRM(vblank_wait) is driver specific + +commit 97961e2c65773328fe9c2e1d66e4a0b8a253d54d +Author: Eric Anholt +Date: Thu Sep 26 07:45:07 2002 +0000 + + BSD vblank framework. + +commit 770d045d25728be51534b930afdfa36f3ffddbfc +Author: Eric Anholt +Date: Thu Sep 26 07:21:05 2002 +0000 + + Fix one warning. + +commit f40674ea9f3e3c17d632de90d7e35da5640a55b2 +Author: Michel Daenzer +Date: Wed Sep 25 19:48:51 2002 +0000 + + change RADEON_PARAM_IRQ_ACTIVE to RADEON_PARAM_IRQ_NR + +commit 55acd0d5a64a2ee6b0cecc75872fbf8c4bb42a0c +Author: Michel Daenzer +Date: Wed Sep 25 17:18:19 2002 +0000 + + common ioctl to wait for vertical blank IRQs + +commit f1c8fe95578e15d5eece6ad52540ce2c7c671f70 +Author: Keith Whitwell +Date: Mon Sep 23 17:26:43 2002 +0000 + + merged r200-0-2-branch to trunk + +commit cfa1a918b6d6b2d0fd9ae0f58f5b86a15c443dcb +Author: Michel Daenzer +Date: Sat Sep 21 23:18:54 2002 +0000 + + make sure we never oops because the hardware lock pointer in the sigdata + structure is out of date + +commit c4318a5c642d15ad3847a0b7a3185abf0c1ca219 +Author: David Dawes +Date: Wed Sep 11 00:57:49 2002 +0000 + + - Fix various bugs in the DRI support for the i830 and i845G (Keith + Whitwell). + - Major rework of the 2D i830/i845G support, including: + - Improve VESA mode selection, and fix refresh rate selection. + - Don't duplicate functions provided in the vbe modules. + - Don't duplicate functions provided in the vgahw module. + - Rewrite memory allocation. + - Rewrite initialisation and save/restore state handling. + - Decouple the i810 support from i830 and later. + - Remove various unnecessary hacks and workarounds. + - Fix an 845G problem with the ring buffer not in pre-allocated memory. + - Fix screen blanking. + - Fix some HW cursor glitches, and turn HW cursor off at VT switch and + exit. + - Don't attempt to use the i830's function 1 entity. + - Fix problems with option handling. (David Dawes). + - Add mode VBE-aware mode handling functions to the vbe module (David + Dawes). + +commit 9797f0fd172c7d87e009dbfe7603c9df48509394 +Author: Eric Anholt +Date: Fri Aug 30 23:49:25 2002 +0000 + + Remove some extra symlinking for kernel module building that hasn't been + needed since 2000. + +commit b248c02c4ffaaaef4c91d8024808c35bcbfa303b +Author: Eric Anholt +Date: Fri Aug 30 21:34:03 2002 +0000 + + Remove this one too: it'll be used from the linux version (if ever) + +commit d51ec6b9728e8da473fb06e23424a1f6c0ee8e9b +Author: Eric Anholt +Date: Fri Aug 30 21:06:21 2002 +0000 + + Remove compat functions for FreeBSD for drivers which weren't available in + X4.2 + +commit be88ab60dfbacddbc424c7e6bc558abf13eafa9d +Author: Keith Whitwell +Date: Fri Aug 30 07:55:25 2002 +0000 + + file radeon_irq.c was initially added on branch r200-0-2-branch. + +commit 4fcde1efc16ef0849c7aa61d568ef5577e2f1920 +Author: Keith Whitwell +Date: Thu Aug 29 07:34:49 2002 +0000 + + standardize use of __FUNCTION__ (Linus) + +commit 22c1ca1fd5116d55c81bbfdeccd995dc19572a8f +Author: Keith Whitwell +Date: Wed Aug 28 08:47:39 2002 +0000 + + Turn boxes off. + +commit 8a8cfd38df9a48069c4ca56006d219e0eb8ca59c +Author: Eric Anholt +Date: Wed Aug 28 04:33:02 2002 +0000 + + Remove i8x0 files from the BSD side. These were not actually ported, and + when they do get ported most of them won't live in these directories. + +commit fa560b4847fc89aa68251236d3843b97518b1853 +Author: Keith Whitwell +Date: Tue Aug 27 12:16:32 2002 +0000 + + file radeon_mem.c was initially added on branch r200-0-2-branch. + +commit e4830ba553eda00783261073cf4082176b4c2fe2 +Author: Eric Anholt +Date: Tue Aug 27 03:56:10 2002 +0000 + + Remove drm_linux.h, it's no longer used. + +commit 5e81d590d557672376795011b9d78e93d10e2f7f +Author: Eric Anholt +Date: Tue Aug 27 01:22:55 2002 +0000 + + Include non-radeon modules in the build. + +commit 48cc350e21acd2b4b03c76937e2861af5271435a +Author: Keith Whitwell +Date: Mon Aug 26 22:16:18 2002 +0000 + + merged r200-0-1-branch + +commit a697941d4c35e0287c51f1a5cad5c2aa32ae9159 +Author: Leif Delgass +Date: Thu Aug 22 19:35:31 2002 +0000 + + Don't (re)define vmalloc_to_page for kernel >= 2.4.19, as it has been + backported from 2.5.x. Also fix a couple of incorrect + LINUX_VERSION_CODE tests and fix header dependency for r128, radeon + when building without AGP. + +commit 2febcafd66adfe0728f93e4b9b2954d793f71459 +Author: Leif Delgass +Date: Thu Aug 22 18:43:39 2002 +0000 + + SetPageLocked only defined in 2.5.x (x=?), use LockPage for 2.4.x (x>=9). + Also apply build fixes from i810_dma.c to i830_dma.c + +commit 18d3fac990b9f3b5820306129feb5563b5d207f4 +Author: Jose Fonseca +Date: Wed Aug 21 14:09:28 2002 +0000 + + Change the linux kernel version condition in the i810 driver (according to + Alan Cox) + +commit 77c35c043a8d50244d4fbaa4f2b5d0b7d4fd856f +Author: Eric Anholt +Date: Wed Aug 21 07:14:21 2002 +0000 + + Remove drm_linux.h, move the two useful defines into drm_drv.h (the only + place they're used). Use fd locking on -current. Actually copy in data + from userspace to kernel in the linux-compat ioctl path. Make sure + ioctl sizes are as expected in the ioctl handler functions. + +commit 8eedac58332094c72caf1fc6c41312e8ce1728b7 +Author: Leif Delgass +Date: Wed Aug 21 01:14:43 2002 +0000 + + add missing include (for udelay), remove unused counter. + +commit 3165128fc461fdadf34b7f4bbd393fa076c1ae14 +Author: Michel Daenzer +Date: Wed Aug 21 00:09:32 2002 +0000 + + TRUE and FALSE don't seem to be defined everywhere... + +commit 33d57137daece1bc5b1e8cc0a11e45a9d5974939 +Author: Keith Whitwell +Date: Mon Aug 12 07:26:00 2002 +0000 + + zero-cliprect case patch from Jacek + +commit d0ac4e5ad0481eb634b3b811a94f4a2b6587e479 +Author: Michel Daenzer +Date: Sun Aug 11 15:56:44 2002 +0000 + + test scratch register writeback before using it + +commit d2f2b42f1d206fd248ada48ce2c498e31351ab33 +Author: Eric Anholt +Date: Thu Aug 8 21:23:46 2002 +0000 + + Try to open the /dev/dri/cardX device once, then only if it fails check the + device number and recreate it if necessary. Fixes xf86drm.c to allow + linux binaries to be used for emulation on FreeBSD. + +commit 977b420d5dc66db3d4335132861a1eff3747b49a +Author: Rik Faith +Date: Tue Aug 6 18:00:57 2002 +0000 + + Updates from Rusty Russell to: + 1) Remove redundant header inclusion + 2) Silence bitop on non-long argument warnings (change int to long) + 3) Move to ISO C (gcc 2.6) initializers (accepted by older gccs also) All + of these are syntax changes that should not impact functionality. + +commit 881a9b214d033a1e153f61996645bdaa37eb87d8 +Author: Michel Daenzer +Date: Thu Jul 18 23:17:13 2002 +0000 + + fix off-by-one error for right bottom corner in radeon_emit_clip_rect() + (Jacek Rosik) + +commit 8fa8db126a6aa180fd44ae0be0e720722af69e1d +Author: Tim Smith +Date: Wed Jul 17 08:30:36 2002 +0000 + + Workaround for Radeon lockups on fast machines + +commit 9a3a3143ce41c72b4de2721cf16025f11ca334ca +Author: Michel Daenzer +Date: Sun Jul 14 20:26:52 2002 +0000 + + bump DRM minor and check it before using the GETPARAM ioctl to obtain + scratch register values + +commit fd86ac9561dc77ef23e19d28723b40c72bdf1e97 +Author: Michel Daenzer +Date: Thu Jul 11 20:31:12 2002 +0000 + + Don't read scratch registers directly, obtain the values via the GET_PARAM + ioctl. The DRM reads them from memory addresses the chip writes to on + updates. Fall back to reading the registers directly with an old DRM. + (Tim Smith, cleanups by myself) + +commit 2ec9c15d8ce45d95ef395a4fff114109c908a572 +Author: Eric Anholt +Date: Tue Jul 9 02:40:38 2002 +0000 + + Increase the linux-compatibility max ioctl. + +commit 9ceabc585a20a3f992f2b3852d476df81855967a +Author: Alan Hourihane +Date: Sat Jul 6 09:43:12 2002 +0000 + + remove obsolete files + +commit 59c07e447b18708757375d969f8eef5abd3c9a93 +Author: Alan Hourihane +Date: Fri Jul 5 08:58:15 2002 +0000 + + remove files missed by merge + +commit 74ef13fd009b9e37956e4207d0a5ed92f4b5e39a +Author: Alan Hourihane +Date: Fri Jul 5 08:31:11 2002 +0000 + + merged bsd-3-0-0-branch + +commit 24025ca5f78c15ced14490532b4410730353d2c1 +Author: Keith Whitwell +Date: Thu Jul 4 12:03:15 2002 +0000 + + Fix some more pageflipping issues -- existing code was doing MMIO writes + while ring was active. There is still an MMIO read in there, but I + haven't seen any lockups that could be attributed to it. + +commit ca81e1334edebb90b0528baad089fbc6df937fb6 +Author: Keith Whitwell +Date: Thu Jul 4 11:55:44 2002 +0000 + + Revert SET_SCISSORS change. + +commit cc45cc060963356edd832d1bbdf21da46e01c8fb +Author: Tim Smith +Date: Tue Jul 2 21:34:25 2002 +0000 + + Fix lockup on faster machines when drawing in multiple clip rectangles + (e.g. when part of a 3D window is obscured by another window) + +commit bb91bc0879ccc1981c49fa761e9bd58bceb1e5cd +Author: Keith Whitwell +Date: Thu Jun 27 17:56:39 2002 +0000 + + Set pfCurrentPage on cleanup_pageflip + +commit 8aecdbea7660ae184827a0812fc4bbd953279c5b +Author: Alan Hourihane +Date: Tue Jun 25 12:13:20 2002 +0000 + + gamma_alloc -> DRM(alloc) + +commit f626cf76e61313152e57334c7f172de97235d169 +Author: Max Lingua +Date: Tue Jun 25 11:20:36 2002 +0000 + + file s3v.h was initially added on branch s3virge-0-0-1-branch. + +commit 4cdcbd6c2f8f7026fbf2435001fc1e90de01505c +Author: Max Lingua +Date: Tue Jun 25 11:20:36 2002 +0000 + + file s3v_dma.c was initially added on branch s3virge-0-0-1-branch. + +commit 4073aa694c2de2f65f37afef93abeab139c1aa30 +Author: Max Lingua +Date: Tue Jun 25 11:20:36 2002 +0000 + + file s3v_drm.h was initially added on branch s3virge-0-0-1-branch. + +commit 5f8b0028a26cdbe0996abc243602010ae8af755e +Author: Max Lingua +Date: Tue Jun 25 11:20:36 2002 +0000 + + file s3v_drv.c was initially added on branch s3virge-0-0-1-branch. + +commit 688082d6564644f2f64a44105c872cc57476a1f6 +Author: Max Lingua +Date: Tue Jun 25 11:20:36 2002 +0000 + + file s3v_drv.h was initially added on branch s3virge-0-0-1-branch. + +commit 978136f2f4dd12d1828ab41db5343ce5fccd52a9 +Author: Max Lingua +Date: Tue Jun 25 11:20:36 2002 +0000 + + file s3v_regs.h was initially added on branch s3virge-0-0-1-branch. + +commit 663c9a152a868ca9e1dbd6ab000f2da273d737ea +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file radeon_state.c was initially added on branch bsd-3-0-0-branch. + +commit 3fe7fb316c6f160ec8b6ef2a8ebf159e71cd2283 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file radeon.h was initially added on branch bsd-3-0-0-branch. + +commit f8794f23f6d9318a9797949f1761119706baae42 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file radeon_drm.h was initially added on branch bsd-3-0-0-branch. + +commit 1942da19d46f67afbdf3da8103f3260377bbbe89 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga_dma.c was initially added on branch bsd-3-0-0-branch. + +commit baf55c1b8b5560104e29e5f4089ccdde4bb111db +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga_drv.h was initially added on branch bsd-3-0-0-branch. + +commit df6e570e4de5e57173d4b3b63ddaa0ba1a11e15e +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga_ucode.h was initially added on branch bsd-3-0-0-branch. + +commit 2a0545aa19db1d861290df07709cbd58a2a820f3 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga_warp.c was initially added on branch bsd-3-0-0-branch. + +commit 0ca7468d0602e46aead3e645de714345cb75c5f3 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga.h was initially added on branch bsd-3-0-0-branch. + +commit d29446a3002a8f60736ab3bcb7a1f22a8f2818f0 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga_state.c was initially added on branch bsd-3-0-0-branch. + +commit 1c9c08717a09cdb5fa9b40e7ed43efa7f76b82f3 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file radeon_drv.h was initially added on branch bsd-3-0-0-branch. + +commit 5dd77d6e49205ff5ac71d832de270681ba186558 +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file mga_drm.h was initially added on branch bsd-3-0-0-branch. + +commit a3ddb601df69116be8e40481471b523e163bf65b +Author: Eric Anholt +Date: Fri Jun 21 06:08:46 2002 +0000 + + file radeon_cp.c was initially added on branch bsd-3-0-0-branch. + +commit 9e3d3c9541bc167831841156b99f31cfa5cb39be +Author: Eric Anholt +Date: Wed Jun 19 04:01:55 2002 +0000 + + file r128_state.c was initially added on branch bsd-3-0-0-branch. + +commit c4f11163699b1046ec51b27440154fd3ad4bb727 +Author: Eric Anholt +Date: Wed Jun 19 04:01:54 2002 +0000 + + file r128_drv.h was initially added on branch bsd-3-0-0-branch. + +commit 89181b9c599988e9b46f2a3d1de5ec47b8cc8c43 +Author: Eric Anholt +Date: Wed Jun 19 04:01:54 2002 +0000 + + file r128_cce.c was initially added on branch bsd-3-0-0-branch. + +commit 2015f551378e19bc3a1727de2c3f68cec4ac1a42 +Author: Eric Anholt +Date: Wed Jun 19 04:01:54 2002 +0000 + + file r128.h was initially added on branch bsd-3-0-0-branch. + +commit 5465239b0c422b4f8c1ef13e4353877fa9229993 +Author: Eric Anholt +Date: Wed Jun 19 04:01:54 2002 +0000 + + file r128_drm.h was initially added on branch bsd-3-0-0-branch. + +commit 063d0a30c2a9899ae52d50ad5d37d6171e37e3f8 +Author: Michel Daenzer +Date: Tue Jun 18 22:40:26 2002 +0000 + + endianness fixes + +commit 1cb07189420a529a43ad390731f8365a0805a9bd +Author: Eric Anholt +Date: Mon Jun 17 22:18:00 2002 +0000 + + file drm_os_netbsd.h was initially added on branch bsd-3-0-0-branch. + +commit 2dcada361db7db00bf0796e399b4188578e3efbe +Author: Keith Whitwell +Date: Wed Jun 12 15:50:28 2002 +0000 + + merged tcl-0-0-branch + +commit 5676a2a6105afdfc343e7f36f3c87e528a9d14b3 +Author: Michel Daenzer +Date: Sun Jun 2 16:00:45 2002 +0000 + + fixes for big endian in general and powerpc in particular + +commit 6ac48cddd0a074c77de0ab3dfc1661352b6f0c26 +Author: Jeff Hartmann +Date: Wed May 29 21:21:50 2002 +0000 + + Import Mesa 4.0 port of I830M/I845G 3D driver funded by 2d3d. Import + Lastest i810 ddx driver changes from XFree86 CVS to support the I845G. + Fixup warnings in I830M kernel driver. + -Jeff + +commit 96b22f57ea9fa0dca36062d56c8f205e5b08fd84 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file r128_drv.c was initially added on branch bsd-3-0-0-branch. + +commit 8e2b1e79da105a406cc33d8bb3b8cab35337647e +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga_drv.c was initially added on branch bsd-3-0-0-branch. + +commit 468b72512aa0e70de60506e4f03ea6d365e56267 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file tdfx.h was initially added on branch bsd-3-0-0-branch. + +commit ba9503de430f8e0a34bf9ed8c2dc9a635959eeb0 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i830_dma.c was initially added on branch bsd-3-0-0-branch. + +commit d1c2922d76ab81bde00e504b179a7afb39b6fc78 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i830.h was initially added on branch bsd-3-0-0-branch. + +commit 8a0fe9be3463e9244055847e5cd4f8df485526e8 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i830_drv.c was initially added on branch bsd-3-0-0-branch. + +commit dbf4b0aecb2d6efd9f9fafd3fd7c7eae6c59f3ba +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i830_drv.h was initially added on branch bsd-3-0-0-branch. + +commit 205e33909d26b587e36527b3fae6c4ed9cddab34 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i810_drv.h was initially added on branch bsd-3-0-0-branch. + +commit e8ba43d3ac7982cc16b4cdc81671375f41e66a6f +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file radeon_drv.c was initially added on branch bsd-3-0-0-branch. + +commit f6126878dce5bc800252c9a8d095e9ac30f4d5ca +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i810_dma.c was initially added on branch bsd-3-0-0-branch. + +commit 8fc7367069eaf14e30010f5a56fc4cbac15e39da +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i810_drv.c was initially added on branch bsd-3-0-0-branch. + +commit 8afc2de290e1aed0377c097d05077d9aac2e4897 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file i810.h was initially added on branch bsd-3-0-0-branch. + +commit 76c315e7e09e84b135033c7bad74b1297ee72fe6 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file gamma.h was initially added on branch bsd-3-0-0-branch. + +commit 073cf3ae4818f8f1b720dbc58bdcf61ce62d11e0 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga.h was initially added on branch bsd-3-0-0-branch. + +commit d10db84928384084d9ab17bcca3d2880ecd611de +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga_dma.c was initially added on branch bsd-3-0-0-branch. + +commit c5b8f939db83d8de9c983b622c6003eca36ea4d2 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga_drv.h was initially added on branch bsd-3-0-0-branch. + +commit abbe04f64fab2a9fa2099756b776ec634df9fd82 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga_state.c was initially added on branch bsd-3-0-0-branch. + +commit 8797372f642018de3b5d7142e9c9f51d4eab999d +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga_ucode.h was initially added on branch bsd-3-0-0-branch. + +commit 49a57237e029892ee788f059c99bad5ccf9df1a1 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file mga_warp.c was initially added on branch bsd-3-0-0-branch. + +commit 3ddd3c649de865d44ad737b8510d46ce273bd728 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file r128.h was initially added on branch bsd-3-0-0-branch. + +commit c57397bf62734000673411231c8ac2b35f731e39 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file r128_cce.c was initially added on branch bsd-3-0-0-branch. + +commit eea2997098406bfd5a9dd4f93034e5715d5a641e +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file r128_drv.h was initially added on branch bsd-3-0-0-branch. + +commit 47d39609fe713e57ab9c1391f5ac2c2be71594df +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file r128_state.c was initially added on branch bsd-3-0-0-branch. + +commit 3e15d0e63c67158742f2c5434333213923f7b0fe +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file radeon.h was initially added on branch bsd-3-0-0-branch. + +commit 731dbf2dfccbf44f375f58d7dda91d9b2f1ab9ce +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file radeon_cp.c was initially added on branch bsd-3-0-0-branch. + +commit c12d19453954dd2ade830fac50bd4669954c7aab +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file radeon_drv.h was initially added on branch bsd-3-0-0-branch. + +commit 69e99d05a29d91e87f32affdc4776f76552b5783 +Author: Eric Anholt +Date: Wed May 29 08:44:52 2002 +0000 + + file radeon_state.c was initially added on branch bsd-3-0-0-branch. + +commit cd375832813a66491f43c3f5e56ed74670955e43 +Author: Alan Hourihane +Date: Fri May 17 08:35:47 2002 +0000 + + Remove some older Linux 2.3.99 code + +commit 91d7b17e82e8d8659405832a3cd1e7a904ad283f +Author: Alan Hourihane +Date: Fri May 17 08:21:34 2002 +0000 + + same udelay fixes + +commit 9e67da5626b683df58f2041fdb0f743eb4da7036 +Author: Keith Whitwell +Date: Thu May 16 23:47:15 2002 +0000 + + Allow drm to build under 2.4 and 2.5(.14) + +commit 3903e5ac94c07cf31f0bc24eff5011ef8cc7afba +Author: Jens Owen +Date: Tue Apr 9 21:54:56 2002 +0000 + + Merged drmcommand-0-0-1 + +commit a820c741374743065540546c92b1d5e1a2089225 +Author: Jens Owen +Date: Fri Mar 29 16:31:52 2002 +0000 + + file xf86drmCompat.c was initially added on branch drmcommand-0-0-1-branch. + +commit 31c885bafb47e24b8523dcc2850ce4acc8ef1004 +Author: Alan Hourihane +Date: Mon Mar 18 19:21:14 2002 +0000 + + file trident_drv.c was initially added on branch trident-0-0-1-branch. + +commit f0e215d3f946321fadad62cbc4e380b9f30ceb49 +Author: Alan Hourihane +Date: Mon Mar 18 19:21:14 2002 +0000 + + file trident.h was initially added on branch trident-0-0-1-branch. + +commit 2ab6ff71900ad068f6d5b8ee42743e13c928cedf +Author: Alan Hourihane +Date: Mon Mar 11 11:26:13 2002 +0000 + + fixups for *BSD + +commit baef086c324769010f0d164c0fe03105d9e474e1 +Author: Keith Whitwell +Date: Fri Mar 8 16:03:37 2002 +0000 + + Fix backwards compatibility bug, add tests for good numbers of + vertices/prim. + +commit 6a1941aa2431f3f4febb0f7aa3df127976eea33f +Author: Alan Hourihane +Date: Fri Mar 8 09:00:12 2002 +0000 + + missing file + +commit 271830e9b6f32f66ffa62d55fafb21b5892ab122 +Author: Alan Hourihane +Date: Wed Mar 6 20:14:30 2002 +0000 + + fixup the radeon driver (not tested) + +commit 5e734a7ac85f7bd8b333a28cf26745d1960a3a43 +Author: Alan Hourihane +Date: Wed Mar 6 19:31:39 2002 +0000 + + i830 & mga contain minor changes from 4.2.0 for mesa 4.0 bsd merge + +commit 46cacdca855a99c1ffe0ccf7a7f88134bca9bade +Author: Alan Hourihane +Date: Wed Mar 6 19:30:45 2002 +0000 + + first pass at merging mesa 4.0 kernel drivers into new bsd-3-0-0 branch. + +commit ab87c5d0d1b5c35006ce8b99a9260e3116c732dc +Author: David Dawes +Date: Thu Feb 14 02:00:26 2002 +0000 + + First pass of mesa-4-0 branch merge into trunk. + +commit 65d25572deec33b7da13c211bf0aa78c361f535a +Author: Michel Daenzer +Date: Sat Feb 2 17:03:51 2002 +0000 + + wrapper for ioremap_nocache() like for ioremap() (Paul Mundt) + +commit 44aa4d6297874022a4f5a49ea24f2d052584d3dc +Author: David Dawes +Date: Sun Jan 27 20:05:42 2002 +0000 + + First pass merge of XFree86 4.2.0 import. + +commit 14945ada16218e9f918c24e0d702979fae9b07f6 +Author: David Dawes +Date: Sun Jan 27 18:23:04 2002 +0000 + + Import of XFree86 4.2.0 + +commit 16bd14926e02e4dbc6e74689bdb3eb90f30a0233 +Author: David Dawes +Date: Sun Jan 27 18:23:04 2002 +0000 + + Initial revision + +commit f18a6d836b5e0081dff9217b44e88e74c421c576 +Author: Alan Hourihane +Date: Mon Dec 10 23:29:37 2001 +0000 + + merge with linux kernel 2.4.15 + +commit 727abee235478a66c90a8cd097f85307e232524a +Author: Keith Whitwell +Date: Tue Nov 27 11:43:12 2001 +0000 + + Put back i810 major version number (same reasons as for r128) + +commit 13e11e1f94ce2fcf2ce86be1400b644560cb066c +Author: Keith Whitwell +Date: Mon Nov 26 13:28:38 2001 +0000 + + Put drm version back from 3.0 to 2.2; XFree86 4.1 is the baseline for + versioning information. + +commit 05fb3e93f2f99a1ace1444c8f0669067f553504b +Author: Alan Hourihane +Date: Fri Nov 2 17:40:11 2001 +0000 + + wrap the MODULE_LICENSE definition. + +commit 92ad1b60e109170e1fa7d22a4627efa7fa77aa71 +Author: Alan Hourihane +Date: Mon Oct 22 19:15:04 2001 +0000 + + merge kernel 2.4.13-pre6. + +commit 87ec138e1421f408c0fa86fa3567544dd488711e +Author: Manuel Teira +Date: Sun Oct 21 21:08:15 2001 +0000 + + file mach64.h was initially added on branch mach64-0-0-2-branch. + +commit bdd84e895838328d5a7f20e7063c49cd6f300fd0 +Author: Alan Hourihane +Date: Mon Oct 8 12:58:20 2001 +0000 + + commit Abraham vd Merwe fix. + +commit ca820fca877faf4776be142417795a5945c606e6 +Author: Alan Hourihane +Date: Tue Sep 25 09:32:16 2001 +0000 + + merge with 2.4.10 kernel + +commit 390440c9399a3c01811f3b37c2628d6e905656e8 +Author: Alan Hourihane +Date: Tue Sep 18 11:00:23 2001 +0000 + + remove Linux 2.3.x cruft. + +commit b1c44c8ac1cfd7927d96fdd9dce15a9996c14073 +Author: Alan Hourihane +Date: Mon Sep 17 21:12:10 2001 +0000 + + bumped the DRM versions (already done in ddx and client side drivers). + +commit 2fabe808274e5769fbc2b871e36e06fab2364208 +Author: Alan Hourihane +Date: Mon Sep 17 10:30:17 2001 +0000 + + Use CCE for 2D acceleration (Gerd Knorr) + +commit 9e69d0dac61cc20ed20281bfa5b7e12124fa3989 +Author: David Dawes +Date: Sat Aug 25 03:13:04 2001 +0000 + + - Remove the rest of the unneeded client-side libraries. + - Use installed libraries that are not built here. + - Don't build/install client-library related file and headers. + +commit 27e24cbc0ad561b8dabad08dfd89ca0dfaa7449d +Author: Alan Hourihane +Date: Fri Aug 24 11:09:50 2001 +0000 + + file convert.c was initially added on branch bsd-2-0-0-branch. + +commit c6bf9bae8ec49987c66dadd5f9313cc13eb5832e +Author: David Dawes +Date: Wed Aug 22 18:24:52 2001 +0000 + + First part of XFree86 4.1.99.1 merge. + +commit 2f060f44e0eb617059bf9301e62a0d2c202ddee1 +Author: David Dawes +Date: Wed Aug 22 18:00:47 2001 +0000 + + Import of XFree86 4.1.99.1 + +commit 063fe900aa895ff2b342843d68c003650b83c8c3 +Author: Jeff Hartmann +Date: Tue Aug 21 21:54:04 2001 +0000 + + file drm_ioctl_table.h was initially added on branch mesa-3-5-branch. + +commit f4c2f1400203434d9a5392b990aaa4fa32dce9c5 +Author: Alan Hourihane +Date: Sun Aug 19 15:20:08 2001 +0000 + + No one's maintaining 2.2.x support - so remove all the cruft. + +commit 8aaf82d45c406220d5f18168e4350827a9e038e2 +Author: Jeff Hartmann +Date: Tue Aug 14 00:35:07 2001 +0000 + + A few warning fixes when actually building under 2.4.9-pre2 + some + reformating + +commit aa09e3611490d6a2f12f211c3c834f1237126313 +Author: Jeff Hartmann +Date: Mon Aug 13 23:23:47 2001 +0000 + + Sync with Linus 2.4.9-pre2 + make all nopage routines more alike + +commit 2d4b2cf6f69de2ceaf0c2b00ccbb24aad412b202 +Author: Alan Hourihane +Date: Sat Aug 11 15:48:00 2001 +0000 + + new multihead code was missing Voodoo3 2000 and Voodoo4 support. + +commit 97b8aa52bba602d5babe225983f7e4c7cb4d7492 +Author: Jeff Hartmann +Date: Fri Aug 10 16:29:21 2001 +0000 + + Commit Keith Owens kernel Makefile changes, merge and commit alpha patch + set from Jay Estabrook (sans some mga modifications which broke other + arch's.) + +commit b6923b39539c34c2a589197def5eee72a9d719bf +Author: Jeff Hartmann +Date: Wed Aug 8 16:10:47 2001 +0000 + + Update to the code I sent Linus and Alan this morning. Added some missing + agp chipsets to drm_agpsupport.h, redid the card detection common code + to use a structure (avoids endian porting issues), changed the tdfx + driver to use the kernel pci id '#defines' + +commit 938a637d1fc33bc8ef14210d655c27d646ddc2d2 +Author: Jeff Hartmann +Date: Tue Aug 7 18:22:41 2001 +0000 + + Avoid compiler warning about r_list being used uninitialized. + +commit 51e38d96ead5700c25c4fddd8017dc7992e96f5a +Author: Jeff Hartmann +Date: Tue Aug 7 18:15:10 2001 +0000 + + Lots of DRM fixes: added new pieces of template code so the ffb driver can + be ported, rolled back r128 and i810 version bumps so 4.1.0 works with + cvs kernel modules, added Config.in and updated Makefile.kernel, + incorporated lots of drm fixes inspired by patches sent by Redhat, made + DRM(realloc) usage check for NULL allocations, restructure driver init + routines to export dev_priv only when initialized and to check for all + error conditions. + +commit 56bd9c207770d41a497f3e8237a1099dd9d4cd91 +Author: David Dawes +Date: Mon Jul 30 19:59:39 2001 +0000 + + Merge the multihead-1-0-0 branch into the trunk, with the exception of the + glide header files. + The changes include: + - Brian Paul's changes to the tdfx client-side 3D driver to make it + dlopen() the correct glide library (Voodoo3 or Voodoo5). This allows + both types of the glide library to co-exist, and allows Voodoo3/Voodoo5 + cards to be mixed in multi-head configs. + - DRM kernel driver changes to allow a driver to set up multiple instances + (minor numbers), one for each card present that the driver supports. + This is currently implemented and tested only for the tdfx DRM driver. + - Add some missing missing includes. + - Some log message cleanups. + - Change the 2D tdfx driver to access VGA legacy registers via their PCI + I/O space access points rather than their legacy addresses, and fix + some problems with the way the VGA-related bits are initialised. + Status: + - With these changes, multi-head direct rendering works with multiple + Voodoo3 and/or Voodoo5 cards. This has been tested with two PCI Voodoo3 + cards and an AGP Voodoo5 card, and all permutations of those. + Caveats: + - Xinerama is not supported. If Xinerama is enabled, then direct rendering + gets disabled. + - The text mode on secondary screens will show junk after the X server + exits. + - On some hardware, starting the X server on multiple 3dfx cards will + result in a hard lockup. One workaround is to enable APIC support in a + uni-processor kernel, or use an SMP kernel. + +commit 84a5e7108773d5a5ff7242e1460c98e3acb178a8 +Author: Jeff Hartmann +Date: Mon Jul 23 20:25:38 2001 +0000 + + Fixes that allow the modules to be built into the kernel + +commit 5e8ba79eb6aabd85f52de43fcf30722268857f60 +Author: Jeff Hartmann +Date: Fri Jul 20 22:16:04 2001 +0000 + + Merge checker fixes from Alan Cox made to the drm in the ac kernel tree. + These aren't really security problems, but Alan has made some arguments + that have convinced me that the code should be fixed anyway. + +commit ae5b4effc05cd5ac44ab44c5c733c6599652f1eb +Author: Jeff Hartmann +Date: Fri Jul 20 20:31:30 2001 +0000 + + Remove module name hacks because we aren't going to implement this anymore + because of Linus' comments + +commit 4eafeec960c29369982a9b15c24681a3072f491d +Author: Jeff Hartmann +Date: Wed Jul 18 21:02:58 2001 +0000 + + Add module version name at a lower layer of the code, allows things to be + more flexible and allow older module versions to still work. Might not + be final code if we move over to DRI kernel module version, but will be + if we use XFree86 version. + Only build tdfx.o instead of tdfx-4_1_0.o + since tdfx.o has never changed its API. + +commit c6454e6a93544fd20f4b5d9cb2ee08725e9b6740 +Author: Jeff Hartmann +Date: Tue Jul 17 22:31:26 2001 +0000 + + Someone forgot to bump the r128 and i810 drivers properly before the 4.1.0 + release. Better late than never. + +commit d5749d7603d397be7639266e6c740941af2004fb +Author: Jeff Hartmann +Date: Mon Jul 16 22:42:36 2001 +0000 + + Added version string to the end of the kernel module name. This allows + multiple versions of the kernel module to co-exist on one machine. + +commit b816802daf6818306473c35d8776202c69fd0083 +Author: Jeff Hartmann +Date: Mon Jul 16 16:57:12 2001 +0000 + + i810 drm security fix + +commit 7ccc528911137156f216a13c95ce946c5f65af15 +Author: Gareth Hughes +Date: Fri Jul 13 01:42:48 2001 +0000 + + Fix typo in XFREE86_VERSION(). + +commit 12e9c636dfb4fbaf229e884afa8febaecd79b475 +Author: Jeff Hartmann +Date: Mon Jun 18 19:25:15 2001 +0000 + + Fix 5 security bugs found by the Stanford tools + +commit b1a588f0cc9cd7b4f5b2150f03722ac09b7e8989 +Author: Gareth Hughes +Date: Mon Jun 18 13:45:23 2001 +0000 + + Forgot to bump date stamp. + +commit 3a410059b43027c08bcb0fef307dd4ee7734197e +Author: Gareth Hughes +Date: Mon Jun 18 12:59:42 2001 +0000 + + Enable shared IRQs in DMA template, use in i810 driver. + +commit d87c873df05eb3a110316c7af2358553fa7f988e +Author: David Dawes +Date: Thu Jun 14 22:23:44 2001 +0000 + + First pass of 4.1.0 merge. + +commit 334e134918ee2ece3e845cd55c49c9709b67ee6c +Author: David Dawes +Date: Thu Jun 14 21:53:06 2001 +0000 + + Import of XFree86 4.1.0 + +commit dca245e37c875660fa766a264377628dd3a311e5 +Author: Gareth Hughes +Date: Wed May 23 17:41:31 2001 +0000 + + Only authenticated clients can mmap() (Jeff Hartmann). + +commit 18ce40c9d31c166b49e6689c260eb1ddb3cc08c9 +Author: Alan Hourihane +Date: Thu May 17 15:20:40 2001 +0000 + + Make the SiS module work again. At least glxinfo reports it's working, yet + trying to run the simple apps return 'out of video memory' + +commit 9c775d0b2f303389c24aea5e8abc1473f0cf93e8 +Author: David Dawes +Date: Mon May 14 14:49:58 2001 +0000 + + finish struct stat type cleanup Fix a build dependencies for the tdfx drm + module + +commit 0813760110535d8989af187d23b4eedc4c6b225f +Author: Alan Hourihane +Date: Fri May 4 14:05:13 2001 +0000 + + add some commented enclosures around the BUS_BASE calls for Alpha + platforms. + +commit 5f5d850013d6c846946f77b57e88a507232c0aca +Author: Alan Hourihane +Date: Fri May 4 09:31:35 2001 +0000 + + file drm_linux.h was initially added on branch bsd-2-0-0-branch. + +commit 726096309b86184b83cd5cb08c95fe7e870f443c +Author: Alan Hourihane +Date: Fri May 4 08:28:30 2001 +0000 + + file drm_agpsupport.h was initially added on branch bsd-2-0-0-branch. + +commit ebf0d7addfd51d1fafca354ebdcdb4fd17593616 +Author: Alan Hourihane +Date: Thu May 3 14:52:29 2001 +0000 + + add new file + +commit 94c6d951a21f2d3b42cda0acb1b5dfc954c1c66b +Author: Alan Hourihane +Date: Thu May 3 14:51:01 2001 +0000 + + Make SiS driver compile with the new templated format. Not tested. minor + cleanups + +commit d3645e7a4e0885aba8063c6cc41d7d9fded99982 +Author: Alan Hourihane +Date: Thu May 3 14:32:59 2001 +0000 + + remove deprecated file + +commit 2ea12226a675cc8d4b95799129f143fa61d97296 +Author: David Dawes +Date: Tue May 1 21:39:35 2001 +0000 + + Initial merge for XFree86 4.0.99.3 import + +commit a576d41498b742502d4f7dbfeed44737ff79db8f +Author: David Dawes +Date: Tue May 1 17:07:59 2001 +0000 + + Import of XFree86 4.0.99.3 + +commit b804c09d0699131a8333c19a4d58cb14125d413e +Author: Alan Hourihane +Date: Mon Apr 30 16:18:22 2001 +0000 + + fix build of i810 kernel driver for 2.4.3 or greater kernels + +commit df76f812924e4db284fd38b3c5db6b87ec0d82fc +Author: Kevin E Martin +Date: Mon Apr 30 15:07:18 2001 +0000 + + - PCIGART patches for Alpha from Compaq + +commit d1ef7f9d2c9f8f191ab79b1a43eb96a787df5f64 +Author: Alan Hourihane +Date: Mon Apr 30 13:24:28 2001 +0000 + + file drm_vm.h was initially added on branch bsd-2-0-0-branch. + +commit 2c0811d628249f81f29b85392d5eaae3c12f882e +Author: Alan Hourihane +Date: Mon Apr 30 11:11:00 2001 +0000 + + file drm_sysctl.h was initially added on branch bsd-2-0-0-branch. + +commit ae1cc904624245d738bfdf8afb74776c4e9b1215 +Author: Alan Hourihane +Date: Wed Apr 25 14:20:17 2001 +0000 + + file drm_os_freebsd.h was initially added on branch bsd-2-0-0-branch. + +commit 376189905b8391295f18a5fac922d1d9546c7b43 +Author: Alan Hourihane +Date: Wed Apr 25 14:20:17 2001 +0000 + + file drm_os_linux.h was initially added on branch bsd-2-0-0-branch. + +commit 97e48b4cd1747e427e70af6e530ec57676f6189d +Author: Alan Hourihane +Date: Wed Apr 25 12:59:04 2001 +0000 + + file Makefile was initially added on branch bsd-2-0-0-branch. + +commit b1488c2f87ab3b4d377b32a0c0ed0ba05e996f25 +Author: Brian Paul +Date: Sat Apr 21 19:06:46 2001 +0000 + + include linux/sisfb.h, per David Gaarenstroom + +commit 49781fcf37e30ed17513bd13a90ded39ab1b0b9d +Author: David Dawes +Date: Wed Apr 18 18:45:20 2001 +0000 + + put back BUS_BASE + +commit 6f5e397f2549e7d5f806d2c44053d3d306a36f3a +Author: Kevin E Martin +Date: Mon Apr 16 21:43:28 2001 +0000 + + - Fix typo and remove magic numbers + +commit cc7afb2b16b84293258be0cc8bcffd32308cd3b9 +Author: David Dawes +Date: Tue Apr 10 18:45:17 2001 +0000 + + Use the linux version of xf86drm.c. + +commit 18fc5ee92394b31c00df8e72b1f29bada79292f5 +Author: David Dawes +Date: Mon Apr 9 21:56:31 2001 +0000 + + First pass of XFree86 4.0.99.2 merge. + +commit 1759c16ab9b64598968a0058039e8a66bf5f9773 +Author: David Dawes +Date: Mon Apr 9 16:27:54 2001 +0000 + + Import -f XFree86 4.0.99.2 + +commit 0e7f6c0726e5ff08eeab8e17a5aa63fbe44b3410 +Author: Kevin E Martin +Date: Fri Apr 6 17:53:32 2001 +0000 + + - Fix typo + - Clean up some macros + +commit 908d32f84c33a4192b8381d74fc6bccc73e309f9 +Author: Alan Hourihane +Date: Fri Apr 6 15:49:42 2001 +0000 + + search /lib/modules//build/include first, then the others.... + +commit 2bd9bf98c7bc0c23870f86f97341197114c3e70a +Author: Alan Hourihane +Date: Fri Apr 6 08:39:02 2001 +0000 + + Handle drivers that don't have __HAVE_SG defined. + +commit 5d6ddbca26d695561fb1d08d798a0cc254b805e7 +Author: Kevin E Martin +Date: Thu Apr 5 22:16:12 2001 +0000 + + Merged ati-pcigart-1-0-0 + +commit a15b9dec3cfed3ce36826faf8c7d76284b0527a8 +Author: Alan Hourihane +Date: Tue Apr 3 08:01:00 2001 +0000 + + include 2.4.2 + +commit 4259e5e61716d321aa3c1ac6d7ad4bf0e3c39a38 +Author: Alan Hourihane +Date: Tue Apr 3 07:50:30 2001 +0000 + + make 2.4.2 -> 2.4.3 change conditional. works with older than 2.4.3 kernels + again. + +commit 62d49315299f4483b2e7fb44f21d6b09cef01afd +Author: Gareth Hughes +Date: Mon Apr 2 01:17:18 2001 +0000 + + Update radeon DRM to v1.1.0 (texture upload changes). + +commit fcc21069b7019a4a93e1ceacc175ccd682353861 +Author: David Dawes +Date: Fri Mar 30 17:16:20 2001 +0000 + + - Move xf86ConfigDRI declaration from xf86Priv.h to xf86.h. + - Don't include xf86Priv.h in the drm module. + - Fix 'struct stat' in loader libc wrapping to avoid unnecessary + XFree86LOADER #ifdefs in code that uses it. + - Make drmOpenMinor() static. + +commit e407c2f5a611e30b05ea095f8b17d39fb5a7ebfa +Author: Alan Hourihane +Date: Fri Mar 30 13:32:39 2001 +0000 + + merge in 2.4.3 kernel change. + +commit 301a1ad315bd7881adcf0df33c589e0a74c059f4 +Author: David Dawes +Date: Wed Mar 21 20:22:16 2001 +0000 + + Move #include inside the __linux__ #ifdef, so that it + doesn't break non-Linux builds. + +commit 92b0aaa6fe787c2e17bba1973d19d6fd5a61d03a +Author: Gareth Hughes +Date: Wed Mar 21 13:10:27 2001 +0000 + + - Fix MGA header info. + - Update date strings. + - Fix MGA hangs (undocumented side effects of DWGSYNC). + - Remove idle before ILOAD??? Seems fine with the above fix. + +commit b90028231c5c73783ee45124903794970f244978 +Author: Gareth Hughes +Date: Wed Mar 21 03:29:23 2001 +0000 + + Remove compiler warnings, minor cleanups. + +commit 86c41620a5f0a3b3af143bebdda0cca2114ade88 +Author: David Dawes +Date: Mon Mar 19 23:48:35 2001 +0000 + + merge/build fix + +commit 404a409ab302c99d8aceb85ede301b04780480d0 +Author: David Dawes +Date: Mon Mar 19 21:39:36 2001 +0000 + + Initial XFree86 4.0.99.1 merge. + +commit 0e5b8d77cfe0f86698041aebe31c54f59c877825 +Author: David Dawes +Date: Mon Mar 19 17:45:52 2001 +0000 + + Import of XFree86 4.0.99.1 + +commit b42ff4f6600b97e9b7482152d5ea8713e800dc00 +Author: Gareth Hughes +Date: Mon Mar 19 12:16:24 2001 +0000 + + Update version, date stamp. + +commit 9914f4cf6057957bd77f1c1b0b9957537eafdfb9 +Author: Gareth Hughes +Date: Mon Mar 19 12:04:12 2001 +0000 + + Remove PRIMPTR completely. + +commit d15f98443295feeb4e3bd65b26f43c73d655e26e +Author: Gareth Hughes +Date: Mon Mar 19 11:49:25 2001 +0000 + + Try this... + +commit f2ad4d9bebd052e5b7c9a90c4a813830bd1b72f8 +Author: Gareth Hughes +Date: Sun Mar 18 23:54:41 2001 +0000 + + __REALLY_HAVE_MTRR, vmalloc_32 fixes from Jeff Wiedemeier. + +commit 1d32e305efdcb4668a91d94e2149c9c7a243b6dc +Author: Alan Hourihane +Date: Thu Mar 15 21:48:51 2001 +0000 + + file agpgart.diff was initially added on branch gamma-2-0-0-branch. + +commit 74e19a40187ac3b5907922e5dc01418135a5794b +Author: Kevin E Martin +Date: Wed Mar 14 22:22:50 2001 +0000 + + Merged sarea-1-0-0 + +commit e2b2bffc6b25361b2f09afc5a28030645440cd03 +Author: Gareth Hughes +Date: Tue Mar 13 00:22:05 2001 +0000 + + Rest of MGA dualhead patch. + +commit 0b60aad8a5f1e6d38bf2d254fa5209492157e344 +Author: Gareth Hughes +Date: Mon Mar 12 18:18:06 2001 +0000 + + Try that again... + +commit 134aecdeed19a339a147d7e88fc9b722b9794245 +Author: Gareth Hughes +Date: Thu Mar 8 00:21:33 2001 +0000 + + Fix ring space calculations, tests. Based on patch by Bruce Stockwell. + +commit 8c511c60ec1ecbe3f0832a8e5a07bc43239eae5f +Author: Gareth Hughes +Date: Wed Mar 7 15:06:57 2001 +0000 + + Change error message to debug message when client dies while holding the + lock. Should prevent bug reports about this, but you never know... + +commit 07f761bfae8f220c819b67f9f614984f930ff427 +Author: Alan Hourihane +Date: Wed Mar 7 08:53:15 2001 +0000 + + surround agp calls in drm_memory with __REALLY_HAVE_AGP instead of + CONFIG_... remove include for agpsupport in tdfx_drv.c - not needed. + +commit 3a74d3a371acc7b8632885c15ce2f7c05aae94bd +Author: Gareth Hughes +Date: Tue Mar 6 04:37:37 2001 +0000 + + Merge tdfx-3-1-0 branch. + +commit 971c2f8ad582bd0d6b97ed503c9e5abaa9feee02 +Author: Alan Hourihane +Date: Mon Mar 5 16:02:40 2001 +0000 + + allow dristat to find out whether AGP is write-combined or not. + +commit d1774bb44cdc1b5ce606c299b8eea1793f4352e3 +Author: Alan Hourihane +Date: Mon Mar 5 15:52:11 2001 +0000 + + fix that last patch to initialize the MTRR when AGP available. + +commit 8d3f3f4f9b8a5611888c35b7683661bcf52ef9cc +Author: Alan Hourihane +Date: Sun Mar 4 19:19:20 2001 +0000 + + Don't try and setup the MTRR for AGP when AGP not available. Check + dev->agp, when agp_acquire called, and..... Uncomment MUST_HAVE_AGP + around agp_* calls, so that support for both agp/pci can happen in a + single kernel driver. + +commit db03d12a8fe6c11029127831f1a9bf22056a250b +Author: Jeff Hartmann +Date: Wed Feb 28 18:47:39 2001 +0000 + + file drm_scatter.h was initially added on branch ati-pcigart-0-0-1-branch. + +commit 9a4033a02ac74e384596190adfcc0e938c19865b +Author: Gareth Hughes +Date: Wed Feb 28 14:11:05 2001 +0000 + + Make the hardware bug workaround configurable. That way, people with newer + revs of the chipset can avoid the copy when it's not needed. + +commit 7b5e87d91d062cceb1e4e54b2e144c3c87375234 +Author: Gareth Hughes +Date: Wed Feb 28 11:22:52 2001 +0000 + + Please try this if you experience lockups... + +commit 88dbee54ed400a3fd5594fab506518c171167805 +Author: Rik Faith +Date: Wed Feb 28 09:27:44 2001 +0000 + + Implement drmOpen* without /proc dependence (Fallback to /proc is included + for backward compatibility.) Move statistic-gathering drm* calls from + dristat.c to xf86drm.c + +commit c4a247d26228b2506fcb1c5cac2302a22e91219e +Author: Rik Faith +Date: Wed Feb 21 16:06:10 2001 +0000 + + Add Linux 2.2.x support for stubs + +commit 48768df6c3197dea8f68fc69795c5aa820ce5678 +Author: Jeff Hartmann +Date: Wed Feb 21 15:48:40 2001 +0000 + + file gamma_drm.h was initially added on branch sarea-1-0-0-branch. + +commit 43f1a52a564812d814c8a5f92b95fc6d3b589200 +Author: Jeff Hartmann +Date: Tue Feb 20 20:16:56 2001 +0000 + + Fix some warnings and flush pixel cache in idle routine so readpixels works + correctly + +commit 62aa46ccec223aa3660c71ff0981ea035fc2cff9 +Author: Gareth Hughes +Date: Tue Feb 20 13:44:45 2001 +0000 + + Disable DRIVER_DMA_QUIESCENT() in r128, radeon drivers. Prevents deadlock + in the locking process when the engine isn't idle. + +commit 01a14789edce0ce1cae0f3fd4328833399fae56d +Author: Gareth Hughes +Date: Fri Feb 16 05:24:06 2001 +0000 + + - Clean up the way customization of the templates is done. + - Fix old-style DMA for gamma driver (please test). + - Pull out IRQ handling into drm_dma.h (please test on i810, gamma). + - Lots of general cleanups, remove compiler warnings etc. + +commit 1d30ac11404c588e4a158d72f987c1fb3e478bea +Author: Keith Whitwell +Date: Thu Feb 15 16:31:11 2001 +0000 + + Added missing include "drm_lists.h". + i810 now working fine with new kernel module. + +commit f2f5bf6f5f577d5cc43af99dbad16710225bfa2f +Author: Gareth Hughes +Date: Thu Feb 15 10:26:03 2001 +0000 + + - Fix up merge. + - Update date stamps. + +commit 360475376c5a597caf4a981c934a6b0d783fa94d +Author: Gareth Hughes +Date: Thu Feb 15 08:12:14 2001 +0000 + + Merge mga-1-0-0-branch into trunk. + +commit 38c22bc4883ac201bde7f5f130a72acd1be68ec5 +Author: Gareth Hughes +Date: Wed Feb 14 14:34:01 2001 +0000 + + file i810.h was initially added on branch mga-1-0-0-branch. + +commit 75720460ce234fcf0317b78869a669afd1274ae1 +Author: Gareth Hughes +Date: Wed Feb 14 06:31:26 2001 +0000 + + file radeon.h was initially added on branch mga-1-0-0-branch. + +commit de554cb64045516ede340549441f109fd06495cd +Author: Gareth Hughes +Date: Wed Feb 14 05:30:38 2001 +0000 + + file r128.h was initially added on branch mga-1-0-0-branch. + +commit 32c4aa1eb3ffd59312c64a7f46b933371c31761f +Author: Gareth Hughes +Date: Wed Feb 14 05:30:38 2001 +0000 + + file r128_drm.c was initially added on branch mga-1-0-0-branch. + +commit 0fa26e550d56e068737d40f741e1f567c3f79cc5 +Author: Gareth Hughes +Date: Wed Feb 14 01:37:05 2001 +0000 + + file tdfx.h was initially added on branch mga-1-0-0-branch. + +commit 0e928b4733388477409b827185c714fd87702f0b +Author: Gareth Hughes +Date: Wed Feb 14 01:37:05 2001 +0000 + + file tdfx_drm.c was initially added on branch mga-1-0-0-branch. + +commit 3b17f9165b4c73665515c2e435a8221805e514d9 +Author: Alan Hourihane +Date: Tue Feb 13 17:53:02 2001 +0000 + + file gamma_context.c was initially added on branch mga-1-0-0-branch. + +commit 41b80a0ab0fedb60385afc374a590d0ab58ef6c3 +Author: Alan Hourihane +Date: Fri Feb 9 16:44:16 2001 +0000 + + file gamma_drm.c was initially added on branch mga-1-0-0-branch. + +commit 89486dffa8b91bb95f80420252675f095082b046 +Author: Alan Hourihane +Date: Fri Feb 9 16:44:16 2001 +0000 + + file gamma.h was initially added on branch mga-1-0-0-branch. + +commit 04c29ef2e484c09d29c17cc667433bd3b6d36b11 +Author: Rik Faith +Date: Fri Feb 2 11:44:22 2001 +0000 + + file dristat.c was initially added on branch mga-1-0-0-branch. + +commit 7d68e5ffe29cabf5ed802964d9501411ccae9b28 +Author: Rik Faith +Date: Thu Feb 1 20:54:01 2001 +0000 + + file drm_stub.h was initially added on branch mga-1-0-0-branch. + +commit 82b645dc74218fd8d1ed10d045128002f0c1f705 +Author: Gareth Hughes +Date: Mon Jan 29 17:46:23 2001 +0000 + + Corresponding sync with PCI GART updates. + +commit 5f67507e65a38cf6d33290299937c6bad98fcc6e +Author: Gareth Hughes +Date: Sun Jan 28 07:18:08 2001 +0000 + + Fix depth clears properly this time. Update all instances of + drmRadeonClear() to the new interface. + +commit a68dddf19caf0106479b71aab5a8de552a5ed596 +Author: Gareth Hughes +Date: Fri Jan 26 07:52:36 2001 +0000 + + Client-side updates for drmRadeonClear(...), fixes color/depth buffer + clears. + +commit 4ebcb86ace31f127281644ed9aaadb0a3303d29d +Author: Gareth Hughes +Date: Wed Jan 24 16:09:02 2001 +0000 + + file mga_warp.c was initially added on branch mga-1-0-0-branch. + +commit b68ca866244e96c37c4a25c85bfeaef0405bbad2 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:02 2001 +0000 + + file mga_ucode.h was initially added on branch mga-1-0-0-branch. + +commit 321bc52606a3f674e8fc33cb990c7b04f4b050c9 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:01 2001 +0000 + + file mga_drm.c was initially added on branch mga-1-0-0-branch. + +commit 2adf5999619935da80e0f5b682a2c1ec7fdce0b3 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file mga.h was initially added on branch mga-1-0-0-branch. + +commit f14506198e6684429c400d7d4852bacc9a07bddb +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_vm.h was initially added on branch mga-1-0-0-branch. + +commit bb1a10743f52e7bf9f73b3be9bad198f00efa925 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_lock.h was initially added on branch mga-1-0-0-branch. + +commit 2f23eca6298e5f60bf40ec2ed5188f52d450ec22 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_memory.h was initially added on branch mga-1-0-0-branch. + +commit 105bece739c52a7d1416728e950ec8a249f4ae9f +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_bufs.h was initially added on branch mga-1-0-0-branch. + +commit b46a78c06061e4501bc2fa5657d6285cdce46769 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_proc.h was initially added on branch mga-1-0-0-branch. + +commit 91844ee03910cce947801dc967606bd6260a91ef +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_fops.h was initially added on branch mga-1-0-0-branch. + +commit fd82ce8f3fcf6c7368df6710f1943ee89a474620 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_init.h was initially added on branch mga-1-0-0-branch. + +commit d2110a1dbefabcce14a4c492db4bfee038a99faf +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_ioctl.h was initially added on branch mga-1-0-0-branch. + +commit 18ea3b5e6f6803ac2c50f12f1b107b1838f7520e +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_drv.h was initially added on branch mga-1-0-0-branch. + +commit 03593b1629591a9fc80ff3a951d102668a1147f2 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_context.h was initially added on branch mga-1-0-0-branch. + +commit 94dd569fc0f4d4d48e9de42670a126c04c259117 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_drawable.h was initially added on branch mga-1-0-0-branch. + +commit b25e0fee34a39a6b07c22b48b05dd02c56a0ffa7 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_agpsupport.h was initially added on branch mga-1-0-0-branch. + +commit a596a6f4e850556bac1259a6616395dc11e0866e +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_auth.h was initially added on branch mga-1-0-0-branch. + +commit ae28c6aab6789c5eba42ef05e04827b150402370 +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_dma.h was initially added on branch mga-1-0-0-branch. + +commit 249dfc1c29d9f539c59bc014eae72baa5b35d88e +Author: Gareth Hughes +Date: Wed Jan 24 16:09:00 2001 +0000 + + file drm_lists.h was initially added on branch mga-1-0-0-branch. + +commit 4d2a4455b4e7bc65952aa6167c34b488c4ca3b8d +Author: Gareth Hughes +Date: Wed Jan 24 15:34:46 2001 +0000 + + - Misc cleanups. + - Fix drmR128Clear parameters (Radeon to follow). + - Add some helper macros to r128/radeon kernel modules. + +commit 642bb6fbb0bfbc6e549e61bd0ece72abcbd399b7 +Author: Jeff Hartmann +Date: Tue Jan 23 17:53:57 2001 +0000 + + file ati_pcigart.h was initially added on branch ati-pcigart-0-0-1-branch. + +commit 97379b82c812b5eed0a4a52106afc895469e13fa +Author: Jeff Hartmann +Date: Tue Jan 23 17:53:57 2001 +0000 + + file ati_pcigart.c was initially added on branch ati-pcigart-0-0-1-branch. + +commit 9116644366c427b39945bca71969a5b561181046 +Author: Jeff Hartmann +Date: Thu Jan 18 18:21:05 2001 +0000 + + Fixed problem preventing compile on system w/o agpgart. + +commit 417bfc8a9d42cf2b9238ee394514fa3db512c49d +Author: Jeff Hartmann +Date: Wed Jan 17 18:43:04 2001 +0000 + + file r128_pcigart.c was initially added on branch ati-pcigart-0-0-1-branch. + +commit 5708131c9ab5ee3b51a6ef937925f36e083147b1 +Author: Jeff Hartmann +Date: Wed Jan 17 18:43:04 2001 +0000 + + file scatter.c was initially added on branch ati-pcigart-0-0-1-branch. + +commit 4c3f3de819981959f764c5d2a69417c52d122d61 +Author: Gareth Hughes +Date: Sat Jan 13 01:33:00 2001 +0000 + + Remove debug messages. + +commit 33e8dcf7e97e6bec69fc05137e1eede1a0f9b443 +Author: Keith Whitwell +Date: Thu Jan 11 20:05:39 2001 +0000 + + Makefile.linux was checking $(MACHINE) for 'i386' before building the + i810.o module. However on my i810's, $(MACHINE) is 'i686'. + +commit 61c15f4a2d053c9e609360a5e600f56b0887c3aa +Author: Nathan Hand +Date: Mon Jan 8 16:21:42 2001 +0000 + + Merged tdfx-3-0-0 + +commit 0994e635b2f002c8e9f177037a46c26ccd98c59d +Author: Kevin E Martin +Date: Fri Jan 5 22:57:55 2001 +0000 + + Merged ati-5-0-0 + +commit 833af23c5d21b1ab139327861d25d96dcd91af6f +Author: Rik Faith +Date: Thu Jan 4 18:41:41 2001 +0000 + + Sync with Linux 2.4.0-prerelease + +commit c7c6156aecdee2838dd0e193a3d529ecbb797ae7 +Author: Keith Whitwell +Date: Sat Dec 30 23:28:53 2000 +0000 + + add blit ioctl, fix plnwt handling + +commit b19c44e4fe01db3efe72e6a130bbd49af151ee95 +Author: Gareth Hughes +Date: Fri Dec 15 01:15:57 2000 +0000 + + Update date information. + +commit 013d6f0806de66edcca4193cd4a0b175bb3c2b32 +Author: Gareth Hughes +Date: Wed Dec 13 10:30:26 2000 +0000 + + file bufs_tmp.h was initially added on branch mach64-0-0-1-branch. + +commit 8725828cf0ebb55f813e19f87f7d279c62b68293 +Author: Gareth Hughes +Date: Tue Dec 12 14:50:50 2000 +0000 + + - Fix nasty depth span bug. Drawable offset was not being added to pixel + coords. + - Remove unneeded mask parameters from clear ioctl. + - Use correct subpixel offsets, fixes most glean bugs. + - Remove 32-bit depth buffer support. Only use 16 or 24-bit depth buffers. + +commit 14a73775360585b9a09bfdf932881fbb06b34037 +Author: David Dawes +Date: Tue Dec 5 16:39:28 2000 +0000 + + Import of XFree86 4.0.1g + +commit 41fa18dda5e49caed68ce853791a21dd6d92376b +Author: Gareth Hughes +Date: Mon Dec 4 06:26:37 2000 +0000 + + file mach64_dma.c was initially added on branch mach64-0-0-1-branch. + +commit 51b68cb483aa93c8eb19e9915f08978324b1b3ac +Author: Gareth Hughes +Date: Mon Dec 4 06:26:37 2000 +0000 + + file mach64_state.c was initially added on branch mach64-0-0-1-branch. + +commit 8e02d8dcc4f52549f97c83f2b3c0aaa249f66977 +Author: Gareth Hughes +Date: Sat Dec 2 13:10:03 2000 +0000 + + file mach64_drm.h was initially added on branch mach64-0-0-1-branch. + +commit e15a24e154d6749ba0be3155ed802005c5e1ebf0 +Author: Gareth Hughes +Date: Sat Dec 2 06:14:18 2000 +0000 + + Merged ati-4-1-1-branch into trunk. + +commit 33fd00485f350f7ecceb1fabfa81ce4137c894c2 +Author: David Dawes +Date: Thu Nov 30 17:32:23 2000 +0000 + + Import of XFree86 4.0.1f + +commit 84699b456d2453b3c3c99eb75ebfc0dfe30eb64f +Author: Gareth Hughes +Date: Mon Nov 27 15:30:26 2000 +0000 + + file context_tmp.h was initially added on branch mach64-0-0-1-branch. + +commit 2da85fdba0331e2ae5d7ea245ef865aa9eee3687 +Author: Gareth Hughes +Date: Mon Nov 27 15:30:26 2000 +0000 + + file driver_tmp.h was initially added on branch mach64-0-0-1-branch. + +commit 3e9ebfb4cf89b60871a226dbf1d4ec5129d6c070 +Author: Gareth Hughes +Date: Mon Nov 27 15:30:26 2000 +0000 + + file mach64_drv.h was initially added on branch mach64-0-0-1-branch. + +commit 960f13cdf4cc4201fabe4c48e40395d3a755be58 +Author: Jeff Hartmann +Date: Tue Nov 21 16:18:47 2000 +0000 + + Integrated bug fix from David S. Miller (a wait queue removal bug) + +commit 679531e1669085115bac5f6fc982d54a4a9608e8 +Author: Rik Faith +Date: Wed Nov 15 15:47:51 2000 +0000 + + Sync with Linux 2.4.0-test11-pre5 Provide backward compatibility tested + against 2.2.18pre21 + As usual, since all 2.4.0-test* kernels set LINUX_VERSION_CODE to the same + value, if you are running a 2.4.0-test kernel, you MUST be running + 2.4.0-test11-pre4 or later (although anything after 2.4.0-test11-pre1 + should work fine -- I tested with pre4/pre5). I expect 2.2.x support to + continue to work for all recent kernels, but I tested with 2.2.18pre21 + -- we use the old intermodule symbol communication for 2.2.x kernels, + so they should all continue to work. + +commit 0636342ef84da23f30b838b4f933e3aa15d5c2ce +Author: Rik Faith +Date: Tue Nov 14 21:35:00 2000 +0000 + + Move .c to .h file + +commit 633e9c8f8b2366a93951f11830954fb895917252 +Author: Kevin E Martin +Date: Mon Nov 13 23:35:02 2000 +0000 + + file radeon_state.c was initially added on branch ati-5-0-0-branch. + +commit 58d90faf9a3d3ef2a66d2cc3632958ab73e19250 +Author: Kevin E Martin +Date: Mon Nov 13 23:35:02 2000 +0000 + + file radeon_cp.c was initially added on branch ati-5-0-0-branch. + +commit 006458f227b9e97252406df52963d98b41bb3a1b +Author: Rik Faith +Date: Fri Nov 10 18:27:33 2000 +0000 + + Split agpsupport.c into pre-2.4.0 version and current version. + +commit 94071289a4c61a1083a3d6b3546b06cafeaeac44 +Author: David Dawes +Date: Wed Nov 8 00:07:17 2000 +0000 + + merge with 4.0.1d + +commit 5745cb7fa70cf312d371aac44de3beae2a8d6e47 +Author: David Dawes +Date: Tue Nov 7 22:10:46 2000 +0000 + + Import of XFree86 4.0.1d + +commit 37d6828fef51b3a113a11b54e7dbd9c92cd4a548 +Author: Jeff Hartmann +Date: Wed Nov 1 19:00:45 2000 +0000 + + Added multitexture fix to the mga drm driver + +commit 52f0bc3c9ec722c0c8a40bb7959e7ec2eb9d8180 +Author: Rik Faith +Date: Fri Sep 29 02:05:41 2000 +0000 + + More changes for sync with Linux 2.4.0-test9-pre7 + +commit 39a659e87718d8b6bbf138510e83de7a1e95d855 +Author: Rik Faith +Date: Fri Sep 29 01:47:11 2000 +0000 + + Audit calls to schedule() Remove tags from files shared with Linux kernel + tree Remove debugging statements to make debugging more useful Other + minor cleanups in preparation for sync with Linux 2.4.0-test9-pre7 + +commit b0a7efb5a959a6105486d303d25d06d69d5d569e +Author: Jeff Hartmann +Date: Thu Sep 28 23:04:57 2000 +0000 + + Use PG_reserved for things we remap non-cached + +commit ed2d0b4bb0bb90af87c7c89a2e0a6297455d3bbe +Author: Jeff Hartmann +Date: Thu Sep 28 15:09:39 2000 +0000 + + Fixed two things Rik pointed out in the last commit + +commit 550dff98b0cf08687cdde697fc6909aeb9cef30f +Author: Jeff Hartmann +Date: Wed Sep 27 21:32:19 2000 +0000 + + Merged the mga-lock-debug-0-2-0-branch with the trunk. This includes + several fixes including: (Jeff) Really disable multitexture (Broken + since Mesa 3.4 integration.) + (Jeff) Various changes in mga_state.c in the kernel module, which includes + a fix to the bug where the first OGL application hangs the machine + w/out rendering anything. This also includes defines for the warp + registers so they are easily human readable. + (Rik and Jeff) Fixed all the schedule loops in the kernel to look like they + are supposed too. + (Jeff) Configurable agp modes: Add the option "AGPMode2x" or "AGPMode4x" to + your XF86Config file. + (Rik) Various cleanups to the mga kernel driver to make it easier to read + and debug. + (Rik) Removed alot of DRM_DEBUG statements from the kernel driver. + +commit dbe7d55cb08487f688dfbdd29835500b3b087721 +Author: Kevin E Martin +Date: Wed Sep 27 03:34:14 2000 +0000 + + file radeon_drv.c was initially added on branch radeon-1-0-0-branch. + +commit 0688c5939796e09e2cea759e64774c6db478f513 +Author: Kevin E Martin +Date: Wed Sep 27 03:34:14 2000 +0000 + + file radeon_drv.h was initially added on branch radeon-1-0-0-branch. + +commit 9c250f5c18795cbf919d0ce947a269876e945cac +Author: Kevin E Martin +Date: Wed Sep 27 03:34:14 2000 +0000 + + file radeon_context.c was initially added on branch radeon-1-0-0-branch. + +commit 54e6f2f846ee46dc464033aa6a0c021ab7ccefd2 +Author: Kevin E Martin +Date: Wed Sep 27 03:34:14 2000 +0000 + + file radeon_drm.h was initially added on branch radeon-1-0-0-branch. + +commit ca013c632ca00931d404392be4e625f325fc959c +Author: Kevin E Martin +Date: Wed Sep 27 03:34:14 2000 +0000 + + file radeon_bufs.c was initially added on branch radeon-1-0-0-branch. + +commit cba6c830e07f4906a2b9de4de51ec3f2f1f9d7f6 +Author: Kevin E Martin +Date: Wed Sep 27 03:34:14 2000 +0000 + + file radeon_dma.c was initially added on branch radeon-1-0-0-branch. + +commit c7558d8fa4df805b7f7ff3d631432eadac9b8a1c +Author: Alan Hourihane +Date: Sun Sep 24 09:34:10 2000 +0000 + + commit xfree86 4.0.1d-pre update + +commit b1aa228f7d7390f8b9a361f862d724b908d5a71f +Author: Alan Hourihane +Date: Sat Sep 23 21:25:26 2000 +0000 + + Import of XFree86 4.0.1d-pre (2) + +commit 881683873e6aeab6529b8e6db8ed0678c87e86d7 +Author: Alan Hourihane +Date: Fri Sep 22 18:14:54 2000 +0000 + + Import of XFree86 4.0.1d-pre + +commit e06e4a73ac182bbd15ad7e6c10d259b12f39a383 +Author: Gareth Hughes +Date: Wed Sep 20 05:25:18 2000 +0000 + + file mach64_drv.c was initially added on branch mach64-0-0-0-branch. + +commit 7ed69fd309850cee0c14775b92322e4f91955405 +Author: Gareth Hughes +Date: Wed Sep 20 05:25:18 2000 +0000 + + file mach64_bufs.c was initially added on branch mach64-0-0-0-branch. + +commit d75fe0d7bfd1d5c3893464b2d184543932ffe347 +Author: Gareth Hughes +Date: Wed Sep 20 05:25:18 2000 +0000 + + file mach64_context.c was initially added on branch mach64-0-0-0-branch. + +commit de842ea5dbfd78d2e749d552f06410dbc2072087 +Author: Rik Faith +Date: Tue Sep 19 19:41:07 2000 +0000 + + Make management of current->state more correct. + +commit 01346c98b1d919374dc1f2ee70d4b401d2eaad67 +Author: Rik Faith +Date: Tue Sep 19 19:24:28 2000 +0000 + + Make management of current->state correct (accidentally made incorrect when + fixing the trispd bug). + +commit e2a16e1906592636e5e0e5ed82db776466b7e494 +Author: Gareth Hughes +Date: Tue Sep 19 18:24:09 2000 +0000 + + Correct sync with 2.4.0-test9-pre4 kernel. + +commit 9c8e1adfac249ee2a4d10e7ae32fc439c22fb8f6 +Author: Gareth Hughes +Date: Tue Sep 19 18:14:16 2000 +0000 + + Sync with 2.4.0-test9-pre4 kernel. + +commit ce199c73e555546aa4c6654695ab90ea42b1970d +Author: Gareth Hughes +Date: Tue Sep 19 16:40:02 2000 +0000 + + file r128_state.c was initially added on branch ati-4-1-1-branch. + +commit 4ec540945deb46008a7d6ff54d78c02582de5629 +Author: Gareth Hughes +Date: Tue Sep 19 16:38:55 2000 +0000 + + file r128_cce.c was initially added on branch ati-4-1-1-branch. + +commit dc6b57bf22ecbac04a5a1fee72fd0a43646b9c8c +Author: Alan Hourihane +Date: Thu Sep 14 14:48:44 2000 +0000 + + axp cast fix. + +commit f850c1bd06d8ccb576e8836ed8f0c16db6eec343 +Author: Rik Faith +Date: Wed Sep 13 15:02:35 2000 +0000 + + Remove debugging statement from production code. + +commit 1f8651163acb06b0691322ec9ab96bc606ba8777 +Author: Rik Faith +Date: Wed Sep 13 15:00:09 2000 +0000 + + Fix for [Bug #112247] Hard MGA lock with trispd -size 50000 + +commit bda40b41465ab67f8eef0b89cd26f9bbe8cf4a85 +Author: Gareth Hughes +Date: Sun Sep 10 04:59:05 2000 +0000 + + Sync with 2.4.0-test8 kernel. + +commit 3adced5b29924079da9b600265687863e6f92d99 +Author: Jeff Hartmann +Date: Thu Sep 7 22:33:36 2000 +0000 + + file drm_heavy_kern_lock.c was initially added on branch + mga-lock-debug-0-0-1-branch. + +commit 5f2cfc5bd8132d1bd4dabd78848acd0ee038ea92 +Author: Gareth Hughes +Date: Thu Sep 7 20:42:32 2000 +0000 + + Merge of tdfx branch undid the changes from the 2.4.0-test8-pre5 kernel + sync, so apply them again. + +commit f1bb3c5f5ff40e89004064d8ac8e13a3798b9afb +Author: Alan Hourihane +Date: Thu Sep 7 12:40:41 2000 +0000 + + Merged tdfx-2-1-branch + +commit 7db6449142ca24183f50e6f9dcf396b899b4113b +Author: Gareth Hughes +Date: Wed Sep 6 20:56:34 2000 +0000 + + Sync with 2.4.0-test8-pre5 kernel. + +commit e3e2d66131a3615379fe81ea106d7133da084683 +Author: Keith Whitwell +Date: Thu Aug 31 15:32:10 2000 +0000 + + Bump version number after kernel interface change. + +commit 433408db2e334f25df700b701fb3e159abd471b9 +Author: Rik Faith +Date: Thu Aug 31 10:10:03 2000 +0000 + + Pre Linux 2.4.0 compatibility header file + +commit 0bdde422b7db154935295938a937dab0c3212edf +Author: Keith Whitwell +Date: Wed Aug 30 22:36:27 2000 +0000 + + Added planemask args for color and depthbuffer clears. + +commit 926349534d4a20b8dc4f795e41055540ad48d112 +Author: Keith Whitwell +Date: Wed Aug 30 22:34:28 2000 +0000 + + Initialize vertsize correctly. Add planemask arguments for color and depth + stencil clearing. + +commit 32cebaf750b82639822f5f50d0aa8a4417595ada +Author: Rik Faith +Date: Mon Aug 28 19:50:52 2000 +0000 + + Add compatibility header file to make Linux 2.4.0 kernel patches cleaner. + +commit 6f07e1ff6bec8f306e8aa1d59b8bcaa93ffa776e +Author: Rik Faith +Date: Sat Aug 26 10:36:44 2000 +0000 + + Sync with Linux 2.4.0-test7 Add signal blocking support to all drivers + (using control-z on a running direct-rendering client should work now) + +commit 37643234affb329775d3330eed650dee59d39bad +Author: Rik Faith +Date: Fri Aug 25 12:49:18 2000 +0000 + + Apply patch from Alan Hourihane to temporarily allow compilation on Alpha + (the driver has not been tested on Alpha -- this just makes it compile) + +commit ac3c3571a714a38f7572f94c40fe143b43beb3b9 +Author: Rik Faith +Date: Fri Aug 25 12:45:53 2000 +0000 + + Remove misleading authorship information from sis driver (author has been + contacted and will provide improved information later) Rename + sis_drm_public.h to sis_drm.h to be consistent with the other drivers. + +commit 68f6795ef45739816fe9d5f1f5b3ef4900bf3187 +Author: Rik Faith +Date: Fri Aug 25 12:44:44 2000 +0000 + + Improve detection of kill_fasync parameter count Make compilation of sis.o + depend on CONFIG_FB_SIS + +commit fb3939c1a5cee3fedc02e0ca710870548481f99e +Author: Keith Whitwell +Date: Sun Aug 20 18:16:49 2000 +0000 + + Bug fixes for 32bpp rendering (still disabled) + +commit e30361416b31f6661d36f9d331f48217d66c9ee8 +Author: Jeff Hartmann +Date: Fri Aug 18 19:03:19 2000 +0000 + + Possible fix for trispd bug + +commit 364d44a24cb7a32ab7ac860e9dde0cd5d082fcd7 +Author: Rik Faith +Date: Fri Aug 18 18:57:56 2000 +0000 + + Fix ABA problem in drm_freelist_{put,try} + +commit f0f6509a72abf3a3a0a8f26a35b7a8f3d96cbb9b +Author: Rik Faith +Date: Fri Aug 18 13:55:23 2000 +0000 + + Sync with Linux 2.4.0-test7/pre4 + +commit f75ec3010ad8d15d316f6e6d580c85f9e6b8466e +Author: Rik Faith +Date: Thu Aug 17 20:26:11 2000 +0000 + + Bug #112196: auth.c uses semaphores while holding spinlocks Make spinlocked + region smaller to avoid semaphore. + +commit 761ffd63f3b8c9789afe026e75d384a6d450165a +Author: Rik Faith +Date: Thu Aug 17 20:20:33 2000 +0000 + + Bug #112197 Made sis driver compile under 2.4.0-test7/pre4 + +commit 3e42514360d15f63c250875e3aa4eb6ddd748763 +Author: Jeff Hartmann +Date: Wed Aug 16 21:13:24 2000 +0000 + + Fix for bug #111744 which caused any application to never render and dma to + stall on certain mga cards + +commit cba4d3504c843f6f66ffc0b477f86b4ee0048065 +Author: David Dawes +Date: Wed Aug 16 18:29:06 2000 +0000 + + first part of 4.0.1b merge + +commit 0cbca9cca2a9680bcced7d2ffe47599a37c7fea9 +Author: David Dawes +Date: Wed Aug 16 17:23:02 2000 +0000 + + Import of XFree86 4.0.1b + +commit 1df8afa8fff0750775ebcd8770d3b887053a65a7 +Author: David Dawes +Date: Wed Aug 16 17:23:02 2000 +0000 + + Initial revision + +commit 8b9363d1b1f7bc40fb68261f7659dea5124f2821 +Author: Rik Faith +Date: Tue Aug 8 16:04:21 2000 +0000 + + Sync with Linux 2.4.0-test6-pre8 + +commit 9199075a6a975ebcc44aff53fe0f77080c01a30b +Author: Jeff Hartmann +Date: Mon Aug 7 16:55:10 2000 +0000 + + Fix for multiple sarea bug + agp built into kernel segfault + +commit f3ae6786f89a4f63dbba93c5519d3792a1744dd7 +Author: Rik Faith +Date: Fri Aug 4 10:04:55 2000 +0000 + + Sync with Linux 2.4.0-test6-pre2 + +commit bcad11818296fa58a356175bc7e13060579012d0 +Author: Rik Faith +Date: Sat Jul 22 01:08:00 2000 +0000 + + Fix typo + +commit 1e54e554312d0970427e81c0a2bc8a16d1325c07 +Author: Rik Faith +Date: Sat Jul 22 01:04:22 2000 +0000 + + Move to new, denser, easier-to-read Linux kernel Makefile format + +commit 3bcc55a74d5fba18e53c4a6441dffb50badbbec0 +Author: Rik Faith +Date: Fri Jul 21 18:28:01 2000 +0000 + + Revert some changes and try alternative way to clean up AGP handling. + +commit 6dd96a15ed329f26565bb971877f03e15801f3f5 +Author: Rik Faith +Date: Fri Jul 21 16:57:00 2000 +0000 + + Revert some changes and try alternative way to clean up AGP handling. + +commit e38b34e54a79919588f23294ddb326309c9cb005 +Author: Rik Faith +Date: Fri Jul 21 15:48:24 2000 +0000 + + Fixes for building in the kernel tree + +commit 81da79d1ed038ff8968abcf1cde3362035603861 +Author: Rik Faith +Date: Fri Jul 21 14:20:57 2000 +0000 + + Changes to make AGP optional for in-kernel builds + +commit 6d1ce8fe7727ee0a704a8a7464b22559ce9831fd +Author: Rik Faith +Date: Thu Jul 20 20:21:10 2000 +0000 + + kfree_s was deprecated in 2.4.0-test? + +commit b4722ec943b3c51e103aaf7c6c77fe7b9c2c716d +Author: Rik Faith +Date: Thu Jul 20 05:17:49 2000 +0000 + + More fixups for kernel build: EXPORT_SYMTAB warning removal + put_module_symbol clean up of tdfx tdfx_cleanup routine Makefile.kernel + fix + +commit 0bd1fa795a06f592c1115b251685b36fec63fed3 +Author: Rik Faith +Date: Thu Jul 20 01:52:00 2000 +0000 + + Fixes for building in the kernel tree + +commit e8c9ed03f8d950ef82c09e387001b2fd43b81182 +Author: Rik Faith +Date: Thu Jul 20 01:14:58 2000 +0000 + + Fixed for monolithic kernel build + +commit 742c33bf6197e6ed18c7de89c7d895fecafaa838 +Author: Rik Faith +Date: Thu Jul 20 00:59:40 2000 +0000 + + Fix signature for *_options function + +commit c459c9ead3476a8edc1cd453fafa2b1c83c20e60 +Author: Rik Faith +Date: Thu Jul 20 00:48:12 2000 +0000 + + Added support for building as modules or as part of monolithic kernel + +commit 1d3c4d2ed2d7dd9e91037cff9ef0044a8fc2a6bb +Author: Rik Faith +Date: Wed Jul 19 20:59:35 2000 +0000 + + Bump driver dates and add descriptions + +commit ee9514b63b4309defc21a929deba1651a5dd8306 +Author: Rik Faith +Date: Wed Jul 19 20:41:51 2000 +0000 + + Allow SAREA > 1 page in size + +commit aed8549e91ade1582505ebce50e4a79d99b4436f +Author: Rik Faith +Date: Wed Jul 19 18:38:41 2000 +0000 + + Sync with Linux 2.4.0-test4 kernel + +commit 7b888f87fa5ec559df97a7e911dd5a3328895f6f +Author: Brian Paul +Date: Thu Jul 13 18:47:48 2000 +0000 + + applied Jeff's xf86cvs-I810copy.patch + +commit 4509385d37d0738f14d48bd91d9378e72dacc063 +Author: Alan Hourihane +Date: Wed Jul 12 21:37:17 2000 +0000 + + Final misc changes to bring upto 4.0.1 + +commit 8751b6774da527fdc3773d86da53ad5948b733dc +Author: Alan Hourihane +Date: Tue Jul 11 11:41:07 2000 +0000 + + Merge XFree86 4.0.1 + +commit 8bc39d01cae622db6097b967c132f9b0e04fb785 +Author: Alan Hourihane +Date: Mon Jul 10 21:32:06 2000 +0000 + + Import of XFree86 4.0.1 + +commit 62838b948cdddc0f007c200fbec195c1a008c731 +Author: Gareth Hughes +Date: Sat Jul 1 01:50:00 2000 +0000 + + Fix for agpgart module detection. If the kernel module has been configured + to use AGP, and the module is not present, fail gracefully instead of + doing evil things. + +commit dc2701a9f6034a04319f71e43e7f928f818be6db +Author: Gareth Hughes +Date: Fri Jun 23 17:14:20 2000 +0000 + + Update register definitions to match r128_reg.h + +commit d399dbcd569a66f5bf4863ffa2aab95fa8ebd5fc +Author: Doug Rabson +Date: Tue Jun 13 17:38:09 2000 +0000 + + Merged bsd-1-0-1 + +commit 2fbd4bf0189cf6d421000c7eea85fee3b9c79ed0 +Author: Rik Faith +Date: Tue Jun 13 14:34:13 2000 +0000 + + Unify code with kernel: Change some spacing in comments Add #include + to all *_drv.c files + +commit 1c8b2b5e06f7967babfa49b9dc8bf24316bfe201 +Author: Rik Faith +Date: Tue Jun 13 14:22:03 2000 +0000 + + Update email addresses and copyright notices to reflect VA Linux Systems + +commit d5348efe258d5399dd161bb488d22c981177bf78 +Author: Gareth Hughes +Date: Mon Jun 12 15:47:31 2000 +0000 + + Merging the ati-4-1-0 branch onto the trunk. + +commit ea425f532fb9c5b8f4d942e45751b7f715464b34 +Author: Daryll Strauss +Date: Mon Jun 12 02:33:12 2000 +0000 + + Merged the tdfx-2-0 branch onto the trunk + +commit b084e752920a3cc8ef904e67280fd903d050c301 +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_state.c was initially added on branch bsd-1-0-1-branch. + +commit 776faf51f00a856349c46bcc87e888207ec68558 +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_drv.h was initially added on branch bsd-1-0-1-branch. + +commit 8444cd6f11ecd8dca28f0a54c769bd908c4dd1df +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file Makefile was initially added on branch bsd-1-0-1-branch. + +commit 2add3b9dc882b20e977ec16343ef13fabd4392a6 +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_dma.c was initially added on branch bsd-1-0-1-branch. + +commit 0eed55ba456d3541c11b6bb5e6739747ce177b84 +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_drv.c was initially added on branch bsd-1-0-1-branch. + +commit 736ca698c8f0fd42654b396caaa8f1e5b3f0f6a0 +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_bufs.c was initially added on branch bsd-1-0-1-branch. + +commit 018c96b3e6fa2119ca63e107c29ae5ce54ced11c +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_context.c was initially added on branch bsd-1-0-1-branch. + +commit 877873ad33536765af1f51d485a2f8f28feff2e4 +Author: Doug Rabson +Date: Fri Jun 9 17:16:10 2000 +0000 + + file mga_drm.h was initially added on branch bsd-1-0-1-branch. + +commit 7d88040f523a1e82435a4bfae71d3b370d7a6a05 +Author: Alan Hourihane +Date: Fri Jun 9 15:14:51 2000 +0000 + + Fix define of PCI_DEVICE_ID_3DLABS_GAMMA when not available in the kernel + includes. + +commit 0dc99dc4b941ca5b47ebbf7c7f03cb16b296f87c +Author: Brian Paul +Date: Thu Jun 8 17:13:48 2000 +0000 + + don't draw if window is unmapped, other updates (Jeff Hartmann) + +commit 569da5a42ebf10c86d6c6ba81866a888e1c708dc +Author: Brian Paul +Date: Thu Jun 8 14:38:22 2000 +0000 + + Merged glxmisc-3-0-0 + +commit 5ce0f2afec70a1d062b749e1bf7150c21d35281d +Author: Brian Paul +Date: Tue Jun 6 22:51:29 2000 +0000 + + define VM_DONTCOPY to zero if undefined + +commit 909085a0083fccae1c74d2c78dc8a34efc55a5cf +Author: Alan Hourihane +Date: Mon Jun 5 00:42:21 2000 +0000 + + Include new updated gamma support. + +commit f0cf8d5edd466b3e224bad08223ba2b31fb3f046 +Author: Doug Rabson +Date: Wed May 31 14:32:36 2000 +0000 + + file ctxbitmap.c was initially added on branch bsd-1-0-1-branch. + +commit fa0a35a25fd008617ef6c7444cb92b138dd01859 +Author: Doug Rabson +Date: Tue May 30 17:13:31 2000 +0000 + + Merged bsd-1-0-0 + +commit a72f370f4d8a65db5c4ff28dc49b0a1d7acc146c +Author: Doug Rabson +Date: Tue May 30 14:47:51 2000 +0000 + + file r128_drm.h was initially added on branch bsd-1-0-0-branch. + +commit 50996ec9ba504e125d76a3713dfe96d5b8e99ac3 +Author: Gareth Hughes +Date: Fri May 26 23:24:54 2000 +0000 + + Fixed WARP pipe hangs in Quake 3. Fullscreen or window at (0,0) seems to + work fine now, but an offset window still hangs in the same places as + before. + +commit ddcb28259f70d6808caf57e8eb9f74ca95b5f069 +Author: Keith Whitwell +Date: Thu May 25 21:06:02 2000 +0000 + + Merged mga-0-0-3-branch + - New security model for i810 + - Enable i810 dri by default + - New indexed vertex path for mga + - Mga kernel driver rework + - Removed dead files in i810 driver + +commit 2bb4f7ef4252007c356c0fbb8597925d395cb6b1 +Author: Doug Rabson +Date: Mon May 22 10:28:44 2000 +0000 + + file agpsupport.c was initially added on branch bsd-1-0-0-branch. + +commit 99efe3c247f726909f0a9a43e59835ebfc2d121f +Author: Kevin E Martin +Date: Thu May 18 06:14:27 2000 +0000 + + Merged ati-4-0-1 + +commit e79f86b2540527fd5261aae9e251d582282914dc +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file tdfx_drv.c was initially added on branch bsd-1-0-0-branch. + +commit daa2b5316de12dd0bc231764312981567bb9db92 +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file tdfx_context.c was initially added on branch bsd-1-0-0-branch. + +commit bbdf6517b972b40a2a9502b3a715a7fa4f04c623 +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file Makefile was initially added on branch bsd-1-0-0-branch. + +commit 946502a97c93bc5266740e5e1d744f209aa3db46 +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file tdfx_drv.h was initially added on branch bsd-1-0-0-branch. + +commit b8a8b6a0072cb5b5fbe57bce2ef4baf7dd2e8d7d +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file gamma_drv.h was initially added on branch bsd-1-0-0-branch. + +commit 0ce3eb0c37f36f857738c8c5ab869b015019a8a3 +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file gamma_dma.c was initially added on branch bsd-1-0-0-branch. + +commit fc3e594efe21c7ee7f93840947c59b87a7da3713 +Author: Doug Rabson +Date: Sun May 7 14:14:47 2000 +0000 + + file gamma_drv.c was initially added on branch bsd-1-0-0-branch. + +commit ec9c8cf8c3ba4aef093e8a0fa754d40d0f56738a +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file lock.c was initially added on branch bsd-1-0-0-branch. + +commit dc461915572f293d4fb4ea9ff8c1806cdd850216 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file memory.c was initially added on branch bsd-1-0-0-branch. + +commit 3b55ffde2f887945b4c0bc8cd15730678e6a6333 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file vm.c was initially added on branch bsd-1-0-0-branch. + +commit 874b13095bc3571eefaf8098a1b08a6906bc8adb +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file drmstat.c was initially added on branch bsd-1-0-0-branch. + +commit 7428ee6555af8dc0e7a1b77f096bb683ebb8deb2 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file fops.c was initially added on branch bsd-1-0-0-branch. + +commit 2c88ecd2e6d7af28d69b634dc6e34b12bd02fb12 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file init.c was initially added on branch bsd-1-0-0-branch. + +commit 54d4e7afff4a5f8bc0932f1a048f52cbbbcbb06b +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file proc.c was initially added on branch bsd-1-0-0-branch. + +commit 291816bd9c718ce25fe9c9b54f68ce83d75ba9ed +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file lists.c was initially added on branch bsd-1-0-0-branch. + +commit badaa2f2eb79a244feb412b49c19cdc1372f69ff +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file sysctl.c was initially added on branch bsd-1-0-0-branch. + +commit 1d6bc9c448915a91b1ecf7ed7ac9b698b24d2ec7 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file context.c was initially added on branch bsd-1-0-0-branch. + +commit bbb0c2352b93f7b71900f66ddcfb6621a79c66e6 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file ioctl.c was initially added on branch bsd-1-0-0-branch. + +commit 573dcc12080f12f3afda076497185e0cf317ced3 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file dma.c was initially added on branch bsd-1-0-0-branch. + +commit a1a5b192d4ba3bc1a57e7f7fa708139d256689b8 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file bufs.c was initially added on branch bsd-1-0-0-branch. + +commit 111738fade531ad02729b8b2d18a077afe74459d +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file auth.c was initially added on branch bsd-1-0-0-branch. + +commit 93dcf91a0f03db4a07b4b2d86c0398c144883ff5 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file drawable.c was initially added on branch bsd-1-0-0-branch. + +commit c14788bf2982357e529114e4b4cf70e7b730a8ff +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file mga_drm.h was initially added on branch bsd-1-0-0-branch. + +commit 356bfda022741de65c7629c5c282690c0939cde2 +Author: Doug Rabson +Date: Sun May 7 14:14:46 2000 +0000 + + file i810_drm.h was initially added on branch bsd-1-0-0-branch. + +commit fc671ac20f84b2a8bac34472aa2c3033dee3acab +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file drmP.h was initially added on branch bsd-1-0-0-branch. + +commit 6b760708bdf876bf4cfd567743e45905d6c50653 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file Makefile.bsd was initially added on branch bsd-1-0-0-branch. + +commit 188d7591db6cddad414d971ac4db1c67855945d8 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file Imakefile was initially added on branch bsd-1-0-0-branch. + +commit a8af9a06524345dfd14ab42fb21484f0a8b22117 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file drm.h was initially added on branch bsd-1-0-0-branch. + +commit 9ca9e835279b66b14ad74158044aa6f08986d25b +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file tdfx_drv.c was initially added on branch bsd-1-0-0-branch. + +commit 268b2d0fa4c97c75b4cb2ce0d005b115da123b88 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file gamma_drv.h was initially added on branch bsd-1-0-0-branch. + +commit 2b4191b5b2331bc3146a546cd6737ba4cc8ea812 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file gamma_drv.c was initially added on branch bsd-1-0-0-branch. + +commit f352d4892ece370627de380da362cd55cf3ef2e6 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file gamma_dma.c was initially added on branch bsd-1-0-0-branch. + +commit a8ea56741b040e85221c7a4c5bfe9ff3d8817336 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file auth.c was initially added on branch bsd-1-0-0-branch. + +commit ba453d71d3cca772c6682772e96eb606d208cbee +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file bufs.c was initially added on branch bsd-1-0-0-branch. + +commit 244e9c02acf60bd5e1aba9082f889509bb0f4bb6 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file context.c was initially added on branch bsd-1-0-0-branch. + +commit 8f45e86a7681f73238c065d59be4b31ee058ba1d +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file dma.c was initially added on branch bsd-1-0-0-branch. + +commit 94e0ea68ae33160e62fcc9ffd38d919b8bab06f1 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file drawable.c was initially added on branch bsd-1-0-0-branch. + +commit 47c42ab42a8248794d07cea0e8fac233023c0754 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file drmstat.c was initially added on branch bsd-1-0-0-branch. + +commit e801cc05e755c0ecd6bb420482ebab110443ee17 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file fops.c was initially added on branch bsd-1-0-0-branch. + +commit 20afae284903d86b6168ebe26802935a9a761102 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file init.c was initially added on branch bsd-1-0-0-branch. + +commit 145d5c0006c7c0ad51075424df16c961bff461dd +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file ioctl.c was initially added on branch bsd-1-0-0-branch. + +commit 39d7d7228d997c9839898becee8fce7e9baacf68 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file lists.c was initially added on branch bsd-1-0-0-branch. + +commit 1140d8b0343e273c71a01d0a82fe3325e2072fe8 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file lock.c was initially added on branch bsd-1-0-0-branch. + +commit 3df97c45106cd08ab393935494b2ec42bebdb567 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file memory.c was initially added on branch bsd-1-0-0-branch. + +commit 7304e831cc1e429a07f27d8fc916f72cbde508cf +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file proc.c was initially added on branch bsd-1-0-0-branch. + +commit fe7968a7c507f9b330cc17e1f21b846ebcba561a +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file sysctl.c was initially added on branch bsd-1-0-0-branch. + +commit 4735070bd77fe68542e116effbaaff61ae640ba2 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file tdfx_context.c was initially added on branch bsd-1-0-0-branch. + +commit 2efb5abb9bd233ebe57393c697d04b3e412cae27 +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file tdfx_drv.h was initially added on branch bsd-1-0-0-branch. + +commit 813dc2fd4717e8fe21333e4c22d2380e0126bb0a +Author: Brian Paul +Date: Wed May 3 23:13:52 2000 +0000 + + file vm.c was initially added on branch bsd-1-0-0-branch. + +commit 01836824d5b3dd4833573ebf3f98ed4cfb9cd5b3 +Author: Brian Paul +Date: Thu Apr 20 16:36:40 2000 +0000 + + Merged glxmisc-1-0-0 + +commit da74fc3f29f3cc093929fe6c54140522ff489e2a +Author: Kevin E Martin +Date: Sat Apr 15 08:06:36 2000 +0000 + + file r128_bufs.c was initially added on branch ati-4-0-1-branch. + +commit 4a106124909259a08e65cc087dd6212629fa85a3 +Author: Kevin E Martin +Date: Wed Apr 12 06:22:02 2000 +0000 + + file r128_dma.c was initially added on branch ati-4-0-1-branch. + +commit d476a211bcf712506ac11f79a9f6c56a49ab4907 +Author: Kevin E Martin +Date: Wed Apr 12 06:22:02 2000 +0000 + + file r128_drm.h was initially added on branch ati-4-0-1-branch. + +commit 42f526b5ca90317dd751a772105f30e8151b8613 +Author: Daryll Strauss +Date: Sun Apr 9 17:29:28 2000 +0000 + + Only enable DRI for 16bpp mode. Allow GL_BLEND if color is 0,0,0,1 Wrap + grTexLodBiasValue call Link math library into libGL Recognize Napalm + boards Allow CLUT/gamma changes Make driver compile on 2.2.14 kernel + +commit 1dcfddf9154bcce3d6e004acee7dd503c27d0f0b +Author: Jeff Hartmann +Date: Wed Apr 5 18:48:23 2000 +0000 + + Fixed reclaim Oops + +commit ba1b1ae3806490cce16a9c8957b52cd74967f463 +Author: Jeff Hartmann +Date: Tue Apr 4 22:08:14 2000 +0000 + + Merged mga branch with trunk + +commit 7d715d1800031ccbd37db7f88896464c0e838f10 +Author: Jeff Hartmann +Date: Fri Mar 31 00:08:00 2000 +0000 + + file mga_drm.h was initially added on branch mga-0-0-2-branch. + +commit 45b6bd6f19d04e375dede6cd0374031a49e31efd +Author: Jeff Hartmann +Date: Fri Mar 31 00:08:00 2000 +0000 + + file i810_drm.h was initially added on branch mga-0-0-2-branch. + +commit 5bd8014f276d447178a1193d9dea1b976647d6ce +Author: Jeff Hartmann +Date: Thu Mar 16 03:37:30 2000 +0000 + + Merge with 4.0 + +commit adc03d3661117a687b5e1686f11b4b1314922203 +Author: Jeff Hartmann +Date: Wed Mar 15 21:40:23 2000 +0000 + + Import of XFree86 4.0 + +commit d9ff0e3884abd19cdf99426d4d4b1e8f17b4ffd1 +Author: Kevin E Martin +Date: Tue Feb 22 22:10:28 2000 +0000 + + 3.9.18 merge + +commit 7a9b291ab55dd9dcfeb35217f6105ad57c94f433 +Author: Kevin E Martin +Date: Tue Feb 22 15:43:59 2000 +0000 + + Import of XFree86 3.9.18 + +commit 9a1197da5cd84624f5b0741e0a20fee60eb8b4f1 +Author: Keith Whitwell +Date: Sun Feb 13 01:29:40 2000 +0000 + + file i810_clear.c was initially added on branch mga-0-0-1-branch. + +commit 37fa5fd54ae4cedbd5db22a646b37dbef8998656 +Author: Keith Whitwell +Date: Sun Feb 13 01:29:40 2000 +0000 + + file i810_dma.h was initially added on branch mga-0-0-1-branch. + +commit c6e856749badbdeeaa7647f93760f612f370a4ef +Author: Jeff Hartmann +Date: Sat Feb 12 21:48:57 2000 +0000 + + file Makefile.linuxpoll was initially added on branch mga-0-0-1-branch. + +commit baacc589f1add9ca5ff8a471c2c2bcb1b93f227f +Author: Jeff Hartmann +Date: Sat Feb 12 21:48:57 2000 +0000 + + file mga_dmapoll.c was initially added on branch mga-0-0-1-branch. + +commit 5a3acfc628f42ee244468f84e8e811c79f7bf938 +Author: Jeff Hartmann +Date: Sat Feb 12 02:08:58 2000 +0000 + + file i810_drm_public.h was initially added on branch mga-0-0-1-branch. + +commit 9fc0e46b67bd9ffa2b91644680fe21d0d9451314 +Author: Keith Whitwell +Date: Sun Feb 6 18:50:35 2000 +0000 + + file mga_state.h was initially added on branch mga-0-0-1-branch. + +commit d222453c4af94838fc1a669c3222dc0fdd9ee896 +Author: Keith Whitwell +Date: Fri Feb 4 07:32:24 2000 +0000 + + file mga_dma.h was initially added on branch mga-0-0-1-branch. + +commit a0ae1680027e9fc460a82ef70ee83c738d9d1846 +Author: Keith Whitwell +Date: Fri Feb 4 07:32:24 2000 +0000 + + file mga_clear.c was initially added on branch mga-0-0-1-branch. + +commit 9fcbf05c442d0b45d0fa7d7aca28e1f3c67de65a +Author: Jeff Hartmann +Date: Fri Jan 28 02:11:01 2000 +0000 + + Fixed freelist_put bug + +commit 84ad2d4aaea46ca2be005a37bd99dc5be1b2a891 +Author: Jeff Hartmann +Date: Thu Jan 27 23:48:40 2000 +0000 + + file mga_state.c was initially added on branch mga-0-0-1-branch. + +commit d93a3667b2bcab7ed08de79e9eafd7c162d8e674 +Author: Jeff Hartmann +Date: Thu Jan 27 23:48:40 2000 +0000 + + file mga_drm_public.h was initially added on branch mga-0-0-1-branch. + +commit 0d9121a5ec6a5bdd881fbc48f97805b5aed2d0b5 +Author: Jeff Hartmann +Date: Wed Jan 19 13:05:51 2000 +0000 + + file mgareg_flags.h was initially added on branch mga-0-0-1-branch. + +commit d545384a2b719f84a9a27ca7502f05325a49e646 +Author: Rik Faith +Date: Mon Jan 17 10:27:29 2000 +0000 + + Try a more complex (and more correct?) method for finding kernel inlcude + files + +commit fb0ace84a9e1afb0ec49b11d0a10898dbbb61502 +Author: Daryll Strauss +Date: Sat Jan 15 18:25:07 2000 +0000 + + Remove -g from build Fix lost code from tdfx-1-1 merge in tdfx_priv.c Lower + the minimum required fifo size Fix the kernel tree detection in the + Makefile + +commit 9a838857e1a271bd13881c2cd2d058072654dd12 +Author: Rik Faith +Date: Thu Jan 13 15:03:41 2000 +0000 + + Add new code to do SMP/MODVERSIONS detection for more distributions + +commit aa724a52b9e3b5fa6a768629e2d403288432b7a8 +Author: Daryll Strauss +Date: Wed Jan 12 21:47:44 2000 +0000 + + Add a drm_poll function to the tdfx driver. This fixes the problem with + 3.9.17 where the server hangs when the mouse is first moved. + +commit e83ae7576bca0dc248a03c8031b0cce37956aac4 +Author: Jeff Hartmann +Date: Sat Jan 8 00:17:21 2000 +0000 + + file i810_dma.c was initially added on branch mga-0-0-1-branch. + +commit ca64f467f296b26826c4e00e1f310a4301ac1e65 +Author: Jeff Hartmann +Date: Sat Jan 8 00:17:21 2000 +0000 + + file i810_drv.h was initially added on branch mga-0-0-1-branch. + +commit 19f6b7f5ff0e836262bb1478d9aae9a65f733f5d +Author: Jeff Hartmann +Date: Sat Jan 8 00:17:21 2000 +0000 + + file i810_drv.c was initially added on branch mga-0-0-1-branch. + +commit c3622292efbf605b09ce63c5bed27d02c4f6cafe +Author: Jeff Hartmann +Date: Sat Jan 8 00:17:21 2000 +0000 + + file i810_bufs.c was initially added on branch mga-0-0-1-branch. + +commit 138484c670aa570d7ad2e0308ace13ec0bfe9ee0 +Author: Jeff Hartmann +Date: Sat Jan 8 00:17:21 2000 +0000 + + file i810_context.c was initially added on branch mga-0-0-1-branch. + +commit 9243a76e0384f66c6c6799917affffbd9ca38ec6 +Author: Rik Faith +Date: Fri Jan 7 06:54:54 2000 +0000 + + Merge between X_3_9_16 and X_3_9_17 Compiles but may not run. + +commit bf0e55959f6c73731500ed9a0d4decc17c9523cd +Author: Jeff Hartmann +Date: Thu Jan 6 23:44:30 2000 +0000 + + file mga_bufs.c was initially added on branch mga-0-0-1-branch. + +commit cbb5afb3386a074f1b05983ed3880b3b33cb0d26 +Author: Jeff Hartmann +Date: Thu Jan 6 23:44:30 2000 +0000 + + file mga_context.c was initially added on branch mga-0-0-1-branch. + +commit 19da57df105a2a71842cf3a6a18ebb07c86c95fc +Author: Jeff Hartmann +Date: Thu Jan 6 23:44:30 2000 +0000 + + file ctxbitmap.c was initially added on branch mga-0-0-1-branch. + +commit 1c33c6909546e3b51f36c04bba12cc2275149902 +Author: Rik Faith +Date: Thu Jan 6 12:55:00 2000 +0000 + + Import of XFree86 3.9.17 + +commit 0371c290a12f75d36c9c1e7c947bf98fe210908b +Author: Daryll Strauss +Date: Sat Dec 18 18:34:59 1999 +0000 + + Rename the device to be /dev/dri instead of /dev/dri to avoid a conflict. + Rename proc entry from /proc/graphics to /proc/dri to be consistent. + +commit 46e1467a83415f3859ac15b8aa8dfb829c85d1d4 +Author: Rik Faith +Date: Fri Dec 17 17:17:53 1999 +0000 + + file agpsupport.c was initially added on branch ati-4-0-0-branch. + +commit 87fd9a07fc0bd8d052843817703e0032cbe365f6 +Author: Rik Faith +Date: Fri Dec 17 17:15:18 1999 +0000 + + file r128_drv.c was initially added on branch ati-4-0-0-branch. + +commit bf24c3d8819be07d29ee6fdd9bf95b5127c2b018 +Author: Rik Faith +Date: Fri Dec 17 17:15:18 1999 +0000 + + file r128_context.c was initially added on branch ati-4-0-0-branch. + +commit 1606f5b249386c27a0d70a1e7693d1246ada3de5 +Author: Rik Faith +Date: Fri Dec 17 17:15:18 1999 +0000 + + file r128_drv.h was initially added on branch ati-4-0-0-branch. + +commit 32338d3ebb7153b6c9c41bbc1b1f2a627178cb93 +Author: Jeff Hartmann +Date: Wed Dec 15 06:49:15 1999 +0000 + + file mga_drv.c was initially added on branch mga-0-0-1-branch. + +commit 8de9114ea6be1790a8d36cd260e0944f2991d8b8 +Author: Jeff Hartmann +Date: Wed Dec 15 06:49:15 1999 +0000 + + file mga_dma.c was initially added on branch mga-0-0-1-branch. + +commit 1c6999d90c77ae43616f180345dc2257ae65fe3a +Author: Jeff Hartmann +Date: Wed Dec 15 06:49:15 1999 +0000 + + file mga_drv.h was initially added on branch mga-0-0-1-branch. + +commit b03b238dfc4d1992e27878ea6f3cac334f1fd56d +Author: Rik Faith +Date: Wed Dec 8 19:20:20 1999 +0000 + + Sync with Linux 2.3.30 + +commit e1dba5c3a73078dec24f07a6d685435677db94a4 +Author: Daryll Strauss +Date: Tue Dec 7 03:37:16 1999 +0000 + + Move Mesa to xc/extras Update to the latest Mesa 3.2 code Fix the Q3Demo + bugs (white railgun and texture mapping) Simplify driver texture + mapping routines Fix device driver for 2.3 kernels Improve performance + +commit b6a28bfe98f2c89cfb91079bd3c7b63fb0144eb1 +Author: Daryll Strauss +Date: Sun Dec 5 23:10:37 1999 +0000 + + First DRI release of 3dfx driver. + +commit a8ab34ed47c1880b1206812c9b1b8312cd7a3357 +Author: Daryll Strauss +Date: Sun Dec 5 01:19:48 1999 +0000 + + Import XFree 3.9.16 + +commit b3a5766992019fc5f44cc9afd01b2617b76f47a7 +Author: Daryll Strauss +Date: Sun Dec 5 01:19:48 1999 +0000 + + Initial revision diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/config.guess /tmp/5JEwQoyJ2h/libdrm-2.3.1/config.guess --- libdrm-2.3.0.16/config.guess 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/config.guess 2009-04-20 07:00:29.000000000 +0100 @@ -1,10 +1,10 @@ #! /bin/sh # Attempt to guess a canonical system name. # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, -# 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, -# Inc. +# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 +# Free Software Foundation, Inc. -timestamp='2007-07-22' +timestamp='2008-01-23' # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by @@ -56,8 +56,8 @@ GNU config.guess ($timestamp) Originally written by Per Bothner. -Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 -Free Software Foundation, Inc. +Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, +2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." @@ -532,7 +532,7 @@ echo rs6000-ibm-aix3.2 fi exit ;; - *:AIX:*:[45]) + *:AIX:*:[456]) IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then IBM_ARCH=rs6000 @@ -799,6 +799,9 @@ EM64T | authenticamd) echo x86_64-unknown-interix${UNAME_RELEASE} exit ;; + IA64) + echo ia64-unknown-interix${UNAME_RELEASE} + exit ;; esac ;; [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) echo i${UNAME_MACHINE}-pc-mks @@ -833,7 +836,14 @@ echo ${UNAME_MACHINE}-pc-minix exit ;; arm*:Linux:*:*) - echo ${UNAME_MACHINE}-unknown-linux-gnu + eval $set_cc_for_build + if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ARM_EABI__ + then + echo ${UNAME_MACHINE}-unknown-linux-gnu + else + echo ${UNAME_MACHINE}-unknown-linux-gnueabi + fi exit ;; avr32*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-gnu @@ -954,8 +964,8 @@ x86_64:Linux:*:*) echo x86_64-unknown-linux-gnu exit ;; - xtensa:Linux:*:*) - echo xtensa-unknown-linux-gnu + xtensa*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu exit ;; i*86:Linux:*:*) # The BFD linker knows what the default object file format is, so @@ -1474,9 +1484,9 @@ the operating system you are using. It is advised that you download the most up to date version of the config scripts from - http://savannah.gnu.org/cgi-bin/viewcvs/*checkout*/config/config/config.guess + http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD and - http://savannah.gnu.org/cgi-bin/viewcvs/*checkout*/config/config/config.sub + http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD If the version you run ($0) is already up to date, please send the following data and any information you think might be diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/config.status.lineno /tmp/5JEwQoyJ2h/libdrm-2.3.1/config.status.lineno --- libdrm-2.3.0.16/config.status.lineno 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/config.status.lineno 1970-01-01 01:00:00.000000000 +0100 @@ -1,1067 +0,0 @@ -#! /bin/sh -# Generated by configure. -# Run this file to recreate the current configuration. -# Compiler output produced by configure, useful for debugging -# configure, is in config.log if it exists. - -debug=false -ac_cs_recheck=false -ac_cs_silent=false -SHELL=${CONFIG_SHELL-/bin/sh} -## --------------------- ## -## M4sh Initialization. ## -## --------------------- ## - -# Be more Bourne compatible -DUALCASE=1; export DUALCASE # for MKS sh -if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then - emulate sh - NULLCMD=: - # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which - # is contrary to our usage. Disable this feature. - alias -g '${1+"$@"}'='"$@"' - setopt NO_GLOB_SUBST -else - case `(set -o) 2>/dev/null` in - *posix*) set -o posix ;; -esac - -fi - - - - -# PATH needs CR -# Avoid depending upon Character Ranges. -as_cr_letters='abcdefghijklmnopqrstuvwxyz' -as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' -as_cr_Letters=$as_cr_letters$as_cr_LETTERS -as_cr_digits='0123456789' -as_cr_alnum=$as_cr_Letters$as_cr_digits - -# The user is always right. -if test "${PATH_SEPARATOR+set}" != set; then - echo "#! /bin/sh" >conf$$.sh - echo "exit 0" >>conf$$.sh - chmod +x conf$$.sh - if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then - PATH_SEPARATOR=';' - else - PATH_SEPARATOR=: - fi - rm -f conf$$.sh -fi - -# Support unset when possible. -if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then - as_unset=unset -else - as_unset=false -fi - - -# IFS -# We need space, tab and new line, in precisely that order. Quoting is -# there to prevent editors from complaining about space-tab. -# (If _AS_PATH_WALK were called with IFS unset, it would disable word -# splitting by setting IFS to empty value.) -as_nl=' -' -IFS=" "" $as_nl" - -# Find who we are. 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This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." @@ -369,10 +369,14 @@ | v850-* | v850e-* | vax-* \ | we32k-* \ | x86-* | x86_64-* | xc16x-* | xps100-* | xscale-* | xscalee[bl]-* \ - | xstormy16-* | xtensa-* \ + | xstormy16-* | xtensa*-* \ | ymp-* \ | z8k-*) ;; + # Recognize the basic CPU types without company name, with glob match. + xtensa*) + basic_machine=$basic_machine-unknown + ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) @@ -443,6 +447,14 @@ basic_machine=ns32k-sequent os=-dynix ;; + blackfin) + basic_machine=bfin-unknown + os=-linux + ;; + blackfin-*) + basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'` + os=-linux + ;; c90) basic_machine=c90-cray os=-unicos @@ -668,6 +680,14 @@ basic_machine=m68k-isi os=-sysv ;; + m68knommu) + basic_machine=m68k-unknown + os=-linux + ;; + m68knommu-*) + basic_machine=m68k-`echo $basic_machine | sed 's/^[^-]*-//'` + os=-linux + ;; m88k-omron*) basic_machine=m88k-omron ;; @@ -813,6 +833,14 @@ basic_machine=i860-intel os=-osf ;; + parisc) + basic_machine=hppa-unknown + os=-linux + ;; + parisc-*) + basic_machine=hppa-`echo $basic_machine | sed 's/^[^-]*-//'` + os=-linux + ;; pbd) basic_machine=sparc-tti ;; @@ -1021,6 +1049,10 @@ basic_machine=tic6x-unknown os=-coff ;; + tile*) + basic_machine=tile-unknown + os=-linux-gnu + ;; tx39) basic_machine=mipstx39-unknown ;; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/configure /tmp/5JEwQoyJ2h/libdrm-2.3.1/configure --- libdrm-2.3.0.16/configure 2008-05-15 22:47:16.000000000 +0100 +++ libdrm-2.3.1/configure 2009-04-20 07:00:29.000000000 +0100 @@ -21072,7 +21072,7 @@ pkgconfigdir=${libdir}/pkgconfig -ac_config_files="$ac_config_files Makefile libdrm/Makefile shared-core/Makefile libdrm.pc" +ac_config_files="$ac_config_files Makefile libdrm/Makefile shared-core/Makefile tests/Makefile libdrm.pc" cat >confcache <<\_ACEOF # This file is a shell script that caches the results of configure @@ -21670,6 +21670,7 @@ "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; "libdrm/Makefile") CONFIG_FILES="$CONFIG_FILES libdrm/Makefile" ;; "shared-core/Makefile") CONFIG_FILES="$CONFIG_FILES shared-core/Makefile" ;; + "tests/Makefile") CONFIG_FILES="$CONFIG_FILES tests/Makefile" ;; "libdrm.pc") CONFIG_FILES="$CONFIG_FILES libdrm.pc" ;; *) { { echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5 diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/configure.ac /tmp/5JEwQoyJ2h/libdrm-2.3.1/configure.ac --- libdrm-2.3.0.16/configure.ac 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/configure.ac 2008-07-01 08:50:43.000000000 +0100 @@ -35,4 +35,9 @@ pkgconfigdir=${libdir}/pkgconfig AC_SUBST(pkgconfigdir) -AC_OUTPUT([Makefile libdrm/Makefile shared-core/Makefile libdrm.pc]) +AC_OUTPUT([ + Makefile + libdrm/Makefile + shared-core/Makefile + tests/Makefile + libdrm.pc]) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/changelog /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/changelog --- libdrm-2.3.0.16/debian/changelog 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/changelog 2009-04-20 07:00:29.000000000 +0100 @@ -1,70 +1,27 @@ -libdrm (2.3.0.16-0ubuntu2~804um1) intrepid; urgency=low +libdrm (2.3.1-0ubuntu1~810um1) intrepid; urgency=low - * Update with newest psb-kmb headers. Changes since last version: - + Update PSB_PACKAGE_VERSION from "2.0.0.32L.0014" to "2.1.0.32L.0019" + * Change the shlibs to require either this package or libdrm-poulsbo. - -- Bryce Harrington Mon, 30 Jun 2008 11:11:32 -0700 + -- Steve Kowalik Mon, 20 Apr 2009 15:39:13 +1000 -libdrm (2.3.0.16-0ubuntu1~804um2) hardy; urgency=low +libdrm (2.3.1-0build1) intrepid; urgency=low - * Add 01_psb_headers.patch: - - Provide missing header files from psb-kmd. Unclear why these - weren't there before; without them -psb won't build. + * New upstream release, needed for mesa 7.1 & xorg-server 1.5. - -- Bryce Harrington Tue, 27 May 2008 15:15:37 -0700 + -- Timo Aaltonen Thu, 03 Jul 2008 16:43:22 +0300 -libdrm (2.3.0.16-0ubuntu1~804um1) hardy; urgency=low +libdrm (2.3.1-1) UNRELEASED; urgency=low - * Forked release of libdrm from Intel - - Normally Intel provides a patch with just the diffs against libdrm - that they need, but this time they only provided us with an - already patched tarball with no easy way to isolate the changes. - - Upstream changes since beta6 include: - - a memory leak get fixed - - added DRM_BO_HINT_PRESUMED_OFFSET to drm.h - - added DRM_MODE_TYPE_USERPREF to drm.h - - changed DRM_IOCTL_TIMEOUT_USEC from 3 sec to 30 sec. - * Drop 00_poulsbo_libdrm_update.patch + [ Brice Goglin ] + * Update upstream URL in debian/copyright. + * Bump Standards-Version to 3.7.3 (no changes). + * Drop the XS- prefix from Vcs-Git and Vcs-Browser fields in debian/control. + * Install the upstream ChangeLog. - -- Bryce Harrington Thu, 15 May 2008 22:17:05 +0000 - -libdrm (2.3.0-4ubuntu4~804um1) hardy; urgency=low - - * Replacing beta3 patches with new beta6 00_poulsbo_libdrm_update.patch - - -- Bryce Harrington Thu, 31 Jan 2008 11:02:05 -0800 - -libdrm (2.3.0-4ubuntu3~804um1) gutsy; urgency=low - - * Restoring the 00_poulsbo_libdrm_update.patch, which was - inadvertantly dropped in the prior change's cleanup. - - -- Bryce Harrington Thu, 17 Jan 2008 13:00:49 -0800 - -libdrm (2.3.0-4ubuntu2~804um2) hardy; urgency=low - - * Clear old patches from debian/patches/ directory - - -- Bryce Harrington Wed, 16 Jan 2008 11:24:26 -0800 - -libdrm (2.3.0-4ubuntu2~psb1) gutsy; urgency=low - - * Incorporate patches from poulsbo - * Dropped all Debian changes outside debian/ directory. These seem to - be conflicting with the patch from Intel, so I'm assuming they - duplicate stuff in the Intel patch. - - -- Bryce Harrington Wed, 16 Jan 2008 11:23:54 -0800 - -libdrm (2.3.0-4ubuntu1) gutsy; urgency=low - - [ Jacob Pan ] - * debian/patches/100_poulsbo_libdrm_update.patch: - - Incorporate changes to libdrm for the Poulsbo driver - * debian/patches/101_poulsbo_headers.patch: - - Header files required to build driver + [ Julien Cristau ] + * New upstream release (needed for mesa 7.1 and newer xserver). - -- Bryce Harrington Wed, 1 Aug 2007 18:10:14 -0700 + -- Brice Goglin Fri, 13 Jun 2008 11:50:19 +0200 libdrm (2.3.0-4) unstable; urgency=low diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/control /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/control --- libdrm-2.3.0.16/debian/control 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/control 2009-04-20 07:00:29.000000000 +0100 @@ -4,10 +4,10 @@ XSBC-Original-Maintainer: Debian X Strike Force Uploaders: Thierry Reding , Julien Cristau , David Nusinow Build-Depends: debhelper (>= 5.0.0), autotools-dev, libx11-dev, dpkg-dev (>= 1.13.19), quilt (>= 0.40) -Standards-Version: 3.7.2 +Standards-Version: 3.7.3 Section: libs -XS-Vcs-Git: git://git.debian.org/git/pkg-xorg/lib/libdrm -XS-Vcs-Browser: http://git.debian.org/?p=pkg-xorg/lib/libdrm.git +Vcs-Git: git://git.debian.org/git/pkg-xorg/lib/libdrm +Vcs-Browser: http://git.debian.org/?p=pkg-xorg/lib/libdrm.git Package: libdrm-dev Section: libdevel diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/copyright /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/copyright --- libdrm-2.3.0.16/debian/copyright 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/copyright 2009-04-20 07:00:29.000000000 +0100 @@ -1,7 +1,8 @@ -This package was debianized by Marcelo E. Magallon on -Fri, 19 Aug 2005 21:11:18 -0600. +This package was downloaded from +http://dri.freedesktop.org/libdrm/ -It was downloaded from http://people.freedesktop.org/~ajax/libdrm/ +It was debianized by Marcelo E. Magallon on +Fri, 19 Aug 2005 21:11:18 -0600. Copyright Holder: Adam Jackson @@ -55,4 +56,3 @@ WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/libdrm2.shlibs /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/libdrm2.shlibs --- libdrm-2.3.0.16/debian/libdrm2.shlibs 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/libdrm2.shlibs 2009-04-20 07:00:29.000000000 +0100 @@ -1 +1 @@ -libdrm 2 libdrm2 (>= 2.3.0) +libdrm 2 libdrm2 (>= 2.3.0) | libdrm-poulsbo1 (>= 2.3.0) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/patches/01_default_perms.diff /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/patches/01_default_perms.diff --- libdrm-2.3.0.16/debian/patches/01_default_perms.diff 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/debian/patches/01_default_perms.diff 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,13 @@ +Index: libdrm/libdrm/xf86drm.h +=================================================================== +--- libdrm.orig/libdrm/xf86drm.h ++++ libdrm/libdrm/xf86drm.h +@@ -45,7 +45,7 @@ + /* Default /dev/dri directory permissions 0755 */ + #define DRM_DEV_DIRMODE \ + (S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH) +-#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) ++#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) + + #define DRM_DIR_NAME "/dev/dri" + #define DRM_DEV_NAME "%s/card%d" diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/patches/01_psb_headers.patch /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/patches/01_psb_headers.patch --- libdrm-2.3.0.16/debian/patches/01_psb_headers.patch 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/patches/01_psb_headers.patch 1970-01-01 01:00:00.000000000 +0100 @@ -1,976 +0,0 @@ -diff -Nurp libdrm-2.3.0.16-0ubuntu1/shared-core/Makefile.am libdrm-2.3.0.16-0ubuntu1-working/shared-core/Makefile.am ---- libdrm-2.3.0.16-0ubuntu1/shared-core/Makefile.am 2008-05-15 14:47:43.000000000 -0700 -+++ libdrm-2.3.0.16-0ubuntu1-working/shared-core/Makefile.am 2008-06-30 10:44:26.000000000 -0700 -@@ -29,12 +29,14 @@ klibdrminclude_HEADERS = \ - i915_drm.h \ - mach64_drm.h \ - mga_drm.h \ -+ psb_drm.h \ - nouveau_drm.h \ - r128_drm.h \ - radeon_drm.h \ - savage_drm.h \ - sis_drm.h \ - via_drm.h \ -+ psb_reg.h \ - r300_reg.h \ - via_3d_reg.h - -diff -Nurp libdrm-2.3.0.16-0ubuntu1/shared-core/Makefile.in libdrm-2.3.0.16-0ubuntu1-working/shared-core/Makefile.in ---- libdrm-2.3.0.16-0ubuntu1/shared-core/Makefile.in 2008-05-15 14:47:43.000000000 -0700 -+++ libdrm-2.3.0.16-0ubuntu1-working/shared-core/Makefile.in 2008-06-30 10:44:26.000000000 -0700 -@@ -196,12 +196,14 @@ klibdrminclude_HEADERS = \ - i915_drm.h \ - mach64_drm.h \ - mga_drm.h \ -+ psb_drm.h \ - nouveau_drm.h \ - r128_drm.h \ - radeon_drm.h \ - savage_drm.h \ - sis_drm.h \ - via_drm.h \ -+ psb_reg.h \ - r300_reg.h \ - via_3d_reg.h - -diff -Nurp libdrm-2.3.0.16-0ubuntu1/shared-core/psb_drm.h libdrm-2.3.0.16-0ubuntu1-working/shared-core/psb_drm.h ---- libdrm-2.3.0.16-0ubuntu1/shared-core/psb_drm.h 1969-12-31 16:00:00.000000000 -0800 -+++ libdrm-2.3.0.16-0ubuntu1-working/shared-core/psb_drm.h 2008-06-30 11:00:05.000000000 -0700 -@@ -0,0 +1,370 @@ -+/************************************************************************** -+ * Copyright (c) 2007, Intel Corporation. -+ * All Rights Reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms and conditions of the GNU General Public License, -+ * version 2, as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to -+ * develop this driver. -+ * -+ **************************************************************************/ -+/* -+ */ -+ -+#ifndef _PSB_DRM_H_ -+#define _PSB_DRM_H_ -+ -+#if defined(__linux__) && !defined(__KERNEL__) -+#include -+#endif -+ -+/* -+ * Intel Poulsbo driver package version. -+ * -+ */ -+/* #define PSB_PACKAGE_VERSION "ED"__DATE__*/ -+#define PSB_PACKAGE_VERSION "2.1.0.32L.0019" -+ -+#define DRM_PSB_SAREA_MAJOR 0 -+#define DRM_PSB_SAREA_MINOR 1 -+#define PSB_FIXED_SHIFT 16 -+ -+/* -+ * Public memory types. -+ */ -+ -+#define DRM_PSB_MEM_MMU DRM_BO_MEM_PRIV1 -+#define DRM_PSB_FLAG_MEM_MMU DRM_BO_FLAG_MEM_PRIV1 -+#define DRM_PSB_MEM_PDS DRM_BO_MEM_PRIV2 -+#define DRM_PSB_FLAG_MEM_PDS DRM_BO_FLAG_MEM_PRIV2 -+#define DRM_PSB_MEM_APER DRM_BO_MEM_PRIV3 -+#define DRM_PSB_FLAG_MEM_APER DRM_BO_FLAG_MEM_PRIV3 -+#define DRM_PSB_MEM_RASTGEOM DRM_BO_MEM_PRIV4 -+#define DRM_PSB_FLAG_MEM_RASTGEOM DRM_BO_FLAG_MEM_PRIV4 -+#define PSB_MEM_RASTGEOM_START 0x30000000 -+ -+typedef int32_t psb_fixed; -+typedef uint32_t psb_ufixed; -+ -+static inline psb_fixed psb_int_to_fixed(int a) -+{ -+ return a * (1 << PSB_FIXED_SHIFT); -+} -+ -+static inline psb_ufixed psb_unsigned_to_ufixed(unsigned int a) -+{ -+ return a << PSB_FIXED_SHIFT; -+} -+ -+/*Status of the command sent to the gfx device.*/ -+typedef enum { -+ DRM_CMD_SUCCESS, -+ DRM_CMD_FAILED, -+ DRM_CMD_HANG -+} drm_cmd_status_t; -+ -+struct drm_psb_scanout { -+ uint32_t buffer_id; /* DRM buffer object ID */ -+ uint32_t rotation; /* Rotation as in RR_rotation definitions */ -+ uint32_t stride; /* Buffer stride in bytes */ -+ uint32_t depth; /* Buffer depth in bits (NOT) bpp */ -+ uint32_t width; /* Buffer width in pixels */ -+ uint32_t height; /* Buffer height in lines */ -+ psb_fixed transform[3][3]; /* Buffer composite transform */ -+ /* (scaling, rot, reflect) */ -+}; -+ -+#define DRM_PSB_SAREA_OWNERS 16 -+#define DRM_PSB_SAREA_OWNER_2D 0 -+#define DRM_PSB_SAREA_OWNER_3D 1 -+ -+#define DRM_PSB_SAREA_SCANOUTS 3 -+ -+struct drm_psb_sarea { -+ /* Track changes of this data structure */ -+ -+ uint32_t major; -+ uint32_t minor; -+ -+ /* Last context to touch part of hw */ -+ uint32_t ctx_owners[DRM_PSB_SAREA_OWNERS]; -+ -+ /* Definition of front- and rotated buffers */ -+ uint32_t num_scanouts; -+ struct drm_psb_scanout scanouts[DRM_PSB_SAREA_SCANOUTS]; -+ -+ int planeA_x; -+ int planeA_y; -+ int planeA_w; -+ int planeA_h; -+ int planeB_x; -+ int planeB_y; -+ int planeB_w; -+ int planeB_h; -+ uint32_t msvdx_state; -+ uint32_t msvdx_context; -+}; -+ -+#define PSB_RELOC_MAGIC 0x67676767 -+#define PSB_RELOC_SHIFT_MASK 0x0000FFFF -+#define PSB_RELOC_SHIFT_SHIFT 0 -+#define PSB_RELOC_ALSHIFT_MASK 0xFFFF0000 -+#define PSB_RELOC_ALSHIFT_SHIFT 16 -+ -+#define PSB_RELOC_OP_OFFSET 0 /* Offset of the indicated -+ * buffer -+ */ -+#define PSB_RELOC_OP_2D_OFFSET 1 /* Offset of the indicated -+ * buffer, relative to 2D -+ * base address -+ */ -+#define PSB_RELOC_OP_PDS_OFFSET 2 /* Offset of the indicated buffer, -+ * relative to PDS base address -+ */ -+#define PSB_RELOC_OP_STRIDE 3 /* Stride of the indicated -+ * buffer (for tiling) -+ */ -+#define PSB_RELOC_OP_USE_OFFSET 4 /* Offset of USE buffer -+ * relative to base reg -+ */ -+#define PSB_RELOC_OP_USE_REG 5 /* Base reg of USE buffer */ -+ -+struct drm_psb_reloc { -+ uint32_t reloc_op; -+ uint32_t where; /* offset in destination buffer */ -+ uint32_t buffer; /* Buffer reloc applies to */ -+ uint32_t mask; /* Destination format: */ -+ uint32_t shift; /* Destination format: */ -+ uint32_t pre_add; /* Destination format: */ -+ uint32_t background; /* Destination add */ -+ uint32_t dst_buffer; /* Destination buffer. Index into buffer_list */ -+ uint32_t arg0; /* Reloc-op dependant */ -+ uint32_t arg1; -+}; -+ -+#define PSB_BO_FLAG_TA (1ULL << 48) -+#define PSB_BO_FLAG_SCENE (1ULL << 49) -+#define PSB_BO_FLAG_FEEDBACK (1ULL << 50) -+#define PSB_BO_FLAG_USSE (1ULL << 51) -+ -+#define PSB_ENGINE_2D 0 -+#define PSB_ENGINE_VIDEO 1 -+#define PSB_ENGINE_RASTERIZER 2 -+#define PSB_ENGINE_TA 3 -+#define PSB_ENGINE_HPRAST 4 -+ -+/* -+ * For this fence class we have a couple of -+ * fence types. -+ */ -+ -+#define _PSB_FENCE_EXE_SHIFT 0 -+#define _PSB_FENCE_TA_DONE_SHIFT 1 -+#define _PSB_FENCE_RASTER_DONE_SHIFT 2 -+#define _PSB_FENCE_SCENE_DONE_SHIFT 3 -+#define _PSB_FENCE_FEEDBACK_SHIFT 4 -+ -+#define _PSB_ENGINE_TA_FENCE_TYPES 5 -+#define _PSB_FENCE_TYPE_TA_DONE (1 << _PSB_FENCE_TA_DONE_SHIFT) -+#define _PSB_FENCE_TYPE_RASTER_DONE (1 << _PSB_FENCE_RASTER_DONE_SHIFT) -+#define _PSB_FENCE_TYPE_SCENE_DONE (1 << _PSB_FENCE_SCENE_DONE_SHIFT) -+#define _PSB_FENCE_TYPE_FEEDBACK (1 << _PSB_FENCE_FEEDBACK_SHIFT) -+ -+#define PSB_ENGINE_HPRAST 4 -+#define PSB_NUM_ENGINES 5 -+ -+#define PSB_TA_FLAG_FIRSTPASS (1 << 0) -+#define PSB_TA_FLAG_LASTPASS (1 << 1) -+ -+#define PSB_FEEDBACK_OP_VISTEST (1 << 0) -+ -+struct drm_psb_scene { -+ int handle_valid; -+ uint32_t handle; -+ uint32_t w; -+ uint32_t h; -+ uint32_t num_buffers; -+}; -+ -+struct drm_psb_hw_info -+{ -+ uint32_t rev_id; -+ uint32_t caps; -+}; -+ -+typedef struct drm_psb_cmdbuf_arg { -+ uint64_t buffer_list; /* List of buffers to validate */ -+ uint64_t clip_rects; /* See i915 counterpart */ -+ uint64_t scene_arg; -+ uint64_t fence_arg; -+ -+ uint32_t ta_flags; -+ -+ uint32_t ta_handle; /* TA reg-value pairs */ -+ uint32_t ta_offset; -+ uint32_t ta_size; -+ -+ uint32_t oom_handle; -+ uint32_t oom_offset; -+ uint32_t oom_size; -+ -+ uint32_t cmdbuf_handle; /* 2D Command buffer object or, */ -+ uint32_t cmdbuf_offset; /* rasterizer reg-value pairs */ -+ uint32_t cmdbuf_size; -+ -+ uint32_t reloc_handle; /* Reloc buffer object */ -+ uint32_t reloc_offset; -+ uint32_t num_relocs; -+ -+ int32_t damage; /* Damage front buffer with cliprects */ -+ /* Not implemented yet */ -+ uint32_t fence_flags; -+ uint32_t engine; -+ -+ /* -+ * Feedback; -+ */ -+ -+ uint32_t feedback_ops; -+ uint32_t feedback_handle; -+ uint32_t feedback_offset; -+ uint32_t feedback_breakpoints; -+ uint32_t feedback_size; -+} drm_psb_cmdbuf_arg_t; -+ -+struct drm_psb_xhw_init_arg { -+ uint32_t operation; -+ uint32_t buffer_handle; -+}; -+ -+/* -+ * Feedback components: -+ */ -+ -+/* -+ * Vistest component. The number of these in the feedback buffer -+ * equals the number of vistest breakpoints + 1. -+ * This is currently the only feedback component. -+ */ -+ -+struct drm_psb_vistest { -+ uint32_t vt[8]; -+}; -+ -+#define PSB_HW_COOKIE_SIZE 16 -+#define PSB_HW_FEEDBACK_SIZE 8 -+#define PSB_HW_OOM_CMD_SIZE 6 -+ -+struct drm_psb_xhw_arg { -+ uint32_t op; -+ int ret; -+ uint32_t irq_op; -+ uint32_t issue_irq; -+ uint32_t cookie[PSB_HW_COOKIE_SIZE]; -+ union { -+ struct { -+ uint32_t w; -+ uint32_t h; -+ uint32_t size; -+ uint32_t clear_p_start; -+ uint32_t clear_num_pages; -+ } si; -+ struct { -+ uint32_t fire_flags; -+ uint32_t hw_context; -+ uint32_t offset; -+ uint32_t engine; -+ uint32_t flags; -+ uint32_t rca; -+ uint32_t num_oom_cmds; -+ uint32_t oom_cmds[PSB_HW_OOM_CMD_SIZE]; -+ } sb; -+ struct { -+ uint32_t pages; -+ uint32_t size; -+ } bi; -+ struct { -+ uint32_t bca; -+ uint32_t rca; -+ uint32_t flags; -+ } oom; -+ struct { -+ uint32_t pt_offset; -+ uint32_t param_offset; -+ uint32_t flags; -+ } bl; -+ struct { -+ uint32_t value; -+ } cl; -+ uint32_t feedback[PSB_HW_FEEDBACK_SIZE]; -+ } arg; -+}; -+ -+#define DRM_PSB_CMDBUF 0x00 -+#define DRM_PSB_XHW_INIT 0x01 -+#define DRM_PSB_XHW 0x02 -+#define DRM_PSB_SCENE_UNREF 0x03 -+/* Controlling the kernel modesetting buffers */ -+#define DRM_PSB_KMS_OFF 0x04 -+#define DRM_PSB_KMS_ON 0x05 -+#define DRM_PSB_HW_INFO 0x06 -+ -+#define PSB_XHW_INIT 0x00 -+#define PSB_XHW_TAKEDOWN 0x01 -+ -+#define PSB_XHW_FIRE_RASTER 0x00 -+#define PSB_XHW_SCENE_INFO 0x01 -+#define PSB_XHW_SCENE_BIND_FIRE 0x02 -+#define PSB_XHW_TA_MEM_INFO 0x03 -+#define PSB_XHW_RESET_DPM 0x04 -+#define PSB_XHW_OOM 0x05 -+#define PSB_XHW_TERMINATE 0x06 -+#define PSB_XHW_VISTEST 0x07 -+#define PSB_XHW_RESUME 0x08 -+#define PSB_XHW_TA_MEM_LOAD 0x09 -+#define PSB_XHW_CHECK_LOCKUP 0x0a -+ -+#define PSB_SCENE_FLAG_DIRTY (1 << 0) -+#define PSB_SCENE_FLAG_COMPLETE (1 << 1) -+#define PSB_SCENE_FLAG_SETUP (1 << 2) -+#define PSB_SCENE_FLAG_SETUP_ONLY (1 << 3) -+#define PSB_SCENE_FLAG_CLEARED (1 << 4) -+ -+#define PSB_TA_MEM_FLAG_TA (1 << 0) -+#define PSB_TA_MEM_FLAG_RASTER (1 << 1) -+#define PSB_TA_MEM_FLAG_HOSTA (1 << 2) -+#define PSB_TA_MEM_FLAG_HOSTD (1 << 3) -+#define PSB_TA_MEM_FLAG_INIT (1 << 4) -+#define PSB_TA_MEM_FLAG_NEW_PT_OFFSET (1 << 5) -+ -+/*Raster fire will deallocate memory */ -+#define PSB_FIRE_FLAG_RASTER_DEALLOC (1 << 0) -+/*Isp reset needed due to change in ZLS format */ -+#define PSB_FIRE_FLAG_NEEDS_ISP_RESET (1 << 1) -+/*These are set by Xpsb. */ -+#define PSB_FIRE_FLAG_XHW_MASK 0xff000000 -+/*The task has had at least one OOM and Xpsb will -+ send back messages on each fire. */ -+#define PSB_FIRE_FLAG_XHW_OOM (1 << 24) -+ -+#define PSB_SCENE_ENGINE_TA 0 -+#define PSB_SCENE_ENGINE_RASTER 1 -+#define PSB_SCENE_NUM_ENGINES 2 -+ -+struct drm_psb_dev_info_arg { -+ uint32_t num_use_attribute_registers; -+}; -+#define DRM_PSB_DEVINFO 0x01 -+ -+#endif -diff -Nurp libdrm-2.3.0.16-0ubuntu1/shared-core/psb_reg.h libdrm-2.3.0.16-0ubuntu1-working/shared-core/psb_reg.h ---- libdrm-2.3.0.16-0ubuntu1/shared-core/psb_reg.h 1969-12-31 16:00:00.000000000 -0800 -+++ libdrm-2.3.0.16-0ubuntu1-working/shared-core/psb_reg.h 2008-06-30 11:00:05.000000000 -0700 -@@ -0,0 +1,562 @@ -+/************************************************************************** -+ * -+ * Copyright (c) (2005-2007) Imagination Technologies Limited. -+ * Copyright (c) 2007, Intel Corporation. -+ * All Rights Reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms and conditions of the GNU General Public License, -+ * version 2, as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program; if not, write to the Free Software Foundation, Inc., -+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. -+ * -+ * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to -+ * develop this driver. -+ * -+ **************************************************************************/ -+/* -+ */ -+#ifndef _PSB_REG_H_ -+#define _PSB_REG_H_ -+ -+#define PSB_CR_CLKGATECTL 0x0000 -+#define _PSB_C_CLKGATECTL_AUTO_MAN_REG (1 << 24) -+#define _PSB_C_CLKGATECTL_USE_CLKG_SHIFT (20) -+#define _PSB_C_CLKGATECTL_USE_CLKG_MASK (0x3 << 20) -+#define _PSB_C_CLKGATECTL_DPM_CLKG_SHIFT (16) -+#define _PSB_C_CLKGATECTL_DPM_CLKG_MASK (0x3 << 16) -+#define _PSB_C_CLKGATECTL_TA_CLKG_SHIFT (12) -+#define _PSB_C_CLKGATECTL_TA_CLKG_MASK (0x3 << 12) -+#define _PSB_C_CLKGATECTL_TSP_CLKG_SHIFT (8) -+#define _PSB_C_CLKGATECTL_TSP_CLKG_MASK (0x3 << 8) -+#define _PSB_C_CLKGATECTL_ISP_CLKG_SHIFT (4) -+#define _PSB_C_CLKGATECTL_ISP_CLKG_MASK (0x3 << 4) -+#define _PSB_C_CLKGATECTL_2D_CLKG_SHIFT (0) -+#define _PSB_C_CLKGATECTL_2D_CLKG_MASK (0x3 << 0) -+#define _PSB_C_CLKGATECTL_CLKG_ENABLED (0) -+#define _PSB_C_CLKGATECTL_CLKG_DISABLED (1) -+#define _PSB_C_CLKGATECTL_CLKG_AUTO (2) -+ -+#define PSB_CR_CORE_ID 0x0010 -+#define _PSB_CC_ID_ID_SHIFT (16) -+#define _PSB_CC_ID_ID_MASK (0xFFFF << 16) -+#define _PSB_CC_ID_CONFIG_SHIFT (0) -+#define _PSB_CC_ID_CONFIG_MASK (0xFFFF << 0) -+ -+#define PSB_CR_CORE_REVISION 0x0014 -+#define _PSB_CC_REVISION_DESIGNER_SHIFT (24) -+#define _PSB_CC_REVISION_DESIGNER_MASK (0xFF << 24) -+#define _PSB_CC_REVISION_MAJOR_SHIFT (16) -+#define _PSB_CC_REVISION_MAJOR_MASK (0xFF << 16) -+#define _PSB_CC_REVISION_MINOR_SHIFT (8) -+#define _PSB_CC_REVISION_MINOR_MASK (0xFF << 8) -+#define _PSB_CC_REVISION_MAINTENANCE_SHIFT (0) -+#define _PSB_CC_REVISION_MAINTENANCE_MASK (0xFF << 0) -+ -+#define PSB_CR_DESIGNER_REV_FIELD1 0x0018 -+ -+#define PSB_CR_SOFT_RESET 0x0080 -+#define _PSB_CS_RESET_TSP_RESET (1 << 6) -+#define _PSB_CS_RESET_ISP_RESET (1 << 5) -+#define _PSB_CS_RESET_USE_RESET (1 << 4) -+#define _PSB_CS_RESET_TA_RESET (1 << 3) -+#define _PSB_CS_RESET_DPM_RESET (1 << 2) -+#define _PSB_CS_RESET_TWOD_RESET (1 << 1) -+#define _PSB_CS_RESET_BIF_RESET (1 << 0) -+ -+#define PSB_CR_DESIGNER_REV_FIELD2 0x001C -+ -+#define PSB_CR_EVENT_HOST_ENABLE2 0x0110 -+ -+#define PSB_CR_EVENT_STATUS2 0x0118 -+ -+#define PSB_CR_EVENT_HOST_CLEAR2 0x0114 -+#define _PSB_CE2_BIF_REQUESTER_FAULT (1 << 4) -+ -+#define PSB_CR_EVENT_STATUS 0x012C -+ -+#define PSB_CR_EVENT_HOST_ENABLE 0x0130 -+ -+#define PSB_CR_EVENT_HOST_CLEAR 0x0134 -+#define _PSB_CE_MASTER_INTERRUPT (1 << 31) -+#define _PSB_CE_TA_DPM_FAULT (1 << 28) -+#define _PSB_CE_TWOD_COMPLETE (1 << 27) -+#define _PSB_CE_DPM_OUT_OF_MEMORY_ZLS (1 << 25) -+#define _PSB_CE_DPM_TA_MEM_FREE (1 << 24) -+#define _PSB_CE_PIXELBE_END_RENDER (1 << 18) -+#define _PSB_CE_SW_EVENT (1 << 14) -+#define _PSB_CE_TA_FINISHED (1 << 13) -+#define _PSB_CE_TA_TERMINATE (1 << 12) -+#define _PSB_CE_DPM_REACHED_MEM_THRESH (1 << 3) -+#define _PSB_CE_DPM_OUT_OF_MEMORY_GBL (1 << 2) -+#define _PSB_CE_DPM_OUT_OF_MEMORY_MT (1 << 1) -+#define _PSB_CE_DPM_3D_MEM_FREE (1 << 0) -+ -+ -+#define PSB_USE_OFFSET_MASK 0x0007FFFF -+#define PSB_USE_OFFSET_SIZE (PSB_USE_OFFSET_MASK + 1) -+#define PSB_CR_USE_CODE_BASE0 0x0A0C -+#define PSB_CR_USE_CODE_BASE1 0x0A10 -+#define PSB_CR_USE_CODE_BASE2 0x0A14 -+#define PSB_CR_USE_CODE_BASE3 0x0A18 -+#define PSB_CR_USE_CODE_BASE4 0x0A1C -+#define PSB_CR_USE_CODE_BASE5 0x0A20 -+#define PSB_CR_USE_CODE_BASE6 0x0A24 -+#define PSB_CR_USE_CODE_BASE7 0x0A28 -+#define PSB_CR_USE_CODE_BASE8 0x0A2C -+#define PSB_CR_USE_CODE_BASE9 0x0A30 -+#define PSB_CR_USE_CODE_BASE10 0x0A34 -+#define PSB_CR_USE_CODE_BASE11 0x0A38 -+#define PSB_CR_USE_CODE_BASE12 0x0A3C -+#define PSB_CR_USE_CODE_BASE13 0x0A40 -+#define PSB_CR_USE_CODE_BASE14 0x0A44 -+#define PSB_CR_USE_CODE_BASE15 0x0A48 -+#define PSB_CR_USE_CODE_BASE(_i) (0x0A0C + ((_i) << 2)) -+#define _PSB_CUC_BASE_DM_SHIFT (25) -+#define _PSB_CUC_BASE_DM_MASK (0x3 << 25) -+#define _PSB_CUC_BASE_ADDR_SHIFT (0) // 1024-bit aligned address? -+#define _PSB_CUC_BASE_ADDR_ALIGNSHIFT (7) -+#define _PSB_CUC_BASE_ADDR_MASK (0x1FFFFFF << 0) -+#define _PSB_CUC_DM_VERTEX (0) -+#define _PSB_CUC_DM_PIXEL (1) -+#define _PSB_CUC_DM_RESERVED (2) -+#define _PSB_CUC_DM_EDM (3) -+ -+#define PSB_CR_PDS_EXEC_BASE 0x0AB8 -+#define _PSB_CR_PDS_EXEC_BASE_ADDR_SHIFT (20) // 1MB aligned address -+#define _PSB_CR_PDS_EXEC_BASE_ADDR_ALIGNSHIFT (20) -+ -+#define PSB_CR_EVENT_KICKER 0x0AC4 -+#define _PSB_CE_KICKER_ADDRESS_SHIFT (4) // 128-bit aligned address -+ -+#define PSB_CR_EVENT_KICK 0x0AC8 -+#define _PSB_CE_KICK_NOW (1 << 0) -+ -+ -+#define PSB_CR_BIF_DIR_LIST_BASE1 0x0C38 -+ -+#define PSB_CR_BIF_CTRL 0x0C00 -+#define _PSB_CB_CTRL_CLEAR_FAULT (1 << 4) -+#define _PSB_CB_CTRL_INVALDC (1 << 3) -+#define _PSB_CB_CTRL_FLUSH (1 << 2) -+ -+#define PSB_CR_BIF_INT_STAT 0x0C04 -+ -+#define PSB_CR_BIF_FAULT 0x0C08 -+#define _PSB_CBI_STAT_PF_N_RW (1 << 14) -+#define _PSB_CBI_STAT_FAULT_SHIFT (0) -+#define _PSB_CBI_STAT_FAULT_MASK (0x3FFF << 0) -+#define _PSB_CBI_STAT_FAULT_CACHE (1 << 1) -+#define _PSB_CBI_STAT_FAULT_TA (1 << 2) -+#define _PSB_CBI_STAT_FAULT_VDM (1 << 3) -+#define _PSB_CBI_STAT_FAULT_2D (1 << 4) -+#define _PSB_CBI_STAT_FAULT_PBE (1 << 5) -+#define _PSB_CBI_STAT_FAULT_TSP (1 << 6) -+#define _PSB_CBI_STAT_FAULT_ISP (1 << 7) -+#define _PSB_CBI_STAT_FAULT_USSEPDS (1 << 8) -+#define _PSB_CBI_STAT_FAULT_HOST (1 << 9) -+ -+#define PSB_CR_BIF_BANK0 0x0C78 -+ -+#define PSB_CR_BIF_BANK1 0x0C7C -+ -+#define PSB_CR_BIF_DIR_LIST_BASE0 0x0C84 -+ -+#define PSB_CR_BIF_TWOD_REQ_BASE 0x0C88 -+#define PSB_CR_BIF_3D_REQ_BASE 0x0CAC -+ -+#define PSB_CR_2D_SOCIF 0x0E18 -+#define _PSB_C2_SOCIF_FREESPACE_SHIFT (0) -+#define _PSB_C2_SOCIF_FREESPACE_MASK (0xFF << 0) -+#define _PSB_C2_SOCIF_EMPTY (0x80 << 0) -+ -+#define PSB_CR_2D_BLIT_STATUS 0x0E04 -+#define _PSB_C2B_STATUS_BUSY (1 << 24) -+#define _PSB_C2B_STATUS_COMPLETE_SHIFT (0) -+#define _PSB_C2B_STATUS_COMPLETE_MASK (0xFFFFFF << 0) -+ -+/* -+ * 2D defs. -+ */ -+ -+/* -+ * 2D Slave Port Data : Block Header's Object Type -+ */ -+ -+#define PSB_2D_CLIP_BH (0x00000000) -+#define PSB_2D_PAT_BH (0x10000000) -+#define PSB_2D_CTRL_BH (0x20000000) -+#define PSB_2D_SRC_OFF_BH (0x30000000) -+#define PSB_2D_MASK_OFF_BH (0x40000000) -+#define PSB_2D_RESERVED1_BH (0x50000000) -+#define PSB_2D_RESERVED2_BH (0x60000000) -+#define PSB_2D_FENCE_BH (0x70000000) -+#define PSB_2D_BLIT_BH (0x80000000) -+#define PSB_2D_SRC_SURF_BH (0x90000000) -+#define PSB_2D_DST_SURF_BH (0xA0000000) -+#define PSB_2D_PAT_SURF_BH (0xB0000000) -+#define PSB_2D_SRC_PAL_BH (0xC0000000) -+#define PSB_2D_PAT_PAL_BH (0xD0000000) -+#define PSB_2D_MASK_SURF_BH (0xE0000000) -+#define PSB_2D_FLUSH_BH (0xF0000000) -+ -+/* -+ * Clip Definition block (PSB_2D_CLIP_BH) -+ */ -+#define PSB_2D_CLIPCOUNT_MAX (1) -+#define PSB_2D_CLIPCOUNT_MASK (0x00000000) -+#define PSB_2D_CLIPCOUNT_CLRMASK (0xFFFFFFFF) -+#define PSB_2D_CLIPCOUNT_SHIFT (0) -+// clip rectangle min & max -+#define PSB_2D_CLIP_XMAX_MASK (0x00FFF000) -+#define PSB_2D_CLIP_XMAX_CLRMASK (0xFF000FFF) -+#define PSB_2D_CLIP_XMAX_SHIFT (12) -+#define PSB_2D_CLIP_XMIN_MASK (0x00000FFF) -+#define PSB_2D_CLIP_XMIN_CLRMASK (0x00FFF000) -+#define PSB_2D_CLIP_XMIN_SHIFT (0) -+// clip rectangle offset -+#define PSB_2D_CLIP_YMAX_MASK (0x00FFF000) -+#define PSB_2D_CLIP_YMAX_CLRMASK (0xFF000FFF) -+#define PSB_2D_CLIP_YMAX_SHIFT (12) -+#define PSB_2D_CLIP_YMIN_MASK (0x00000FFF) -+#define PSB_2D_CLIP_YMIN_CLRMASK (0x00FFF000) -+#define PSB_2D_CLIP_YMIN_SHIFT (0) -+ -+/* -+ * Pattern Control (PSB_2D_PAT_BH) -+ */ -+#define PSB_2D_PAT_HEIGHT_MASK (0x0000001F) -+#define PSB_2D_PAT_HEIGHT_SHIFT (0) -+#define PSB_2D_PAT_WIDTH_MASK (0x000003E0) -+#define PSB_2D_PAT_WIDTH_SHIFT (5) -+#define PSB_2D_PAT_YSTART_MASK (0x00007C00) -+#define PSB_2D_PAT_YSTART_SHIFT (10) -+#define PSB_2D_PAT_XSTART_MASK (0x000F8000) -+#define PSB_2D_PAT_XSTART_SHIFT (15) -+ -+/* -+ * 2D Control block (PSB_2D_CTRL_BH) -+ */ -+// Present Flags -+#define PSB_2D_SRCCK_CTRL (0x00000001) -+#define PSB_2D_DSTCK_CTRL (0x00000002) -+#define PSB_2D_ALPHA_CTRL (0x00000004) -+// Colour Key Colour (SRC/DST) -+#define PSB_2D_CK_COL_MASK (0xFFFFFFFF) -+#define PSB_2D_CK_COL_CLRMASK (0x00000000) -+#define PSB_2D_CK_COL_SHIFT (0) -+// Colour Key Mask (SRC/DST) -+#define PSB_2D_CK_MASK_MASK (0xFFFFFFFF) -+#define PSB_2D_CK_MASK_CLRMASK (0x00000000) -+#define PSB_2D_CK_MASK_SHIFT (0) -+// Alpha Control (Alpha/RGB) -+#define PSB_2D_GBLALPHA_MASK (0x000FF000) -+#define PSB_2D_GBLALPHA_CLRMASK (0xFFF00FFF) -+#define PSB_2D_GBLALPHA_SHIFT (12) -+#define PSB_2D_SRCALPHA_OP_MASK (0x00700000) -+#define PSB_2D_SRCALPHA_OP_CLRMASK (0xFF8FFFFF) -+#define PSB_2D_SRCALPHA_OP_SHIFT (20) -+#define PSB_2D_SRCALPHA_OP_ONE (0x00000000) -+#define PSB_2D_SRCALPHA_OP_SRC (0x00100000) -+#define PSB_2D_SRCALPHA_OP_DST (0x00200000) -+#define PSB_2D_SRCALPHA_OP_SG (0x00300000) -+#define PSB_2D_SRCALPHA_OP_DG (0x00400000) -+#define PSB_2D_SRCALPHA_OP_GBL (0x00500000) -+#define PSB_2D_SRCALPHA_OP_ZERO (0x00600000) -+#define PSB_2D_SRCALPHA_INVERT (0x00800000) -+#define PSB_2D_SRCALPHA_INVERT_CLR (0xFF7FFFFF) -+#define PSB_2D_DSTALPHA_OP_MASK (0x07000000) -+#define PSB_2D_DSTALPHA_OP_CLRMASK (0xF8FFFFFF) -+#define PSB_2D_DSTALPHA_OP_SHIFT (24) -+#define PSB_2D_DSTALPHA_OP_ONE (0x00000000) -+#define PSB_2D_DSTALPHA_OP_SRC (0x01000000) -+#define PSB_2D_DSTALPHA_OP_DST (0x02000000) -+#define PSB_2D_DSTALPHA_OP_SG (0x03000000) -+#define PSB_2D_DSTALPHA_OP_DG (0x04000000) -+#define PSB_2D_DSTALPHA_OP_GBL (0x05000000) -+#define PSB_2D_DSTALPHA_OP_ZERO (0x06000000) -+#define PSB_2D_DSTALPHA_INVERT (0x08000000) -+#define PSB_2D_DSTALPHA_INVERT_CLR (0xF7FFFFFF) -+ -+#define PSB_2D_PRE_MULTIPLICATION_ENABLE (0x10000000) -+#define PSB_2D_PRE_MULTIPLICATION_CLRMASK (0xEFFFFFFF) -+#define PSB_2D_ZERO_SOURCE_ALPHA_ENABLE (0x20000000) -+#define PSB_2D_ZERO_SOURCE_ALPHA_CLRMASK (0xDFFFFFFF) -+ -+/* -+ *Source Offset (PSB_2D_SRC_OFF_BH) -+ */ -+#define PSB_2D_SRCOFF_XSTART_MASK ((0x00000FFF) << 12) -+#define PSB_2D_SRCOFF_XSTART_SHIFT (12) -+#define PSB_2D_SRCOFF_YSTART_MASK (0x00000FFF) -+#define PSB_2D_SRCOFF_YSTART_SHIFT (0) -+ -+/* -+ * Mask Offset (PSB_2D_MASK_OFF_BH) -+ */ -+#define PSB_2D_MASKOFF_XSTART_MASK ((0x00000FFF) << 12) -+#define PSB_2D_MASKOFF_XSTART_SHIFT (12) -+#define PSB_2D_MASKOFF_YSTART_MASK (0x00000FFF) -+#define PSB_2D_MASKOFF_YSTART_SHIFT (0) -+ -+/* -+ * 2D Fence (see PSB_2D_FENCE_BH): bits 0:27 are ignored -+ */ -+ -+/* -+ *Blit Rectangle (PSB_2D_BLIT_BH) -+ */ -+ -+#define PSB_2D_ROT_MASK (3<<25) -+#define PSB_2D_ROT_CLRMASK (~PSB_2D_ROT_MASK) -+#define PSB_2D_ROT_NONE (0<<25) -+#define PSB_2D_ROT_90DEGS (1<<25) -+#define PSB_2D_ROT_180DEGS (2<<25) -+#define PSB_2D_ROT_270DEGS (3<<25) -+ -+#define PSB_2D_COPYORDER_MASK (3<<23) -+#define PSB_2D_COPYORDER_CLRMASK (~PSB_2D_COPYORDER_MASK) -+#define PSB_2D_COPYORDER_TL2BR (0<<23) -+#define PSB_2D_COPYORDER_BR2TL (1<<23) -+#define PSB_2D_COPYORDER_TR2BL (2<<23) -+#define PSB_2D_COPYORDER_BL2TR (3<<23) -+ -+#define PSB_2D_DSTCK_CLRMASK (0xFF9FFFFF) -+#define PSB_2D_DSTCK_DISABLE (0x00000000) -+#define PSB_2D_DSTCK_PASS (0x00200000) -+#define PSB_2D_DSTCK_REJECT (0x00400000) -+ -+#define PSB_2D_SRCCK_CLRMASK (0xFFE7FFFF) -+#define PSB_2D_SRCCK_DISABLE (0x00000000) -+#define PSB_2D_SRCCK_PASS (0x00080000) -+#define PSB_2D_SRCCK_REJECT (0x00100000) -+ -+#define PSB_2D_CLIP_ENABLE (0x00040000) -+ -+#define PSB_2D_ALPHA_ENABLE (0x00020000) -+ -+#define PSB_2D_PAT_CLRMASK (0xFFFEFFFF) -+#define PSB_2D_PAT_MASK (0x00010000) -+#define PSB_2D_USE_PAT (0x00010000) -+#define PSB_2D_USE_FILL (0x00000000) -+/* -+ * Tungsten Graphics note on rop codes: If rop A and rop B are -+ * identical, the mask surface will not be read and need not be -+ * set up. -+ */ -+ -+#define PSB_2D_ROP3B_MASK (0x0000FF00) -+#define PSB_2D_ROP3B_CLRMASK (0xFFFF00FF) -+#define PSB_2D_ROP3B_SHIFT (8) -+// rop code A -+#define PSB_2D_ROP3A_MASK (0x000000FF) -+#define PSB_2D_ROP3A_CLRMASK (0xFFFFFF00) -+#define PSB_2D_ROP3A_SHIFT (0) -+ -+#define PSB_2D_ROP4_MASK (0x0000FFFF) -+/* -+ * DWORD0: (Only pass if Pattern control == Use Fill Colour) -+ * Fill Colour RGBA8888 -+ */ -+#define PSB_2D_FILLCOLOUR_MASK (0xFFFFFFFF) -+#define PSB_2D_FILLCOLOUR_SHIFT (0) -+/* -+ * DWORD1: (Always Present) -+ * X Start (Dest) -+ * Y Start (Dest) -+ */ -+#define PSB_2D_DST_XSTART_MASK (0x00FFF000) -+#define PSB_2D_DST_XSTART_CLRMASK (0xFF000FFF) -+#define PSB_2D_DST_XSTART_SHIFT (12) -+#define PSB_2D_DST_YSTART_MASK (0x00000FFF) -+#define PSB_2D_DST_YSTART_CLRMASK (0xFFFFF000) -+#define PSB_2D_DST_YSTART_SHIFT (0) -+/* -+ * DWORD2: (Always Present) -+ * X Size (Dest) -+ * Y Size (Dest) -+ */ -+#define PSB_2D_DST_XSIZE_MASK (0x00FFF000) -+#define PSB_2D_DST_XSIZE_CLRMASK (0xFF000FFF) -+#define PSB_2D_DST_XSIZE_SHIFT (12) -+#define PSB_2D_DST_YSIZE_MASK (0x00000FFF) -+#define PSB_2D_DST_YSIZE_CLRMASK (0xFFFFF000) -+#define PSB_2D_DST_YSIZE_SHIFT (0) -+ -+/* -+ * Source Surface (PSB_2D_SRC_SURF_BH) -+ */ -+/* -+ * WORD 0 -+ */ -+ -+#define PSB_2D_SRC_FORMAT_MASK (0x00078000) -+#define PSB_2D_SRC_1_PAL (0x00000000) -+#define PSB_2D_SRC_2_PAL (0x00008000) -+#define PSB_2D_SRC_4_PAL (0x00010000) -+#define PSB_2D_SRC_8_PAL (0x00018000) -+#define PSB_2D_SRC_8_ALPHA (0x00020000) -+#define PSB_2D_SRC_4_ALPHA (0x00028000) -+#define PSB_2D_SRC_332RGB (0x00030000) -+#define PSB_2D_SRC_4444ARGB (0x00038000) -+#define PSB_2D_SRC_555RGB (0x00040000) -+#define PSB_2D_SRC_1555ARGB (0x00048000) -+#define PSB_2D_SRC_565RGB (0x00050000) -+#define PSB_2D_SRC_0888ARGB (0x00058000) -+#define PSB_2D_SRC_8888ARGB (0x00060000) -+#define PSB_2D_SRC_8888UYVY (0x00068000) -+#define PSB_2D_SRC_RESERVED (0x00070000) -+#define PSB_2D_SRC_1555ARGB_LOOKUP (0x00078000) -+ -+ -+#define PSB_2D_SRC_STRIDE_MASK (0x00007FFF) -+#define PSB_2D_SRC_STRIDE_CLRMASK (0xFFFF8000) -+#define PSB_2D_SRC_STRIDE_SHIFT (0) -+/* -+ * WORD 1 - Base Address -+ */ -+#define PSB_2D_SRC_ADDR_MASK (0x0FFFFFFC) -+#define PSB_2D_SRC_ADDR_CLRMASK (0x00000003) -+#define PSB_2D_SRC_ADDR_SHIFT (2) -+#define PSB_2D_SRC_ADDR_ALIGNSHIFT (2) -+ -+/* -+ * Pattern Surface (PSB_2D_PAT_SURF_BH) -+ */ -+/* -+ * WORD 0 -+ */ -+ -+#define PSB_2D_PAT_FORMAT_MASK (0x00078000) -+#define PSB_2D_PAT_1_PAL (0x00000000) -+#define PSB_2D_PAT_2_PAL (0x00008000) -+#define PSB_2D_PAT_4_PAL (0x00010000) -+#define PSB_2D_PAT_8_PAL (0x00018000) -+#define PSB_2D_PAT_8_ALPHA (0x00020000) -+#define PSB_2D_PAT_4_ALPHA (0x00028000) -+#define PSB_2D_PAT_332RGB (0x00030000) -+#define PSB_2D_PAT_4444ARGB (0x00038000) -+#define PSB_2D_PAT_555RGB (0x00040000) -+#define PSB_2D_PAT_1555ARGB (0x00048000) -+#define PSB_2D_PAT_565RGB (0x00050000) -+#define PSB_2D_PAT_0888ARGB (0x00058000) -+#define PSB_2D_PAT_8888ARGB (0x00060000) -+ -+#define PSB_2D_PAT_STRIDE_MASK (0x00007FFF) -+#define PSB_2D_PAT_STRIDE_CLRMASK (0xFFFF8000) -+#define PSB_2D_PAT_STRIDE_SHIFT (0) -+/* -+ * WORD 1 - Base Address -+ */ -+#define PSB_2D_PAT_ADDR_MASK (0x0FFFFFFC) -+#define PSB_2D_PAT_ADDR_CLRMASK (0x00000003) -+#define PSB_2D_PAT_ADDR_SHIFT (2) -+#define PSB_2D_PAT_ADDR_ALIGNSHIFT (2) -+ -+/* -+ * Destination Surface (PSB_2D_DST_SURF_BH) -+ */ -+/* -+ * WORD 0 -+ */ -+ -+#define PSB_2D_DST_FORMAT_MASK (0x00078000) -+#define PSB_2D_DST_332RGB (0x00030000) -+#define PSB_2D_DST_4444ARGB (0x00038000) -+#define PSB_2D_DST_555RGB (0x00040000) -+#define PSB_2D_DST_1555ARGB (0x00048000) -+#define PSB_2D_DST_565RGB (0x00050000) -+#define PSB_2D_DST_0888ARGB (0x00058000) -+#define PSB_2D_DST_8888ARGB (0x00060000) -+#define PSB_2D_DST_8888AYUV (0x00070000) -+ -+#define PSB_2D_DST_STRIDE_MASK (0x00007FFF) -+#define PSB_2D_DST_STRIDE_CLRMASK (0xFFFF8000) -+#define PSB_2D_DST_STRIDE_SHIFT (0) -+/* -+ * WORD 1 - Base Address -+ */ -+#define PSB_2D_DST_ADDR_MASK (0x0FFFFFFC) -+#define PSB_2D_DST_ADDR_CLRMASK (0x00000003) -+#define PSB_2D_DST_ADDR_SHIFT (2) -+#define PSB_2D_DST_ADDR_ALIGNSHIFT (2) -+ -+/* -+ * Mask Surface (PSB_2D_MASK_SURF_BH) -+ */ -+/* -+ * WORD 0 -+ */ -+#define PSB_2D_MASK_STRIDE_MASK (0x00007FFF) -+#define PSB_2D_MASK_STRIDE_CLRMASK (0xFFFF8000) -+#define PSB_2D_MASK_STRIDE_SHIFT (0) -+/* -+ * WORD 1 - Base Address -+ */ -+#define PSB_2D_MASK_ADDR_MASK (0x0FFFFFFC) -+#define PSB_2D_MASK_ADDR_CLRMASK (0x00000003) -+#define PSB_2D_MASK_ADDR_SHIFT (2) -+#define PSB_2D_MASK_ADDR_ALIGNSHIFT (2) -+ -+/* -+ * Source Palette (PSB_2D_SRC_PAL_BH) -+ */ -+ -+#define PSB_2D_SRCPAL_ADDR_SHIFT (0) -+#define PSB_2D_SRCPAL_ADDR_CLRMASK (0xF0000007) -+#define PSB_2D_SRCPAL_ADDR_MASK (0x0FFFFFF8) -+#define PSB_2D_SRCPAL_BYTEALIGN (1024) -+ -+/* -+ * Pattern Palette (PSB_2D_PAT_PAL_BH) -+ */ -+ -+#define PSB_2D_PATPAL_ADDR_SHIFT (0) -+#define PSB_2D_PATPAL_ADDR_CLRMASK (0xF0000007) -+#define PSB_2D_PATPAL_ADDR_MASK (0x0FFFFFF8) -+#define PSB_2D_PATPAL_BYTEALIGN (1024) -+ -+/* -+ * Rop3 Codes (2 LS bytes) -+ */ -+ -+#define PSB_2D_ROP3_SRCCOPY (0xCCCC) -+#define PSB_2D_ROP3_PATCOPY (0xF0F0) -+#define PSB_2D_ROP3_WHITENESS (0xFFFF) -+#define PSB_2D_ROP3_BLACKNESS (0x0000) -+#define PSB_2D_ROP3_SRC (0xCC) -+#define PSB_2D_ROP3_PAT (0xF0) -+#define PSB_2D_ROP3_DST (0xAA) -+ -+ -+/* -+ * Sizes. -+ */ -+ -+#define PSB_SCENE_HW_COOKIE_SIZE 16 -+#define PSB_TA_MEM_HW_COOKIE_SIZE 16 -+ -+/* -+ * Scene stuff. -+ */ -+ -+#define PSB_NUM_HW_SCENES 2 -+ -+/* -+ * Scheduler completion actions. -+ */ -+ -+#define PSB_RASTER_BLOCK 0 -+#define PSB_RASTER 1 -+#define PSB_RETURN 2 -+#define PSB_TA 3 -+ -+ -+#endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/patches/series /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/patches/series --- libdrm-2.3.0.16/debian/patches/series 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/patches/series 2009-04-20 07:00:29.000000000 +0100 @@ -1 +1 @@ -01_psb_headers.patch +01_default_perms.diff diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/debian/rules /tmp/5JEwQoyJ2h/libdrm-2.3.1/debian/rules --- libdrm-2.3.0.16/debian/rules 2009-04-20 07:00:28.000000000 +0100 +++ libdrm-2.3.1/debian/rules 2009-04-20 07:00:29.000000000 +0100 @@ -63,7 +63,7 @@ binary-arch: build install dh_testdir dh_testroot - dh_installchangelogs + dh_installchangelogs ChangeLog dh_installdocs dh_installexamples dh_install --sourcedir=debian/tmp -Xlibdrm.la --list-missing diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/depcomp /tmp/5JEwQoyJ2h/libdrm-2.3.1/depcomp --- libdrm-2.3.0.16/depcomp 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/depcomp 2008-07-01 08:55:48.000000000 +0100 @@ -1,9 +1,10 @@ #! /bin/sh # depcomp - compile a program generating dependencies as side-effects -scriptversion=2005-07-09.11 +scriptversion=2007-03-29.01 -# Copyright (C) 1999, 2000, 2003, 2004, 2005 Free Software Foundation, Inc. +# Copyright (C) 1999, 2000, 2003, 2004, 2005, 2006, 2007 Free Software +# Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -91,7 +92,20 @@ ## gcc 3 implements dependency tracking that does exactly what ## we want. Yay! Note: for some reason libtool 1.4 doesn't like ## it if -MD -MP comes after the -MF stuff. Hmm. - "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" +## Unfortunately, FreeBSD c89 acceptance of flags depends upon +## the command line argument order; so add the flags where they +## appear in depend2.am. Note that the slowdown incurred here +## affects only configure: in makefiles, %FASTDEP% shortcuts this. + for arg + do + case $arg in + -c) set fnord "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" "$arg" ;; + *) set fnord "$@" "$arg" ;; + esac + shift # fnord + shift # $arg + done + "$@" stat=$? if test $stat -eq 0; then : else @@ -201,34 +215,39 @@ # current directory. Also, the AIX compiler puts `$object:' at the # start of each line; $object doesn't have directory information. # Version 6 uses the directory in both cases. - stripped=`echo "$object" | sed 's/\(.*\)\..*$/\1/'` - tmpdepfile="$stripped.u" + dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` + test "x$dir" = "x$object" && dir= + base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` if test "$libtool" = yes; then + tmpdepfile1=$dir$base.u + tmpdepfile2=$base.u + tmpdepfile3=$dir.libs/$base.u "$@" -Wc,-M else + tmpdepfile1=$dir$base.u + tmpdepfile2=$dir$base.u + tmpdepfile3=$dir$base.u "$@" -M fi stat=$? - if test -f "$tmpdepfile"; then : - else - stripped=`echo "$stripped" | sed 's,^.*/,,'` - tmpdepfile="$stripped.u" - fi - if test $stat -eq 0; then : else - rm -f "$tmpdepfile" + rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" exit $stat fi + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + do + test -f "$tmpdepfile" && break + done if test -f "$tmpdepfile"; then - outname="$stripped.o" # Each line is of the form `foo.o: dependent.h'. # Do two passes, one to just change these to # `$object: dependent.h' and one to simply `dependent.h:'. - sed -e "s,^$outname:,$object :," < "$tmpdepfile" > "$depfile" - sed -e "s,^$outname: \(.*\)$,\1:," < "$tmpdepfile" >> "$depfile" + sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile" + # That's a tab and a space in the []. + sed -e 's,^.*\.[a-z]*:[ ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile" else # The sourcefile does not contain any dependencies, so just # store a dummy comment line, to avoid errors with the Makefile @@ -276,6 +295,46 @@ rm -f "$tmpdepfile" ;; +hp2) + # The "hp" stanza above does not work with aCC (C++) and HP's ia64 + # compilers, which have integrated preprocessors. The correct option + # to use with these is +Maked; it writes dependencies to a file named + # 'foo.d', which lands next to the object file, wherever that + # happens to be. + # Much of this is similar to the tru64 case; see comments there. + dir=`echo "$object" | sed -e 's|/[^/]*$|/|'` + test "x$dir" = "x$object" && dir= + base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'` + if test "$libtool" = yes; then + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir.libs/$base.d + "$@" -Wc,+Maked + else + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir$base.d + "$@" +Maked + fi + stat=$? + if test $stat -eq 0; then : + else + rm -f "$tmpdepfile1" "$tmpdepfile2" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" + do + test -f "$tmpdepfile" && break + done + if test -f "$tmpdepfile"; then + sed -e "s,^.*\.[a-z]*:,$object:," "$tmpdepfile" > "$depfile" + # Add `dependent.h:' lines. + sed -ne '2,${; s/^ *//; s/ \\*$//; s/$/:/; p;}' "$tmpdepfile" >> "$depfile" + else + echo "#dummy" > "$depfile" + fi + rm -f "$tmpdepfile" "$tmpdepfile2" + ;; + tru64) # The Tru64 compiler uses -MD to generate dependencies as a side # effect. `cc -MD -o foo.o ...' puts the dependencies into `foo.o.d'. @@ -288,13 +347,13 @@ if test "$libtool" = yes; then # With Tru64 cc, shared objects can also be used to make a - # static library. This mecanism is used in libtool 1.4 series to + # static library. This mechanism is used in libtool 1.4 series to # handle both shared and static libraries in a single compilation. # With libtool 1.4, dependencies were output in $dir.libs/$base.lo.d. # # With libtool 1.5 this exception was removed, and libtool now # generates 2 separate objects for the 2 libraries. These two - # compilations output dependencies in in $dir.libs/$base.o.d and + # compilations output dependencies in $dir.libs/$base.o.d and # in $dir$base.o.d. We have to check for both files, because # one of the two compilations can be disabled. We should prefer # $dir$base.o.d over $dir.libs/$base.o.d because the latter is diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/install-sh /tmp/5JEwQoyJ2h/libdrm-2.3.1/install-sh --- libdrm-2.3.0.16/install-sh 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/install-sh 2008-07-01 08:55:48.000000000 +0100 @@ -1,7 +1,7 @@ #!/bin/sh # install - install a program, script, or datafile -scriptversion=2005-05-14.22 +scriptversion=2006-12-25.00 # This originates from X11R5 (mit/util/scripts/install.sh), which was # later released in X11R6 (xc/config/util/install.sh) with the @@ -39,38 +39,68 @@ # when there is no Makefile. # # This script is compatible with the BSD install script, but was written -# from scratch. It can only install one file at a time, a restriction -# shared with many OS's install programs. +# from scratch. + +nl=' +' +IFS=" "" $nl" # set DOITPROG to echo to test this script # Don't use :- since 4.3BSD and earlier shells don't like it. -doit="${DOITPROG-}" +doit=${DOITPROG-} +if test -z "$doit"; then + doit_exec=exec +else + doit_exec=$doit +fi -# put in absolute paths if you don't have them in your path; or use env. vars. +# Put in absolute file names if you don't have them in your path; +# or use environment vars. -mvprog="${MVPROG-mv}" -cpprog="${CPPROG-cp}" -chmodprog="${CHMODPROG-chmod}" -chownprog="${CHOWNPROG-chown}" -chgrpprog="${CHGRPPROG-chgrp}" -stripprog="${STRIPPROG-strip}" -rmprog="${RMPROG-rm}" -mkdirprog="${MKDIRPROG-mkdir}" +chgrpprog=${CHGRPPROG-chgrp} +chmodprog=${CHMODPROG-chmod} +chownprog=${CHOWNPROG-chown} +cmpprog=${CMPPROG-cmp} +cpprog=${CPPROG-cp} +mkdirprog=${MKDIRPROG-mkdir} +mvprog=${MVPROG-mv} +rmprog=${RMPROG-rm} +stripprog=${STRIPPROG-strip} + +posix_glob='?' +initialize_posix_glob=' + test "$posix_glob" != "?" || { + if (set -f) 2>/dev/null; then + posix_glob= + else + posix_glob=: + fi + } +' + +posix_mkdir= + +# Desired mode of installed file. +mode=0755 -chmodcmd="$chmodprog 0755" -chowncmd= chgrpcmd= -stripcmd= +chmodcmd=$chmodprog +chowncmd= +mvcmd=$mvprog rmcmd="$rmprog -f" -mvcmd="$mvprog" +stripcmd= + src= dst= dir_arg= -dstarg= +dst_arg= + +copy_on_change=false no_target_directory= -usage="Usage: $0 [OPTION]... [-T] SRCFILE DSTFILE +usage="\ +Usage: $0 [OPTION]... [-T] SRCFILE DSTFILE or: $0 [OPTION]... SRCFILES... DIRECTORY or: $0 [OPTION]... -t DIRECTORY SRCFILES... or: $0 [OPTION]... -d DIRECTORIES... @@ -80,81 +110,86 @@ In the 4th, create DIRECTORIES. Options: --c (ignored) --d create directories instead of installing files. --g GROUP $chgrpprog installed files to GROUP. --m MODE $chmodprog installed files to MODE. --o USER $chownprog installed files to USER. --s $stripprog installed files. --t DIRECTORY install into DIRECTORY. --T report an error if DSTFILE is a directory. ---help display this help and exit. ---version display version info and exit. + --help display this help and exit. + --version display version info and exit. + + -c (ignored) + -C install only if different (preserve the last data modification time) + -d create directories instead of installing files. + -g GROUP $chgrpprog installed files to GROUP. + -m MODE $chmodprog installed files to MODE. + -o USER $chownprog installed files to USER. + -s $stripprog installed files. + -t DIRECTORY install into DIRECTORY. + -T report an error if DSTFILE is a directory. Environment variables override the default commands: - CHGRPPROG CHMODPROG CHOWNPROG CPPROG MKDIRPROG MVPROG RMPROG STRIPPROG + CHGRPPROG CHMODPROG CHOWNPROG CMPPROG CPPROG MKDIRPROG MVPROG + RMPROG STRIPPROG " -while test -n "$1"; do +while test $# -ne 0; do case $1 in - -c) shift - continue;; + -c) ;; - -d) dir_arg=true - shift - continue;; + -C) copy_on_change=true;; + + -d) dir_arg=true;; -g) chgrpcmd="$chgrpprog $2" - shift - shift - continue;; + shift;; --help) echo "$usage"; exit $?;; - -m) chmodcmd="$chmodprog $2" - shift - shift - continue;; + -m) mode=$2 + case $mode in + *' '* | *' '* | *' +'* | *'*'* | *'?'* | *'['*) + echo "$0: invalid mode: $mode" >&2 + exit 1;; + esac + shift;; -o) chowncmd="$chownprog $2" - shift - shift - continue;; - - -s) stripcmd=$stripprog - shift - continue;; - - -t) dstarg=$2 - shift - shift - continue;; - - -T) no_target_directory=true - shift - continue;; + shift;; + + -s) stripcmd=$stripprog;; + + -t) dst_arg=$2 + shift;; + + -T) no_target_directory=true;; --version) echo "$0 $scriptversion"; exit $?;; - *) # When -d is used, all remaining arguments are directories to create. - # When -t is used, the destination is already specified. - test -n "$dir_arg$dstarg" && break - # Otherwise, the last argument is the destination. Remove it from $@. - for arg - do - if test -n "$dstarg"; then - # $@ is not empty: it contains at least $arg. - set fnord "$@" "$dstarg" - shift # fnord - fi - shift # arg - dstarg=$arg - done + --) shift break;; + + -*) echo "$0: invalid option: $1" >&2 + exit 1;; + + *) break;; esac + shift done -if test -z "$1"; then +if test $# -ne 0 && test -z "$dir_arg$dst_arg"; then + # When -d is used, all remaining arguments are directories to create. + # When -t is used, the destination is already specified. + # Otherwise, the last argument is the destination. Remove it from $@. + for arg + do + if test -n "$dst_arg"; then + # $@ is not empty: it contains at least $arg. + set fnord "$@" "$dst_arg" + shift # fnord + fi + shift # arg + dst_arg=$arg + done +fi + +if test $# -eq 0; then if test -z "$dir_arg"; then echo "$0: no input file specified." >&2 exit 1 @@ -164,24 +199,47 @@ exit 0 fi +if test -z "$dir_arg"; then + trap '(exit $?); exit' 1 2 13 15 + + # Set umask so as not to create temps with too-generous modes. + # However, 'strip' requires both read and write access to temps. + case $mode in + # Optimize common cases. + *644) cp_umask=133;; + *755) cp_umask=22;; + + *[0-7]) + if test -z "$stripcmd"; then + u_plus_rw= + else + u_plus_rw='% 200' + fi + cp_umask=`expr '(' 777 - $mode % 1000 ')' $u_plus_rw`;; + *) + if test -z "$stripcmd"; then + u_plus_rw= + else + u_plus_rw=,u+rw + fi + cp_umask=$mode$u_plus_rw;; + esac +fi + for src do # Protect names starting with `-'. case $src in - -*) src=./$src ;; + -*) src=./$src;; esac if test -n "$dir_arg"; then dst=$src - src= - - if test -d "$dst"; then - mkdircmd=: - chmodcmd= - else - mkdircmd=$mkdirprog - fi + dstdir=$dst + test -d "$dstdir" + dstdir_status=$? else + # Waiting for this to be detected by the "$cpprog $src $dsttmp" command # might cause directories to be created, which would be especially bad # if $src (and thus $dsttmp) contains '*'. @@ -190,71 +248,199 @@ exit 1 fi - if test -z "$dstarg"; then + if test -z "$dst_arg"; then echo "$0: no destination specified." >&2 exit 1 fi - dst=$dstarg + dst=$dst_arg # Protect names starting with `-'. case $dst in - -*) dst=./$dst ;; + -*) dst=./$dst;; esac # If destination is a directory, append the input filename; won't work # if double slashes aren't ignored. if test -d "$dst"; then if test -n "$no_target_directory"; then - echo "$0: $dstarg: Is a directory" >&2 + echo "$0: $dst_arg: Is a directory" >&2 exit 1 fi - dst=$dst/`basename "$src"` + dstdir=$dst + dst=$dstdir/`basename "$src"` + dstdir_status=0 + else + # Prefer dirname, but fall back on a substitute if dirname fails. + dstdir=` + (dirname "$dst") 2>/dev/null || + expr X"$dst" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$dst" : 'X\(//\)[^/]' \| \ + X"$dst" : 'X\(//\)$' \| \ + X"$dst" : 'X\(/\)' \| . 2>/dev/null || + echo X"$dst" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q' + ` + + test -d "$dstdir" + dstdir_status=$? fi fi - # This sed command emulates the dirname command. - dstdir=`echo "$dst" | sed -e 's,/*$,,;s,[^/]*$,,;s,/*$,,;s,^$,.,'` - - # Make sure that the destination directory exists. + obsolete_mkdir_used=false - # Skip lots of stat calls in the usual case. - if test ! -d "$dstdir"; then - defaultIFS=' - ' - IFS="${IFS-$defaultIFS}" - - oIFS=$IFS - # Some sh's can't handle IFS=/ for some reason. - IFS='%' - set x `echo "$dstdir" | sed -e 's@/@%@g' -e 's@^%@/@'` - shift - IFS=$oIFS + if test $dstdir_status != 0; then + case $posix_mkdir in + '') + # Create intermediate dirs using mode 755 as modified by the umask. + # This is like FreeBSD 'install' as of 1997-10-28. + umask=`umask` + case $stripcmd.$umask in + # Optimize common cases. + *[2367][2367]) mkdir_umask=$umask;; + .*0[02][02] | .[02][02] | .[02]) mkdir_umask=22;; + + *[0-7]) + mkdir_umask=`expr $umask + 22 \ + - $umask % 100 % 40 + $umask % 20 \ + - $umask % 10 % 4 + $umask % 2 + `;; + *) mkdir_umask=$umask,go-w;; + esac + + # With -d, create the new directory with the user-specified mode. + # Otherwise, rely on $mkdir_umask. + if test -n "$dir_arg"; then + mkdir_mode=-m$mode + else + mkdir_mode= + fi + + posix_mkdir=false + case $umask in + *[123567][0-7][0-7]) + # POSIX mkdir -p sets u+wx bits regardless of umask, which + # is incompatible with FreeBSD 'install' when (umask & 300) != 0. + ;; + *) + tmpdir=${TMPDIR-/tmp}/ins$RANDOM-$$ + trap 'ret=$?; rmdir "$tmpdir/d" "$tmpdir" 2>/dev/null; exit $ret' 0 + + if (umask $mkdir_umask && + exec $mkdirprog $mkdir_mode -p -- "$tmpdir/d") >/dev/null 2>&1 + then + if test -z "$dir_arg" || { + # Check for POSIX incompatibilities with -m. + # HP-UX 11.23 and IRIX 6.5 mkdir -m -p sets group- or + # other-writeable bit of parent directory when it shouldn't. + # FreeBSD 6.1 mkdir -m -p sets mode of existing directory. + ls_ld_tmpdir=`ls -ld "$tmpdir"` + case $ls_ld_tmpdir in + d????-?r-*) different_mode=700;; + d????-?--*) different_mode=755;; + *) false;; + esac && + $mkdirprog -m$different_mode -p -- "$tmpdir" && { + ls_ld_tmpdir_1=`ls -ld "$tmpdir"` + test "$ls_ld_tmpdir" = "$ls_ld_tmpdir_1" + } + } + then posix_mkdir=: + fi + rmdir "$tmpdir/d" "$tmpdir" + else + # Remove any dirs left behind by ancient mkdir implementations. + rmdir ./$mkdir_mode ./-p ./-- 2>/dev/null + fi + trap '' 0;; + esac;; + esac - pathcomp= + if + $posix_mkdir && ( + umask $mkdir_umask && + $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir" + ) + then : + else - while test $# -ne 0 ; do - pathcomp=$pathcomp$1 + # The umask is ridiculous, or mkdir does not conform to POSIX, + # or it failed possibly due to a race condition. Create the + # directory the slow way, step by step, checking for races as we go. + + case $dstdir in + /*) prefix='/';; + -*) prefix='./';; + *) prefix='';; + esac + + eval "$initialize_posix_glob" + + oIFS=$IFS + IFS=/ + $posix_glob set -f + set fnord $dstdir shift - if test ! -d "$pathcomp"; then - $mkdirprog "$pathcomp" - # mkdir can fail with a `File exist' error in case several - # install-sh are creating the directory concurrently. This - # is OK. - test -d "$pathcomp" || exit + $posix_glob set +f + IFS=$oIFS + + prefixes= + + for d + do + test -z "$d" && continue + + prefix=$prefix$d + if test -d "$prefix"; then + prefixes= + else + if $posix_mkdir; then + (umask=$mkdir_umask && + $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir") && break + # Don't fail if two instances are running concurrently. + test -d "$prefix" || exit 1 + else + case $prefix in + *\'*) qprefix=`echo "$prefix" | sed "s/'/'\\\\\\\\''/g"`;; + *) qprefix=$prefix;; + esac + prefixes="$prefixes '$qprefix'" + fi + fi + prefix=$prefix/ + done + + if test -n "$prefixes"; then + # Don't fail if two instances are running concurrently. + (umask $mkdir_umask && + eval "\$doit_exec \$mkdirprog $prefixes") || + test -d "$dstdir" || exit 1 + obsolete_mkdir_used=true fi - pathcomp=$pathcomp/ - done + fi fi if test -n "$dir_arg"; then - $doit $mkdircmd "$dst" \ - && { test -z "$chowncmd" || $doit $chowncmd "$dst"; } \ - && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } \ - && { test -z "$stripcmd" || $doit $stripcmd "$dst"; } \ - && { test -z "$chmodcmd" || $doit $chmodcmd "$dst"; } - + { test -z "$chowncmd" || $doit $chowncmd "$dst"; } && + { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } && + { test "$obsolete_mkdir_used$chowncmd$chgrpcmd" = false || + test -z "$chmodcmd" || $doit $chmodcmd $mode "$dst"; } || exit 1 else - dstfile=`basename "$dst"` # Make a couple of temp file names in the proper directory. dsttmp=$dstdir/_inst.$$_ @@ -262,10 +448,9 @@ # Trap to clean up those temp files at exit. trap 'ret=$?; rm -f "$dsttmp" "$rmtmp" && exit $ret' 0 - trap '(exit $?); exit' 1 2 13 15 # Copy the file name to the temp name. - $doit $cpprog "$src" "$dsttmp" && + (umask $cp_umask && $doit_exec $cpprog "$src" "$dsttmp") && # and set any options; do chmod last to preserve setuid bits. # @@ -273,47 +458,58 @@ # ignore errors from any of these, just make sure not to ignore # errors from the above "$doit $cpprog $src $dsttmp" command. # - { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } \ - && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } \ - && { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } \ - && { test -z "$chmodcmd" || $doit $chmodcmd "$dsttmp"; } && - - # Now rename the file to the real destination. - { $doit $mvcmd -f "$dsttmp" "$dstdir/$dstfile" 2>/dev/null \ - || { - # The rename failed, perhaps because mv can't rename something else - # to itself, or perhaps because mv is so ancient that it does not - # support -f. - - # Now remove or move aside any old file at destination location. - # We try this two ways since rm can't unlink itself on some - # systems and the destination file might be busy for other - # reasons. In this case, the final cleanup might fail but the new - # file should still install successfully. - { - if test -f "$dstdir/$dstfile"; then - $doit $rmcmd -f "$dstdir/$dstfile" 2>/dev/null \ - || $doit $mvcmd -f "$dstdir/$dstfile" "$rmtmp" 2>/dev/null \ - || { - echo "$0: cannot unlink or rename $dstdir/$dstfile" >&2 - (exit 1); exit 1 - } - else - : - fi - } && - - # Now rename the file to the real destination. - $doit $mvcmd "$dsttmp" "$dstdir/$dstfile" - } - } - fi || { (exit 1); exit 1; } -done + { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } && + { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } && + { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } && + { test -z "$chmodcmd" || $doit $chmodcmd $mode "$dsttmp"; } && + + # If -C, don't bother to copy if it wouldn't change the file. + if $copy_on_change && + old=`LC_ALL=C ls -dlL "$dst" 2>/dev/null` && + new=`LC_ALL=C ls -dlL "$dsttmp" 2>/dev/null` && + + eval "$initialize_posix_glob" && + $posix_glob set -f && + set X $old && old=:$2:$4:$5:$6 && + set X $new && new=:$2:$4:$5:$6 && + $posix_glob set +f && + + test "$old" = "$new" && + $cmpprog "$dst" "$dsttmp" >/dev/null 2>&1 + then + rm -f "$dsttmp" + else + # Rename the file to the real destination. + $doit $mvcmd -f "$dsttmp" "$dst" 2>/dev/null || -# The final little trick to "correctly" pass the exit status to the exit trap. -{ - (exit 0); exit 0 -} + # The rename failed, perhaps because mv can't rename something else + # to itself, or perhaps because mv is so ancient that it does not + # support -f. + { + # Now remove or move aside any old file at destination location. + # We try this two ways since rm can't unlink itself on some + # systems and the destination file might be busy for other + # reasons. In this case, the final cleanup might fail but the new + # file should still install successfully. + { + test ! -f "$dst" || + $doit $rmcmd -f "$dst" 2>/dev/null || + { $doit $mvcmd -f "$dst" "$rmtmp" 2>/dev/null && + { $doit $rmcmd -f "$rmtmp" 2>/dev/null; :; } + } || + { echo "$0: cannot unlink or rename $dst" >&2 + (exit 1); exit 1 + } + } && + + # Now rename the file to the real destination. + $doit $mvcmd "$dsttmp" "$dst" + } + fi || exit 1 + + trap '' 0 + fi +done # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/Makefile.am /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/Makefile.am --- libdrm-2.3.0.16/libdrm/Makefile.am 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/libdrm/Makefile.am 2008-07-01 08:51:40.000000000 +0100 @@ -20,12 +20,13 @@ libdrm_la_LTLIBRARIES = libdrm.la libdrm_ladir = $(libdir) -libdrm_la_LDFLAGS = -version-number 2:3:0 -no-undefined +libdrm_la_LDFLAGS = -version-number 2:3:1 -no-undefined AM_CFLAGS = -I$(top_srcdir)/shared-core -libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c xf86drmMode.c +libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c libdrmincludedir = ${includedir} -libdrminclude_HEADERS = xf86drm.h xf86mm.h xf86drmMode.h + +libdrminclude_HEADERS = xf86drm.h EXTRA_DIST = ChangeLog TODO diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/Makefile.in /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/Makefile.in --- libdrm-2.3.0.16/libdrm/Makefile.in 2008-05-15 22:47:17.000000000 +0100 +++ libdrm-2.3.1/libdrm/Makefile.in 2009-04-20 07:00:29.000000000 +0100 @@ -75,7 +75,7 @@ LTLIBRARIES = $(libdrm_la_LTLIBRARIES) libdrm_la_LIBADD = am_libdrm_la_OBJECTS = xf86drm.lo xf86drmHash.lo xf86drmRandom.lo \ - xf86drmSL.lo xf86drmMode.lo + xf86drmSL.lo libdrm_la_OBJECTS = $(am_libdrm_la_OBJECTS) libdrm_la_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ @@ -210,11 +210,11 @@ top_srcdir = @top_srcdir@ libdrm_la_LTLIBRARIES = libdrm.la libdrm_ladir = $(libdir) -libdrm_la_LDFLAGS = -version-number 2:3:0 -no-undefined +libdrm_la_LDFLAGS = -version-number 2:3:1 -no-undefined AM_CFLAGS = -I$(top_srcdir)/shared-core -libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c xf86drmMode.c +libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c libdrmincludedir = ${includedir} -libdrminclude_HEADERS = xf86drm.h xf86mm.h xf86drmMode.h +libdrminclude_HEADERS = xf86drm.h EXTRA_DIST = ChangeLog TODO all: config.h $(MAKE) $(AM_MAKEFLAGS) all-am @@ -305,7 +305,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xf86drm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xf86drmHash.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xf86drmMode.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xf86drmRandom.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/xf86drmSL.Plo@am__quote@ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/xf86drm.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/xf86drm.c --- libdrm-2.3.0.16/libdrm/xf86drm.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/libdrm/xf86drm.c 2008-07-01 08:51:40.000000000 +0100 @@ -57,7 +57,7 @@ #include "xf86drm.h" -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) +#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) #define DRM_MAJOR 145 #endif @@ -1008,19 +1008,16 @@ */ int drmClose(int fd) { - if (drmHashTable) - { - unsigned long key = drmGetKeyFromFd(fd); - drmHashEntry *entry = drmGetEntry(fd); + unsigned long key = drmGetKeyFromFd(fd); + drmHashEntry *entry = drmGetEntry(fd); - drmHashDestroy(entry->tagTable); - entry->fd = 0; - entry->f = NULL; - entry->tagTable = NULL; + drmHashDestroy(entry->tagTable); + entry->fd = 0; + entry->f = NULL; + entry->tagTable = NULL; - drmHashDelete(drmHashTable, key); - drmFree(entry); - } + drmHashDelete(drmHashTable, key); + drmFree(entry); return close(fd); } @@ -2340,569 +2337,6 @@ return 0; } - -/* - * Valid flags are - * DRM_FENCE_FLAG_EMIT - * DRM_FENCE_FLAG_SHAREABLE - * DRM_FENCE_MASK_DRIVER - */ - -int drmFenceCreate(int fd, unsigned flags, int fence_class, unsigned type, - drmFence *fence) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.flags = flags; - arg.type = type; - arg.fence_class = fence_class; - - if (ioctl(fd, DRM_IOCTL_FENCE_CREATE, &arg)) - return -errno; - fence->handle = arg.handle; - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->flags = arg.flags; - fence->signaled = 0; - return 0; -} - -/* - * Valid flags are - * DRM_FENCE_FLAG_SHAREABLE - * DRM_FENCE_MASK_DRIVER - */ - -int drmFenceBuffers(int fd, unsigned flags, uint32_t fence_class, drmFence *fence) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.flags = flags; - arg.fence_class = fence_class; - - if (ioctl(fd, DRM_IOCTL_FENCE_BUFFERS, &arg)) - return -errno; - fence->handle = arg.handle; - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->flags = arg.flags; - fence->sequence = arg.sequence; - fence->signaled = 0; - return 0; -} - -int drmFenceReference(int fd, unsigned handle, drmFence *fence) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.handle = handle; - - if (ioctl(fd, DRM_IOCTL_FENCE_REFERENCE, &arg)) - return -errno; - fence->handle = arg.handle; - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->flags = arg.flags; - fence->signaled = arg.signaled; - return 0; -} - -int drmFenceUnreference(int fd, const drmFence *fence) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.handle = fence->handle; - - if (ioctl(fd, DRM_IOCTL_FENCE_UNREFERENCE, &arg)) - return -errno; - return 0; -} - -int drmFenceFlush(int fd, drmFence *fence, unsigned flush_type) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.handle = fence->handle; - arg.type = flush_type; - - if (ioctl(fd, DRM_IOCTL_FENCE_FLUSH, &arg)) - return -errno; - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->signaled = arg.signaled; - return arg.error; -} - -int drmFenceUpdate(int fd, drmFence *fence) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.handle = fence->handle; - - if (ioctl(fd, DRM_IOCTL_FENCE_SIGNALED, &arg)) - return -errno; - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->signaled = arg.signaled; - return 0; -} - -int drmFenceSignaled(int fd, drmFence *fence, unsigned fenceType, - int *signaled) -{ - if ((fence->flags & DRM_FENCE_FLAG_SHAREABLE) || - ((fenceType & fence->signaled) != fenceType)) { - int ret = drmFenceFlush(fd, fence, fenceType); - if (ret) - return ret; - } - - *signaled = ((fenceType & fence->signaled) == fenceType); - - return 0; -} - -/* - * Valid flags are - * DRM_FENCE_FLAG_SHAREABLE - * DRM_FENCE_MASK_DRIVER - */ - - -int drmFenceEmit(int fd, unsigned flags, drmFence *fence, unsigned emit_type) -{ - drm_fence_arg_t arg; - - memset(&arg, 0, sizeof(arg)); - arg.fence_class = fence->fence_class; - arg.flags = flags; - arg.handle = fence->handle; - arg.type = emit_type; - - if (ioctl(fd, DRM_IOCTL_FENCE_EMIT, &arg)) - return -errno; - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->signaled = arg.signaled; - fence->sequence = arg.sequence; - return 0; -} - -/* - * Valid flags are - * DRM_FENCE_FLAG_WAIT_LAZY - * DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS - */ - -#define DRM_IOCTL_TIMEOUT_USEC 30000000UL - -static unsigned long -drmTimeDiff(struct timeval *now, struct timeval *then) -{ - uint64_t val; - - val = now->tv_sec - then->tv_sec; - val *= 1000000LL; - val += now->tv_usec; - val -= then->tv_usec; - - return (unsigned long) val; -} - -static int -drmIoctlTimeout(int fd, unsigned long request, void *argp) -{ - int haveThen = 0; - struct timeval then, now; - int ret; - - do { - ret = ioctl(fd, request, argp); - if (ret != 0 && errno == EAGAIN) { - if (!haveThen) { - gettimeofday(&then, NULL); - haveThen = 1; - } - gettimeofday(&now, NULL); - } - } while (ret != 0 && errno == EAGAIN && - drmTimeDiff(&now, &then) < DRM_IOCTL_TIMEOUT_USEC); - - if (ret != 0) - return ((errno == EAGAIN) ? -EBUSY : -errno); - - return 0; -} - - - - -int drmFenceWait(int fd, unsigned flags, drmFence *fence, unsigned flush_type) -{ - drm_fence_arg_t arg; - int ret; - - if (flush_type == 0) { - flush_type = fence->type; - } - - if (!(fence->flags & DRM_FENCE_FLAG_SHAREABLE)) { - if ((flush_type & fence->signaled) == flush_type) { - return 0; - } - } - - memset(&arg, 0, sizeof(arg)); - arg.handle = fence->handle; - arg.type = flush_type; - arg.flags = flags; - - - ret = drmIoctlTimeout(fd, DRM_IOCTL_FENCE_WAIT, &arg); - if (ret) - return ret; - - fence->fence_class = arg.fence_class; - fence->type = arg.type; - fence->signaled = arg.signaled; - return arg.error; -} - -static void drmBOCopyReply(const struct drm_bo_info_rep *rep, drmBO *buf) -{ - buf->handle = rep->handle; - buf->flags = rep->flags; - buf->size = rep->size; - buf->offset = rep->offset; - buf->mapHandle = rep->arg_handle; - buf->mask = rep->mask; - buf->start = rep->buffer_start; - buf->fenceFlags = rep->fence_flags; - buf->replyFlags = rep->rep_flags; - buf->pageAlignment = rep->page_alignment; - buf->tileInfo = rep->tile_info; - buf->hwTileStride = rep->hw_tile_stride; - buf->desiredTileStride = rep->desired_tile_stride; -} - - - -int drmBOCreate(int fd, unsigned long size, - unsigned pageAlignment, void *user_buffer, - uint64_t mask, - unsigned hint, drmBO *buf) -{ - struct drm_bo_create_arg arg; - struct drm_bo_create_req *req = &arg.d.req; - struct drm_bo_info_rep *rep = &arg.d.rep; - int ret; - - memset(buf, 0, sizeof(*buf)); - memset(&arg, 0, sizeof(arg)); - req->mask = mask; - req->hint = hint; - req->size = size; - req->page_alignment = pageAlignment; - req->buffer_start = (unsigned long) user_buffer; - - buf->virtual = NULL; - - ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_CREATE, &arg); - if (ret) - return ret; - - drmBOCopyReply(rep, buf); - buf->virtual = user_buffer; - buf->mapCount = 0; - - return 0; -} - -int drmBOReference(int fd, unsigned handle, drmBO *buf) -{ - struct drm_bo_reference_info_arg arg; - struct drm_bo_handle_arg *req = &arg.d.req; - struct drm_bo_info_rep *rep = &arg.d.rep; - - memset(&arg, 0, sizeof(arg)); - req->handle = handle; - - if (ioctl(fd, DRM_IOCTL_BO_REFERENCE, &arg)) - return -errno; - - drmBOCopyReply(rep, buf); - buf->mapVirtual = NULL; - buf->mapCount = 0; - buf->virtual = NULL; - - return 0; -} - -int drmBOUnreference(int fd, drmBO *buf) -{ - struct drm_bo_handle_arg arg; - - if (buf->mapVirtual && buf->mapHandle) { - (void) munmap(buf->mapVirtual, buf->start + buf->size); - buf->mapVirtual = NULL; - buf->virtual = NULL; - } - - memset(&arg, 0, sizeof(arg)); - arg.handle = buf->handle; - - if (ioctl(fd, DRM_IOCTL_BO_UNREFERENCE, &arg)) - return -errno; - - buf->handle = 0; - return 0; -} - - -/* - * Flags can be DRM_BO_FLAG_READ, DRM_BO_FLAG_WRITE or'ed together - * Hint currently be DRM_BO_HINT_DONT_BLOCK, which makes the - * call return an -EBUSY if it can' immediately honor the mapping request. - */ - -int drmBOMap(int fd, drmBO *buf, unsigned mapFlags, unsigned mapHint, - void **address) -{ - struct drm_bo_map_wait_idle_arg arg; - struct drm_bo_info_req *req = &arg.d.req; - struct drm_bo_info_rep *rep = &arg.d.rep; - int ret = 0; - - /* - * Make sure we have a virtual address of the buffer. - */ - - if (!buf->virtual) { - drmAddress virtual; - virtual = mmap(0, buf->size + buf->start, - PROT_READ | PROT_WRITE, MAP_SHARED, - fd, buf->mapHandle); - if (virtual == MAP_FAILED) { - ret = -errno; - } - if (ret) - return ret; - buf->mapVirtual = virtual; - buf->virtual = ((char *) virtual) + buf->start; - } - - memset(&arg, 0, sizeof(arg)); - req->handle = buf->handle; - req->mask = mapFlags; - req->hint = mapHint; - - /* - * May hang if the buffer object is busy. - * This IOCTL synchronizes the buffer. - */ - - ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_MAP, &arg); - if (ret) - return ret; - - drmBOCopyReply(rep, buf); - buf->mapFlags = mapFlags; - ++buf->mapCount; - *address = buf->virtual; - - return 0; -} - - -int drmBOUnmap(int fd, drmBO *buf) -{ - struct drm_bo_handle_arg arg; - - memset(&arg, 0, sizeof(arg)); - arg.handle = buf->handle; - - if (ioctl(fd, DRM_IOCTL_BO_UNMAP, &arg)) { - return -errno; - } - buf->mapCount--; - return 0; -} - -int drmBOSetStatus(int fd, drmBO *buf, - uint64_t flags, uint64_t mask, - unsigned int hint, - unsigned int desired_tile_stride, - unsigned int tile_info) -{ - - struct drm_bo_map_wait_idle_arg arg; - struct drm_bo_info_req *req = &arg.d.req; - struct drm_bo_info_rep *rep = &arg.d.rep; - int ret = 0; - - memset(&arg, 0, sizeof(arg)); - req->mask = mask; - req->flags = flags; - req->handle = buf->handle; - req->hint = hint; - req->desired_tile_stride = desired_tile_stride; - req->tile_info = tile_info; - - ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_SETSTATUS, &arg); - if (ret) - return ret; - - drmBOCopyReply(rep, buf); - return 0; -} - - -int drmBOInfo(int fd, drmBO *buf) -{ - struct drm_bo_reference_info_arg arg; - struct drm_bo_handle_arg *req = &arg.d.req; - struct drm_bo_info_rep *rep = &arg.d.rep; - int ret = 0; - - memset(&arg, 0, sizeof(arg)); - req->handle = buf->handle; - - ret = ioctl(fd, DRM_IOCTL_BO_INFO, &arg); - if (ret) - return -errno; - - drmBOCopyReply(rep, buf); - return 0; -} - -int drmBOWaitIdle(int fd, drmBO *buf, unsigned hint) -{ - struct drm_bo_map_wait_idle_arg arg; - struct drm_bo_info_req *req = &arg.d.req; - struct drm_bo_info_rep *rep = &arg.d.rep; - int ret = 0; - - if ((buf->flags & DRM_BO_FLAG_SHAREABLE) || - (buf->replyFlags & DRM_BO_REP_BUSY)) { - memset(&arg, 0, sizeof(arg)); - req->handle = buf->handle; - req->hint = hint; - - ret = drmIoctlTimeout(fd, DRM_IOCTL_BO_WAIT_IDLE, &arg); - if (ret) - return ret; - - drmBOCopyReply(rep, buf); - } - return 0; -} - -int drmBOBusy(int fd, drmBO *buf, int *busy) -{ - if (!(buf->flags & DRM_BO_FLAG_SHAREABLE) && - !(buf->replyFlags & DRM_BO_REP_BUSY)) { - *busy = 0; - return 0; - } - else { - int ret = drmBOInfo(fd, buf); - if (ret) - return ret; - *busy = (buf->replyFlags & DRM_BO_REP_BUSY); - return 0; - } -} - -int drmMMInit(int fd, unsigned long pOffset, unsigned long pSize, - unsigned memType) -{ - struct drm_mm_init_arg arg; - - memset(&arg, 0, sizeof(arg)); - - arg.magic = DRM_BO_INIT_MAGIC; - arg.major = DRM_BO_INIT_MAJOR; - arg.minor = DRM_BO_INIT_MINOR; - arg.p_offset = pOffset; - arg.p_size = pSize; - arg.mem_type = memType; - - if (ioctl(fd, DRM_IOCTL_MM_INIT, &arg)) - return -errno; - return 0; -} - -int drmMMTakedown(int fd, unsigned memType) -{ - struct drm_mm_type_arg arg; - - memset(&arg, 0, sizeof(arg)); - arg.mem_type = memType; - - if (ioctl(fd, DRM_IOCTL_MM_TAKEDOWN, &arg)) - return -errno; - return 0; -} - -/* - * If this function returns an error, and lockBM was set to 1, - * the buffer manager is NOT locked. - */ - -int drmMMLock(int fd, unsigned memType, int lockBM, int ignoreNoEvict) -{ - struct drm_mm_type_arg arg; - - memset(&arg, 0, sizeof(arg)); - arg.mem_type = memType; - arg.lock_flags |= (lockBM) ? DRM_BO_LOCK_UNLOCK_BM : 0; - arg.lock_flags |= (ignoreNoEvict) ? DRM_BO_LOCK_IGNORE_NO_EVICT : 0; - - return drmIoctlTimeout(fd, DRM_IOCTL_MM_LOCK, &arg); -} - -int drmMMUnlock(int fd, unsigned memType, int unlockBM) -{ - struct drm_mm_type_arg arg; - - memset(&arg, 0, sizeof(arg)); - - arg.mem_type = memType; - arg.lock_flags |= (unlockBM) ? DRM_BO_LOCK_UNLOCK_BM : 0; - - return drmIoctlTimeout(fd, DRM_IOCTL_MM_UNLOCK, &arg); -} - -int drmBOVersion(int fd, unsigned int *major, - unsigned int *minor, - unsigned int *patchlevel) -{ - struct drm_bo_version_arg arg; - int ret; - - memset(&arg, 0, sizeof(arg)); - ret = ioctl(fd, DRM_IOCTL_BO_VERSION, &arg); - if (ret) - return -errno; - - if (major) - *major = arg.major; - if (minor) - *minor = arg.minor; - if (patchlevel) - *patchlevel = arg.patchlevel; - - return 0; -} - - - #define DRM_MAX_FDS 16 static struct { char *BusID; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/xf86drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/xf86drm.h --- libdrm-2.3.0.16/libdrm/xf86drm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/libdrm/xf86drm.h 2008-07-01 08:51:40.000000000 +0100 @@ -658,6 +658,4 @@ extern int drmOpenOnce(void *unused, const char *BusID, int *newlyopened); extern void drmCloseOnce(int fd); -#include "xf86mm.h" - #endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/xf86drmMode.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/xf86drmMode.c --- libdrm-2.3.0.16/libdrm/xf86drmMode.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/libdrm/xf86drmMode.c 1970-01-01 01:00:00.000000000 +0100 @@ -1,465 +0,0 @@ -/* - * \file xf86drmMode.c - * Header for DRM modesetting interface. - * - * \author Jakob Bornecrantz - * - * \par Acknowledgements: - * Feb 2007, Dave Airlie - */ - -/* - * Copyright (c) - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -/* - * TODO the types we are after are defined in diffrent headers on diffrent - * platforms find which headers to include to get uint32_t - */ -#include - -#include "xf86drmMode.h" -#include "xf86drm.h" -#include -#include - -/* - * Util functions - */ - -void* drmAllocCpy(void *array, int count, int entry_size) -{ - char *r; - int i; - - if (!count || !array || !entry_size) - return 0; - - if (!(r = drmMalloc(count*entry_size))) - return 0; - - for (i = 0; i < count; i++) - memcpy(r+(entry_size*i), array+(entry_size*i), entry_size); - - return r; -} - -/** - * Generate crtc and output ids. - * - * Will generate ids starting from 1 up to count if count is greater then 0. - */ -static uint32_t* drmAllocGenerate(int count) -{ - uint32_t *r; - int i; - - if(0 <= count) - return 0; - - if (!(r = drmMalloc(count*sizeof(*r)))) - return 0; - - for (i = 0; i < count; r[i] = ++i); - - return 0; -} - -/* - * A couple of free functions. - */ - -void drmModeFreeModeInfo(struct drm_mode_modeinfo *ptr) -{ - if (!ptr) - return; - - drmFree(ptr); -} - -void drmModeFreeResources(drmModeResPtr ptr) -{ - if (!ptr) - return; - - drmFree(ptr->modes); - drmFree(ptr); - -} - -void drmModeFreeFB(drmModeFBPtr ptr) -{ - if (!ptr) - return; - - /* we might add more frees later. */ - drmFree(ptr); -} - -void drmModeFreeCrtc(drmModeCrtcPtr ptr) -{ - if (!ptr) - return; - - drmFree(ptr); - -} - -void drmModeFreeOutput(drmModeOutputPtr ptr) -{ - if (!ptr) - return; - - drmFree(ptr->modes); - drmFree(ptr); - -} - -/* - * ModeSetting functions. - */ - -drmModeResPtr drmModeGetResources(int fd) -{ - struct drm_mode_card_res res; - int i; - drmModeResPtr r = 0; - - memset(&res, 0, sizeof(struct drm_mode_card_res)); - - if (ioctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) - return 0; - - if (res.count_fbs) - res.fb_id = drmMalloc(res.count_fbs*sizeof(uint32_t)); - if (res.count_crtcs) - res.crtc_id = drmMalloc(res.count_crtcs*sizeof(uint32_t)); - if (res.count_outputs) - res.output_id = drmMalloc(res.count_outputs*sizeof(uint32_t)); - if (res.count_modes) - res.modes = drmMalloc(res.count_modes*sizeof(*res.modes)); - - if (ioctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) { - r = NULL; - goto err_allocs; - } - - /* - * return - */ - - - if (!(r = drmMalloc(sizeof(*r)))) - return 0; - - r->count_fbs = res.count_fbs; - r->count_crtcs = res.count_crtcs; - r->count_outputs = res.count_outputs; - r->count_modes = res.count_modes; - /* TODO we realy should test if these allocs fails. */ - r->fbs = drmAllocCpy(res.fb_id, res.count_fbs, sizeof(uint32_t)); - r->crtcs = drmAllocCpy(res.crtc_id, res.count_crtcs, sizeof(uint32_t)); - r->outputs = drmAllocCpy(res.output_id, res.count_outputs, sizeof(uint32_t)); - r->modes = drmAllocCpy(res.modes, res.count_modes, sizeof(struct drm_mode_modeinfo)); - -err_allocs: - drmFree(res.fb_id); - drmFree(res.crtc_id); - drmFree(res.output_id); - drmFree(res.modes); - - return r; -} - -int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth, - uint8_t bpp, uint32_t pitch, drmBO *bo, uint32_t *buf_id) -{ - struct drm_mode_fb_cmd f; - int ret; - - f.width = width; - f.height = height; - f.pitch = pitch; - f.bpp = bpp; - f.depth = depth; - f.handle = bo->handle; - - if (ret = ioctl(fd, DRM_IOCTL_MODE_ADDFB, &f)) - return ret; - - *buf_id = f.buffer_id; - return 0; -} - -int drmModeRmFB(int fd, uint32_t bufferId) -{ - return ioctl(fd, DRM_IOCTL_MODE_RMFB, &bufferId); -} - -drmModeFBPtr drmModeGetFB(int fd, uint32_t buf) -{ - struct drm_mode_fb_cmd info; - drmModeFBPtr r; - - info.buffer_id = buf; - - if (ioctl(fd, DRM_IOCTL_MODE_GETFB, &info)) - return NULL; - - if (!(r = drmMalloc(sizeof(*r)))) - return NULL; - - r->buffer_id = info.buffer_id; - r->width = info.width; - r->height = info.height; - r->pitch = info.pitch; - r->bpp = info.bpp; - r->handle = info.handle; - r->depth = info.depth; - - return r; -} - - -/* - * Crtc functions - */ - -drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId) -{ - struct drm_mode_crtc crtc; - drmModeCrtcPtr r; - int i = 0; - - crtc.count_outputs = 0; - crtc.outputs = 0; - crtc.count_possibles = 0; - crtc.possibles = 0; - crtc.crtc_id = crtcId; - - if (ioctl(fd, DRM_IOCTL_MODE_GETCRTC, &crtc)) - return 0; - - /* - * return - */ - - if (!(r = drmMalloc(sizeof(*r)))) - return 0; - - r->crtc_id = crtc.crtc_id; - r->x = crtc.x; - r->y = crtc.y; - r->mode = crtc.mode; - r->buffer_id = crtc.fb_id; - r->gamma_size = crtc.gamma_size; - r->count_outputs = crtc.count_outputs; - r->count_possibles = crtc.count_possibles; - /* TODO we realy should test if these alloc & cpy fails. */ - r->outputs = crtc.outputs; - r->possibles = crtc.possibles; - - return r; - -err_allocs: - - return 0; -} - - -int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId, - uint32_t x, uint32_t y, uint32_t modeId, - uint32_t *outputs, int count) -{ - struct drm_mode_crtc crtc; - - crtc.count_outputs = 0; - crtc.outputs = 0; - crtc.count_possibles = 0; - crtc.possibles = 0; - - crtc.x = x; - crtc.y = y; - crtc.crtc_id = crtcId; - crtc.fb_id = bufferId; - crtc.set_outputs = outputs; - crtc.count_outputs = count; - crtc.mode = modeId; - - return ioctl(fd, DRM_IOCTL_MODE_SETCRTC, &crtc); -} - - -/* - * Output manipulation - */ - -drmModeOutputPtr drmModeGetOutput(int fd, uint32_t output_id) -{ - struct drm_mode_get_output out; - drmModeOutputPtr r = NULL; - - out.output = output_id; - out.count_crtcs = 0; - out.crtcs = 0; - out.count_clones = 0; - out.clones = 0; - out.count_modes = 0; - out.modes = 0; - out.count_props = 0; - out.props = NULL; - out.prop_values = NULL; - - if (ioctl(fd, DRM_IOCTL_MODE_GETOUTPUT, &out)) - return 0; - - if (out.count_props) { - out.props = drmMalloc(out.count_props*sizeof(uint32_t)); - out.prop_values = drmMalloc(out.count_props*sizeof(uint32_t)); - } - - if (out.count_modes) - out.modes = drmMalloc(out.count_modes*sizeof(uint32_t)); - - if (ioctl(fd, DRM_IOCTL_MODE_GETOUTPUT, &out)) - goto err_allocs; - - if(!(r = drmMalloc(sizeof(*r)))) { - goto err_allocs; - } - - r->output_id = out.output; - r->crtc = out.crtc; - r->connection = out.connection; - r->mmWidth = out.mm_width; - r->mmHeight = out.mm_height; - r->subpixel = out.subpixel; - r->count_crtcs = out.count_crtcs; - r->count_clones = out.count_clones; - r->count_modes = out.count_modes; - /* TODO we should test if these alloc & cpy fails. */ - r->crtcs = out.crtcs; - r->clones = out.clones; - r->count_props = out.count_props; - r->props = drmAllocCpy(out.props, out.count_props, sizeof(uint32_t)); - r->prop_values = drmAllocCpy(out.prop_values, out.count_props, sizeof(uint32_t)); - r->modes = drmAllocCpy(out.modes, out.count_modes, sizeof(uint32_t)); - strncpy(r->name, out.name, DRM_OUTPUT_NAME_LEN); - r->name[DRM_OUTPUT_NAME_LEN-1] = 0; - -err_allocs: - drmFree(out.prop_values); - drmFree(out.props); - drmFree(out.modes); - - return r; -} - -uint32_t drmModeAddMode(int fd, struct drm_mode_modeinfo *mode_info) -{ - if (ioctl(fd, DRM_IOCTL_MODE_ADDMODE, mode_info)) - return 0; - - return mode_info->id; -} - -int drmModeRmMode(int fd, uint32_t mode_id) -{ - return ioctl(fd, DRM_IOCTL_MODE_RMMODE, &mode_id); -} - -int drmModeAttachMode(int fd, uint32_t output_id, uint32_t mode_id) -{ - - struct drm_mode_mode_cmd res; - - res.output_id = output_id; - res.mode_id = mode_id; - - return ioctl(fd, DRM_IOCTL_MODE_ATTACHMODE, &res); -} - -int drmModeDetachMode(int fd, uint32_t output_id, uint32_t mode_id) -{ - struct drm_mode_mode_cmd res; - - res.output_id = output_id; - res.mode_id = mode_id; - - return ioctl(fd, DRM_IOCTL_MODE_DETACHMODE, &res); -} - - -drmModePropertyPtr drmModeGetProperty(int fd, uint32_t property_id) -{ - struct drm_mode_get_property prop; - drmModePropertyPtr r; - - prop.prop_id = property_id; - prop.count_enums = 0; - prop.count_values = 0; - prop.flags = 0; - prop.enums = NULL; - prop.values = NULL; - - if (ioctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) - return 0; - - if (prop.count_values) - prop.values = drmMalloc(prop.count_values * sizeof(uint32_t)); - - if (prop.count_enums) - prop.enums = drmMalloc(prop.count_enums * sizeof(struct drm_mode_property_enum)); - - if (ioctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) { - r = NULL; - goto err_allocs; - } - - if (!(r = drmMalloc(sizeof(*r)))) - return NULL; - - r->prop_id = prop.prop_id; - r->count_values = prop.count_values; - r->count_enums = prop.count_enums; - - r->values = drmAllocCpy(prop.values, prop.count_values, sizeof(uint32_t)); - r->enums = drmAllocCpy(prop.enums, prop.count_enums, sizeof(struct drm_mode_property_enum)); - strncpy(r->name, prop.name, DRM_PROP_NAME_LEN); - r->name[DRM_PROP_NAME_LEN-1] = 0; - -err_allocs: - drmFree(prop.values); - drmFree(prop.enums); - - return r; -} - -void drmModeFreeProperty(drmModePropertyPtr ptr) -{ - if (!ptr) - return; - - drmFree(ptr->values); - drmFree(ptr->enums); - drmFree(ptr); -} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/xf86drmMode.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/xf86drmMode.h --- libdrm-2.3.0.16/libdrm/xf86drmMode.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/libdrm/xf86drmMode.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,226 +0,0 @@ -/* - * \file xf86drmMode.h - * Header for DRM modesetting interface. - * - * \author Jakob Bornecrantz - * - * \par Acknowledgements: - * Feb 2007, Dave Airlie - */ - -/* - * Copyright (c) - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#include -#include "xf86mm.h" - -/* - * This is the interface for modesetting for drm. - * - * In order to use this interface you must include either or another - * header defining uint32_t, int32_t and uint16_t. - * - * It aims to provide a randr1.2 compatible interface for modesettings in the - * kernel, the interface is also ment to be used by libraries like EGL. - * - * More information can be found in randrproto.txt which can be found here: - * http://gitweb.freedesktop.org/?p=xorg/proto/randrproto.git - * - * There are some major diffrences to be noted. Unlike the randr1.2 proto you - * need to create the memory object of the framebuffer yourself with the ttm - * buffer object interface. This object needs to be pinned. - */ - - -typedef struct _drmModeRes { - - int count_fbs; - uint32_t *fbs; - - int count_crtcs; - uint32_t *crtcs; - - int count_outputs; - uint32_t *outputs; - - int count_modes; - struct drm_mode_modeinfo *modes; - -} drmModeRes, *drmModeResPtr; - -typedef struct drm_mode_fb_cmd drmModeFB, *drmModeFBPtr; - -typedef struct _drmModeProperty { - unsigned int prop_id; - unsigned int flags; - unsigned char name[DRM_PROP_NAME_LEN]; - int count_values; - uint32_t *values; - int count_enums; - struct drm_mode_property_enum *enums; - -} drmModePropertyRes, *drmModePropertyPtr; - -typedef struct _drmModeCrtc { - unsigned int crtc_id; - unsigned int buffer_id; /**< FB id to connect to 0 = disconnect*/ - - uint32_t x, y; /**< Position on the frameuffer */ - uint32_t width, height; - uint32_t mode; /**< Current mode used */ - - int count_outputs; - uint32_t outputs; /**< Outputs that are connected */ - - int count_possibles; - uint32_t possibles; /**< Outputs that can be connected */ - - int gamma_size; /**< Number of gamma stops */ - -} drmModeCrtc, *drmModeCrtcPtr; - -typedef enum { - DRM_MODE_CONNECTED = 1, - DRM_MODE_DISCONNECTED = 2, - DRM_MODE_UNKNOWNCONNECTION = 3 -} drmModeConnection; - -typedef enum { - DRM_MODE_SUBPIXEL_UNKNOWN = 1, - DRM_MODE_SUBPIXEL_HORIZONTAL_RGB = 2, - DRM_MODE_SUBPIXEL_HORIZONTAL_BGR = 3, - DRM_MODE_SUBPIXEL_VERTICAL_RGB = 4, - DRM_MODE_SUBPIXEL_VERTICAL_BGR = 5, - DRM_MODE_SUBPIXEL_NONE = 6 -} drmModeSubPixel; - -typedef struct _drmModeOutput { - unsigned int output_id; - - unsigned int crtc; /**< Crtc currently connected to */ - unsigned char name[DRM_OUTPUT_NAME_LEN]; - drmModeConnection connection; - uint32_t mmWidth, mmHeight; /**< HxW in millimeters */ - drmModeSubPixel subpixel; - - int count_crtcs; - uint32_t crtcs; /**< Possible crtc to connect to */ - - int count_clones; - uint32_t clones; /**< Mask of clones */ - - int count_modes; - uint32_t *modes; /**< List of modes ids */ - - int count_props; - uint32_t *props; /**< List of property ids */ - uint32_t *prop_values; /**< List of property values */ - -} drmModeOutput, *drmModeOutputPtr; - - - -extern void drmModeFreeModeInfo( struct drm_mode_modeinfo *ptr ); -extern void drmModeFreeResources( drmModeResPtr ptr ); -extern void drmModeFreeFB( drmModeFBPtr ptr ); -extern void drmModeFreeCrtc( drmModeCrtcPtr ptr ); -extern void drmModeFreeOutput( drmModeOutputPtr ptr ); - -/** - * Retrives all of the resources associated with a card. - */ -extern drmModeResPtr drmModeGetResources(int fd); - - -/* - * FrameBuffer manipulation. - */ - -/** - * Retrive information about framebuffer bufferId - */ -extern drmModeFBPtr drmModeGetFB(int fd, uint32_t bufferId); - -/** - * Creates a new framebuffer with an buffer object as its scanout buffer. - */ -extern int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth, - uint8_t bpp, uint32_t pitch, drmBO *bo, - uint32_t *buf_id); -/** - * Destroies the given framebuffer. - */ -extern int drmModeRmFB(int fd, uint32_t bufferId); - - -/* - * Crtc functions - */ - -/** - * Retrive information about the ctrt crtcId - */ -extern drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId); - -/** - * Set the mode on a crtc crtcId with the given mode modeId. - */ -extern int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId, - uint32_t x, uint32_t y, uint32_t modeId, - uint32_t *outputs, int count); - - -/* - * Output manipulation - */ - -/** - * Retrive information about the output outputId. - */ -extern drmModeOutputPtr drmModeGetOutput(int fd, - uint32_t outputId); - -/** - * Adds a new mode from the given mode info. - * Name must be unique. - */ -extern uint32_t drmModeAddMode(int fd, struct drm_mode_modeinfo *modeInfo); - -/** - * Removes a mode created with AddMode, must be unused. - */ -extern int drmModeRmMode(int fd, uint32_t modeId); - -/** - * Attaches the given mode to an output. - */ -extern int drmModeAttachMode(int fd, uint32_t outputId, uint32_t modeId); - -/** - * Detaches a mode from the output - * must be unused, by the given mode. - */ -extern int drmModeDetachMode(int fd, uint32_t outputId, uint32_t modeId); - -extern drmModePropertyPtr drmModeGetProperty(int fd, uint32_t propertyId); -extern void drmModeFreeProperty(drmModePropertyPtr ptr); diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/libdrm/xf86mm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/libdrm/xf86mm.h --- libdrm-2.3.0.16/libdrm/xf86mm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/libdrm/xf86mm.h 2009-04-20 07:00:29.000000000 +0100 @@ -110,7 +110,7 @@ unsigned handle; uint64_t mapHandle; uint64_t flags; - uint64_t mask; + uint64_t proposedFlags; unsigned mapFlags; unsigned long size; unsigned long offset; @@ -172,6 +172,7 @@ extern int drmMMTakedown(int fd, unsigned memType); extern int drmMMLock(int fd, unsigned memType, int lockBM, int ignoreNoEvict); extern int drmMMUnlock(int fd, unsigned memType, int unlockBM); +extern int drmMMInfo(int fd, unsigned memType, uint64_t *size); extern int drmBOSetStatus(int fd, drmBO *buf, uint64_t flags, uint64_t mask, unsigned int hint, diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/ltmain.sh /tmp/5JEwQoyJ2h/libdrm-2.3.1/ltmain.sh --- libdrm-2.3.0.16/ltmain.sh 2008-05-15 22:47:06.000000000 +0100 +++ libdrm-2.3.1/ltmain.sh 2009-04-20 07:00:29.000000000 +0100 @@ -1,8 +1,8 @@ # ltmain.sh - Provide generalized library-building support services. # NOTE: Changing this file will not affect anything until you rerun configure. # -# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005 -# Free Software Foundation, Inc. +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, +# 2007, 2008 Free Software Foundation, Inc. # Originally by Gordon Matzigkeit , 1996 # # This program is free software; you can redistribute it and/or modify @@ -43,14 +43,22 @@ PROGRAM=ltmain.sh PACKAGE=libtool -VERSION="1.5.22 Debian 1.5.22-2" -TIMESTAMP=" (1.1220.2.365 2005/12/18 22:14:06)" +VERSION="1.5.26 Debian 1.5.26-4" +TIMESTAMP=" (1.1220.2.493 2008/02/01 16:58:18)" -# See if we are running on zsh, and set the options which allow our -# commands through without removal of \ escapes. -if test -n "${ZSH_VERSION+set}" ; then +# Be Bourne compatible (taken from Autoconf:_AS_BOURNE_COMPATIBLE). +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh # Check that we have a working $echo. if test "X$1" = X--no-reexec; then @@ -105,11 +113,19 @@ # These must not be set unconditionally because not all systems understand # e.g. LANG=C (notably SCO). # We save the old values to restore during execute mode. -if test "${LC_ALL+set}" = set; then - save_LC_ALL="$LC_ALL"; LC_ALL=C; export LC_ALL -fi -if test "${LANG+set}" = set; then - save_LANG="$LANG"; LANG=C; export LANG +lt_env= +for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES +do + eval "if test \"\${$lt_var+set}\" = set; then + save_$lt_var=\$$lt_var + lt_env=\"$lt_var=\$$lt_var \$lt_env\" + $lt_var=C + export $lt_var + fi" +done + +if test -n "$lt_env"; then + lt_env="env $lt_env" fi # Make sure IFS has a sensible default @@ -136,6 +152,8 @@ preserve_args= lo2o="s/\\.lo\$/.${objext}/" o2lo="s/\\.${objext}\$/.lo/" +extracted_archives= +extracted_serial=0 ##################################### # Shell function definitions: @@ -196,7 +214,13 @@ if eval $OBJDUMP -f $1 | $SED -e '10q' 2>/dev/null | \ $EGREP -e 'file format pe-i386(.*architecture: i386)?' >/dev/null ; then win32_nmres=`eval $NM -f posix -A $1 | \ - $SED -n -e '1,100{/ I /{s,.*,import,;p;q;};}'` + $SED -n -e '1,100{ + / I /{ + s,.*,import, + p + q + } + }'` case $win32_nmres in import*) win32_libid_type="x86 archive import";; *) win32_libid_type="x86 archive static";; @@ -327,7 +351,17 @@ *) my_xabs=`pwd`"/$my_xlib" ;; esac my_xlib=`$echo "X$my_xlib" | $Xsed -e 's%^.*/%%'` - my_xdir="$my_gentop/$my_xlib" + my_xlib_u=$my_xlib + while :; do + case " $extracted_archives " in + *" $my_xlib_u "*) + extracted_serial=`expr $extracted_serial + 1` + my_xlib_u=lt$extracted_serial-$my_xlib ;; + *) break ;; + esac + done + extracted_archives="$extracted_archives $my_xlib_u" + my_xdir="$my_gentop/$my_xlib_u" $show "${rm}r $my_xdir" $run ${rm}r "$my_xdir" @@ -454,11 +488,12 @@ ;; --version) - $echo "$PROGRAM (GNU $PACKAGE) $VERSION$TIMESTAMP" - $echo - $echo "Copyright (C) 2005 Free Software Foundation, Inc." - $echo "This is free software; see the source for copying conditions. There is NO" - $echo "warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + echo "\ +$PROGRAM (GNU $PACKAGE) $VERSION$TIMESTAMP + +Copyright (C) 2008 Free Software Foundation, Inc. +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." exit $? ;; @@ -755,9 +790,11 @@ *.class) xform=class ;; *.cpp) xform=cpp ;; *.cxx) xform=cxx ;; - *.f90) xform=f90 ;; + *.[fF][09]?) xform=[fF][09]. ;; *.for) xform=for ;; *.java) xform=java ;; + *.obj) xform=obj ;; + *.sx) xform=sx ;; esac libobj=`$echo "X$libobj" | $Xsed -e "s/\.$xform$/.lo/"` @@ -926,7 +963,7 @@ $run $rm "$lobj" "$output_obj" $show "$command" - if $run eval "$command"; then : + if $run eval $lt_env "$command"; then : else test -n "$output_obj" && $run $rm $removelist exit $EXIT_FAILURE @@ -998,7 +1035,7 @@ command="$command$suppress_output" $run $rm "$obj" "$output_obj" $show "$command" - if $run eval "$command"; then : + if $run eval $lt_env "$command"; then : else $run $rm $removelist exit $EXIT_FAILURE @@ -1131,6 +1168,7 @@ thread_safe=no vinfo= vinfo_number=no + single_module="${wl}-single_module" func_infer_tag $base_compile @@ -1138,8 +1176,9 @@ for arg do case $arg in - -all-static | -static) - if test "X$arg" = "X-all-static"; then + -all-static | -static | -static-libtool-libs) + case $arg in + -all-static) if test "$build_libtool_libs" = yes && test -z "$link_static_flag"; then $echo "$modename: warning: complete static linking is impossible in this configuration" 1>&2 fi @@ -1147,12 +1186,20 @@ dlopen_self=$dlopen_self_static fi prefer_static_libs=yes - else + ;; + -static) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=built - fi + ;; + -static-libtool-libs) + if test -z "$pic_flag" && test -n "$link_static_flag"; then + dlopen_self=$dlopen_self_static + fi + prefer_static_libs=yes + ;; + esac build_libtool_libs=no build_old_libs=yes break @@ -1600,13 +1647,18 @@ continue ;; - -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe) + -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe|-threads) compiler_flags="$compiler_flags $arg" compile_command="$compile_command $arg" finalize_command="$finalize_command $arg" continue ;; + -multi_module) + single_module="${wl}-multi_module" + continue + ;; + -module) module=yes continue @@ -1620,10 +1672,11 @@ # -m* pass through architecture-specific compiler args for GCC # -m*, -t[45]*, -txscale* pass through architecture-specific # compiler args for GCC - # -pg pass through profiling flag for GCC + # -p, -pg, --coverage, -fprofile-* pass through profiling flag for GCC + # -F/path gives path to uninstalled frameworks, gcc on darwin # @file GCC response files - -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*|-pg| \ - -t[45]*|-txscale*|@*) + -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \ + -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*) # Unknown arguments in both finalize_command and compile_command need # to be aesthetically quoted because they are evaled later. @@ -1651,9 +1704,9 @@ -no-install) case $host in - *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2*) + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-darwin*) # The PATH hackery in wrapper scripts is required on Windows - # in order for the loader to find any dlls it needs. + # and Darwin in order for the loader to find any dlls it needs. $echo "$modename: warning: \`-no-install' is ignored for $host" 1>&2 $echo "$modename: warning: assuming \`-no-fast-install' instead" 1>&2 fast_install=no @@ -1712,7 +1765,7 @@ continue ;; - -static) + -static | -static-libtool-libs) # The effects of -static are defined in a previous loop. # We used to do the same as -all-static on platforms that # didn't have a PIC flag, but the assumption that the effects @@ -2097,7 +2150,7 @@ lib= found=no case $deplib in - -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe) + -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe|-threads) if test "$linkmode,$pass" = "prog,link"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" @@ -2112,7 +2165,12 @@ continue fi name=`$echo "X$deplib" | $Xsed -e 's/^-l//'` - for searchdir in $newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path; do + if test "$linkmode" = lib; then + searchdirs="$newlib_search_path $lib_search_path $compiler_lib_search_dirs $sys_lib_search_path $shlib_search_path" + else + searchdirs="$newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path" + fi + for searchdir in $searchdirs; do for search_ext in .la $std_shrext .so .a; do # Search the libtool library lib="$searchdir/lib${name}${search_ext}" @@ -2493,7 +2551,9 @@ if test "$linkmode,$pass" = "prog,link"; then if test -n "$library_names" && - { test "$prefer_static_libs" = no || test -z "$old_library"; }; then + { { test "$prefer_static_libs" = no || + test "$prefer_static_libs,$installed" = "built,yes"; } || + test -z "$old_library"; }; then # We need to hardcode the library path if test -n "$shlibpath_var" && test -z "$avoidtemprpath" ; then # Make sure the rpath contains only unique directories. @@ -2906,12 +2966,18 @@ # we do not want to link against static libs, # but need to link against shared eval deplibrary_names=`${SED} -n -e 's/^library_names=\(.*\)$/\1/p' $deplib` + eval deplibdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` if test -n "$deplibrary_names" ; then for tmp in $deplibrary_names ; do depdepl=$tmp done - if test -f "$path/$depdepl" ; then + if test -f "$deplibdir/$depdepl" ; then + depdepl="$deplibdir/$depdepl" + elif test -f "$path/$depdepl" ; then depdepl="$path/$depdepl" + else + # Can't find it, oh well... + depdepl= fi # do not add paths which are already there case " $newlib_search_path " in @@ -3059,9 +3125,10 @@ case $linkmode in oldlib) - if test -n "$deplibs"; then - $echo "$modename: warning: \`-l' and \`-L' are ignored for archives" 1>&2 - fi + case " $deplibs" in + *\ -l* | *\ -L*) + $echo "$modename: warning: \`-l' and \`-L' are ignored for archives" 1>&2 ;; + esac if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then $echo "$modename: warning: \`-dlopen' is ignored for archives" 1>&2 @@ -3189,7 +3256,7 @@ # which has an extra 1 added just for fun # case $version_type in - darwin|linux|osf|windows) + darwin|linux|osf|windows|none) current=`expr $number_major + $number_minor` age="$number_minor" revision="$number_revision" @@ -3200,9 +3267,10 @@ age="0" ;; irix|nonstopux) - current=`expr $number_major + $number_minor - 1` + current=`expr $number_major + $number_minor` age="$number_minor" revision="$number_minor" + lt_irix_increment=no ;; *) $echo "$modename: unknown library version type \`$version_type'" 1>&2 @@ -3266,7 +3334,8 @@ versuffix="$major.$age.$revision" # Darwin ld doesn't like 0 for these options... minor_current=`expr $current + 1` - verstring="${wl}-compatibility_version ${wl}$minor_current ${wl}-current_version ${wl}$minor_current.$revision" + xlcverstring="${wl}-compatibility_version ${wl}$minor_current ${wl}-current_version ${wl}$minor_current.$revision" + verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" ;; freebsd-aout) @@ -3280,8 +3349,11 @@ ;; irix | nonstopux) - major=`expr $current - $age + 1` - + if test "X$lt_irix_increment" = "Xno"; then + major=`expr $current - $age` + else + major=`expr $current - $age + 1` + fi case $version_type in nonstopux) verstring_prefix=nonstopux ;; *) verstring_prefix=sgi ;; @@ -3418,11 +3490,11 @@ fi # Eliminate all temporary directories. - for path in $notinst_path; do - lib_search_path=`$echo "$lib_search_path " | ${SED} -e "s% $path % %g"` - deplibs=`$echo "$deplibs " | ${SED} -e "s% -L$path % %g"` - dependency_libs=`$echo "$dependency_libs " | ${SED} -e "s% -L$path % %g"` - done + #for path in $notinst_path; do + # lib_search_path=`$echo "$lib_search_path " | ${SED} -e "s% $path % %g"` + # deplibs=`$echo "$deplibs " | ${SED} -e "s% -L$path % %g"` + # dependency_libs=`$echo "$dependency_libs " | ${SED} -e "s% -L$path % %g"` + #done if test -n "$xrpath"; then # If the user specified any rpath flags, then add them. @@ -3523,13 +3595,12 @@ int main() { return 0; } EOF $rm conftest - $LTCC $LTCFLAGS -o conftest conftest.c $deplibs - if test "$?" -eq 0 ; then + if $LTCC $LTCFLAGS -o conftest conftest.c $deplibs; then ldd_output=`ldd conftest` for i in $deplibs; do name=`expr $i : '-l\(.*\)'` # If $name is empty we are operating on a -L argument. - if test "$name" != "" && test "$name" -ne "0"; then + if test "$name" != "" && test "$name" != "0"; then if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then case " $predeps $postdeps " in *" $i "*) @@ -3568,9 +3639,7 @@ # If $name is empty we are operating on a -L argument. if test "$name" != "" && test "$name" != "0"; then $rm conftest - $LTCC $LTCFLAGS -o conftest conftest.c $i - # Did it work? - if test "$?" -eq 0 ; then + if $LTCC $LTCFLAGS -o conftest conftest.c $i; then ldd_output=`ldd conftest` if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then case " $predeps $postdeps " in @@ -3602,7 +3671,7 @@ droppeddeps=yes $echo $echo "*** Warning! Library $i is needed by this library but I was not able to" - $echo "*** make it link in! You will probably need to install it or some" + $echo "*** make it link in! You will probably need to install it or some" $echo "*** library that it depends on before this library will be fully" $echo "*** functional. Installing it before continuing would be even better." fi @@ -3888,7 +3957,10 @@ test -n "$hardcode_libdirs"; then libdir="$hardcode_libdirs" if test -n "$hardcode_libdir_flag_spec_ld"; then - eval dep_rpath=\"$hardcode_libdir_flag_spec_ld\" + case $archive_cmds in + *\$LD*) eval dep_rpath=\"$hardcode_libdir_flag_spec_ld\" ;; + *) eval dep_rpath=\"$hardcode_libdir_flag_spec\" ;; + esac else eval dep_rpath=\"$hardcode_libdir_flag_spec\" fi @@ -4198,9 +4270,10 @@ ;; obj) - if test -n "$deplibs"; then - $echo "$modename: warning: \`-l' and \`-L' are ignored for objects" 1>&2 - fi + case " $deplibs" in + *\ -l* | *\ -L*) + $echo "$modename: warning: \`-l' and \`-L' are ignored for objects" 1>&2 ;; + esac if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then $echo "$modename: warning: \`-dlopen' is ignored for objects" 1>&2 @@ -4247,12 +4320,14 @@ reload_conv_objs= gentop= # reload_cmds runs $LD directly, so let us get rid of - # -Wl from whole_archive_flag_spec + # -Wl from whole_archive_flag_spec and hope we can get by with + # turning comma into space.. wl= if test -n "$convenience"; then if test -n "$whole_archive_flag_spec"; then - eval reload_conv_objs=\"\$reload_objs $whole_archive_flag_spec\" + eval tmp_whole_archive_flags=\"$whole_archive_flag_spec\" + reload_conv_objs=$reload_objs\ `$echo "X$tmp_whole_archive_flags" | $Xsed -e 's|,| |g'` else gentop="$output_objdir/${obj}x" generated="$generated $gentop" @@ -4700,16 +4775,16 @@ case $host in *cygwin* | *mingw* ) if test -f "$output_objdir/${outputname}.def" ; then - compile_command=`$echo "X$compile_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}.def $output_objdir/${outputname}S.${objext}%"` - finalize_command=`$echo "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}.def $output_objdir/${outputname}S.${objext}%"` + compile_command=`$echo "X$compile_command" | $SP2NL | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}.def $output_objdir/${outputname}S.${objext}%" | $NL2SP` + finalize_command=`$echo "X$finalize_command" | $SP2NL | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}.def $output_objdir/${outputname}S.${objext}%" | $NL2SP` else - compile_command=`$echo "X$compile_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%"` - finalize_command=`$echo "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%"` + compile_command=`$echo "X$compile_command" | $SP2NL | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%" | $NL2SP` + finalize_command=`$echo "X$finalize_command" | $SP2NL | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%" | $NL2SP` fi ;; * ) - compile_command=`$echo "X$compile_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%"` - finalize_command=`$echo "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%"` + compile_command=`$echo "X$compile_command" | $SP2NL | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%" | $NL2SP` + finalize_command=`$echo "X$finalize_command" | $SP2NL | $Xsed -e "s%@SYMFILE@%$output_objdir/${outputname}S.${objext}%" | $NL2SP` ;; esac ;; @@ -4724,13 +4799,13 @@ # really was required. # Nullify the symbol file. - compile_command=`$echo "X$compile_command" | $Xsed -e "s% @SYMFILE@%%"` - finalize_command=`$echo "X$finalize_command" | $Xsed -e "s% @SYMFILE@%%"` + compile_command=`$echo "X$compile_command" | $SP2NL | $Xsed -e "s% @SYMFILE@%%" | $NL2SP` + finalize_command=`$echo "X$finalize_command" | $SP2NL | $Xsed -e "s% @SYMFILE@%%" | $NL2SP` fi if test "$need_relink" = no || test "$build_libtool_libs" != yes; then # Replace the output file specification. - compile_command=`$echo "X$compile_command" | $Xsed -e 's%@OUTPUT@%'"$output"'%g'` + compile_command=`$echo "X$compile_command" | $SP2NL | $Xsed -e 's%@OUTPUT@%'"$output"'%g' | $NL2SP` link_command="$compile_command$compile_rpath" # We have no uninstalled library dependencies, so finalize right now. @@ -4817,7 +4892,7 @@ if test "$fast_install" != no; then link_command="$finalize_var$compile_command$finalize_rpath" if test "$fast_install" = yes; then - relink_command=`$echo "X$compile_var$compile_command$compile_rpath" | $Xsed -e 's%@OUTPUT@%\$progdir/\$file%g'` + relink_command=`$echo "X$compile_var$compile_command$compile_rpath" | $SP2NL | $Xsed -e 's%@OUTPUT@%\$progdir/\$file%g' | $NL2SP` else # fast_install is set to needless relink_command= @@ -4854,7 +4929,7 @@ fi done relink_command="(cd `pwd`; $relink_command)" - relink_command=`$echo "X$relink_command" | $Xsed -e "$sed_quote_subst"` + relink_command=`$echo "X$relink_command" | $SP2NL | $Xsed -e "$sed_quote_subst" | $NL2SP` fi # Quote $echo for shipping. @@ -5261,6 +5336,20 @@ Xsed='${SED} -e 1s/^X//' sed_quote_subst='$sed_quote_subst' +# Be Bourne compatible (taken from Autoconf:_AS_BOURNE_COMPATIBLE). +if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on \${1+\"\$@\"}, which + # is contrary to our usage. Disable this feature. + alias -g '\${1+\"\$@\"}'='\"\$@\"' + setopt NO_GLOB_SUBST +else + case \`(set -o) 2>/dev/null\` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + # The HP-UX ksh and POSIX shell print the target directory to stdout # if CDPATH is set. (unset CDPATH) >/dev/null 2>&1 && unset CDPATH @@ -5403,7 +5492,7 @@ ;; esac $echo >> $output "\ - \$echo \"\$0: cannot exec \$program \${1+\"\$@\"}\" + \$echo \"\$0: cannot exec \$program \$*\" exit $EXIT_FAILURE fi else @@ -5589,7 +5678,7 @@ done # Quote the link command for shipping. relink_command="(cd `pwd`; $SHELL $progpath $preserve_args --mode=relink $libtool_args @inst_prefix_dir@)" - relink_command=`$echo "X$relink_command" | $Xsed -e "$sed_quote_subst"` + relink_command=`$echo "X$relink_command" | $SP2NL | $Xsed -e "$sed_quote_subst" | $NL2SP` if test "$hardcode_automatic" = yes ; then relink_command= fi @@ -5934,9 +6023,9 @@ if test -n "$inst_prefix_dir"; then # Stick the inst_prefix_dir data into the link command. - relink_command=`$echo "$relink_command" | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"` + relink_command=`$echo "$relink_command" | $SP2NL | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%" | $NL2SP` else - relink_command=`$echo "$relink_command" | $SED "s%@inst_prefix_dir@%%"` + relink_command=`$echo "$relink_command" | $SP2NL | $SED "s%@inst_prefix_dir@%%" | $NL2SP` fi $echo "$modename: warning: relinking \`$file'" 1>&2 @@ -6145,7 +6234,7 @@ file=`$echo "X$file$stripped_ext" | $Xsed -e 's%^.*/%%'` outputname="$tmpdir/$file" # Replace the output file specification. - relink_command=`$echo "X$relink_command" | $Xsed -e 's%@OUTPUT@%'"$outputname"'%g'` + relink_command=`$echo "X$relink_command" | $SP2NL | $Xsed -e 's%@OUTPUT@%'"$outputname"'%g' | $NL2SP` $show "$relink_command" if $run eval "$relink_command"; then : @@ -6356,8 +6445,10 @@ if test -f "$dir/$objdir/$dlname"; then dir="$dir/$objdir" else - $echo "$modename: cannot find \`$dlname' in \`$dir' or \`$dir/$objdir'" 1>&2 - exit $EXIT_FAILURE + if test ! -f "$dir/$dlname"; then + $echo "$modename: cannot find \`$dlname' in \`$dir' or \`$dir/$objdir'" 1>&2 + exit $EXIT_FAILURE + fi fi ;; @@ -6421,12 +6512,12 @@ fi # Restore saved environment variables - if test "${save_LC_ALL+set}" = set; then - LC_ALL="$save_LC_ALL"; export LC_ALL - fi - if test "${save_LANG+set}" = set; then - LANG="$save_LANG"; export LANG - fi + for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES + do + eval "if test \"\${save_$lt_var+set}\" = set; then + $lt_var=\$save_$lt_var; export $lt_var + fi" + done # Now prepare to actually exec the command. exec_cmd="\$cmd$args" @@ -6783,9 +6874,9 @@ -dlpreopen FILE link in FILE and add its symbols to lt_preloaded_symbols -export-dynamic allow symbols from OUTPUT-FILE to be resolved with dlsym(3) -export-symbols SYMFILE - try to export only the symbols listed in SYMFILE + try to export only the symbols listed in SYMFILE -export-symbols-regex REGEX - try to export only the symbols matching REGEX + try to export only the symbols matching REGEX -LLIBDIR search LIBDIR for required installed libraries -lNAME OUTPUT-FILE requires the installed library libNAME -module build a library that can dlopened @@ -6799,9 +6890,11 @@ -release RELEASE specify package release information -rpath LIBDIR the created library will eventually be installed in LIBDIR -R[ ]LIBDIR add LIBDIR to the runtime path of programs and libraries - -static do not do any dynamic linking of libtool libraries + -static do not do any dynamic linking of uninstalled libtool libraries + -static-libtool-libs + do not do any dynamic linking of libtool libraries -version-info CURRENT[:REVISION[:AGE]] - specify library version info [each variable defaults to 0] + specify library version info [each variable defaults to 0] All other options (arguments beginning with \`-') are ignored. diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/Makefile.am /tmp/5JEwQoyJ2h/libdrm-2.3.1/Makefile.am --- libdrm-2.3.0.16/Makefile.am 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/Makefile.am 2008-07-01 08:50:43.000000000 +0100 @@ -22,7 +22,7 @@ # here too, but let's just do libdrm for now AUTOMAKE_OPTIONS = foreign -SUBDIRS = libdrm shared-core +SUBDIRS = libdrm shared-core tests pkgconfigdir = @pkgconfigdir@ pkgconfig_DATA = libdrm.pc diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/Makefile.in /tmp/5JEwQoyJ2h/libdrm-2.3.1/Makefile.in --- libdrm-2.3.0.16/Makefile.in 2008-05-15 22:47:17.000000000 +0100 +++ libdrm-2.3.1/Makefile.in 2009-04-20 07:00:29.000000000 +0100 @@ -58,8 +58,8 @@ subdir = . DIST_COMMON = README $(am__configure_deps) $(srcdir)/Makefile.am \ $(srcdir)/Makefile.in $(srcdir)/libdrm.pc.in \ - $(top_srcdir)/configure config.guess config.sub depcomp \ - install-sh ltmain.sh missing + $(top_srcdir)/configure ChangeLog config.guess config.sub \ + depcomp install-sh ltmain.sh missing ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/configure.ac am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ @@ -213,7 +213,7 @@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ AUTOMAKE_OPTIONS = foreign -SUBDIRS = libdrm shared-core +SUBDIRS = libdrm shared-core tests pkgconfig_DATA = libdrm.pc EXTRA_DIST = libdrm.pc.in all: all-recursive diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/missing /tmp/5JEwQoyJ2h/libdrm-2.3.1/missing --- libdrm-2.3.0.16/missing 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/missing 2008-07-01 08:55:48.000000000 +0100 @@ -1,9 +1,9 @@ #! /bin/sh # Common stub for a few missing GNU programs while installing. -scriptversion=2005-06-08.21 +scriptversion=2006-05-10.23 -# Copyright (C) 1996, 1997, 1999, 2000, 2002, 2003, 2004, 2005 +# Copyright (C) 1996, 1997, 1999, 2000, 2002, 2003, 2004, 2005, 2006 # Free Software Foundation, Inc. # Originally by Fran,cois Pinard , 1996. @@ -33,6 +33,8 @@ fi run=: +sed_output='s/.* --output[ =]\([^ ]*\).*/\1/p' +sed_minuso='s/.* -o \([^ ]*\).*/\1/p' # In the cases where this matters, `missing' is being run in the # srcdir already. @@ -44,7 +46,7 @@ msg="missing on your system" -case "$1" in +case $1 in --run) # Try to run requested program, and just exit if it succeeds. run= @@ -77,6 +79,7 @@ aclocal touch file \`aclocal.m4' autoconf touch file \`configure' autoheader touch file \`config.h.in' + autom4te touch the output file, or create a stub one automake touch all \`Makefile.in' files bison create \`y.tab.[ch]', if possible, from existing .[ch] flex create \`lex.yy.c', if possible, from existing .c @@ -106,7 +109,7 @@ # Now exit if we have it, but it failed. Also exit now if we # don't have it and --version was passed (most likely to detect # the program). -case "$1" in +case $1 in lex|yacc) # Not GNU programs, they don't have --version. ;; @@ -135,7 +138,7 @@ # If it does not exist, or fails to run (possibly an outdated version), # try to emulate it. -case "$1" in +case $1 in aclocal*) echo 1>&2 "\ WARNING: \`$1' is $msg. You should only need it if @@ -164,7 +167,7 @@ test -z "$files" && files="config.h" touch_files= for f in $files; do - case "$f" in + case $f in *:*) touch_files="$touch_files "`echo "$f" | sed -e 's/^[^:]*://' -e 's/:.*//'`;; *) touch_files="$touch_files $f.in";; @@ -192,8 +195,8 @@ You can get \`$1' as part of \`Autoconf' from any GNU archive site." - file=`echo "$*" | sed -n 's/.*--output[ =]*\([^ ]*\).*/\1/p'` - test -z "$file" && file=`echo "$*" | sed -n 's/.*-o[ ]*\([^ ]*\).*/\1/p'` + file=`echo "$*" | sed -n "$sed_output"` + test -z "$file" && file=`echo "$*" | sed -n "$sed_minuso"` if test -f "$file"; then touch $file else @@ -214,25 +217,25 @@ in order for those modifications to take effect. You can get \`Bison' from any GNU archive site." rm -f y.tab.c y.tab.h - if [ $# -ne 1 ]; then + if test $# -ne 1; then eval LASTARG="\${$#}" - case "$LASTARG" in + case $LASTARG in *.y) SRCFILE=`echo "$LASTARG" | sed 's/y$/c/'` - if [ -f "$SRCFILE" ]; then + if test -f "$SRCFILE"; then cp "$SRCFILE" y.tab.c fi SRCFILE=`echo "$LASTARG" | sed 's/y$/h/'` - if [ -f "$SRCFILE" ]; then + if test -f "$SRCFILE"; then cp "$SRCFILE" y.tab.h fi ;; esac fi - if [ ! -f y.tab.h ]; then + if test ! -f y.tab.h; then echo >y.tab.h fi - if [ ! -f y.tab.c ]; then + if test ! -f y.tab.c; then echo 'main() { return 0; }' >y.tab.c fi ;; @@ -244,18 +247,18 @@ in order for those modifications to take effect. You can get \`Flex' from any GNU archive site." rm -f lex.yy.c - if [ $# -ne 1 ]; then + if test $# -ne 1; then eval LASTARG="\${$#}" - case "$LASTARG" in + case $LASTARG in *.l) SRCFILE=`echo "$LASTARG" | sed 's/l$/c/'` - if [ -f "$SRCFILE" ]; then + if test -f "$SRCFILE"; then cp "$SRCFILE" lex.yy.c fi ;; esac fi - if [ ! -f lex.yy.c ]; then + if test ! -f lex.yy.c; then echo 'main() { return 0; }' >lex.yy.c fi ;; @@ -267,11 +270,9 @@ \`Help2man' package in order for those modifications to take effect. You can get \`Help2man' from any GNU archive site." - file=`echo "$*" | sed -n 's/.*-o \([^ ]*\).*/\1/p'` - if test -z "$file"; then - file=`echo "$*" | sed -n 's/.*--output=\([^ ]*\).*/\1/p'` - fi - if [ -f "$file" ]; then + file=`echo "$*" | sed -n "$sed_output"` + test -z "$file" && file=`echo "$*" | sed -n "$sed_minuso"` + if test -f "$file"; then touch $file else test -z "$file" || exec >$file @@ -289,11 +290,17 @@ DU, IRIX). You might want to install the \`Texinfo' package or the \`GNU make' package. Grab either from any GNU archive site." # The file to touch is that specified with -o ... - file=`echo "$*" | sed -n 's/.*-o \([^ ]*\).*/\1/p'` + file=`echo "$*" | sed -n "$sed_output"` + test -z "$file" && file=`echo "$*" | sed -n "$sed_minuso"` if test -z "$file"; then # ... or it is the one specified with @setfilename ... infile=`echo "$*" | sed 's/.* \([^ ]*\) *$/\1/'` - file=`sed -n '/^@setfilename/ { s/.* \([^ ]*\) *$/\1/; p; q; }' $infile` + file=`sed -n ' + /^@setfilename/{ + s/.* \([^ ]*\) *$/\1/ + p + q + }' $infile` # ... or it is derived from the source name (dir/f.texi becomes f.info) test -z "$file" && file=`echo "$infile" | sed 's,.*/,,;s,.[^.]*$,,'`.info fi @@ -317,13 +324,13 @@ fi firstarg="$1" if shift; then - case "$firstarg" in + case $firstarg in *o*) firstarg=`echo "$firstarg" | sed s/o//` tar "$firstarg" "$@" && exit 0 ;; esac - case "$firstarg" in + case $firstarg in *h*) firstarg=`echo "$firstarg" | sed s/h//` tar "$firstarg" "$@" && exit 0 diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/README /tmp/5JEwQoyJ2h/libdrm-2.3.1/README --- libdrm-2.3.0.16/README 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/README 2008-07-01 08:50:43.000000000 +0100 @@ -1,4 +1,69 @@ -By default, this will install into /usr/local. If you want to install this -libdrm to replace your system copy, say: -./configure --prefix=/usr --exec-prefix=/ +DRM README file + + +There are two main parts to this package: the DRM client library/interface +(libdrm.so) and kernel/hardware-specific device modules (such as i915.ko). + + + +Compiling +--------- + +By default, libdrm and the DRM header files will install into /usr/local/. +If you want to install this DRM to replace your system copy, say: + + ./configure --prefix=/usr --exec-prefix=/ + +Then, + make install + + +To build the device-specific kernel modules: + + cd linux-core/ + make + cp *.ko /lib/modules/VERSION/kernel/drivers/char/drm/ + (where VERSION is your kernel version: uname -f) + +Or, + cd bsd-core/ + make + copy the kernel modules to the appropriate place + + + +Tips & Trouble-shooting +----------------------- + +1. You'll need kernel sources. If using Fedora Core 5, for example, you may + need to install RPMs such as: + + kernel-smp-devel-2.6.15-1.2054_FC5.i686.rpm + kernel-devel-2.6.15-1.2054_FC5.i686.rpm + etc. + + +2. You may need to make a symlink from /lib/modules/VERSION/build to your + kernel sources in /usr/src/kernels/VERSION (where version is `uname -r`): + + cd /lib/modules/VERSION + ln -s /usr/src/kernels/VERSION build + + +3. If you've build the kernel modules but they won't load because of an + error like this: + + $ /sbin/modprobe drm + FATAL: Error inserting drm (/lib/modules/2.6.15-1.2054_FC5smp/kernel/drivers/char/drm/drm.ko): Invalid module format + + And 'dmesg|tail' says: + + drm: disagrees about version of symbol struct_module + + Try recompiling your drm modules without the Module.symvers file. + That is rm the /usr/src/kernels/2.6.15-1.2054_FC5-smp-i686/Module.symvers + file (or rename it). Then do a 'make clean' before rebuilding your drm + modules. + + diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/drm.h --- libdrm-2.3.0.16/shared-core/drm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/drm.h 2008-07-01 08:55:17.000000000 +0100 @@ -236,7 +236,6 @@ _DRM_AGP = 3, /**< AGP/GART */ _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ - _DRM_TTM = 6 }; /** @@ -250,7 +249,7 @@ _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ _DRM_REMOVABLE = 0x40, /**< Removable mapping */ - _DRM_DRIVER = 0x80 /**< Driver will take care of it */ + _DRM_DRIVER = 0x80 /**< Managed by driver */ }; struct drm_ctx_priv_map { @@ -555,6 +554,20 @@ struct drm_wait_vblank_reply reply; }; + +#define _DRM_PRE_MODESET 1 +#define _DRM_POST_MODESET 2 + +/** + * DRM_IOCTL_MODESET_CTL ioctl argument type + * + * \sa drmModesetCtl(). + */ +struct drm_modeset_ctl { + uint32_t crtc; + uint32_t cmd; +}; + /** * DRM_IOCTL_AGP_ENABLE ioctl argument type. * @@ -627,401 +640,6 @@ int drm_dd_minor; }; - -#define DRM_FENCE_FLAG_EMIT 0x00000001 -#define DRM_FENCE_FLAG_SHAREABLE 0x00000002 -#define DRM_FENCE_FLAG_WAIT_LAZY 0x00000004 -#define DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS 0x00000008 -#define DRM_FENCE_FLAG_NO_USER 0x00000010 - -/* Reserved for driver use */ -#define DRM_FENCE_MASK_DRIVER 0xFF000000 - -#define DRM_FENCE_TYPE_EXE 0x00000001 - -struct drm_fence_arg { - unsigned int handle; - unsigned int fence_class; - unsigned int type; - unsigned int flags; - unsigned int signaled; - unsigned int error; - unsigned int sequence; - unsigned int pad64; - uint64_t expand_pad[2]; /*Future expansion */ -}; - -/* Buffer permissions, referring to how the GPU uses the buffers. - * these translate to fence types used for the buffers. - * Typically a texture buffer is read, A destination buffer is write and - * a command (batch-) buffer is exe. Can be or-ed together. - */ - -#define DRM_BO_FLAG_READ (1ULL << 0) -#define DRM_BO_FLAG_WRITE (1ULL << 1) -#define DRM_BO_FLAG_EXE (1ULL << 2) - -/* - * Status flags. Can be read to determine the actual state of a buffer. - * Can also be set in the buffer mask before validation. - */ - -/* - * Mask: Never evict this buffer. Not even with force. This type of buffer is only - * available to root and must be manually removed before buffer manager shutdown - * or lock. - * Flags: Acknowledge - */ -#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) - -/* - * Mask: Require that the buffer is placed in mappable memory when validated. - * If not set the buffer may or may not be in mappable memory when validated. - * Flags: If set, the buffer is in mappable memory. - */ -#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) - -/* Mask: The buffer should be shareable with other processes. - * Flags: The buffer is shareable with other processes. - */ -#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) - -/* Mask: If set, place the buffer in cache-coherent memory if available. - * If clear, never place the buffer in cache coherent memory if validated. - * Flags: The buffer is currently in cache-coherent memory. - */ -#define DRM_BO_FLAG_CACHED (1ULL << 7) - -/* Mask: Make sure that every time this buffer is validated, - * it ends up on the same location provided that the memory mask is the same. - * The buffer will also not be evicted when claiming space for - * other buffers. Basically a pinned buffer but it may be thrown out as - * part of buffer manager shutdown or locking. - * Flags: Acknowledge. - */ -#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) - -/* Mask: Make sure the buffer is in cached memory when mapped - * Flags: Acknowledge. - * Buffers allocated with this flag should not be used for suballocators - * This type may have issues on CPUs with over-aggressive caching - * http://marc.info/?l=linux-kernel&m=102376926732464&w=2 - */ -#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19) - - -/* Mask: Force DRM_BO_FLAG_CACHED flag strictly also if it is set. - * Flags: Acknowledge. - */ -#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) - -/* - * Mask: Force DRM_BO_FLAG_MAPPABLE flag strictly also if it is clear. - * Flags: Acknowledge. - */ -#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) -#define DRM_BO_FLAG_TILE (1ULL << 15) - -/* - * Memory type flags that can be or'ed together in the mask, but only - * one appears in flags. - */ - -/* System memory */ -#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) -/* Translation table memory */ -#define DRM_BO_FLAG_MEM_TT (1ULL << 25) -/* Vram memory */ -#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) -/* Up to the driver to define. */ -#define DRM_BO_FLAG_MEM_PRIV0 (1ULL << 27) -#define DRM_BO_FLAG_MEM_PRIV1 (1ULL << 28) -#define DRM_BO_FLAG_MEM_PRIV2 (1ULL << 29) -#define DRM_BO_FLAG_MEM_PRIV3 (1ULL << 30) -#define DRM_BO_FLAG_MEM_PRIV4 (1ULL << 31) -/* We can add more of these now with a 64-bit flag type */ - -/* Memory flag mask */ -#define DRM_BO_MASK_MEM 0x00000000FF000000ULL -#define DRM_BO_MASK_MEMTYPE 0x00000000FF0800A0ULL - -/* Driver-private flags */ -#define DRM_BO_MASK_DRIVER 0xFFFF000000000000ULL - -/* Don't block on validate and map */ -#define DRM_BO_HINT_DONT_BLOCK 0x00000002 -/* Don't place this buffer on the unfenced list.*/ -#define DRM_BO_HINT_DONT_FENCE 0x00000004 -#define DRM_BO_HINT_WAIT_LAZY 0x00000008 -#define DRM_BO_HINT_PRESUMED_OFFSET 0x00000010 - -#define DRM_BO_INIT_MAGIC 0xfe769812 -#define DRM_BO_INIT_MAJOR 1 -#define DRM_BO_INIT_MINOR 0 -#define DRM_BO_INIT_PATCH 0 - - -struct drm_bo_info_req { - uint64_t mask; - uint64_t flags; - unsigned int handle; - unsigned int hint; - unsigned int fence_class; - unsigned int desired_tile_stride; - unsigned int tile_info; - unsigned int pad64; - uint64_t presumed_offset; -}; - -struct drm_bo_create_req { - uint64_t mask; - uint64_t size; - uint64_t buffer_start; - unsigned int hint; - unsigned int page_alignment; -}; - - -/* - * Reply flags - */ - -#define DRM_BO_REP_BUSY 0x00000001 - -struct drm_bo_info_rep { - uint64_t flags; - uint64_t mask; - uint64_t size; - uint64_t offset; - uint64_t arg_handle; - uint64_t buffer_start; - unsigned int handle; - unsigned int fence_flags; - unsigned int rep_flags; - unsigned int page_alignment; - unsigned int desired_tile_stride; - unsigned int hw_tile_stride; - unsigned int tile_info; - unsigned int pad64; - uint64_t expand_pad[4]; /*Future expansion */ -}; - -struct drm_bo_arg_rep { - struct drm_bo_info_rep bo_info; - int ret; - unsigned int pad64; -}; - -struct drm_bo_create_arg { - union { - struct drm_bo_create_req req; - struct drm_bo_info_rep rep; - } d; -}; - -struct drm_bo_handle_arg { - unsigned int handle; -}; - -struct drm_bo_reference_info_arg { - union { - struct drm_bo_handle_arg req; - struct drm_bo_info_rep rep; - } d; -}; - -struct drm_bo_map_wait_idle_arg { - union { - struct drm_bo_info_req req; - struct drm_bo_info_rep rep; - } d; -}; - -struct drm_bo_op_req { - enum { - drm_bo_validate, - drm_bo_fence, - drm_bo_ref_fence, - } op; - unsigned int arg_handle; - struct drm_bo_info_req bo_req; -}; - - -struct drm_bo_op_arg { - uint64_t next; - union { - struct drm_bo_op_req req; - struct drm_bo_arg_rep rep; - } d; - int handled; - unsigned int pad64; -}; - - -#define DRM_BO_MEM_LOCAL 0 -#define DRM_BO_MEM_TT 1 -#define DRM_BO_MEM_VRAM 2 -#define DRM_BO_MEM_PRIV0 3 -#define DRM_BO_MEM_PRIV1 4 -#define DRM_BO_MEM_PRIV2 5 -#define DRM_BO_MEM_PRIV3 6 -#define DRM_BO_MEM_PRIV4 7 - -#define DRM_BO_MEM_TYPES 8 /* For now. */ - -#define DRM_BO_LOCK_UNLOCK_BM (1 << 0) -#define DRM_BO_LOCK_IGNORE_NO_EVICT (1 << 1) - -struct drm_bo_version_arg { - uint32_t major; - uint32_t minor; - uint32_t patchlevel; -}; - -struct drm_mm_type_arg { - unsigned int mem_type; - unsigned int lock_flags; -}; - -struct drm_mm_init_arg { - unsigned int magic; - unsigned int major; - unsigned int minor; - unsigned int mem_type; - uint64_t p_offset; - uint64_t p_size; -}; - -/* - * Drm mode setting - */ -#define DRM_DISPLAY_INFO_LEN 32 -#define DRM_OUTPUT_NAME_LEN 32 -#define DRM_DISPLAY_MODE_LEN 32 -#define DRM_PROP_NAME_LEN 32 - -#define DRM_MODE_TYPE_BUILTIN (1<<0) -#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) -#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) -#define DRM_MODE_TYPE_PREFERRED (1<<3) -#define DRM_MODE_TYPE_DEFAULT (1<<4) -#define DRM_MODE_TYPE_USERDEF (1<<5) -#define DRM_MODE_TYPE_DRIVER (1<<6) -#define DRM_MODE_TYPE_USERPREF (1<<7) - -struct drm_mode_modeinfo { - - unsigned int id; - - unsigned int clock; - unsigned short hdisplay, hsync_start, hsync_end, htotal, hskew; - unsigned short vdisplay, vsync_start, vsync_end, vtotal, vscan; - - unsigned int vrefresh; /* vertical refresh * 1000 */ - - unsigned int flags; - unsigned int type; - char name[DRM_DISPLAY_MODE_LEN]; -}; - -struct drm_mode_card_res { - - int count_fbs; - unsigned int __user *fb_id; - - int count_crtcs; - unsigned int __user *crtc_id; - - int count_outputs; - unsigned int __user *output_id; - - int count_modes; - struct drm_mode_modeinfo __user *modes; - -}; - -struct drm_mode_crtc { - unsigned int crtc_id; /**< Id */ - unsigned int fb_id; /**< Id of framebuffer */ - - int x, y; /**< Position on the frameuffer */ - - unsigned int mode; /**< Current mode used */ - - int count_outputs; - unsigned int outputs; /**< Outputs that are connected */ - - int count_possibles; - unsigned int possibles; /**< Outputs that can be connected */ - - unsigned int __user *set_outputs; /**< Outputs to be connected */ - - int gamma_size; - -}; - -struct drm_mode_get_output { - - unsigned int output; /**< Id */ - unsigned int crtc; /**< Id of crtc */ - unsigned char name[DRM_OUTPUT_NAME_LEN]; - - unsigned int connection; - unsigned int mm_width, mm_height; /**< HxW in millimeters */ - unsigned int subpixel; - - int count_crtcs; - unsigned int crtcs; /**< possible crtc to connect to */ - - int count_clones; - unsigned int clones; /**< list of clones */ - - int count_modes; - unsigned int __user *modes; /**< list of modes it supports */ - - int count_props; - unsigned int __user *props; - unsigned int __user *prop_values; -}; - -#define DRM_MODE_PROP_PENDING (1<<0) -#define DRM_MODE_PROP_RANGE (1<<1) -#define DRM_MODE_PROP_IMMUTABLE (1<<2) -#define DRM_MODE_PROP_ENUM (1<<3) // enumerated type with text strings - -struct drm_mode_property_enum { - uint32_t value; - unsigned char name[DRM_PROP_NAME_LEN]; -}; - -struct drm_mode_get_property { - - unsigned int prop_id; - unsigned int flags; - unsigned char name[DRM_PROP_NAME_LEN]; - - int count_values; - uint32_t __user *values; - - int count_enums; - struct drm_mode_property_enum *enums; -}; - -struct drm_mode_fb_cmd { - unsigned int buffer_id; - unsigned int width, height; - unsigned int pitch; - unsigned int bpp; - unsigned int handle; - unsigned int depth; -}; - -struct drm_mode_mode_cmd { - unsigned int output_id; - unsigned int mode_id; -}; - /** * \name Ioctls Definitions */ @@ -1041,6 +659,7 @@ #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) +#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) @@ -1082,52 +701,13 @@ #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) -#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, struct drm_scatter_gather) +#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) -#define DRM_IOCTL_MM_INIT DRM_IOWR(0xc0, struct drm_mm_init_arg) -#define DRM_IOCTL_MM_TAKEDOWN DRM_IOWR(0xc1, struct drm_mm_type_arg) -#define DRM_IOCTL_MM_LOCK DRM_IOWR(0xc2, struct drm_mm_type_arg) -#define DRM_IOCTL_MM_UNLOCK DRM_IOWR(0xc3, struct drm_mm_type_arg) - -#define DRM_IOCTL_FENCE_CREATE DRM_IOWR(0xc4, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_REFERENCE DRM_IOWR(0xc6, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_UNREFERENCE DRM_IOWR(0xc7, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_SIGNALED DRM_IOWR(0xc8, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_FLUSH DRM_IOWR(0xc9, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_WAIT DRM_IOWR(0xca, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_EMIT DRM_IOWR(0xcb, struct drm_fence_arg) -#define DRM_IOCTL_FENCE_BUFFERS DRM_IOWR(0xcc, struct drm_fence_arg) - -#define DRM_IOCTL_BO_CREATE DRM_IOWR(0xcd, struct drm_bo_create_arg) -#define DRM_IOCTL_BO_MAP DRM_IOWR(0xcf, struct drm_bo_map_wait_idle_arg) -#define DRM_IOCTL_BO_UNMAP DRM_IOWR(0xd0, struct drm_bo_handle_arg) -#define DRM_IOCTL_BO_REFERENCE DRM_IOWR(0xd1, struct drm_bo_reference_info_arg) -#define DRM_IOCTL_BO_UNREFERENCE DRM_IOWR(0xd2, struct drm_bo_handle_arg) -#define DRM_IOCTL_BO_SETSTATUS DRM_IOWR(0xd3, struct drm_bo_map_wait_idle_arg) -#define DRM_IOCTL_BO_INFO DRM_IOWR(0xd4, struct drm_bo_reference_info_arg) -#define DRM_IOCTL_BO_WAIT_IDLE DRM_IOWR(0xd5, struct drm_bo_map_wait_idle_arg) -#define DRM_IOCTL_BO_VERSION DRM_IOR(0xd6, struct drm_bo_version_arg) - - -#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) -#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) -#define DRM_IOCTL_MODE_GETOUTPUT DRM_IOWR(0xA2, struct drm_mode_get_output) -#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA3, struct drm_mode_crtc) -#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xA4, struct drm_mode_fb_cmd) -#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xA5, unsigned int) -#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xA6, struct drm_mode_fb_cmd) - -#define DRM_IOCTL_MODE_ADDMODE DRM_IOWR(0xA7, struct drm_mode_modeinfo) -#define DRM_IOCTL_MODE_RMMODE DRM_IOWR(0xA8, unsigned int) -#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) -#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xAA, struct drm_mode_mode_cmd) - -#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAB, struct drm_mode_get_property) /*@}*/ /** @@ -1183,10 +763,6 @@ typedef struct drm_scatter_gather drm_scatter_gather_t; typedef struct drm_set_version drm_set_version_t; -typedef struct drm_fence_arg drm_fence_arg_t; -typedef struct drm_mm_type_arg drm_mm_type_arg_t; -typedef struct drm_mm_init_arg drm_mm_init_arg_t; -typedef enum drm_bo_type drm_bo_type_t; #endif #endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/drm_internal.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/drm_internal.h --- libdrm-2.3.0.16/shared-core/drm_internal.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/drm_internal.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,40 @@ +/* + * Copyright 2007 Red Hat, Inc + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* This header file holds function prototypes and data types that are + * internal to the drm (not exported to user space) but shared across + * drivers and platforms */ + +#ifndef __DRM_INTERNAL_H__ +#define __DRM_INTERNAL_H__ + +/** + * Drawable information. + */ +struct drm_drawable_info { + unsigned int num_rects; + struct drm_clip_rect *rects; +}; + +#endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/drm_pciids.txt /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/drm_pciids.txt --- libdrm-2.3.0.16/shared-core/drm_pciids.txt 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/drm_pciids.txt 2009-04-20 07:00:29.000000000 +0100 @@ -79,6 +79,7 @@ 0x1002 0x5460 CHIP_RV380|RADEON_IS_MOBILITY "ATI Radeon Mobility X300 M22" 0x1002 0x5462 CHIP_RV380|RADEON_IS_MOBILITY "ATI Radeon Mobility X600 SE M24C" 0x1002 0x5464 CHIP_RV380|RADEON_IS_MOBILITY "ATI FireGL M22 GL 5464" +0x1002 0x5657 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X550XTX" 0x1002 0x5548 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R423 X800" 0x1002 0x5549 CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R423 X800 Pro" 0x1002 0x554A CHIP_R420|RADEON_NEW_MEMMAP "ATI Radeon R423 X800 XT PE" @@ -98,20 +99,18 @@ 0x1002 0x5653 CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon Mobility X700 M26" 0x1002 0x5834 CHIP_RS300|RADEON_IS_IGP "ATI Radeon RS300 9100 IGP" 0x1002 0x5835 CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY "ATI Radeon RS300 Mobility IGP" -0x1002 0x5954 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI RS480 XPRESS 200G" -0x1002 0x5955 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon XPRESS 200M 5955" -0x1002 0x5974 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS482 XPRESS 200" -0x1002 0x5975 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS485 XPRESS 1100 IGP" +0x1002 0x5954 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI RS480 XPRESS 200G" +0x1002 0x5955 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon XPRESS 200M 5955" +0x1002 0x5974 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS482 XPRESS 200" +0x1002 0x5975 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS485 XPRESS 1100 IGP" 0x1002 0x5960 CHIP_RV280 "ATI Radeon RV280 9250" 0x1002 0x5961 CHIP_RV280 "ATI Radeon RV280 9200" 0x1002 0x5962 CHIP_RV280 "ATI Radeon RV280 9200" 0x1002 0x5964 CHIP_RV280 "ATI Radeon RV280 9200 SE" 0x1002 0x5965 CHIP_RV280 "ATI FireMV 2200 PCI" 0x1002 0x5969 CHIP_RV100 "ATI ES1000 RN50" -0x1002 0x5a41 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS400 XPRESS 200" -0x1002 0x5a42 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RS400 XPRESS 200M" -0x1002 0x5a61 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RC410 XPRESS 200" -0x1002 0x5a62 CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RC410 XPRESS 200M" +0x1002 0x5a61 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RC410 XPRESS 200" +0x1002 0x5a62 CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART "ATI Radeon RC410 XPRESS 200M" 0x1002 0x5b60 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X300 SE" 0x1002 0x5b62 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X600 Pro" 0x1002 0x5b63 CHIP_RV380|RADEON_NEW_MEMMAP "ATI Radeon RV370 X550" @@ -135,8 +134,105 @@ 0x1002 0x5e4c CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700 SE" 0x1002 0x5e4d CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700" 0x1002 0x5e4f CHIP_RV410|RADEON_NEW_MEMMAP "ATI Radeon RV410 X700 SE" +0x1002 0x7100 CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800" +0x1002 0x7101 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1800 XT" +0x1002 0x7102 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1800" +0x1002 0x7103 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V7200" +0x1002 0x7104 CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V7200" +0x1002 0x7105 CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V5300" +0x1002 0x7106 CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V7100" +0x1002 0x7108 CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800" +0x1002 0x7109 CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800" +0x1002 0x710A CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800" +0x1002 0x710B CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800" +0x1002 0x710C CHIP_R520|RADEON_NEW_MEMMAP "ATI Radeon X1800" +0x1002 0x710E CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V7300" +0x1002 0x710F CHIP_R520|RADEON_NEW_MEMMAP "ATI FireGL V7350" +0x1002 0x7140 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1600" +0x1002 0x7141 CHIP_RV515|RADEON_NEW_MEMMAP "ATI RV505" +0x1002 0x7142 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550" +0x1002 0x7143 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550" +0x1002 0x7144 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI M54-GL" +0x1002 0x7145 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1400" +0x1002 0x7146 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550" +0x1002 0x7147 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550 64-bit" +0x1002 0x7149 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300" +0x1002 0x714A CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300" +0x1002 0x714B CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300" +0x1002 0x714C CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1300" +0x1002 0x714D CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300" +0x1002 0x714E CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300" +0x1002 0x714F CHIP_RV515|RADEON_NEW_MEMMAP "ATI RV505" +0x1002 0x7151 CHIP_RV515|RADEON_NEW_MEMMAP "ATI RV505" +0x1002 0x7152 CHIP_RV515|RADEON_NEW_MEMMAP "ATI FireGL V3300" +0x1002 0x7153 CHIP_RV515|RADEON_NEW_MEMMAP "ATI FireGL V3350" +0x1002 0x715E CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300" +0x1002 0x715F CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550 64-bit" +0x1002 0x7180 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550" +0x1002 0x7181 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1600" +0x1002 0x7183 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550" +0x1002 0x7186 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1450" +0x1002 0x7187 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300/X1550" +0x1002 0x7188 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X2300" +0x1002 0x718A CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X2300" +0x1002 0x718B CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1350" +0x1002 0x718C CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1350" +0x1002 0x718D CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1450" +0x1002 0x718F CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1300" +0x1002 0x7193 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550" +0x1002 0x7196 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1350" +0x1002 0x719B CHIP_RV515|RADEON_NEW_MEMMAP "ATI FireMV 2250" +0x1002 0x719F CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X1550 64-bit" +0x1002 0x71C0 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600" +0x1002 0x71C1 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1650" +0x1002 0x71C2 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600" +0x1002 0x71C3 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600" +0x1002 0x71C4 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5200" +0x1002 0x71C5 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1600" +0x1002 0x71C6 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1650" +0x1002 0x71C7 CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1650" +0x1002 0x71CD CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1600" +0x1002 0x71CE CHIP_RV530|RADEON_NEW_MEMMAP "ATI Radeon X1300 XT/X1600 Pro" +0x1002 0x71D2 CHIP_RV530|RADEON_NEW_MEMMAP "ATI FireGL V3400" +0x1002 0x71D4 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5250" +0x1002 0x71D5 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1700" +0x1002 0x71D6 CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1700 XT" +0x1002 0x71DA CHIP_RV530|RADEON_NEW_MEMMAP "ATI FireGL V5200" +0x1002 0x71DE CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1700" +0x1002 0x7200 CHIP_RV515|RADEON_NEW_MEMMAP "ATI Radeon X2300HD" +0x1002 0x7210 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2300" +0x1002 0x7211 CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2300" +0x1002 0x7240 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1950" +0x1002 0x7243 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x7244 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1950" +0x1002 0x7245 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x7246 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x7247 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x7248 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x7249 CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x724A CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x724B CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x724C CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x724D CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x724E CHIP_R580|RADEON_NEW_MEMMAP "ATI AMD Stream Processor" +0x1002 0x724F CHIP_R580|RADEON_NEW_MEMMAP "ATI Radeon X1900" +0x1002 0x7280 CHIP_RV570|RADEON_NEW_MEMMAP "ATI Radeon X1950" +0x1002 0x7281 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560" +0x1002 0x7283 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560" +0x1002 0x7284 CHIP_R580|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon X1900" +0x1002 0x7287 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560" +0x1002 0x7288 CHIP_RV570|RADEON_NEW_MEMMAP "ATI Radeon X1950 GT" +0x1002 0x7289 CHIP_RV570|RADEON_NEW_MEMMAP "ATI RV570" +0x1002 0x728B CHIP_RV570|RADEON_NEW_MEMMAP "ATI RV570" +0x1002 0x728C CHIP_RV570|RADEON_NEW_MEMMAP "ATI ATI FireGL V7400" +0x1002 0x7290 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560" +0x1002 0x7291 CHIP_RV560|RADEON_NEW_MEMMAP "ATI Radeon X1650" +0x1002 0x7293 CHIP_RV560|RADEON_NEW_MEMMAP "ATI Radeon X1650" +0x1002 0x7297 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560" 0x1002 0x7834 CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP "ATI Radeon RS350 9000/9100 IGP" 0x1002 0x7835 CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon RS350 Mobility IGP" +0x1002 0x791e CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS690 X1250 IGP" +0x1002 0x791f CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS690 X1270 IGP" [r128] 0x1002 0x4c45 0 "ATI Rage 128 Mobility LE (PCI)" @@ -232,6 +328,7 @@ 0x1106 0x3343 0 "VIA P4M890" 0x1106 0x3230 VIA_DX9_0 "VIA K8M890" 0x1106 0x3157 VIA_PRO_GROUP_A "VIA CX700" +0x1106 0x3371 VIA_DX9_0 "VIA P4M900 / VN896" [i810] 0x8086 0x7121 0 "Intel i810 GMCH" @@ -281,6 +378,7 @@ 0x8086 0x3582 CHIP_I8XX "Intel i852GM/i855GM GMCH" 0x8086 0x2572 CHIP_I8XX "Intel i865G GMCH" 0x8086 0x2582 CHIP_I9XX|CHIP_I915 "Intel i915G" +0x8086 0x258a CHIP_I9XX|CHIP_I915 "Intel E7221 (i915)" 0x8086 0x2592 CHIP_I9XX|CHIP_I915 "Intel i915GM" 0x8086 0x2772 CHIP_I9XX|CHIP_I915 "Intel i945G" 0x8086 0x27A2 CHIP_I9XX|CHIP_I915 "Intel i945GM" @@ -294,9 +392,7 @@ 0x8086 0x29C2 CHIP_I9XX|CHIP_I915 "Intel G33" 0x8086 0x29B2 CHIP_I9XX|CHIP_I915 "Intel Q35" 0x8086 0x29D2 CHIP_I9XX|CHIP_I915 "Intel Q33" - -[psb] -0x8086 0x8108 CHIP_PSB_8108 "Intel Poulsbo" +0x8086 0x2A42 CHIP_I9XX|CHIP_I965 "Intel Integrated Graphics Device" [imagine] 0x105d 0x2309 IMAGINE_128 "Imagine 128" @@ -484,261 +580,6 @@ 0x10DE 0x009D NV40 "NVidia Quadro FX 4500" 0x10DE 0x009E NV40 "NVidia 0x009E" -[nouveau] -0x10de 0x0020 NV_04 "RIVA TNT" -0x10de 0x0028 NV_04 "RIVA TNT2/TNT2 Pro" -0x10de 0x0029 NV_04 "RIVA TNT2 Ultra" -0x10de 0x002a NV_04 "Riva TnT2" -0x10de 0x002b NV_04 "Riva TnT2" -0x10de 0x002c NV_04 "Vanta/Vanta LT" -0x10de 0x002d NV_04 "RIVA TNT2 Model 64/Model 64 Pro" -0x10de 0x002e NV_04 "Vanta" -0x10de 0x002f NV_04 "Vanta" -0x10de 0x0040 NV_40 "GeForce 6800 Ultra" -0x10de 0x0041 NV_40 "GeForce 6800" -0x10de 0x0042 NV_40 "GeForce 6800 LE" -0x10de 0x0043 NV_40 "NV40.3" -0x10de 0x0044 NV_40 "GeForce 6800 XT" -0x10de 0x0045 NV_40 "GeForce 6800 GT" -0x10de 0x0046 NV_40 "GeForce 6800 GT" -0x10de 0x0047 NV_40 "GeForce 6800 GS" -0x10de 0x0048 NV_40 "GeForce 6800 XT" -0x10de 0x0049 NV_40 "NV40GL" -0x10de 0x004d NV_40 "Quadro FX 4000" -0x10de 0x004e NV_40 "Quadro FX 4000" -0x10de 0x0090 NV_40 "GeForce 7800 GTX" -0x10de 0x0091 NV_40 "GeForce 7800 GTX" -0x10de 0x0092 NV_40 "GeForce 7800 GT" -0x10de 0x0093 NV_40 "GeForce 7800 GS" -0x10de 0x0095 NV_40 "GeForce 7800 SLI" -0x10de 0x0098 NV_40 "GeForce Go 7800" -0x10de 0x0099 NV_40 "GeForce Go 7800 GTX" -0x10de 0x009d NV_40 "Quadro FX4500" -0x10de 0x00a0 NV_04 "Aladdin TNT2" -0x10de 0x00c0 NV_40 "GeForce 6800 GS" -0x10de 0x00c1 NV_40 "GeForce 6800" -0x10de 0x00c2 NV_40 "GeForce 6800 LE" -0x10de 0x00c3 NV_40 "Geforce 6800 XT" -0x10de 0x00c8 NV_40 "GeForce Go 6800" -0x10de 0x00c9 NV_40 "GeForce Go 6800 Ultra" -0x10de 0x00cc NV_40 "Quadro FX Go1400" -0x10de 0x00cd NV_40 "Quadro FX 3450/4000 SDI" -0x10de 0x00ce NV_40 "Quadro FX 1400" -0x10de 0x00f0 NV_40 "GeForce 6800/GeForce 6800 Ultra" -0x10de 0x00f1 NV_40 "GeForce 6600/GeForce 6600 GT" -0x10de 0x00f2 NV_40 "GeForce 6600/GeForce 6600 GT" -0x10de 0x00f3 NV_40 "GeForce 6200" -0x10de 0x00f4 NV_40 "GeForce 6600 LE" -0x10de 0x00f5 NV_40 "GeForce 7800 GS" -0x10de 0x00f6 NV_40 "GeForce 6600 GS" -0x10de 0x00f8 NV_40 "Quadro FX 3400/4400" -0x10de 0x00f9 NV_40 "GeForce 6800 Ultra/GeForce 6800 GT" -0x10de 0x00fa NV_30 "GeForce PCX 5750" -0x10de 0x00fb NV_30 "GeForce PCX 5900" -0x10de 0x00fc NV_30 "Quadro FX 330/GeForce PCX 5300" -0x10de 0x00fd NV_30 "Quadro FX 330/Quadro NVS280" -0x10de 0x00fe NV_30 "Quadro FX 1300" -0x10de 0x00ff NV_17 "GeForce PCX 4300" -0x10de 0x0100 NV_10 "GeForce 256 SDR" -0x10de 0x0101 NV_10 "GeForce 256 DDR" -0x10de 0x0103 NV_10 "Quadro" -0x10de 0x0110 NV_11 "GeForce2 MX/MX 400" -0x10de 0x0111 NV_11 "GeForce2 MX 100 DDR/200 DDR" -0x10de 0x0112 NV_11 "GeForce2 Go" -0x10de 0x0113 NV_11 "Quadro2 MXR/EX/Go" -0x10de 0x0140 NV_40 "GeForce 6600 GT" -0x10de 0x0141 NV_40 "GeForce 6600" -0x10de 0x0142 NV_40 "GeForce 6600 LE" -0x10de 0x0143 NV_40 "GeForce 6600 VE" -0x10de 0x0144 NV_40 "GeForce Go 6600" -0x10de 0x0145 NV_40 "GeForce 6610 XL" -0x10de 0x0146 NV_40 "Geforce Go 6600TE/6200TE" -0x10de 0x0147 NV_40 "GeForce 6700 XL" -0x10de 0x0148 NV_40 "GeForce Go 6600" -0x10de 0x0149 NV_40 "GeForce Go 6600 GT" -0x10de 0x014a NV_40 "Quadro NVS 440" -0x10de 0x014c NV_40 "Quadro FX 550" -0x10de 0x014d NV_17 "Quadro FX 550" -0x10de 0x014e NV_40 "Quadro FX 540" -0x10de 0x014f NV_40 "GeForce 6200" -0x10de 0x0150 NV_15 "GeForce2 GTS/Pro" -0x10de 0x0151 NV_15 "GeForce2 Ti" -0x10de 0x0152 NV_15 "GeForce2 Ultra, Bladerunner" -0x10de 0x0153 NV_15 "Quadro2 Pro" -0x10de 0x0160 NV_44 "GeForce 6500" -0x10de 0x0161 NV_44 "GeForce 6200 TurboCache(TM)" -0x10de 0x0162 NV_44 "GeForce 6200 SE TurboCache (TM)" -0x10de 0x0163 NV_44 "GeForce 6200 LE" -0x10de 0x0164 NV_44 "GeForce Go 6200" -0x10de 0x0165 NV_44 "Quadro NVS 285" -0x10de 0x0166 NV_44 "GeForce Go 6400" -0x10de 0x0167 NV_44 "GeForce Go 6200 TurboCache" -0x10de 0x0168 NV_44 "GeForce Go 6200 TurboCache" -0x10de 0x0169 NV_44 "GeForce 6250" -0x10de 0x0170 NV_17 "GeForce4 MX 460" -0x10de 0x0171 NV_17 "GeForce4 MX 440" -0x10de 0x0172 NV_17 "GeForce4 MX 420" -0x10de 0x0173 NV_17 "GeForce4 MX 440-SE" -0x10de 0x0174 NV_17 "GeForce4 440 Go" -0x10de 0x0175 NV_17 "GeForce4 420 Go" -0x10de 0x0176 NV_17 "GeForce4 420 Go 32M" -0x10de 0x0177 NV_17 "GeForce4 460 Go" -0x10de 0x0178 NV_17 "Quadro4 550 XGL" -0x10de 0x0179 NV_17 "GeForce4 420 Go 32M" -0x10de 0x017a NV_17 "Quadro4 200/400 NVS" -0x10de 0x017b NV_17 "Quadro4 550 XGL" -0x10de 0x017c NV_17 "Quadro4 500 GoGL" -0x10de 0x017d NV_17 "GeForce4 410 Go 16M" -0x10de 0x0181 NV_17 "GeForce4 MX 440 AGP 8x" -0x10de 0x0182 NV_17 "GeForce4 MX 440SE AGP 8x" -0x10de 0x0183 NV_17 "GeForce4 MX 420 AGP 8x" -0x10de 0x0185 NV_17 "GeForce4 MX 4000 AGP 8x" -0x10de 0x0186 NV_17 "GeForce4 448 Go" -0x10de 0x0187 NV_17 "GeForce4 488 Go" -0x10de 0x0188 NV_17 "Quadro4 580 XGL" -0x10de 0x018a NV_17 "Quadro4 NVS AGP 8x" -0x10de 0x018b NV_17 "Quadro4 380 XGL" -0x10de 0x018c NV_17 "Quadro NVS 50 PCI" -0x10de 0x018d NV_17 "GeForce4 448 Go" -0x10de 0x0191 NV_50 "GeForce 8800 GTX" -0x10de 0x0193 NV_50 "GeForce 8800 GTS" -0x10de 0x0194 NV_50 "GeForce 8800 Ultra" -0x10de 0x019d NV_50 "Quadro FX 5600" -0x10de 0x019e NV_50 "Quadro FX 4600" -0x10de 0x01a0 NV_11|NV_NFORCE "GeForce2 MX Integrated Graphics" -0x10de 0x01d1 NV_44 "GeForce 7300 LE" -0x10de 0x01d3 NV_44 "Geforce 7300 SE" -0x10de 0x01d6 NV_44 "GeForce Go 7200" -0x10de 0x01d7 NV_44 "Quadro NVS 110M / GeForce Go 7300" -0x10de 0x01d8 NV_44 "GeForce Go 7400" -0x10de 0x01d9 NV_44 "GeForce Go 7400 GS" -0x10de 0x01da NV_44 "Quadro NVS 110M" -0x10de 0x01db NV_44 "Quadro NVS 120M" -0x10de 0x01dc NV_44 "Quadro FX 350M" -0x10de 0x01dd NV_44 "GeForce 7500 LE" -0x10de 0x01de NV_44 "Quadro FX 350" -0x10de 0x01df NV_44 "GeForce 7300 GS" -0x10de 0x01f0 NV_17|NV_NFORCE2 "GeForce4 MX - nForce GPU" -0x10de 0x0200 NV_20 "GeForce3" -0x10de 0x0201 NV_20 "GeForce3 Ti 200" -0x10de 0x0202 NV_20 "GeForce3 Ti 500" -0x10de 0x0203 NV_20 "Quadro DCC" -0x10de 0x0211 NV_40 "GeForce 6800" -0x10de 0x0212 NV_40 "GeForce 6800 LE" -0x10de 0x0215 NV_40 "GeForce 6800 GT" -0x10de 0x0218 NV_40 "GeForce 6800 XT" -0x10de 0x0221 NV_44 "GeForce 6200" -0x10de 0x0222 NV_44 "GeForce 6200 A-LE" -0x10de 0x0240 NV_44 "GeForce 6150" -0x10de 0x0241 NV_44 "GeForce 6150 LE" -0x10de 0x0242 NV_44 "GeForce 6100" -0x10de 0x0244 NV_44 "GeForce Go 6150" -0x10de 0x0247 NV_44 "GeForce Go 6100" -0x10de 0x0250 NV_25 "GeForce4 Ti 4600" -0x10de 0x0251 NV_25 "GeForce4 Ti 4400" -0x10de 0x0252 NV_25 "GeForce4 Ti" -0x10de 0x0253 NV_25 "GeForce4 Ti 4200" -0x10de 0x0258 NV_25 "Quadro4 900 XGL" -0x10de 0x0259 NV_25 "Quadro4 750 XGL" -0x10de 0x025b NV_25 "Quadro4 700 XGL" -0x10de 0x0280 NV_25 "GeForce4 Ti 4800" -0x10de 0x0281 NV_25 "GeForce4 Ti 4200 AGP 8x" -0x10de 0x0282 NV_25 "GeForce4 Ti 4800 SE" -0x10de 0x0286 NV_25 "GeForce4 Ti 4200 Go AGP 8x" -0x10de 0x0288 NV_25 "Quadro4 980 XGL" -0x10de 0x0289 NV_25 "Quadro4 780 XGL" -0x10de 0x028c NV_25 "Quadro4 700 GoGL" -0x10de 0x0290 NV_40 "GeForce 7900 GTX" -0x10de 0x0291 NV_40 "GeForce 7900 GT" -0x10de 0x0292 NV_40 "GeForce 7900 GS" -0x10de 0x0298 NV_40 "GeForce Go 7900 GS" -0x10de 0x0299 NV_40 "GeForce Go 7900 GTX" -0x10de 0x029a NV_40 "Quadro FX 2500M" -0x10de 0x029b NV_40 "Quadro FX 1500M" -0x10de 0x029c NV_40 "Quadro FX 5500" -0x10de 0x029d NV_40 "Quadro FX 3500" -0x10de 0x029e NV_40 "Quadro FX 1500" -0x10de 0x029f NV_40 "Quadro FX 4500 X2" -0x10de 0x02a0 NV_20 "XGPU" -0x10de 0x02e1 NV_40 "GeForce 7600 GS" -0x10de 0x0300 NV_30 "GeForce FX" -0x10de 0x0301 NV_30 "GeForce FX 5800 Ultra" -0x10de 0x0302 NV_30 "GeForce FX 5800" -0x10de 0x0308 NV_30 "Quadro FX 2000" -0x10de 0x0309 NV_30 "Quadro FX 1000" -0x10de 0x0311 NV_30 "GeForce FX 5600 Ultra" -0x10de 0x0312 NV_30 "GeForce FX 5600" -0x10de 0x0313 NV_30 "NV31" -0x10de 0x0314 NV_30 "GeForce FX 5600XT" -0x10de 0x0316 NV_30 "NV31M" -0x10de 0x0317 NV_30 "NV31M Pro" -0x10de 0x031a NV_30 "GeForce FX Go5600" -0x10de 0x031b NV_30 "GeForce FX Go5650" -0x10de 0x031d NV_30 "NV31GLM" -0x10de 0x031e NV_30 "NV31GLM Pro" -0x10de 0x031f NV_30 "NV31GLM Pro" -0x10de 0x0320 NV_34 "GeForce FX 5200" -0x10de 0x0321 NV_34 "GeForce FX 5200 Ultra" -0x10de 0x0322 NV_34 "GeForce FX 5200" -0x10de 0x0323 NV_34 "GeForce FX 5200LE" -0x10de 0x0324 NV_34 "GeForce FX Go5200" -0x10de 0x0325 NV_34 "GeForce FX Go5250" -0x10de 0x0326 NV_34 "GeForce FX 5500" -0x10de 0x0327 NV_34 "GeForce FX 5100" -0x10de 0x0328 NV_34 "GeForce FX Go5200 32M/64M" -0x10de 0x0329 NV_34 "GeForce FX Go5200" -0x10de 0x032a NV_34 "Quadro NVS 280 PCI" -0x10de 0x032b NV_34 "Quadro FX 500/600 PCI" -0x10de 0x032c NV_34 "GeForce FX Go 5300" -0x10de 0x032d NV_34 "GeForce FX Go5100" -0x10de 0x032f NV_34 "NV34GL" -0x10de 0x0330 NV_30 "GeForce FX 5900 Ultra" -0x10de 0x0331 NV_30 "GeForce FX 5900" -0x10de 0x0332 NV_30 "GeForce FX 5900XT" -0x10de 0x0333 NV_30 "GeForce FX 5950 Ultra" -0x10de 0x0334 NV_30 "GeForce FX 5900ZT" -0x10de 0x0338 NV_30 "Quadro FX 3000" -0x10de 0x033f NV_30 "Quadro FX 700" -0x10de 0x0341 NV_30 "GeForce FX 5700 Ultra" -0x10de 0x0342 NV_30 "GeForce FX 5700" -0x10de 0x0343 NV_30 "GeForce FX 5700LE" -0x10de 0x0344 NV_30 "GeForce FX 5700VE" -0x10de 0x0345 NV_30 "NV36.5" -0x10de 0x0347 NV_30 "GeForce FX Go5700" -0x10de 0x0348 NV_30 "GeForce FX Go5700" -0x10de 0x0349 NV_30 "NV36M Pro" -0x10de 0x034b NV_30 "NV36MAP" -0x10de 0x034c NV_30 "Quadro FX Go1000" -0x10de 0x034e NV_30 "Quadro FX 1100" -0x10de 0x034f NV_30 "NV36GL" -0x10de 0x0391 NV_40 "GeForce 7600 GT" -0x10de 0x0392 NV_40 "GeForce 7600 GS" -0x10de 0x0393 NV_40 "GeForce 7300 GT" -0x10de 0x0394 NV_40 "GeForce 7600 LE" -0x10de 0x0395 NV_40 "GeForce 7300 GT" -0x10de 0x0397 NV_40 "GeForce Go 7700" -0x10de 0x0398 NV_40 "GeForce Go 7600" -0x10de 0x0399 NV_40 "GeForce Go 7600 GT" -0x10de 0x039a NV_40 "Quadro NVS 300M" -0x10de 0x039b NV_40 "GeForce Go 7900 SE" -0x10de 0x039c NV_40 "Quadro FX 550M" -0x10de 0x039e NV_40 "Quadro FX 560" -0x10de 0x03d0 NV_44 "GeForce 6100 nForce 430" -0x10de 0x03d1 NV_44 "GeForce 6100 nForce 405" -0x10de 0x03d2 NV_44 "GeForce 6100 nForce 400" -0x10de 0x03d5 NV_44 "GeForce 6100 nForce 420" -0x10de 0x0400 NV_50 "GeForce 8600 GTS" -0x10de 0x0402 NV_50 "GeForce 8600 GT" -0x10de 0x0421 NV_50 "GeForce 8500 GT" -0x10de 0x0422 NV_50 "GeForce 8400 GS" -0x10de 0x0423 NV_50 "GeForce 8300 GS" -0x10de 0x0429 NV_50 "Quadro NVS 140" -0x12d2 0x0020 NV_04 "TNT" -0x12d2 0x0028 NV_04 "TNT2" -0x12d2 0x0029 NV_04 "UTNT2" -0x12d2 0x002c NV_04 "VTNT2" -0x12d2 0x00a0 NV_04 "ITNT2" - [xgi] 0x18ca 0x2200 0 "XP5" 0x18ca 0x0047 0 "XP10 / XG47" diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/i915_dma.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/i915_dma.c --- libdrm-2.3.0.16/shared-core/i915_dma.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/i915_dma.c 2009-04-20 07:00:29.000000000 +0100 @@ -3,7 +3,7 @@ /* * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -11,11 +11,11 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. @@ -23,7 +23,7 @@ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * + * */ #include "drmP.h" @@ -31,17 +31,6 @@ #include "i915_drm.h" #include "i915_drv.h" -#define IS_I965G(dev) (dev->pci_device == 0x2972 || \ - dev->pci_device == 0x2982 || \ - dev->pci_device == 0x2992 || \ - dev->pci_device == 0x29A2 || \ - dev->pci_device == 0x2A02 || \ - dev->pci_device == 0x2A12) - -#define IS_G33(dev) (dev->pci_device == 0x29C2 || \ - dev->pci_device == 0x29B2 || \ - dev->pci_device == 0x29D2) - /* Really want an OS-independent resettable timer. Would like to have * this loop run for (eg) 3 sec, but have the timer reset every time * the head pointer changes, so that EBUSY only happens if the ring @@ -62,8 +51,6 @@ if (ring->space >= n) return 0; - dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; - if (ring->head != last_head) i = 0; @@ -84,74 +71,171 @@ ring->space = ring->head - (ring->tail + 8); if (ring->space < 0) ring->space += ring->Size; - - if (ring->head == ring->tail) - dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; } static int i915_dma_cleanup(struct drm_device * dev) { - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + drm_i915_private_t *dev_priv = dev->dev_private; /* Make sure interrupts are disabled here because the uninstall ioctl * may not have been called from userspace and after dev_private * is freed, it's too late. */ - I915_WRITE(LP_RING + RING_LEN, 0); - if (dev->irq) drm_irq_uninstall(dev); - if (dev->dev_private) { - drm_i915_private_t *dev_priv = - (drm_i915_private_t *) dev->dev_private; + if (dev_priv->ring.virtual_start) { + drm_core_ioremapfree(&dev_priv->ring.map, dev); + dev_priv->ring.virtual_start = 0; + dev_priv->ring.map.handle = 0; + dev_priv->ring.map.size = 0; + } - if (dev_priv->ring.virtual_start) { - drm_core_ioremapfree(&dev_priv->ring.map, dev); - } + if (dev_priv->status_page_dmah) { + drm_pci_free(dev, dev_priv->status_page_dmah); + dev_priv->status_page_dmah = NULL; + /* Need to rewrite hardware status page */ + I915_WRITE(0x02080, 0x1ffff000); + } + + if (dev_priv->status_gfx_addr) { + dev_priv->status_gfx_addr = 0; + drm_core_ioremapfree(&dev_priv->hws_map, dev); + I915_WRITE(0x02080, 0x1ffff000); + } - if (dev_priv->status_page_dmah) { - drm_pci_free(dev, dev_priv->status_page_dmah); - /* Need to rewrite hardware status page */ - I915_WRITE(0x02080, 0x1ffff000); + return 0; +} + +#if defined(I915_HAVE_BUFFER) +#define DRI2_SAREA_BLOCK_TYPE(b) ((b) >> 16) +#define DRI2_SAREA_BLOCK_SIZE(b) ((b) & 0xffff) +#define DRI2_SAREA_BLOCK_NEXT(p) \ + ((void *) ((unsigned char *) (p) + \ + DRI2_SAREA_BLOCK_SIZE(*(unsigned int *) p))) + +#define DRI2_SAREA_BLOCK_END 0x0000 +#define DRI2_SAREA_BLOCK_LOCK 0x0001 +#define DRI2_SAREA_BLOCK_EVENT_BUFFER 0x0002 + +static int +setup_dri2_sarea(struct drm_device * dev, + struct drm_file *file_priv, + drm_i915_init_t * init) +{ + drm_i915_private_t *dev_priv = dev->dev_private; + int ret; + unsigned int *p, *end, *next; + + mutex_lock(&dev->struct_mutex); + dev_priv->sarea_bo = + drm_lookup_buffer_object(file_priv, + init->sarea_handle, 1); + mutex_unlock(&dev->struct_mutex); + + if (!dev_priv->sarea_bo) { + DRM_ERROR("did not find sarea bo\n"); + return -EINVAL; + } + + ret = drm_bo_kmap(dev_priv->sarea_bo, 0, + dev_priv->sarea_bo->num_pages, + &dev_priv->sarea_kmap); + if (ret) { + DRM_ERROR("could not map sarea bo\n"); + return ret; + } + + p = dev_priv->sarea_kmap.virtual; + end = (void *) p + (dev_priv->sarea_bo->num_pages << PAGE_SHIFT); + while (p < end && DRI2_SAREA_BLOCK_TYPE(*p) != DRI2_SAREA_BLOCK_END) { + switch (DRI2_SAREA_BLOCK_TYPE(*p)) { + case DRI2_SAREA_BLOCK_LOCK: + dev->lock.hw_lock = (void *) (p + 1); + dev->sigdata.lock = dev->lock.hw_lock; + break; } - if (dev_priv->status_gfx_addr) { - dev_priv->status_gfx_addr = 0; - drm_core_ioremapfree(&dev_priv->hws_map, dev); - I915_WRITE(0x02080, 0x1ffff000); + next = DRI2_SAREA_BLOCK_NEXT(p); + if (next <= p || end < next) { + DRM_ERROR("malformed dri2 sarea: next is %p should be within %p-%p\n", + next, p, end); + return -EINVAL; } - drm_free(dev->dev_private, sizeof(drm_i915_private_t), - DRM_MEM_DRIVER); - - dev->dev_private = NULL; + p = next; } return 0; } +#endif static int i915_initialize(struct drm_device * dev, - drm_i915_private_t * dev_priv, + struct drm_file *file_priv, drm_i915_init_t * init) { + drm_i915_private_t *dev_priv = dev->dev_private; +#if defined(I915_HAVE_BUFFER) + int ret; +#endif dev_priv->sarea = drm_getsarea(dev); if (!dev_priv->sarea) { DRM_ERROR("can not find sarea!\n"); - dev->dev_private = (void *)dev_priv; i915_dma_cleanup(dev); return -EINVAL; } - memset((void *)(dev_priv->ring.virtual_start), 0, dev_priv->ring.Size); + if (init->mmio_offset != 0) + dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); + if (!dev_priv->mmio_map) { + i915_dma_cleanup(dev); + DRM_ERROR("can not find mmio map!\n"); + return -EINVAL; + } + +#ifdef I915_HAVE_BUFFER + dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS; +#endif + + if (init->sarea_priv_offset) + dev_priv->sarea_priv = (drm_i915_sarea_t *) + ((u8 *) dev_priv->sarea->handle + + init->sarea_priv_offset); + else { + /* No sarea_priv for you! */ + dev_priv->sarea_priv = NULL; + } + + dev_priv->ring.Start = init->ring_start; + dev_priv->ring.End = init->ring_end; + dev_priv->ring.Size = init->ring_size; + dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; + + dev_priv->ring.map.offset = init->ring_start; + dev_priv->ring.map.size = init->ring_size; + dev_priv->ring.map.type = 0; + dev_priv->ring.map.flags = 0; + dev_priv->ring.map.mtrr = 0; - I915_WRITE(LP_RING + RING_START, dev_priv->ring.Start); - I915_WRITE(LP_RING + RING_LEN, ((dev_priv->ring.Size - 4096) & RING_NR_PAGES) | (RING_NO_REPORT | RING_VALID)); + drm_core_ioremap(&dev_priv->ring.map, dev); + + if (dev_priv->ring.map.handle == NULL) { + i915_dma_cleanup(dev); + DRM_ERROR("can not ioremap virtual address for" + " ring buffer\n"); + return -ENOMEM; + } + + dev_priv->ring.virtual_start = dev_priv->ring.map.handle; dev_priv->cpp = init->cpp; - dev_priv->sarea_priv->pf_current_page = 0; + + if (dev_priv->sarea_priv) + dev_priv->sarea_priv->pf_current_page = 0; /* We are using separate values as placeholders for mechanisms for * private backbuffer/depthbuffer usage. */ dev_priv->use_mi_batchbuffer_start = 0; + if (IS_I965G(dev)) /* 965 doesn't support older method */ + dev_priv->use_mi_batchbuffer_start = 1; /* Allow hardware batchbuffers unless told otherwise. */ @@ -159,15 +243,14 @@ /* Enable vblank on pipe A for older X servers */ - dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A; + dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A; /* Program Hardware Status Page */ - if (!IS_G33(dev)) { - dev_priv->status_page_dmah = + if (!I915_NEED_GFX_HWS(dev)) { + dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff); if (!dev_priv->status_page_dmah) { - dev->dev_private = (void *)dev_priv; i915_dma_cleanup(dev); DRM_ERROR("Can not allocate hardware status page\n"); return -ENOMEM; @@ -180,7 +263,20 @@ I915_WRITE(0x02080, dev_priv->dma_status_page); } DRM_DEBUG("Enabled hardware status page\n"); - dev->dev_private = (void *)dev_priv; +#ifdef I915_HAVE_BUFFER + mutex_init(&dev_priv->cmdbuf_mutex); +#endif +#if defined(I915_HAVE_BUFFER) + if (init->func == I915_INIT_DMA2) { + ret = setup_dri2_sarea(dev, file_priv, init); + if (ret) { + i915_dma_cleanup(dev); + DRM_ERROR("could not set up dri2 sarea\n"); + return ret; + } + } +#endif + return 0; } @@ -188,7 +284,7 @@ { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); if (!dev_priv->sarea) { DRM_ERROR("can not find sarea!\n"); @@ -225,14 +321,13 @@ static int i915_dma_init(struct drm_device *dev, void *data, struct drm_file *file_priv) { - DRM_DEVICE; - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - drm_i915_init_t init; + drm_i915_init_t *init = data; int retcode = 0; switch (init->func) { case I915_INIT_DMA: - retcode = i915_initialize(dev, dev_priv, &init); + case I915_INIT_DMA2: + retcode = i915_initialize(dev, file_priv, init); break; case I915_CLEANUP_DMA: retcode = i915_dma_cleanup(dev); @@ -319,12 +414,12 @@ { int ret = do_validate_cmd(cmd); -/* printk("validate_cmd( %x ): %d\n", cmd, ret); */ +/* printk("validate_cmd( %x ): %d\n", cmd, ret); */ return ret; } -static int i915_emit_cmds(struct drm_device * dev, int __user * buffer, +static int i915_emit_cmds(struct drm_device *dev, int __user *buffer, int dwords) { drm_i915_private_t *dev_priv = dev->dev_private; @@ -355,12 +450,12 @@ OUT_RING(cmd); } } - + if (dwords & 1) OUT_RING(0); ADVANCE_LP_RING(); - + return 0; } @@ -404,7 +499,7 @@ } /* XXX: Emitting the counter should really be moved to part of the IRQ - * emit. For now, do it in both places: + * emit. For now, do it in both places: */ void i915_emit_breadcrumb(struct drm_device *dev) @@ -417,7 +512,8 @@ DRM_DEBUG("Breadcrumb counter wrapped around\n"); } - dev_priv->sarea_priv->last_enqueue = dev_priv->counter; + if (dev_priv->sarea_priv) + dev_priv->sarea_priv->last_enqueue = dev_priv->counter; BEGIN_LP_RING(4); OUT_RING(CMD_STORE_DWORD_IDX); @@ -459,7 +555,7 @@ int i = 0, count, ret; if (cmd->sz & 0x3) { - DRM_ERROR("alignment"); + DRM_ERROR("alignment\n"); return -EINVAL; } @@ -480,15 +576,16 @@ return ret; } - i915_emit_breadcrumb( dev ); + i915_emit_breadcrumb(dev); #ifdef I915_HAVE_FENCE - drm_fence_flush_old(dev, 0, dev_priv->counter); + if (unlikely((dev_priv->counter & 0xFF) == 0)) + drm_fence_flush_old(dev, 0, dev_priv->counter); #endif return 0; } -static int i915_dispatch_batchbuffer(struct drm_device * dev, - drm_i915_batchbuffer_t * batch) +int i915_dispatch_batchbuffer(struct drm_device * dev, + drm_i915_batchbuffer_t * batch) { drm_i915_private_t *dev_priv = dev->dev_private; struct drm_clip_rect __user *boxes = batch->cliprects; @@ -497,7 +594,7 @@ RING_LOCALS; if ((batch->start | batch->used) & 0x7) { - DRM_ERROR("alignment"); + DRM_ERROR("alignment\n"); return -EINVAL; } @@ -534,9 +631,10 @@ } } - i915_emit_breadcrumb( dev ); + i915_emit_breadcrumb(dev); #ifdef I915_HAVE_FENCE - drm_fence_flush_old(dev, 0, dev_priv->counter); + if (unlikely((dev_priv->counter & 0xFF) == 0)) + drm_fence_flush_old(dev, 0, dev_priv->counter); #endif return 0; } @@ -598,8 +696,7 @@ drm_i915_private_t *dev_priv = dev->dev_private; int i; - DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n", - __FUNCTION__, + DRM_DEBUG("planes=0x%x pfCurrentPage=%d\n", planes, dev_priv->sarea_priv->pf_current_page); i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH); @@ -610,12 +707,12 @@ i915_emit_breadcrumb(dev); #ifdef I915_HAVE_FENCE - if (!sync) + if (unlikely(!sync && ((dev_priv->counter & 0xFF) == 0))) drm_fence_flush_old(dev, 0, dev_priv->counter); #endif } -static int i915_quiescent(struct drm_device * dev) +int i915_quiescent(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; @@ -694,18 +791,24 @@ return 0; } +#if defined(DRM_DEBUG_CODE) +#define DRM_DEBUG_RELOCATION (drm_debug != 0) +#else +#define DRM_DEBUG_RELOCATION 0 +#endif + static int i915_do_cleanup_pageflip(struct drm_device * dev) { drm_i915_private_t *dev_priv = dev->dev_private; int i, planes, num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); for (i = 0, planes = 0; i < 2; i++) if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) { dev_priv->sarea_priv->pf_current_page = (dev_priv->sarea_priv->pf_current_page & - ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i); + ~(0x3 << (2 * i))) | ((num_pages - 1) << (2 * i)); planes |= 1 << i; } @@ -720,17 +823,18 @@ { drm_i915_flip_t *param = data; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); - if (param->planes & ~0x3) { + /* This is really planes */ + if (param->pipes & ~0x3) { DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n", - param->planes); + param->pipes); return -EINVAL; } - i915_dispatch_flip(dev, param->planes, 0); + i915_dispatch_flip(dev, param->pipes, 0); return 0; } @@ -744,7 +848,7 @@ int value; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -758,6 +862,9 @@ case I915_PARAM_LAST_DISPATCH: value = READ_BREADCRUMB(dev_priv); break; + case I915_PARAM_CHIPSET_ID: + value = dev->pci_device; + break; default: DRM_ERROR("Unknown parameter %d\n", param->param); return -EINVAL; @@ -778,13 +885,14 @@ drm_i915_setparam_t *param = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } switch (param->param) { case I915_SETPARAM_USE_MI_BATCHBUFFER_START: - dev_priv->use_mi_batchbuffer_start = param->value; + if (!IS_I965G(dev)) + dev_priv->use_mi_batchbuffer_start = param->value; break; case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: dev_priv->tex_lru_log_granularity = param->value; @@ -805,7 +913,7 @@ I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE, 0x2350, 8 - } + } }; static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t); @@ -815,13 +923,13 @@ { uint32_t buf[8]; drm_i915_private_t *dev_priv = dev->dev_private; - drm_i915_mmio_entry_t *e; + drm_i915_mmio_entry_t *e; drm_i915_mmio_t *mmio = data; void __iomem *base; int i; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -832,27 +940,27 @@ base = (u8 *) dev_priv->mmio_map->handle + e->offset; switch (mmio->read_write) { - case I915_MMIO_READ: - if (!(e->flag & I915_MMIO_MAY_READ)) - return -EINVAL; - for (i = 0; i < e->size / 4; i++) - buf[i] = I915_READ(e->offset + i * 4); - if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) { - DRM_ERROR("DRM_COPY_TO_USER failed\n"); - return -EFAULT; - } - break; - - case I915_MMIO_WRITE: - if (!(e->flag & I915_MMIO_MAY_WRITE)) - return -EINVAL; - if(DRM_COPY_FROM_USER(buf, mmio->data, e->size)) { - DRM_ERROR("DRM_COPY_TO_USER failed\n"); - return -EFAULT; - } - for (i = 0; i < e->size / 4; i++) - I915_WRITE(e->offset + i * 4, buf[i]); - break; + case I915_MMIO_READ: + if (!(e->flag & I915_MMIO_MAY_READ)) + return -EINVAL; + for (i = 0; i < e->size / 4; i++) + buf[i] = I915_READ(e->offset + i * 4); + if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) { + DRM_ERROR("DRM_COPY_TO_USER failed\n"); + return -EFAULT; + } + break; + + case I915_MMIO_WRITE: + if (!(e->flag & I915_MMIO_MAY_WRITE)) + return -EINVAL; + if (DRM_COPY_FROM_USER(buf, mmio->data, e->size)) { + DRM_ERROR("DRM_COPY_TO_USER failed\n"); + return -EFAULT; + } + for (i = 0; i < e->size / 4; i++) + I915_WRITE(e->offset + i * 4, buf[i]); + break; } return 0; } @@ -863,8 +971,11 @@ drm_i915_private_t *dev_priv = dev->dev_private; drm_i915_hws_addr_t *hws = data; + if (!I915_NEED_GFX_HWS(dev)) + return -EINVAL; + if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr); @@ -879,7 +990,6 @@ drm_core_ioremap(&dev_priv->hws_map, dev); if (dev_priv->hws_map.handle == NULL) { - dev->dev_private = (void *)dev_priv; i915_dma_cleanup(dev); dev_priv->status_gfx_addr = 0; DRM_ERROR("can not ioremap virtual address for" @@ -898,6 +1008,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) { + struct drm_i915_private *dev_priv = dev->dev_private; + unsigned long base, size; + int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1; + /* i915 has 4 more counters */ dev->counters += 4; dev->types[6] = _DRM_STAT_IRQ; @@ -905,25 +1019,88 @@ dev->types[8] = _DRM_STAT_SECONDARY; dev->types[9] = _DRM_STAT_DMA; + dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER); + if (dev_priv == NULL) + return -ENOMEM; + + memset(dev_priv, 0, sizeof(drm_i915_private_t)); + + dev->dev_private = (void *)dev_priv; + + /* Add register map (needed for suspend/resume) */ + base = drm_get_resource_start(dev, mmio_bar); + size = drm_get_resource_len(dev, mmio_bar); + + ret = drm_addmap(dev, base, size, _DRM_REGISTERS, + _DRM_KERNEL | _DRM_DRIVER, &dev_priv->mmio_map); + +#ifdef __linux__ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) + intel_init_chipset_flush_compat(dev); +#endif +#endif + + return ret; +} + +int i915_driver_unload(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + if (dev_priv->mmio_map) + drm_rmmap(dev, dev_priv->mmio_map); + + drm_free(dev->dev_private, sizeof(drm_i915_private_t), + DRM_MEM_DRIVER); +#ifdef __linux__ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) + intel_fini_chipset_flush_compat(dev); +#endif +#endif return 0; } void i915_driver_lastclose(struct drm_device * dev) { - if (dev->dev_private) { - drm_i915_private_t *dev_priv = dev->dev_private; + drm_i915_private_t *dev_priv = dev->dev_private; + + /* agp off can use this to get called before dev_priv */ + if (!dev_priv) + return; + +#ifdef I915_HAVE_BUFFER + if (dev_priv->val_bufs) { + vfree(dev_priv->val_bufs); + dev_priv->val_bufs = NULL; + } +#endif + + if (drm_getsarea(dev) && dev_priv->sarea_priv) i915_do_cleanup_pageflip(dev); + if (dev_priv->agp_heap) i915_mem_takedown(&(dev_priv->agp_heap)); +#if defined(I915_HAVE_BUFFER) + if (dev_priv->sarea_kmap.virtual) { + drm_bo_kunmap(&dev_priv->sarea_kmap); + dev_priv->sarea_kmap.virtual = NULL; + dev->lock.hw_lock = NULL; + dev->sigdata.lock = NULL; } + + if (dev_priv->sarea_bo) { + mutex_lock(&dev->struct_mutex); + drm_bo_usage_deref_locked(&dev_priv->sarea_bo); + mutex_unlock(&dev->struct_mutex); + dev_priv->sarea_bo = NULL; + } +#endif i915_dma_cleanup(dev); } void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) { - if (dev->dev_private) { - drm_i915_private_t *dev_priv = dev->dev_private; - i915_mem_release(dev, file_priv, dev_priv->agp_heap); - } + drm_i915_private_t *dev_priv = dev->dev_private; + i915_mem_release(dev, file_priv, dev_priv->agp_heap); } struct drm_ioctl_desc i915_ioctls[] = { @@ -945,6 +1122,9 @@ DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH), DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH), +#ifdef I915_HAVE_BUFFER + DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH), +#endif }; int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); @@ -965,4 +1145,10 @@ return 1; } - +int i915_driver_firstopen(struct drm_device *dev) +{ +#ifdef I915_HAVE_BUFFER + drm_bo_driver_init(dev); +#endif + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/i915_drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/i915_drm.h --- libdrm-2.3.0.16/shared-core/i915_drm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/i915_drm.h 2008-07-01 08:51:40.000000000 +0100 @@ -39,11 +39,16 @@ * of chars for next/prev indices */ #define I915_LOG_MIN_TEX_REGION_SIZE 14 -typedef struct drm_i915_init { +typedef struct _drm_i915_init { enum { I915_INIT_DMA = 0x01, I915_CLEANUP_DMA = 0x02, - I915_RESUME_DMA = 0x03 + I915_RESUME_DMA = 0x03, + + /* Since this struct isn't versioned, just used a new + * 'func' code to indicate the presence of dri2 sarea + * info. */ + I915_INIT_DMA2 = 0x04 } func; unsigned int mmio_offset; int sarea_priv_offset; @@ -61,6 +66,7 @@ unsigned int depth_pitch; unsigned int cpp; unsigned int chipset; + unsigned int sarea_handle; } drm_i915_init_t; typedef struct drm_i915_sarea { @@ -119,18 +125,19 @@ int third_offset; int third_size; unsigned int third_tiled; + + /* buffer object handles for the static buffers. May change + * over the lifetime of the client, though it doesn't in our current + * implementation. + */ + unsigned int front_bo_handle; + unsigned int back_bo_handle; + unsigned int third_bo_handle; + unsigned int depth_bo_handle; } drm_i915_sarea_t; /* Driver specific fence types and classes. */ - -/* The only fence class we support */ -#define DRM_I915_FENCE_CLASS_ACCEL 0 -/* Fence type that guarantees read-write flush */ -#define DRM_I915_FENCE_TYPE_RW 2 -/* MI_FLUSH programmed just before the fence */ -#define DRM_I915_FENCE_FLAG_FLUSHED 0x01000000 - /* Flags for perf_boxes */ #define I915_BOX_RING_EMPTY 0x1 @@ -160,7 +167,6 @@ #define DRM_I915_VBLANK_SWAP 0x0f #define DRM_I915_MMIO 0x10 #define DRM_I915_HWS_ADDR 0x11 -#define DRM_I915_EXECBUFFER 0x12 #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -178,7 +184,7 @@ #define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) #define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) #define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) -#define DRM_IOCTL_I915_EXECBUFFER DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_EXECBUFFER, struct drm_i915_execbuffer) +#define DRM_IOCTL_I915_MMIO DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_MMIO, drm_i915_mmio) /* Asynchronous page flipping: */ @@ -207,7 +213,7 @@ /* As above, but pass a pointer to userspace buffer which can be * validated by the kernel prior to sending to hardware. */ -typedef struct drm_i915_cmdbuffer { +typedef struct _drm_i915_cmdbuffer { char __user *buf; /* pointer to userspace command buffer */ int sz; /* nr bytes in buf */ int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ @@ -231,6 +237,7 @@ #define I915_PARAM_IRQ_ACTIVE 1 #define I915_PARAM_ALLOW_BATCHBUFFER 2 #define I915_PARAM_LAST_DISPATCH 3 +#define I915_PARAM_CHIPSET_ID 4 typedef struct drm_i915_getparam { int param; @@ -274,7 +281,7 @@ * rotate): */ typedef struct drm_i915_mem_destroy_heap { - int region; + int region; } drm_i915_mem_destroy_heap_t; /* Allow X server to configure which pipes to monitor for vblank signals @@ -314,7 +321,7 @@ unsigned int flag; unsigned int offset; unsigned int size; -}drm_i915_mmio_entry_t; +} drm_i915_mmio_entry_t; typedef struct drm_i915_mmio { unsigned int read_write:1; @@ -326,40 +333,4 @@ uint64_t addr; } drm_i915_hws_addr_t; -/* - * Relocation header is 4 uint32_ts - * 0 - (16-bit relocation type << 16)| 16 bit reloc count - * 1 - buffer handle for another list of relocs - * 2-3 - spare. - */ -#define I915_RELOC_HEADER 4 - -/* - * type 0 relocation has 4-uint32_t stride - * 0 - offset into buffer - * 1 - delta to add in - * 2 - index into buffer list - * 3 - reserved (for optimisations later). - */ -#define I915_RELOC_TYPE_0 0 -#define I915_RELOC0_STRIDE 4 - -struct drm_i915_op_arg { - uint64_t next; - uint32_t reloc_handle; - int handled; - union { - struct drm_bo_op_req req; - struct drm_bo_arg_rep rep; - } d; - -}; - -struct drm_i915_execbuffer { - uint64_t ops_list; - uint32_t num_buffers; - struct drm_i915_batchbuffer batch; - struct drm_fence_arg fence_arg; -}; - #endif /* _I915_DRM_H_ */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/i915_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/i915_drv.h --- libdrm-2.3.0.16/shared-core/i915_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/i915_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -1,10 +1,10 @@ /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*- */ /* - * + * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -12,11 +12,11 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. @@ -24,14 +24,12 @@ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * + * */ #ifndef _I915_DRV_H_ #define _I915_DRV_H_ -#include "i915_reg.h" - /* General customization: */ @@ -39,7 +37,7 @@ #define DRIVER_NAME "i915" #define DRIVER_DESC "Intel Graphics" -#define DRIVER_DATE "20070209" +#define DRIVER_DATE "20080312" #if defined(__linux__) #define I915_HAVE_FENCE @@ -58,16 +56,21 @@ * 1.8: New ioctl for ARB_Occlusion_Query * 1.9: Usable page flipping and triple buffering * 1.10: Plane/pipe disentangling + * 1.11: TTM superioctl + * 1.12: TTM relocation optimization */ #define DRIVER_MAJOR 1 #if defined(I915_HAVE_FENCE) && defined(I915_HAVE_BUFFER) -#define DRIVER_MINOR 10 +#define DRIVER_MINOR 13 #else #define DRIVER_MINOR 6 #endif #define DRIVER_PATCHLEVEL 0 -#define DRM_DRIVER_PRIVATE_T drm_i915_private_t +#ifdef I915_HAVE_BUFFER +#define I915_MAX_VALIDATE_BUFFERS 4096 +struct drm_i915_validate_buffer; +#endif typedef struct _drm_i915_ring_buffer { int tail_mask; @@ -98,13 +101,9 @@ } drm_i915_vbl_swap_t; typedef struct drm_i915_private { - drm_buffer_object_t *ring_buffer; drm_local_map_t *sarea; drm_local_map_t *mmio_map; - unsigned long mmiobase; - unsigned long mmiolen; - drm_i915_sarea_t *sarea_priv; drm_i915_ring_buffer_t ring; @@ -141,19 +140,24 @@ #endif #ifdef I915_HAVE_BUFFER void *agp_iomap; + unsigned int max_validate_buffers; + struct mutex cmdbuf_mutex; + struct drm_i915_validate_buffer *val_bufs; #endif + DRM_SPINTYPE swaps_lock; drm_i915_vbl_swap_t vbl_swaps; unsigned int swaps_pending; - - /* LVDS info */ - int backlight_duty_cycle; /* restore backlight to this value */ - bool panel_wants_dither; - struct drm_display_mode *panel_fixed_mode; - +#if defined(I915_HAVE_BUFFER) + /* DRI2 sarea */ + struct drm_buffer_object *sarea_bo; + struct drm_bo_kmap_obj sarea_kmap; +#endif /* Register state */ + u8 saveLBB; u32 saveDSPACNTR; u32 saveDSPBCNTR; + u32 saveDSPARB; u32 savePIPEACONF; u32 savePIPEBCONF; u32 savePIPEASRC; @@ -168,11 +172,17 @@ u32 saveVTOTAL_A; u32 saveVBLANK_A; u32 saveVSYNC_A; + u32 saveBCLRPAT_A; + u32 savePIPEASTAT; u32 saveDSPASTRIDE; u32 saveDSPASIZE; u32 saveDSPAPOS; u32 saveDSPABASE; u32 saveDSPASURF; + u32 saveDSPATILEOFF; + u32 savePFIT_PGM_RATIOS; + u32 saveBLC_PWM_CTL; + u32 saveBLC_PWM_CTL2; u32 saveFPB0; u32 saveFPB1; u32 saveDPLL_B; @@ -183,17 +193,22 @@ u32 saveVTOTAL_B; u32 saveVBLANK_B; u32 saveVSYNC_B; + u32 saveBCLRPAT_B; + u32 savePIPEBSTAT; u32 saveDSPBSTRIDE; u32 saveDSPBSIZE; u32 saveDSPBPOS; u32 saveDSPBBASE; u32 saveDSPBSURF; + u32 saveDSPBTILEOFF; u32 saveVCLK_DIVISOR_VGA0; u32 saveVCLK_DIVISOR_VGA1; u32 saveVCLK_POST_DIV; u32 saveVGACNTRL; u32 saveADPA; u32 saveLVDS; + u32 saveLVDSPP_ON; + u32 saveLVDSPP_OFF; u32 saveDVOA; u32 saveDVOB; u32 saveDVOC; @@ -202,10 +217,30 @@ u32 savePP_CONTROL; u32 savePP_CYCLE; u32 savePFIT_CONTROL; - u32 savePaletteA[256]; - u32 savePaletteB[256]; - u32 saveSWF[17]; - u32 saveBLC_PWM_CTL; + u32 save_palette_a[256]; + u32 save_palette_b[256]; + u32 saveFBC_CFB_BASE; + u32 saveFBC_LL_BASE; + u32 saveFBC_CONTROL; + u32 saveFBC_CONTROL2; + u32 saveIER; + u32 saveIIR; + u32 saveIMR; + u32 saveCACHE_MODE_0; + u32 saveD_STATE; + u32 saveDSPCLK_GATE_D; + u32 saveMI_ARB_STATE; + u32 saveSWF0[16]; + u32 saveSWF1[16]; + u32 saveSWF2[3]; + u8 saveMSR; + u8 saveSR[8]; + u8 saveGR[25]; + u8 saveAR_INDEX; + u8 saveAR[21]; + u8 saveDACMASK; + u8 saveDACDATA[256*3]; /* 256 3-byte colors */ + u8 saveCR[37]; } drm_i915_private_t; enum intel_chip_family { @@ -213,7 +248,6 @@ CHIP_I9XX = 0x02, CHIP_I915 = 0x04, CHIP_I965 = 0x08, - CHIP_POULSBO = 0x10, }; extern struct drm_ioctl_desc i915_ioctls[]; @@ -222,6 +256,7 @@ /* i915_dma.c */ extern void i915_kernel_lost_context(struct drm_device * dev); extern int i915_driver_load(struct drm_device *, unsigned long flags); +extern int i915_driver_unload(struct drm_device *); extern void i915_driver_lastclose(struct drm_device * dev); extern void i915_driver_preclose(struct drm_device *dev, struct drm_file *file_priv); @@ -232,7 +267,9 @@ extern void i915_dispatch_flip(struct drm_device * dev, int pipes, int sync); extern int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush); extern int i915_driver_firstopen(struct drm_device *dev); -extern int i915_dma_cleanup(drm_device_t * dev); +extern int i915_dispatch_batchbuffer(struct drm_device * dev, + drm_i915_batchbuffer_t * batch); +extern int i915_quiescent(struct drm_device *dev); /* i915_irq.c */ extern int i915_irq_emit(struct drm_device *dev, void *data, @@ -240,21 +277,22 @@ extern int i915_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int i915_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence); -extern int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence); extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS); extern void i915_driver_irq_preinstall(struct drm_device * dev); -extern void i915_driver_irq_postinstall(struct drm_device * dev); +extern int i915_driver_irq_postinstall(struct drm_device * dev); extern void i915_driver_irq_uninstall(struct drm_device * dev); extern int i915_vblank_pipe_set(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_vblank_pipe_get(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int i915_emit_irq(struct drm_device * dev); -extern void i915_user_irq_on(drm_i915_private_t *dev_priv); -extern void i915_user_irq_off(drm_i915_private_t *dev_priv); +extern int i915_enable_vblank(struct drm_device *dev, int crtc); +extern void i915_disable_vblank(struct drm_device *dev, int crtc); +extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc); extern int i915_vblank_swap(struct drm_device *dev, void *data, struct drm_file *file_priv); +extern void i915_user_irq_on(drm_i915_private_t *dev_priv); +extern void i915_user_irq_off(drm_i915_private_t *dev_priv); /* i915_mem.c */ extern int i915_mem_alloc(struct drm_device *dev, void *data, @@ -271,40 +309,39 @@ struct mem_block *heap); #ifdef I915_HAVE_FENCE /* i915_fence.c */ - - extern void i915_fence_handler(struct drm_device *dev); -extern int i915_fence_emit_sequence(struct drm_device *dev, uint32_t class, - uint32_t flags, - uint32_t *sequence, - uint32_t *native_type); -extern void i915_poke_flush(struct drm_device *dev, uint32_t class); -extern int i915_fence_has_irq(struct drm_device *dev, uint32_t class, uint32_t flags); +extern void i915_invalidate_reported_sequence(struct drm_device *dev); + #endif #ifdef I915_HAVE_BUFFER /* i915_buffer.c */ extern struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device *dev); -extern int i915_fence_types(struct drm_buffer_object *bo, uint32_t *fclass, - uint32_t *type); +extern int i915_fence_type(struct drm_buffer_object *bo, uint32_t *fclass, + uint32_t *type); extern int i915_invalidate_caches(struct drm_device *dev, uint64_t buffer_flags); extern int i915_init_mem_type(struct drm_device *dev, uint32_t type, struct drm_mem_type_manager *man); -extern uint32_t i915_evict_mask(struct drm_buffer_object *bo); +extern uint64_t i915_evict_flags(struct drm_buffer_object *bo); extern int i915_move(struct drm_buffer_object *bo, int evict, - int no_wait, struct drm_bo_mem_reg *new_mem); + int no_wait, struct drm_bo_mem_reg *new_mem); +void i915_flush_ttm(struct drm_ttm *ttm); +/* i915_execbuf.c */ +int i915_execbuffer(struct drm_device *dev, void *data, + struct drm_file *file_priv); #endif - -/* modesetting */ -extern void intel_modeset_init(drm_device_t *dev); -extern void intel_modeset_cleanup(drm_device_t *dev); - +#ifdef __linux__ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) +extern void intel_init_chipset_flush_compat(struct drm_device *dev); +extern void intel_fini_chipset_flush_compat(struct drm_device *dev); +#endif +#endif #define I915_READ(reg) DRM_READ32(dev_priv->mmio_map, (reg)) #define I915_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, (reg), (val)) -#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg)) +#define I915_READ16(reg) DRM_READ16(dev_priv->mmio_map, (reg)) #define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val)) #define I915_VERBOSE 0 @@ -314,8 +351,8 @@ #define BEGIN_LP_RING(n) do { \ if (I915_VERBOSE) \ - DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ - (n), __FUNCTION__); \ + DRM_DEBUG("BEGIN_LP_RING(%d)\n", \ + (n)); \ if (dev_priv->ring.space < (n)*4) \ i915_wait_ring(dev, (n)*4, __FUNCTION__); \ outcount = 0; \ @@ -341,30 +378,54 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); -/* - * The Bridge device's PCI config space has information about the - * fb aperture size and the amount of pre-reserved memory. - */ -#define INTEL_GMCH_CTRL 0x52 -#define INTEL_GMCH_ENABLED 0x4 -#define INTEL_GMCH_MEM_MASK 0x1 -#define INTEL_GMCH_MEM_64M 0x1 -#define INTEL_GMCH_MEM_128M 0 - -#define INTEL_855_GMCH_GMS_MASK (0x7 << 4) -#define INTEL_855_GMCH_GMS_DISABLED (0x0 << 4) -#define INTEL_855_GMCH_GMS_STOLEN_1M (0x1 << 4) -#define INTEL_855_GMCH_GMS_STOLEN_4M (0x2 << 4) -#define INTEL_855_GMCH_GMS_STOLEN_8M (0x3 << 4) -#define INTEL_855_GMCH_GMS_STOLEN_16M (0x4 << 4) -#define INTEL_855_GMCH_GMS_STOLEN_32M (0x5 << 4) +/* Extended config space */ +#define LBB 0xf4 + +/* VGA stuff */ + +#define VGA_ST01_MDA 0x3ba +#define VGA_ST01_CGA 0x3da -#define INTEL_915G_GMCH_GMS_STOLEN_48M (0x6 << 4) -#define INTEL_915G_GMCH_GMS_STOLEN_64M (0x7 << 4) +#define VGA_MSR_WRITE 0x3c2 +#define VGA_MSR_READ 0x3cc +#define VGA_MSR_MEM_EN (1<<1) +#define VGA_MSR_CGA_MODE (1<<0) + +#define VGA_SR_INDEX 0x3c4 +#define VGA_SR_DATA 0x3c5 + +#define VGA_AR_INDEX 0x3c0 +#define VGA_AR_VID_EN (1<<5) +#define VGA_AR_DATA_WRITE 0x3c0 +#define VGA_AR_DATA_READ 0x3c1 + +#define VGA_GR_INDEX 0x3ce +#define VGA_GR_DATA 0x3cf +/* GR05 */ +#define VGA_GR_MEM_READ_MODE_SHIFT 3 +#define VGA_GR_MEM_READ_MODE_PLANE 1 +/* GR06 */ +#define VGA_GR_MEM_MODE_MASK 0xc +#define VGA_GR_MEM_MODE_SHIFT 2 +#define VGA_GR_MEM_A0000_AFFFF 0 +#define VGA_GR_MEM_A0000_BFFFF 1 +#define VGA_GR_MEM_B0000_B7FFF 2 +#define VGA_GR_MEM_B0000_BFFFF 3 + +#define VGA_DACMASK 0x3c6 +#define VGA_DACRX 0x3c7 +#define VGA_DACWX 0x3c8 +#define VGA_DACDATA 0x3c9 + +#define VGA_CR_INDEX_MDA 0x3b4 +#define VGA_CR_DATA_MDA 0x3b5 +#define VGA_CR_INDEX_CGA 0x3d4 +#define VGA_CR_DATA_CGA 0x3d5 -#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) +#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) #define CMD_REPORT_HEAD (7<<23) +#define CMD_STORE_DWORD_IMM ((0x20<<23) | (0x1 << 22) | 0x1) #define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) @@ -384,92 +445,133 @@ #define BB1_UNPROTECTED (0<<0) #define BB2_END_ADDR_MASK (~0x7) +/* Framebuffer compression */ +#define FBC_CFB_BASE 0x03200 /* 4k page aligned */ +#define FBC_LL_BASE 0x03204 /* 4k page aligned */ +#define FBC_CONTROL 0x03208 +#define FBC_CTL_EN (1<<31) +#define FBC_CTL_PERIODIC (1<<30) +#define FBC_CTL_INTERVAL_SHIFT (16) +#define FBC_CTL_UNCOMPRESSIBLE (1<<14) +#define FBC_CTL_STRIDE_SHIFT (5) +#define FBC_CTL_FENCENO (1<<0) +#define FBC_COMMAND 0x0320c +#define FBC_CMD_COMPRESS (1<<0) +#define FBC_STATUS 0x03210 +#define FBC_STAT_COMPRESSING (1<<31) +#define FBC_STAT_COMPRESSED (1<<30) +#define FBC_STAT_MODIFIED (1<<29) +#define FBC_STAT_CURRENT_LINE (1<<0) +#define FBC_CONTROL2 0x03214 +#define FBC_CTL_FENCE_DBL (0<<4) +#define FBC_CTL_IDLE_IMM (0<<2) +#define FBC_CTL_IDLE_FULL (1<<2) +#define FBC_CTL_IDLE_LINE (2<<2) +#define FBC_CTL_IDLE_DEBUG (3<<2) +#define FBC_CTL_CPU_FENCE (1<<1) +#define FBC_CTL_PLANEA (0<<0) +#define FBC_CTL_PLANEB (1<<0) +#define FBC_FENCE_OFF 0x0321b + +#define FBC_LL_SIZE (1536) +#define FBC_LL_PAD (32) + /* Interrupt bits: */ -#define USER_INT_FLAG (1<<1) -#define VSYNC_PIPEB_FLAG (1<<5) -#define VSYNC_PIPEA_FLAG (1<<7) -#define HWB_OOM_FLAG (1<<13) /* binner out of memory */ +#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1<<18) +#define I915_DISPLAY_PORT_INTERRUPT (1<<17) +#define I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT (1<<15) +#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1<<14) +#define I915_HWB_OOM_INTERRUPT (1<<13) /* binner out of memory */ +#define I915_SYNC_STATUS_INTERRUPT (1<<12) +#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1<<11) +#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1<<10) +#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1<<9) +#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1<<8) +#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1<<7) +#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1<<6) +#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1<<5) +#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1<<4) +#define I915_DEBUG_INTERRUPT (1<<2) +#define I915_USER_INTERRUPT (1<<1) + #define I915REG_HWSTAM 0x02098 #define I915REG_INT_IDENTITY_R 0x020a4 -#define I915REG_INT_MASK_R 0x020a8 +#define I915REG_INT_MASK_R 0x020a8 #define I915REG_INT_ENABLE_R 0x020a0 #define I915REG_INSTPM 0x020c0 +#define PIPEADSL 0x70000 +#define PIPEBDSL 0x71000 + #define I915REG_PIPEASTAT 0x70024 #define I915REG_PIPEBSTAT 0x71024 +/* + * The two pipe frame counter registers are not synchronized, so + * reading a stable value is somewhat tricky. The following code + * should work: + * + * do { + * high1 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >> + * PIPE_FRAME_HIGH_SHIFT; + * low1 = ((INREG(PIPEAFRAMEPIXEL) & PIPE_FRAME_LOW_MASK) >> + * PIPE_FRAME_LOW_SHIFT); + * high2 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >> + * PIPE_FRAME_HIGH_SHIFT); + * } while (high1 != high2); + * frame = (high1 << 8) | low1; + */ +#define PIPEAFRAMEHIGH 0x70040 +#define PIPEBFRAMEHIGH 0x71040 +#define PIPE_FRAME_HIGH_MASK 0x0000ffff +#define PIPE_FRAME_HIGH_SHIFT 0 +#define PIPEAFRAMEPIXEL 0x70044 +#define PIPEBFRAMEPIXEL 0x71044 -#define I915_VBLANK_INTERRUPT_ENABLE (1UL<<17) -#define I915_VBLANK_CLEAR (1UL<<1) - -#define GPIOA 0x5010 -#define GPIOB 0x5014 -#define GPIOC 0x5018 -#define GPIOD 0x501c -#define GPIOE 0x5020 -#define GPIOF 0x5024 -#define GPIOG 0x5028 -#define GPIOH 0x502c -# define GPIO_CLOCK_DIR_MASK (1 << 0) -# define GPIO_CLOCK_DIR_IN (0 << 1) -# define GPIO_CLOCK_DIR_OUT (1 << 1) -# define GPIO_CLOCK_VAL_MASK (1 << 2) -# define GPIO_CLOCK_VAL_OUT (1 << 3) -# define GPIO_CLOCK_VAL_IN (1 << 4) -# define GPIO_CLOCK_PULLUP_DISABLE (1 << 5) -# define GPIO_DATA_DIR_MASK (1 << 8) -# define GPIO_DATA_DIR_IN (0 << 9) -# define GPIO_DATA_DIR_OUT (1 << 9) -# define GPIO_DATA_VAL_MASK (1 << 10) -# define GPIO_DATA_VAL_OUT (1 << 11) -# define GPIO_DATA_VAL_IN (1 << 12) -# define GPIO_DATA_PULLUP_DISABLE (1 << 13) - -/* p317, 319 +#define PIPE_FRAME_LOW_MASK 0xff000000 +#define PIPE_FRAME_LOW_SHIFT 24 +/* + * Pixel within the current frame is counted in the PIPEAFRAMEPIXEL register + * and is 24 bits wide. */ -#define VCLK2_VCO_M 0x6008 /* treat as 16 bit? (includes msbs) */ -#define VCLK2_VCO_N 0x600a -#define VCLK2_VCO_DIV_SEL 0x6012 - -#define VCLK_DIVISOR_VGA0 0x6000 -#define VCLK_DIVISOR_VGA1 0x6004 -#define VCLK_POST_DIV 0x6010 -/** Selects a post divisor of 4 instead of 2. */ -# define VGA1_PD_P2_DIV_4 (1 << 15) -/** Overrides the p2 post divisor field */ -# define VGA1_PD_P1_DIV_2 (1 << 13) -# define VGA1_PD_P1_SHIFT 8 -/** P1 value is 2 greater than this field */ -# define VGA1_PD_P1_MASK (0x1f << 8) -/** Selects a post divisor of 4 instead of 2. */ -# define VGA0_PD_P2_DIV_4 (1 << 7) -/** Overrides the p2 post divisor field */ -# define VGA0_PD_P1_DIV_2 (1 << 5) -# define VGA0_PD_P1_SHIFT 0 -/** P1 value is 2 greater than this field */ -# define VGA0_PD_P1_MASK (0x1f << 0) +#define PIPE_PIXEL_MASK 0x00ffffff +#define PIPE_PIXEL_SHIFT 0 -#define POST_DIV_SELECT 0x70 -#define POST_DIV_1 0x00 -#define POST_DIV_2 0x10 -#define POST_DIV_4 0x20 -#define POST_DIV_8 0x30 -#define POST_DIV_16 0x40 -#define POST_DIV_32 0x50 -#define VCO_LOOP_DIV_BY_4M 0x00 -#define VCO_LOOP_DIV_BY_16M 0x04 +#define I915_FIFO_UNDERRUN_STATUS (1UL<<31) +#define I915_CRC_ERROR_ENABLE (1UL<<29) +#define I915_CRC_DONE_ENABLE (1UL<<28) +#define I915_GMBUS_EVENT_ENABLE (1UL<<27) +#define I915_VSYNC_INTERRUPT_ENABLE (1UL<<25) +#define I915_DISPLAY_LINE_COMPARE_ENABLE (1UL<<24) +#define I915_DPST_EVENT_ENABLE (1UL<<23) +#define I915_LEGACY_BLC_EVENT_ENABLE (1UL<<22) +#define I915_ODD_FIELD_INTERRUPT_ENABLE (1UL<<21) +#define I915_EVEN_FIELD_INTERRUPT_ENABLE (1UL<<20) +#define I915_START_VBLANK_INTERRUPT_ENABLE (1UL<<18) /* 965 or later */ +#define I915_VBLANK_INTERRUPT_ENABLE (1UL<<17) +#define I915_OVERLAY_UPDATED_ENABLE (1UL<<16) +#define I915_CRC_ERROR_INTERRUPT_STATUS (1UL<<13) +#define I915_CRC_DONE_INTERRUPT_STATUS (1UL<<12) +#define I915_GMBUS_INTERRUPT_STATUS (1UL<<11) +#define I915_VSYNC_INTERRUPT_STATUS (1UL<<9) +#define I915_DISPLAY_LINE_COMPARE_STATUS (1UL<<8) +#define I915_DPST_EVENT_STATUS (1UL<<7) +#define I915_LEGACY_BLC_EVENT_STATUS (1UL<<6) +#define I915_ODD_FIELD_INTERRUPT_STATUS (1UL<<5) +#define I915_EVEN_FIELD_INTERRUPT_STATUS (1UL<<4) +#define I915_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ +#define I915_VBLANK_INTERRUPT_STATUS (1UL<<1) +#define I915_OVERLAY_UPDATED_STATUS (1UL<<0) #define SRX_INDEX 0x3c4 #define SRX_DATA 0x3c5 #define SR01 1 -#define SR01_SCREEN_OFF (1<<5) +#define SR01_SCREEN_OFF (1<<5) #define PPCR 0x61204 #define PPCR_ON (1<<0) -#define DVOA 0x61120 -#define DVOA_ON (1<<31) #define DVOB 0x61140 #define DVOB_ON (1<<31) #define DVOC 0x61160 @@ -485,29 +587,29 @@ #define ADPA_DPMS_OFF (3<<10) #define NOPID 0x2094 -#define LP_RING 0x2030 -#define HP_RING 0x2040 +#define LP_RING 0x2030 +#define HP_RING 0x2040 /* The binner has its own ring buffer: */ #define HWB_RING 0x2400 -#define RING_TAIL 0x00 +#define RING_TAIL 0x00 #define TAIL_ADDR 0x001FFFF8 -#define RING_HEAD 0x04 -#define HEAD_WRAP_COUNT 0xFFE00000 -#define HEAD_WRAP_ONE 0x00200000 -#define HEAD_ADDR 0x001FFFFC -#define RING_START 0x08 -#define START_ADDR 0x0xFFFFF000 -#define RING_LEN 0x0C -#define RING_NR_PAGES 0x001FF000 -#define RING_REPORT_MASK 0x00000006 -#define RING_REPORT_64K 0x00000002 -#define RING_REPORT_128K 0x00000004 -#define RING_NO_REPORT 0x00000000 -#define RING_VALID_MASK 0x00000001 -#define RING_VALID 0x00000001 -#define RING_INVALID 0x00000000 +#define RING_HEAD 0x04 +#define HEAD_WRAP_COUNT 0xFFE00000 +#define HEAD_WRAP_ONE 0x00200000 +#define HEAD_ADDR 0x001FFFFC +#define RING_START 0x08 +#define START_ADDR 0xFFFFF000 +#define RING_LEN 0x0C +#define RING_NR_PAGES 0x001FF000 +#define RING_REPORT_MASK 0x00000006 +#define RING_REPORT_64K 0x00000002 +#define RING_REPORT_128K 0x00000004 +#define RING_NO_REPORT 0x00000000 +#define RING_VALID_MASK 0x00000001 +#define RING_VALID 0x00000001 +#define RING_INVALID 0x00000000 /* Instruction parser error reg: */ @@ -525,7 +627,11 @@ */ #define DMA_FADD_S 0x20d4 -/* Cache mode 0 reg. +/* Memory Interface Arbitration State + */ +#define MI_ARB_STATE 0x20e4 + +/* Cache mode 0 reg. * - Manipulating render cache behaviour is central * to the concept of zone rendering, tuning this reg can help avoid * unnecessary render cache reads and even writes (for z/stencil) @@ -535,6 +641,7 @@ * bit of interest either set or cleared. EG: (BIT<<16) | BIT to set. */ #define Cache_Mode_0 0x2120 +#define CACHE_MODE_0 0x2120 #define CM0_MASK_SHIFT 16 #define CM0_IZ_OPT_DISABLE (1<<6) #define CM0_ZR_OPT_DISABLE (1<<5) @@ -554,7 +661,7 @@ #define BINCTL 0x2420 #define BC_MASK (1 << 9) -/* Binned scene info. +/* Binned scene info. */ #define BINSCENE 0x2428 #define BS_OP_LOAD (1 << 8) @@ -572,7 +679,7 @@ */ #define BDCD 0x2488 -/* Binner pointer cache debug reg: +/* Binner pointer cache debug reg: */ #define BPCD 0x248c @@ -626,18 +733,15 @@ #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|4) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) -#define XY_MONO_SRC_COPY_IMM_BLT ((2<<29)|(0x71<<22)|5) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) -#define BLT_DEPTH_8 (0<<24) -#define BLT_DEPTH_16_565 (1<<24) -#define BLT_DEPTH_16_1555 (2<<24) -#define BLT_DEPTH_32 (3<<24) -#define BLT_ROP_GXCOPY (0xcc<<16) - -#define MI_BATCH_BUFFER ((0x30<<23)|1) -#define MI_BATCH_BUFFER_START (0x31<<23) -#define MI_BATCH_BUFFER_END (0xA<<23) +#define XY_SRC_COPY_BLT_SRC_TILED (1<<15) +#define XY_SRC_COPY_BLT_DST_TILED (1<<11) + + +#define MI_BATCH_BUFFER ((0x30<<23)|1) +#define MI_BATCH_BUFFER_START (0x31<<23) +#define MI_BATCH_BUFFER_END (0xA<<23) #define MI_BATCH_NON_SECURE (1) #define MI_BATCH_NON_SECURE_I965 (1<<8) @@ -671,6 +775,531 @@ #define READ_BREADCRUMB(dev_priv) (((volatile u32*)(dev_priv->hw_status_page))[5]) #define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg]) +#define BLC_PWM_CTL 0x61254 +#define BACKLIGHT_MODULATION_FREQ_SHIFT (17) + +#define BLC_PWM_CTL2 0x61250 +/** + * This is the most significant 15 bits of the number of backlight cycles in a + * complete cycle of the modulated backlight control. + * + * The actual value is this field multiplied by two. + */ +#define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) +#define BLM_LEGACY_MODE (1 << 16) +/** + * This is the number of cycles out of the backlight modulation cycle for which + * the backlight is on. + * + * This field must be no greater than the number of cycles in the complete + * backlight modulation cycle. + */ +#define BACKLIGHT_DUTY_CYCLE_SHIFT (0) +#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) + +#define I915_GCFGC 0xf0 +#define I915_LOW_FREQUENCY_ENABLE (1 << 7) +#define I915_DISPLAY_CLOCK_190_200_MHZ (0 << 4) +#define I915_DISPLAY_CLOCK_333_MHZ (4 << 4) +#define I915_DISPLAY_CLOCK_MASK (7 << 4) + +#define I855_HPLLCC 0xc0 +#define I855_CLOCK_CONTROL_MASK (3 << 0) +#define I855_CLOCK_133_200 (0 << 0) +#define I855_CLOCK_100_200 (1 << 0) +#define I855_CLOCK_100_133 (2 << 0) +#define I855_CLOCK_166_250 (3 << 0) + +/* p317, 319 + */ +#define VCLK2_VCO_M 0x6008 /* treat as 16 bit? (includes msbs) */ +#define VCLK2_VCO_N 0x600a +#define VCLK2_VCO_DIV_SEL 0x6012 + +#define VCLK_DIVISOR_VGA0 0x6000 +#define VCLK_DIVISOR_VGA1 0x6004 +#define VCLK_POST_DIV 0x6010 +/** Selects a post divisor of 4 instead of 2. */ +# define VGA1_PD_P2_DIV_4 (1 << 15) +/** Overrides the p2 post divisor field */ +# define VGA1_PD_P1_DIV_2 (1 << 13) +# define VGA1_PD_P1_SHIFT 8 +/** P1 value is 2 greater than this field */ +# define VGA1_PD_P1_MASK (0x1f << 8) +/** Selects a post divisor of 4 instead of 2. */ +# define VGA0_PD_P2_DIV_4 (1 << 7) +/** Overrides the p2 post divisor field */ +# define VGA0_PD_P1_DIV_2 (1 << 5) +# define VGA0_PD_P1_SHIFT 0 +/** P1 value is 2 greater than this field */ +# define VGA0_PD_P1_MASK (0x1f << 0) + +/* PCI D state control register */ +#define D_STATE 0x6104 +#define DSPCLK_GATE_D 0x6200 + +/* I830 CRTC registers */ +#define HTOTAL_A 0x60000 +#define HBLANK_A 0x60004 +#define HSYNC_A 0x60008 +#define VTOTAL_A 0x6000c +#define VBLANK_A 0x60010 +#define VSYNC_A 0x60014 +#define PIPEASRC 0x6001c +#define BCLRPAT_A 0x60020 +#define VSYNCSHIFT_A 0x60028 + +#define HTOTAL_B 0x61000 +#define HBLANK_B 0x61004 +#define HSYNC_B 0x61008 +#define VTOTAL_B 0x6100c +#define VBLANK_B 0x61010 +#define VSYNC_B 0x61014 +#define PIPEBSRC 0x6101c +#define BCLRPAT_B 0x61020 +#define VSYNCSHIFT_B 0x61028 + +#define HACTIVE_MASK 0x00000fff +#define VTOTAL_MASK 0x00001fff +#define VTOTAL_SHIFT 16 +#define VACTIVE_MASK 0x00000fff +#define VBLANK_END_MASK 0x00001fff +#define VBLANK_END_SHIFT 16 +#define VBLANK_START_MASK 0x00001fff + +#define PP_STATUS 0x61200 +# define PP_ON (1 << 31) +/** + * Indicates that all dependencies of the panel are on: + * + * - PLL enabled + * - pipe enabled + * - LVDS/DVOB/DVOC on + */ +# define PP_READY (1 << 30) +# define PP_SEQUENCE_NONE (0 << 28) +# define PP_SEQUENCE_ON (1 << 28) +# define PP_SEQUENCE_OFF (2 << 28) +# define PP_SEQUENCE_MASK 0x30000000 +#define PP_CONTROL 0x61204 +# define POWER_TARGET_ON (1 << 0) + +#define LVDSPP_ON 0x61208 +#define LVDSPP_OFF 0x6120c +#define PP_CYCLE 0x61210 + +#define PFIT_CONTROL 0x61230 +# define PFIT_ENABLE (1 << 31) +# define PFIT_PIPE_MASK (3 << 29) +# define PFIT_PIPE_SHIFT 29 +# define VERT_INTERP_DISABLE (0 << 10) +# define VERT_INTERP_BILINEAR (1 << 10) +# define VERT_INTERP_MASK (3 << 10) +# define VERT_AUTO_SCALE (1 << 9) +# define HORIZ_INTERP_DISABLE (0 << 6) +# define HORIZ_INTERP_BILINEAR (1 << 6) +# define HORIZ_INTERP_MASK (3 << 6) +# define HORIZ_AUTO_SCALE (1 << 5) +# define PANEL_8TO6_DITHER_ENABLE (1 << 3) + +#define PFIT_PGM_RATIOS 0x61234 +# define PFIT_VERT_SCALE_MASK 0xfff00000 +# define PFIT_HORIZ_SCALE_MASK 0x0000fff0 + +#define PFIT_AUTO_RATIOS 0x61238 + + +#define DPLL_A 0x06014 +#define DPLL_B 0x06018 +# define DPLL_VCO_ENABLE (1 << 31) +# define DPLL_DVO_HIGH_SPEED (1 << 30) +# define DPLL_SYNCLOCK_ENABLE (1 << 29) +# define DPLL_VGA_MODE_DIS (1 << 28) +# define DPLLB_MODE_DAC_SERIAL (1 << 26) /* i915 */ +# define DPLLB_MODE_LVDS (2 << 26) /* i915 */ +# define DPLL_MODE_MASK (3 << 26) +# define DPLL_DAC_SERIAL_P2_CLOCK_DIV_10 (0 << 24) /* i915 */ +# define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ +# define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ +# define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ +# define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */ +# define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ +/** + * The i830 generation, in DAC/serial mode, defines p1 as two plus this + * bitfield, or just 2 if PLL_P1_DIVIDE_BY_TWO is set. + */ +# define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000 +/** + * The i830 generation, in LVDS mode, defines P1 as the bit number set within + * this field (only one bit may be set). + */ +# define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000 +# define DPLL_FPA01_P1_POST_DIV_SHIFT 16 +# define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required in DVO non-gang */ +# define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */ +# define PLL_REF_INPUT_DREFCLK (0 << 13) +# define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */ +# define PLL_REF_INPUT_TVCLKINBC (2 << 13) /* SDVO TVCLKIN */ +# define PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13) +# define PLL_REF_INPUT_MASK (3 << 13) +# define PLL_LOAD_PULSE_PHASE_SHIFT 9 +/* + * Parallel to Serial Load Pulse phase selection. + * Selects the phase for the 10X DPLL clock for the PCIe + * digital display port. The range is 4 to 13; 10 or more + * is just a flip delay. The default is 6 + */ +# define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT) +# define DISPLAY_RATE_SELECT_FPA1 (1 << 8) + +/** + * SDVO multiplier for 945G/GM. Not used on 965. + * + * \sa DPLL_MD_UDI_MULTIPLIER_MASK + */ +# define SDVO_MULTIPLIER_MASK 0x000000ff +# define SDVO_MULTIPLIER_SHIFT_HIRES 4 +# define SDVO_MULTIPLIER_SHIFT_VGA 0 + +/** @defgroup DPLL_MD + * @{ + */ +/** Pipe A SDVO/UDI clock multiplier/divider register for G965. */ +#define DPLL_A_MD 0x0601c +/** Pipe B SDVO/UDI clock multiplier/divider register for G965. */ +#define DPLL_B_MD 0x06020 +/** + * UDI pixel divider, controlling how many pixels are stuffed into a packet. + * + * Value is pixels minus 1. Must be set to 1 pixel for SDVO. + */ +# define DPLL_MD_UDI_DIVIDER_MASK 0x3f000000 +# define DPLL_MD_UDI_DIVIDER_SHIFT 24 +/** UDI pixel divider for VGA, same as DPLL_MD_UDI_DIVIDER_MASK. */ +# define DPLL_MD_VGA_UDI_DIVIDER_MASK 0x003f0000 +# define DPLL_MD_VGA_UDI_DIVIDER_SHIFT 16 +/** + * SDVO/UDI pixel multiplier. + * + * SDVO requires that the bus clock rate be between 1 and 2 Ghz, and the bus + * clock rate is 10 times the DPLL clock. At low resolution/refresh rate + * modes, the bus rate would be below the limits, so SDVO allows for stuffing + * dummy bytes in the datastream at an increased clock rate, with both sides of + * the link knowing how many bytes are fill. + * + * So, for a mode with a dotclock of 65Mhz, we would want to double the clock + * rate to 130Mhz to get a bus rate of 1.30Ghz. The DPLL clock rate would be + * set to 130Mhz, and the SDVO multiplier set to 2x in this register and + * through an SDVO command. + * + * This register field has values of multiplication factor minus 1, with + * a maximum multiplier of 5 for SDVO. + */ +# define DPLL_MD_UDI_MULTIPLIER_MASK 0x00003f00 +# define DPLL_MD_UDI_MULTIPLIER_SHIFT 8 +/** SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK. + * This best be set to the default value (3) or the CRT won't work. No, + * I don't entirely understand what this does... + */ +# define DPLL_MD_VGA_UDI_MULTIPLIER_MASK 0x0000003f +# define DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT 0 +/** @} */ + +#define DPLL_TEST 0x606c +# define DPLLB_TEST_SDVO_DIV_1 (0 << 22) +# define DPLLB_TEST_SDVO_DIV_2 (1 << 22) +# define DPLLB_TEST_SDVO_DIV_4 (2 << 22) +# define DPLLB_TEST_SDVO_DIV_MASK (3 << 22) +# define DPLLB_TEST_N_BYPASS (1 << 19) +# define DPLLB_TEST_M_BYPASS (1 << 18) +# define DPLLB_INPUT_BUFFER_ENABLE (1 << 16) +# define DPLLA_TEST_N_BYPASS (1 << 3) +# define DPLLA_TEST_M_BYPASS (1 << 2) +# define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) + +#define ADPA 0x61100 +#define ADPA_DAC_ENABLE (1<<31) +#define ADPA_DAC_DISABLE 0 +#define ADPA_PIPE_SELECT_MASK (1<<30) +#define ADPA_PIPE_A_SELECT 0 +#define ADPA_PIPE_B_SELECT (1<<30) +#define ADPA_USE_VGA_HVPOLARITY (1<<15) +#define ADPA_SETS_HVPOLARITY 0 +#define ADPA_VSYNC_CNTL_DISABLE (1<<11) +#define ADPA_VSYNC_CNTL_ENABLE 0 +#define ADPA_HSYNC_CNTL_DISABLE (1<<10) +#define ADPA_HSYNC_CNTL_ENABLE 0 +#define ADPA_VSYNC_ACTIVE_HIGH (1<<4) +#define ADPA_VSYNC_ACTIVE_LOW 0 +#define ADPA_HSYNC_ACTIVE_HIGH (1<<3) +#define ADPA_HSYNC_ACTIVE_LOW 0 + +#define FPA0 0x06040 +#define FPA1 0x06044 +#define FPB0 0x06048 +#define FPB1 0x0604c +# define FP_N_DIV_MASK 0x003f0000 +# define FP_N_DIV_SHIFT 16 +# define FP_M1_DIV_MASK 0x00003f00 +# define FP_M1_DIV_SHIFT 8 +# define FP_M2_DIV_MASK 0x0000003f +# define FP_M2_DIV_SHIFT 0 + + +#define PORT_HOTPLUG_EN 0x61110 +# define SDVOB_HOTPLUG_INT_EN (1 << 26) +# define SDVOC_HOTPLUG_INT_EN (1 << 25) +# define TV_HOTPLUG_INT_EN (1 << 18) +# define CRT_HOTPLUG_INT_EN (1 << 9) +# define CRT_HOTPLUG_FORCE_DETECT (1 << 3) + +#define PORT_HOTPLUG_STAT 0x61114 +# define CRT_HOTPLUG_INT_STATUS (1 << 11) +# define TV_HOTPLUG_INT_STATUS (1 << 10) +# define CRT_HOTPLUG_MONITOR_MASK (3 << 8) +# define CRT_HOTPLUG_MONITOR_COLOR (3 << 8) +# define CRT_HOTPLUG_MONITOR_MONO (2 << 8) +# define CRT_HOTPLUG_MONITOR_NONE (0 << 8) +# define SDVOC_HOTPLUG_INT_STATUS (1 << 7) +# define SDVOB_HOTPLUG_INT_STATUS (1 << 6) + +#define SDVOB 0x61140 +#define SDVOC 0x61160 +#define SDVO_ENABLE (1 << 31) +#define SDVO_PIPE_B_SELECT (1 << 30) +#define SDVO_STALL_SELECT (1 << 29) +#define SDVO_INTERRUPT_ENABLE (1 << 26) +/** + * 915G/GM SDVO pixel multiplier. + * + * Programmed value is multiplier - 1, up to 5x. + * + * \sa DPLL_MD_UDI_MULTIPLIER_MASK + */ +#define SDVO_PORT_MULTIPLY_MASK (7 << 23) +#define SDVO_PORT_MULTIPLY_SHIFT 23 +#define SDVO_PHASE_SELECT_MASK (15 << 19) +#define SDVO_PHASE_SELECT_DEFAULT (6 << 19) +#define SDVO_CLOCK_OUTPUT_INVERT (1 << 18) +#define SDVOC_GANG_MODE (1 << 16) +#define SDVO_BORDER_ENABLE (1 << 7) +#define SDVOB_PCIE_CONCURRENCY (1 << 3) +#define SDVO_DETECTED (1 << 2) +/* Bits to be preserved when writing */ +#define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14)) +#define SDVOC_PRESERVE_MASK (1 << 17) + +/** @defgroup LVDS + * @{ + */ +/** + * This register controls the LVDS output enable, pipe selection, and data + * format selection. + * + * All of the clock/data pairs are force powered down by power sequencing. + */ +#define LVDS 0x61180 +/** + * Enables the LVDS port. This bit must be set before DPLLs are enabled, as + * the DPLL semantics change when the LVDS is assigned to that pipe. + */ +# define LVDS_PORT_EN (1 << 31) +/** Selects pipe B for LVDS data. Must be set on pre-965. */ +# define LVDS_PIPEB_SELECT (1 << 30) + +/** + * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per + * pixel. + */ +# define LVDS_A0A2_CLKA_POWER_MASK (3 << 8) +# define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8) +# define LVDS_A0A2_CLKA_POWER_UP (3 << 8) +/** + * Controls the A3 data pair, which contains the additional LSBs for 24 bit + * mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be + * on. + */ +# define LVDS_A3_POWER_MASK (3 << 6) +# define LVDS_A3_POWER_DOWN (0 << 6) +# define LVDS_A3_POWER_UP (3 << 6) +/** + * Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP + * is set. + */ +# define LVDS_CLKB_POWER_MASK (3 << 4) +# define LVDS_CLKB_POWER_DOWN (0 << 4) +# define LVDS_CLKB_POWER_UP (3 << 4) + +/** + * Controls the B0-B3 data pairs. This must be set to match the DPLL p2 + * setting for whether we are in dual-channel mode. The B3 pair will + * additionally only be powered up when LVDS_A3_POWER_UP is set. + */ +# define LVDS_B0B3_POWER_MASK (3 << 2) +# define LVDS_B0B3_POWER_DOWN (0 << 2) +# define LVDS_B0B3_POWER_UP (3 << 2) + +#define PIPEACONF 0x70008 +#define PIPEACONF_ENABLE (1<<31) +#define PIPEACONF_DISABLE 0 +#define PIPEACONF_DOUBLE_WIDE (1<<30) +#define I965_PIPECONF_ACTIVE (1<<30) +#define PIPEACONF_SINGLE_WIDE 0 +#define PIPEACONF_PIPE_UNLOCKED 0 +#define PIPEACONF_PIPE_LOCKED (1<<25) +#define PIPEACONF_PALETTE 0 +#define PIPEACONF_GAMMA (1<<24) +#define PIPECONF_FORCE_BORDER (1<<25) +#define PIPECONF_PROGRESSIVE (0 << 21) +#define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) +#define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) + +#define DSPARB 0x70030 +#define DSPARB_CSTART_MASK (0x7f << 7) +#define DSPARB_CSTART_SHIFT 7 +#define DSPARB_BSTART_MASK (0x7f) +#define DSPARB_BSTART_SHIFT 0 + +#define PIPEBCONF 0x71008 +#define PIPEBCONF_ENABLE (1<<31) +#define PIPEBCONF_DISABLE 0 +#define PIPEBCONF_DOUBLE_WIDE (1<<30) +#define PIPEBCONF_DISABLE 0 +#define PIPEBCONF_GAMMA (1<<24) +#define PIPEBCONF_PALETTE 0 + +#define PIPEBGCMAXRED 0x71010 +#define PIPEBGCMAXGREEN 0x71014 +#define PIPEBGCMAXBLUE 0x71018 +#define PIPEBSTAT 0x71024 +#define PIPEBFRAMEHIGH 0x71040 +#define PIPEBFRAMEPIXEL 0x71044 + +#define DSPACNTR 0x70180 +#define DSPBCNTR 0x71180 +#define DISPLAY_PLANE_ENABLE (1<<31) +#define DISPLAY_PLANE_DISABLE 0 +#define DISPPLANE_GAMMA_ENABLE (1<<30) +#define DISPPLANE_GAMMA_DISABLE 0 +#define DISPPLANE_PIXFORMAT_MASK (0xf<<26) +#define DISPPLANE_8BPP (0x2<<26) +#define DISPPLANE_15_16BPP (0x4<<26) +#define DISPPLANE_16BPP (0x5<<26) +#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26) +#define DISPPLANE_32BPP (0x7<<26) +#define DISPPLANE_STEREO_ENABLE (1<<25) +#define DISPPLANE_STEREO_DISABLE 0 +#define DISPPLANE_SEL_PIPE_MASK (1<<24) +#define DISPPLANE_SEL_PIPE_A 0 +#define DISPPLANE_SEL_PIPE_B (1<<24) +#define DISPPLANE_SRC_KEY_ENABLE (1<<22) +#define DISPPLANE_SRC_KEY_DISABLE 0 +#define DISPPLANE_LINE_DOUBLE (1<<20) +#define DISPPLANE_NO_LINE_DOUBLE 0 +#define DISPPLANE_STEREO_POLARITY_FIRST 0 +#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18) +/* plane B only */ +#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15) +#define DISPPLANE_ALPHA_TRANS_DISABLE 0 +#define DISPPLANE_SPRITE_ABOVE_DISPLAYA 0 +#define DISPPLANE_SPRITE_ABOVE_OVERLAY (1) + +#define DSPABASE 0x70184 +#define DSPASTRIDE 0x70188 + +#define DSPBBASE 0x71184 +#define DSPBADDR DSPBBASE +#define DSPBSTRIDE 0x71188 + +#define DSPAKEYVAL 0x70194 +#define DSPAKEYMASK 0x70198 + +#define DSPAPOS 0x7018C /* reserved */ +#define DSPASIZE 0x70190 +#define DSPBPOS 0x7118C +#define DSPBSIZE 0x71190 + +#define DSPASURF 0x7019C +#define DSPATILEOFF 0x701A4 + +#define DSPBSURF 0x7119C +#define DSPBTILEOFF 0x711A4 + +#define VGACNTRL 0x71400 +# define VGA_DISP_DISABLE (1 << 31) +# define VGA_2X_MODE (1 << 30) +# define VGA_PIPE_B_SELECT (1 << 29) + +/* + * Some BIOS scratch area registers. The 845 (and 830?) store the amount + * of video memory available to the BIOS in SWF1. + */ + +#define SWF0 0x71410 + +/* + * 855 scratch registers. + */ +#define SWF10 0x70410 + +#define SWF30 0x72414 + +/* + * Overlay registers. These are overlay registers accessed via MMIO. + * Those loaded via the overlay register page are defined in i830_video.c. + */ +#define OVADD 0x30000 + +#define DOVSTA 0x30008 +#define OC_BUF (0x3<<20) + +#define OGAMC5 0x30010 +#define OGAMC4 0x30014 +#define OGAMC3 0x30018 +#define OGAMC2 0x3001c +#define OGAMC1 0x30020 +#define OGAMC0 0x30024 +/* + * Palette registers + */ +#define PALETTE_A 0x0a000 +#define PALETTE_B 0x0a800 + +#define IS_I830(dev) ((dev)->pci_device == 0x3577) +#define IS_845G(dev) ((dev)->pci_device == 0x2562) +#define IS_I85X(dev) ((dev)->pci_device == 0x3582) +#define IS_I855(dev) ((dev)->pci_device == 0x3582) +#define IS_I865G(dev) ((dev)->pci_device == 0x2572) + +#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a) +#define IS_I915GM(dev) ((dev)->pci_device == 0x2592) +#define IS_I945G(dev) ((dev)->pci_device == 0x2772) +#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\ + (dev)->pci_device == 0x27AE) +#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \ + (dev)->pci_device == 0x2982 || \ + (dev)->pci_device == 0x2992 || \ + (dev)->pci_device == 0x29A2 || \ + (dev)->pci_device == 0x2A02 || \ + (dev)->pci_device == 0x2A12 || \ + (dev)->pci_device == 0x2A42) + +#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02) + +#define IS_IGD_GM(dev) ((dev)->pci_device == 0x2A42) + +#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \ + (dev)->pci_device == 0x29B2 || \ + (dev)->pci_device == 0x29D2) + +#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \ + IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev)) + +#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \ + IS_I945GM(dev) || IS_I965GM(dev) || IS_IGD_GM(dev)) + +#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev)) + #define PRIMARY_RINGBUFFER_SIZE (128*1024) #endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/i915_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/i915_irq.c --- libdrm-2.3.0.16/shared-core/i915_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/i915_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -3,7 +3,7 @@ /* * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -11,11 +11,11 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. @@ -23,7 +23,7 @@ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * + * */ #include "drmP.h" @@ -31,10 +31,6 @@ #include "i915_drm.h" #include "i915_drv.h" -#define USER_INT_FLAG (1<<1) -#define VSYNC_PIPEB_FLAG (1<<5) -#define VSYNC_PIPEA_FLAG (1<<7) - #define MAX_NOPID ((u32)~0) /** @@ -42,9 +38,9 @@ * @dev: DRM device * @plane: plane to look for * - * We need to get the pipe associated with a given plane to correctly perform - * vblank driven swapping, and they may not always be equal. So look up the - * pipe associated with @plane here. + * The Intel Mesa & 2D drivers call the vblank routines with a plane number + * rather than a pipe number, since they may not always be equal. This routine + * maps the given @plane back to a pipe number. */ static int i915_get_pipe(struct drm_device *dev, int plane) @@ -58,6 +54,44 @@ } /** + * i915_get_plane - return the the plane associated with a given pipe + * @dev: DRM device + * @pipe: pipe to look for + * + * The Intel Mesa & 2D drivers call the vblank routines with a plane number + * rather than a plane number, since they may not always be equal. This routine + * maps the given @pipe back to a plane number. + */ +static int +i915_get_plane(struct drm_device *dev, int pipe) +{ + if (i915_get_pipe(dev, 0) == pipe) + return 0; + return 1; +} + +/** + * i915_pipe_enabled - check if a pipe is enabled + * @dev: DRM device + * @pipe: pipe to check + * + * Reading certain registers when the pipe is disabled can hang the chip. + * Use this routine to make sure the PLL is running and the pipe is active + * before reading such registers if unsure. + */ +static int +i915_pipe_enabled(struct drm_device *dev, int pipe) +{ + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF; + + if (I915_READ(pipeconf) & PIPEACONF_ENABLE) + return 1; + + return 0; +} + +/** * Emit a synchronous flip. * * This function must be called with the drawable spinlock held. @@ -114,8 +148,7 @@ drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; struct list_head *list, *tmp, hits, *hit; int nhits, nrects, slice[2], upper[2], lower[2], i, num_pages; - unsigned counter[2] = { atomic_read(&dev->vbl_received), - atomic_read(&dev->vbl_received2) }; + unsigned counter[2]; struct drm_drawable_info *drw; drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; u32 cpp = dev_priv->cpp, offsets[3]; @@ -123,9 +156,23 @@ XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB) : XY_SRC_COPY_BLT_CMD; - u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) | - (cpp << 23) | (1 << 24); + u32 src_pitch = sarea_priv->pitch * cpp; + u32 dst_pitch = sarea_priv->pitch * cpp; + /* COPY rop (0xcc), map cpp to magic color depth constants */ + u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24); RING_LOCALS; + + if (sarea_priv->front_tiled) { + cmd |= XY_SRC_COPY_BLT_DST_TILED; + dst_pitch >>= 2; + } + if (sarea_priv->back_tiled) { + cmd |= XY_SRC_COPY_BLT_SRC_TILED; + src_pitch >>= 2; + } + + counter[0] = drm_vblank_count(dev, 0); + counter[1] = drm_vblank_count(dev, 1); DRM_DEBUG("\n"); @@ -151,6 +198,7 @@ list_del(list); dev_priv->swaps_pending--; + drm_vblank_put(dev, pipe); DRM_SPINUNLOCK(&dev_priv->swaps_lock); DRM_SPINLOCK(&dev->drw_lock); @@ -188,7 +236,7 @@ DRM_SPINLOCK(&dev_priv->swaps_lock); } - DRM_SPINUNLOCK(&dev->drw_lock); + DRM_SPINUNLOCK(&dev_priv->swaps_lock); if (nhits == 0) { return; @@ -242,16 +290,29 @@ } if (init_drawrect) { - BEGIN_LP_RING(6); - - OUT_RING(GFX_OP_DRAWRECT_INFO); - OUT_RING(0); - OUT_RING(0); - OUT_RING(sarea_priv->width | sarea_priv->height << 16); - OUT_RING(sarea_priv->width | sarea_priv->height << 16); - OUT_RING(0); - - ADVANCE_LP_RING(); + int width = sarea_priv->width; + int height = sarea_priv->height; + if (IS_I965G(dev)) { + BEGIN_LP_RING(4); + + OUT_RING(GFX_OP_DRAWRECT_INFO_I965); + OUT_RING(0); + OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16)); + OUT_RING(0); + + ADVANCE_LP_RING(); + } else { + BEGIN_LP_RING(6); + + OUT_RING(GFX_OP_DRAWRECT_INFO); + OUT_RING(0); + OUT_RING(0); + OUT_RING(((width - 1) & 0xffff) | ((height - 1) << 16)); + OUT_RING(0); + OUT_RING(0); + + ADVANCE_LP_RING(); + } sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT; @@ -276,12 +337,12 @@ BEGIN_LP_RING(8); OUT_RING(cmd); - OUT_RING(pitchropcpp); + OUT_RING(ropcpp | dst_pitch); OUT_RING((y1 << 16) | rect->x1); OUT_RING((y2 << 16) | rect->x2); OUT_RING(offsets[front]); OUT_RING((y1 << 16) | rect->x1); - OUT_RING(pitchropcpp & 0xffff); + OUT_RING(src_pitch); OUT_RING(offsets[back]); ADVANCE_LP_RING(); @@ -300,80 +361,156 @@ drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER); } } +#if 0 +static int i915_in_vblank(struct drm_device *dev, int pipe) +{ + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + unsigned long pipedsl, vblank, vtotal; + unsigned long vbl_start, vbl_end, cur_line; + + pipedsl = pipe ? PIPEBDSL : PIPEADSL; + vblank = pipe ? VBLANK_B : VBLANK_A; + vtotal = pipe ? VTOTAL_B : VTOTAL_A; + + vbl_start = I915_READ(vblank) & VBLANK_START_MASK; + vbl_end = (I915_READ(vblank) >> VBLANK_END_SHIFT) & VBLANK_END_MASK; + + cur_line = I915_READ(pipedsl); + + if (cur_line >= vbl_start) + return 1; + + return 0; +} +#endif +u32 i915_get_vblank_counter(struct drm_device *dev, int plane) +{ + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + unsigned long high_frame; + unsigned long low_frame; + u32 high1, high2, low, count; + int pipe; + + pipe = i915_get_pipe(dev, plane); + high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH; + low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; + + if (!i915_pipe_enabled(dev, pipe)) { + DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); + return 0; + } + + /* + * High & low register fields aren't synchronized, so make sure + * we get a low value that's stable across two reads of the high + * register. + */ + do { + high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> + PIPE_FRAME_HIGH_SHIFT); + low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >> + PIPE_FRAME_LOW_SHIFT); + high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> + PIPE_FRAME_HIGH_SHIFT); + } while (high1 != high2); + + count = (high1 << 8) | low; + + /* + * If we're in the middle of the vblank period, the + * above regs won't have been updated yet, so return + * an incremented count to stay accurate + */ +#if 0 + if (i915_in_vblank(dev, pipe)) + count++; +#endif + /* count may be reset by other driver(e.g. 2D driver), + we have no way to know if it is wrapped or resetted + when count is zero. do a rough guess. + */ + if (count == 0 && dev->last_vblank[pipe] < dev->max_vblank_count/2) + dev->last_vblank[pipe] = 0; + + return count; +} irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) { struct drm_device *dev = (struct drm_device *) arg; drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u16 temp; + u32 iir; u32 pipea_stats, pipeb_stats; + int vblank = 0; - pipea_stats = I915_READ(I915REG_PIPEASTAT); - pipeb_stats = I915_READ(I915REG_PIPEBSTAT); - - temp = I915_READ16(I915REG_INT_IDENTITY_R); - temp &= (dev_priv->irq_enable_reg | USER_INT_FLAG); - + iir = I915_READ(I915REG_INT_IDENTITY_R); #if 0 - DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp); + DRM_DEBUG("flag=%08x\n", iir); #endif - if (temp == 0) + if (iir == 0) { + DRM_DEBUG ("iir 0x%08x im 0x%08x ie 0x%08x pipea 0x%08x pipeb 0x%08x\n", + iir, + I915_READ(I915REG_INT_MASK_R), + I915_READ(I915REG_INT_ENABLE_R), + I915_READ(I915REG_PIPEASTAT), + I915_READ(I915REG_PIPEBSTAT)); return IRQ_NONE; + } - I915_WRITE16(I915REG_INT_IDENTITY_R, temp); - (void) I915_READ16(I915REG_INT_IDENTITY_R); - DRM_READMEMORYBARRIER(); + /* + * Clear the PIPE(A|B)STAT regs before the IIR otherwise + * we may get extra interrupts. + */ + if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) { + pipea_stats = I915_READ(I915REG_PIPEASTAT); + if (pipea_stats & (I915_START_VBLANK_INTERRUPT_STATUS| + I915_VBLANK_INTERRUPT_STATUS)) + { + vblank++; + drm_handle_vblank(dev, i915_get_plane(dev, 0)); + } + I915_WRITE(I915REG_PIPEASTAT, pipea_stats); + } + if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) { + pipeb_stats = I915_READ(I915REG_PIPEBSTAT); + if (pipeb_stats & (I915_START_VBLANK_INTERRUPT_STATUS| + I915_VBLANK_INTERRUPT_STATUS)) + { + vblank++; + drm_handle_vblank(dev, i915_get_plane(dev, 1)); + } + I915_WRITE(I915REG_PIPEBSTAT, pipeb_stats); + } - dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); + if (dev_priv->sarea_priv) + dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); - if (temp & USER_INT_FLAG) { + I915_WRITE(I915REG_INT_IDENTITY_R, iir); + (void) I915_READ(I915REG_INT_IDENTITY_R); /* Flush posted write */ + + if (iir & I915_USER_INTERRUPT) { DRM_WAKEUP(&dev_priv->irq_queue); #ifdef I915_HAVE_FENCE i915_fence_handler(dev); #endif } - if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) { - int vblank_pipe = dev_priv->vblank_pipe; - - if ((vblank_pipe & - (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) - == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) { - if (temp & VSYNC_PIPEA_FLAG) - atomic_inc(&dev->vbl_received); - if (temp & VSYNC_PIPEB_FLAG) - atomic_inc(&dev->vbl_received2); - } else if (((temp & VSYNC_PIPEA_FLAG) && - (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) || - ((temp & VSYNC_PIPEB_FLAG) && - (vblank_pipe & DRM_I915_VBLANK_PIPE_B))) - atomic_inc(&dev->vbl_received); - - DRM_WAKEUP(&dev->vbl_queue); - drm_vbl_send_signals(dev); - + if (vblank) { if (dev_priv->swaps_pending > 0) drm_locked_tasklet(dev, i915_vblank_tasklet); - I915_WRITE(I915REG_PIPEASTAT, - pipea_stats|I915_VBLANK_INTERRUPT_ENABLE| - I915_VBLANK_CLEAR); - I915_WRITE(I915REG_PIPEBSTAT, - pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE| - I915_VBLANK_CLEAR); } return IRQ_HANDLED; } -int i915_emit_irq(struct drm_device * dev) +int i915_emit_irq(struct drm_device *dev) { - drm_i915_private_t *dev_priv = dev->dev_private; RING_LOCALS; i915_kernel_lost_context(dev); - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); i915_emit_breadcrumb(dev); @@ -383,95 +520,61 @@ ADVANCE_LP_RING(); return dev_priv->counter; - - } void i915_user_irq_on(drm_i915_private_t *dev_priv) { DRM_SPINLOCK(&dev_priv->user_irq_lock); if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1)){ - dev_priv->irq_enable_reg |= USER_INT_FLAG; - I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); + dev_priv->irq_enable_reg |= I915_USER_INTERRUPT; + I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); } DRM_SPINUNLOCK(&dev_priv->user_irq_lock); } - + void i915_user_irq_off(drm_i915_private_t *dev_priv) { DRM_SPINLOCK(&dev_priv->user_irq_lock); if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0)) { // dev_priv->irq_enable_reg &= ~USER_INT_FLAG; - // I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); + // I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); } DRM_SPINUNLOCK(&dev_priv->user_irq_lock); } - + static int i915_wait_irq(struct drm_device * dev, int irq_nr) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; int ret = 0; - DRM_DEBUG("%s irq_nr=%d breadcrumb=%d\n", __FUNCTION__, irq_nr, + DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, READ_BREADCRUMB(dev_priv)); if (READ_BREADCRUMB(dev_priv) >= irq_nr) return 0; - dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; - i915_user_irq_on(dev_priv); DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, READ_BREADCRUMB(dev_priv) >= irq_nr); i915_user_irq_off(dev_priv); if (ret == -EBUSY) { - DRM_ERROR("%s: EBUSY -- rec: %d emitted: %d\n", - __FUNCTION__, + DRM_ERROR("EBUSY -- rec: %d emitted: %d\n", READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); } - dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); - return ret; -} - -static int i915_driver_vblank_do_wait(struct drm_device *dev, - unsigned int *sequence, - atomic_t *counter) -{ - drm_i915_private_t *dev_priv = dev->dev_private; - unsigned int cur_vblank; - int ret = 0; - - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); - return -EINVAL; - } - - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(counter)) - - *sequence) <= (1<<23))); - - *sequence = cur_vblank; - + if (dev_priv->sarea_priv) + dev_priv->sarea_priv->last_dispatch = + READ_BREADCRUMB(dev_priv); return ret; } -int i915_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence) -{ - return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received); -} - -int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence) -{ - return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received2); -} - /* Needs the lock as it touches the ring. */ -int i915_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_priv) +int i915_irq_emit(struct drm_device *dev, void *data, + struct drm_file *file_priv) { drm_i915_private_t *dev_priv = dev->dev_private; drm_i915_irq_emit_t *emit = data; @@ -480,7 +583,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -503,24 +606,102 @@ drm_i915_irq_wait_t *irqwait = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } return i915_wait_irq(dev, irqwait->irq_seq); } +int i915_enable_vblank(struct drm_device *dev, int plane) +{ + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + int pipe = i915_get_pipe(dev, plane); + u32 pipestat_reg = 0; + u32 pipestat; + + switch (pipe) { + case 0: + pipestat_reg = I915REG_PIPEASTAT; + dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; + break; + case 1: + pipestat_reg = I915REG_PIPEBSTAT; + dev_priv->irq_enable_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; + break; + default: + DRM_ERROR("tried to enable vblank on non-existent pipe %d\n", + pipe); + break; + } + + if (pipestat_reg) + { + pipestat = I915_READ (pipestat_reg); + /* + * Older chips didn't have the start vblank interrupt, + * but + */ + if (IS_I965G (dev)) + pipestat |= I915_START_VBLANK_INTERRUPT_ENABLE; + else + pipestat |= I915_VBLANK_INTERRUPT_ENABLE; + /* + * Clear any pending status + */ + pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS | + I915_VBLANK_INTERRUPT_STATUS); + I915_WRITE(pipestat_reg, pipestat); + } + I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); + + return 0; +} + +void i915_disable_vblank(struct drm_device *dev, int plane) +{ + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + int pipe = i915_get_pipe(dev, plane); + u32 pipestat_reg = 0; + u32 pipestat; + + switch (pipe) { + case 0: + pipestat_reg = I915REG_PIPEASTAT; + dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; + break; + case 1: + pipestat_reg = I915REG_PIPEBSTAT; + dev_priv->irq_enable_reg &= ~I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; + break; + default: + DRM_ERROR("tried to disable vblank on non-existent pipe %d\n", + pipe); + break; + } + + I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); + if (pipestat_reg) + { + pipestat = I915_READ (pipestat_reg); + pipestat &= ~(I915_START_VBLANK_INTERRUPT_ENABLE | + I915_VBLANK_INTERRUPT_ENABLE); + /* + * Clear any pending status + */ + pipestat |= (I915_START_VBLANK_INTERRUPT_STATUS | + I915_VBLANK_INTERRUPT_STATUS); + I915_WRITE(pipestat_reg, pipestat); + } +} + static void i915_enable_interrupt (struct drm_device *dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - dev_priv->irq_enable_reg = USER_INT_FLAG; - if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A) - dev_priv->irq_enable_reg |= VSYNC_PIPEA_FLAG; - if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) - dev_priv->irq_enable_reg |= VSYNC_PIPEB_FLAG; + dev_priv->irq_enable_reg |= I915_USER_INTERRUPT; - I915_WRITE16(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); + I915_WRITE(I915REG_INT_ENABLE_R, dev_priv->irq_enable_reg); dev_priv->irq_enabled = 1; } @@ -533,20 +714,17 @@ drm_i915_vblank_pipe_t *pipe = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) { - DRM_ERROR("%s called with invalid pipe 0x%x\n", - __FUNCTION__, pipe->pipe); + DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe); return -EINVAL; } dev_priv->vblank_pipe = pipe->pipe; - i915_enable_interrupt (dev); - return 0; } @@ -558,15 +736,15 @@ u16 flag; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } flag = I915_READ(I915REG_INT_ENABLE_R); pipe->pipe = 0; - if (flag & VSYNC_PIPEA_FLAG) + if (flag & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) pipe->pipe |= DRM_I915_VBLANK_PIPE_A; - if (flag & VSYNC_PIPEB_FLAG) + if (flag & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) pipe->pipe |= DRM_I915_VBLANK_PIPE_B; return 0; @@ -584,13 +762,14 @@ unsigned int pipe, seqtype, curseq, plane; unsigned long irqflags; struct list_head *list; + int ret; if (!dev_priv) { DRM_ERROR("%s called with no initialization\n", __func__); return -EINVAL; } - if (dev_priv->sarea_priv->rotation) { + if (!dev_priv->sarea_priv || dev_priv->sarea_priv->rotation) { DRM_DEBUG("Rotation not supported\n"); return -EINVAL; } @@ -612,7 +791,23 @@ return -EINVAL; } - curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received); + DRM_SPINLOCK_IRQSAVE(&dev->drw_lock, irqflags); + + /* It makes no sense to schedule a swap for a drawable that doesn't have + * valid information at this point. E.g. this could mean that the X + * server is too old to push drawable information to the DRM, in which + * case all such swaps would become ineffective. + */ + if (!drm_get_drawable_info(dev, swap->drawable)) { + DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags); + DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable); + return -EINVAL; + } + + DRM_SPINUNLOCK_IRQRESTORE(&dev->drw_lock, irqflags); + + drm_update_vblank_count(dev, pipe); + curseq = drm_vblank_count(dev, pipe); if (seqtype == _DRM_VBLANK_RELATIVE) swap->sequence += curseq; @@ -676,7 +871,7 @@ return -EBUSY; } - vbl_swap = drm_calloc(1, sizeof(vbl_swap), DRM_MEM_DRIVER); + vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER); if (!vbl_swap) { DRM_ERROR("Failed to allocate memory to queue swap\n"); @@ -685,6 +880,12 @@ DRM_DEBUG("\n"); + ret = drm_vblank_get(dev, pipe); + if (ret) { + drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER); + return ret; + } + vbl_swap->drw_id = swap->drawable; vbl_swap->plane = plane; vbl_swap->sequence = swap->sequence; @@ -695,7 +896,7 @@ DRM_SPINLOCK_IRQSAVE(&dev_priv->swaps_lock, irqflags); - list_add_tail((struct list_head *)vbl_swap, &dev_priv->vbl_swaps.head); + list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head); dev_priv->swaps_pending++; DRM_SPINUNLOCK_IRQRESTORE(&dev_priv->swaps_lock, irqflags); @@ -714,9 +915,10 @@ I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); } -void i915_driver_irq_postinstall(struct drm_device * dev) +int i915_driver_irq_postinstall(struct drm_device * dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; + int ret, num_pipes = 2; DRM_SPININIT(&dev_priv->swaps_lock, "swap"); INIT_LIST_HEAD(&dev_priv->vbl_swaps.head); @@ -724,6 +926,13 @@ DRM_SPININIT(&dev_priv->user_irq_lock, "userirq"); dev_priv->user_irq_refcount = 0; + dev_priv->irq_enable_reg = 0; + + ret = drm_vblank_init(dev, num_pipes); + if (ret) + return ret; + + dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ i915_enable_interrupt(dev); DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); @@ -732,21 +941,27 @@ * Initialize the hardware status page IRQ location. */ - I915_WRITE(I915REG_INSTPM, ( 1 << 5) | ( 1 << 21)); + I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21)); + return 0; } void i915_driver_irq_uninstall(struct drm_device * dev) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; - u16 temp; + u32 temp; + if (!dev_priv) return; dev_priv->irq_enabled = 0; - I915_WRITE16(I915REG_HWSTAM, 0xffff); - I915_WRITE16(I915REG_INT_MASK_R, 0xffff); - I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); - - temp = I915_READ16(I915REG_INT_IDENTITY_R); - I915_WRITE16(I915REG_INT_IDENTITY_R, temp); + I915_WRITE(I915REG_HWSTAM, 0xffffffff); + I915_WRITE(I915REG_INT_MASK_R, 0xffffffff); + I915_WRITE(I915REG_INT_ENABLE_R, 0x0); + + temp = I915_READ(I915REG_PIPEASTAT); + I915_WRITE(I915REG_PIPEASTAT, temp); + temp = I915_READ(I915REG_PIPEBSTAT); + I915_WRITE(I915REG_PIPEBSTAT, temp); + temp = I915_READ(I915REG_INT_IDENTITY_R); + I915_WRITE(I915REG_INT_IDENTITY_R, temp); } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/i915_mem.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/i915_mem.c --- libdrm-2.3.0.16/shared-core/i915_mem.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/i915_mem.c 2009-04-20 07:00:29.000000000 +0100 @@ -276,7 +276,7 @@ struct mem_block *block, **heap; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -314,7 +314,7 @@ struct mem_block *block, **heap; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -342,7 +342,7 @@ struct mem_block **heap; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -366,7 +366,7 @@ struct mem_block **heap; if ( !dev_priv ) { - DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ ); + DRM_ERROR( "called with no initialization\n" ); return -EINVAL; } @@ -375,7 +375,7 @@ DRM_ERROR("get_heap failed"); return -EFAULT; } - + if (!*heap) { DRM_ERROR("heap not initialized?"); return -EFAULT; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mach64_dma.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mach64_dma.c --- libdrm-2.3.0.16/shared-core/mach64_dma.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mach64_dma.c 2009-04-20 07:00:29.000000000 +0100 @@ -6,7 +6,7 @@ * \author Gareth Hughes * \author Frank C. Earl * \author Leif Delgass - * \author Jose Fonseca + * \author José Fonseca */ /* @@ -53,11 +53,11 @@ * * \param dev_priv pointer to device private data structure. * \param entries number of free entries in the FIFO to wait for. - * + * * \returns zero on success, or -EBUSY if the timeout (specificed by * drm_mach64_private::usec_timeout) occurs. */ -int mach64_do_wait_for_fifo(drm_mach64_private_t * dev_priv, int entries) +int mach64_do_wait_for_fifo(drm_mach64_private_t *dev_priv, int entries) { int slots = 0, i; @@ -68,15 +68,14 @@ DRM_UDELAY(1); } - DRM_INFO("%s failed! slots=%d entries=%d\n", __FUNCTION__, slots, - entries); + DRM_INFO("failed! slots=%d entries=%d\n", slots, entries); return -EBUSY; } /** * Wait for the draw engine to be idle. */ -int mach64_do_wait_for_idle(drm_mach64_private_t * dev_priv) +int mach64_do_wait_for_idle(drm_mach64_private_t *dev_priv) { int i, ret; @@ -85,14 +84,12 @@ return ret; for (i = 0; i < dev_priv->usec_timeout; i++) { - if (!(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) { + if (!(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) return 0; - } DRM_UDELAY(1); } - DRM_INFO("%s failed! GUI_STAT=0x%08x\n", __FUNCTION__, - MACH64_READ(MACH64_GUI_STAT)); + DRM_INFO("failed! GUI_STAT=0x%08x\n", MACH64_READ(MACH64_GUI_STAT)); mach64_dump_ring_info(dev_priv); return -EBUSY; } @@ -107,16 +104,16 @@ * * This function should be called before writing new entries to the ring * buffer. - * + * * \param dev_priv pointer to device private data structure. * \param n number of free entries in the ring buffer to wait for. - * + * * \returns zero on success, or -EBUSY if the timeout (specificed by * drm_mach64_private_t::usec_timeout) occurs. * * \sa mach64_dump_ring_info() */ -int mach64_wait_ring(drm_mach64_private_t * dev_priv, int n) +int mach64_wait_ring(drm_mach64_private_t *dev_priv, int n) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; int i; @@ -124,9 +121,8 @@ for (i = 0; i < dev_priv->usec_timeout; i++) { mach64_update_ring_snapshot(dev_priv); if (ring->space >= n) { - if (i > 0) { - DRM_DEBUG("%s: %d usecs\n", __FUNCTION__, i); - } + if (i > 0) + DRM_DEBUG("%d usecs\n", i); return 0; } DRM_UDELAY(1); @@ -139,11 +135,11 @@ } /** - * Wait until all DMA requests have been processed... + * Wait until all DMA requests have been processed... * * \sa mach64_wait_ring() */ -static int mach64_ring_idle(drm_mach64_private_t * dev_priv) +static int mach64_ring_idle(drm_mach64_private_t *dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; u32 head; @@ -155,9 +151,8 @@ mach64_update_ring_snapshot(dev_priv); if (ring->head == ring->tail && !(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) { - if (i > 0) { - DRM_DEBUG("%s: %d usecs\n", __FUNCTION__, i); - } + if (i > 0) + DRM_DEBUG("%d usecs\n", i); return 0; } if (ring->head == head) { @@ -169,8 +164,7 @@ DRM_UDELAY(1); } - DRM_INFO("%s failed! GUI_STAT=0x%08x\n", __FUNCTION__, - MACH64_READ(MACH64_GUI_STAT)); + DRM_INFO("failed! GUI_STAT=0x%08x\n", MACH64_READ(MACH64_GUI_STAT)); mach64_dump_ring_info(dev_priv); return -EBUSY; } @@ -180,7 +174,7 @@ * * \sa mach64_do_engine_reset() */ -static void mach64_ring_reset(drm_mach64_private_t * dev_priv) +static void mach64_ring_reset(drm_mach64_private_t *dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; @@ -198,7 +192,7 @@ /** * Ensure the all the queued commands will be processed. */ -int mach64_do_dma_flush(drm_mach64_private_t * dev_priv) +int mach64_do_dma_flush(drm_mach64_private_t *dev_priv) { /* FIXME: It's not necessary to wait for idle when flushing * we just need to ensure the ring will be completely processed @@ -210,14 +204,14 @@ /** * Stop all DMA activity. */ -int mach64_do_dma_idle(drm_mach64_private_t * dev_priv) +int mach64_do_dma_idle(drm_mach64_private_t *dev_priv) { int ret; /* wait for completion */ if ((ret = mach64_ring_idle(dev_priv)) < 0) { - DRM_ERROR("%s failed BM_GUI_TABLE=0x%08x tail: %u\n", - __FUNCTION__, MACH64_READ(MACH64_BM_GUI_TABLE), + DRM_ERROR("failed BM_GUI_TABLE=0x%08x tail: %u\n", + MACH64_READ(MACH64_BM_GUI_TABLE), dev_priv->ring.tail); return ret; } @@ -232,11 +226,11 @@ /** * Reset the engine. This will stop the DMA if it is running. */ -int mach64_do_engine_reset(drm_mach64_private_t * dev_priv) +int mach64_do_engine_reset(drm_mach64_private_t *dev_priv) { u32 tmp; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); /* Kill off any outstanding DMA transfers. */ @@ -276,7 +270,7 @@ /** * Dump engine registers values. */ -void mach64_dump_engine_info(drm_mach64_private_t * dev_priv) +void mach64_dump_engine_info(drm_mach64_private_t *dev_priv) { DRM_INFO("\n"); if (!dev_priv->is_pci) { @@ -417,8 +411,8 @@ * Used by mach64_dump_ring_info() to dump the contents of the current buffer * pointed by the ring head. */ -static void mach64_dump_buf_info(drm_mach64_private_t * dev_priv, - struct drm_buf * buf) +static void mach64_dump_buf_info(drm_mach64_private_t *dev_priv, + struct drm_buf *buf) { u32 addr = GETBUFADDR(buf); u32 used = buf->used >> 2; @@ -477,7 +471,7 @@ * Dump the ring state and contents, including the contents of the buffer being * processed by the graphics engine. */ -void mach64_dump_ring_info(drm_mach64_private_t * dev_priv) +void mach64_dump_ring_info(drm_mach64_private_t *dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; int i, skipped; @@ -526,9 +520,8 @@ u32 buf_addr = GETBUFADDR(buf); - if (buf_addr <= addr && addr < buf_addr + buf->used) { + if (buf_addr <= addr && addr < buf_addr + buf->used) mach64_dump_buf_info(dev_priv, buf); - } } } @@ -559,6 +552,259 @@ /*******************************************************************/ +/** \name DMA descriptor ring macros */ +/*@{*/ + +/** + * Add the end mark to the ring's new tail position. + * + * The bus master engine will keep processing the DMA buffers listed in the ring + * until it finds this mark, making it stop. + * + * \sa mach64_clear_dma_eol + */ +static __inline__ void mach64_set_dma_eol(volatile u32 *addr) +{ +#if defined(__i386__) + int nr = 31; + + /* Taken from include/asm-i386/bitops.h linux header */ + __asm__ __volatile__("lock;" "btsl %1,%0":"=m"(*addr) + :"Ir"(nr)); +#elif defined(__powerpc__) + u32 old; + u32 mask = cpu_to_le32(MACH64_DMA_EOL); + + /* Taken from the include/asm-ppc/bitops.h linux header */ + __asm__ __volatile__("\n\ +1: lwarx %0,0,%3 \n\ + or %0,%0,%2 \n\ + stwcx. %0,0,%3 \n\ + bne- 1b":"=&r"(old), "=m"(*addr) + :"r"(mask), "r"(addr), "m"(*addr) + :"cc"); +#elif defined(__alpha__) + u32 temp; + u32 mask = MACH64_DMA_EOL; + + /* Taken from the include/asm-alpha/bitops.h linux header */ + __asm__ __volatile__("1: ldl_l %0,%3\n" + " bis %0,%2,%0\n" + " stl_c %0,%1\n" + " beq %0,2f\n" + ".subsection 2\n" + "2: br 1b\n" + ".previous":"=&r"(temp), "=m"(*addr) + :"Ir"(mask), "m"(*addr)); +#else + u32 mask = cpu_to_le32(MACH64_DMA_EOL); + + *addr |= mask; +#endif +} + +/** + * Remove the end mark from the ring's old tail position. + * + * It should be called after calling mach64_set_dma_eol to mark the ring's new + * tail position. + * + * We update the end marks while the bus master engine is in operation. Since + * the bus master engine may potentially be reading from the same position + * that we write, we must change atomically to avoid having intermediary bad + * data. + */ +static __inline__ void mach64_clear_dma_eol(volatile u32 *addr) +{ +#if defined(__i386__) + int nr = 31; + + /* Taken from include/asm-i386/bitops.h linux header */ + __asm__ __volatile__("lock;" "btrl %1,%0":"=m"(*addr) + :"Ir"(nr)); +#elif defined(__powerpc__) + u32 old; + u32 mask = cpu_to_le32(MACH64_DMA_EOL); + + /* Taken from the include/asm-ppc/bitops.h linux header */ + __asm__ __volatile__("\n\ +1: lwarx %0,0,%3 \n\ + andc %0,%0,%2 \n\ + stwcx. %0,0,%3 \n\ + bne- 1b":"=&r"(old), "=m"(*addr) + :"r"(mask), "r"(addr), "m"(*addr) + :"cc"); +#elif defined(__alpha__) + u32 temp; + u32 mask = ~MACH64_DMA_EOL; + + /* Taken from the include/asm-alpha/bitops.h linux header */ + __asm__ __volatile__("1: ldl_l %0,%3\n" + " and %0,%2,%0\n" + " stl_c %0,%1\n" + " beq %0,2f\n" + ".subsection 2\n" + "2: br 1b\n" + ".previous":"=&r"(temp), "=m"(*addr) + :"Ir"(mask), "m"(*addr)); +#else + u32 mask = cpu_to_le32(~MACH64_DMA_EOL); + + *addr &= mask; +#endif +} + +#define RING_LOCALS \ + int _ring_tail, _ring_write; unsigned int _ring_mask; volatile u32 *_ring + +#define RING_WRITE_OFS _ring_write + +#define BEGIN_RING(n) \ + do { \ + if (MACH64_VERBOSE) { \ + DRM_INFO( "BEGIN_RING( %d ) \n", \ + (n) ); \ + } \ + if (dev_priv->ring.space <= (n) * sizeof(u32)) { \ + int ret; \ + if ((ret = mach64_wait_ring( dev_priv, (n) * sizeof(u32))) < 0 ) { \ + DRM_ERROR( "wait_ring failed, resetting engine\n"); \ + mach64_dump_engine_info( dev_priv ); \ + mach64_do_engine_reset( dev_priv ); \ + return ret; \ + } \ + } \ + dev_priv->ring.space -= (n) * sizeof(u32); \ + _ring = (u32 *) dev_priv->ring.start; \ + _ring_tail = _ring_write = dev_priv->ring.tail; \ + _ring_mask = dev_priv->ring.tail_mask; \ + } while (0) + +#define OUT_RING( x ) \ +do { \ + if (MACH64_VERBOSE) { \ + DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ + (unsigned int)(x), _ring_write ); \ + } \ + _ring[_ring_write++] = cpu_to_le32( x ); \ + _ring_write &= _ring_mask; \ +} while (0) + +#define ADVANCE_RING() \ +do { \ + if (MACH64_VERBOSE) { \ + DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ + _ring_write, _ring_tail ); \ + } \ + DRM_MEMORYBARRIER(); \ + mach64_clear_dma_eol( &_ring[(_ring_tail - 2) & _ring_mask] ); \ + DRM_MEMORYBARRIER(); \ + dev_priv->ring.tail = _ring_write; \ + mach64_ring_tick( dev_priv, &(dev_priv)->ring ); \ +} while (0) + +/** + * Queue a DMA buffer of registers writes into the ring buffer. + */ +int mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv, + drm_mach64_freelist_t *entry) +{ + int bytes, pages, remainder; + u32 address, page; + int i; + struct drm_buf *buf = entry->buf; + RING_LOCALS; + + bytes = buf->used; + address = GETBUFADDR( buf ); + pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; + + BEGIN_RING( pages * 4 ); + + for ( i = 0 ; i < pages-1 ; i++ ) { + page = address + i * MACH64_DMA_CHUNKSIZE; + OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); + OUT_RING( page ); + OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); + OUT_RING( 0 ); + } + + /* generate the final descriptor for any remaining commands in this buffer */ + page = address + i * MACH64_DMA_CHUNKSIZE; + remainder = bytes - i * MACH64_DMA_CHUNKSIZE; + + /* Save dword offset of last descriptor for this buffer. + * This is needed to check for completion of the buffer in freelist_get + */ + entry->ring_ofs = RING_WRITE_OFS; + + OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); + OUT_RING( page ); + OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); + OUT_RING( 0 ); + + ADVANCE_RING(); + + return 0; +} + +/** + * Queue DMA buffer controlling host data tranfers (e.g., blit). + * + * Almost identical to mach64_add_buf_to_ring. + */ +int mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv, + drm_mach64_freelist_t *entry) +{ + int bytes, pages, remainder; + u32 address, page; + int i; + struct drm_buf *buf = entry->buf; + RING_LOCALS; + + bytes = buf->used - MACH64_HOSTDATA_BLIT_OFFSET; + pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; + address = GETBUFADDR( buf ); + + BEGIN_RING( 4 + pages * 4 ); + + OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); + OUT_RING( address ); + OUT_RING( MACH64_HOSTDATA_BLIT_OFFSET | MACH64_DMA_HOLD_OFFSET ); + OUT_RING( 0 ); + address += MACH64_HOSTDATA_BLIT_OFFSET; + + for ( i = 0 ; i < pages-1 ; i++ ) { + page = address + i * MACH64_DMA_CHUNKSIZE; + OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); + OUT_RING( page ); + OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); + OUT_RING( 0 ); + } + + /* generate the final descriptor for any remaining commands in this buffer */ + page = address + i * MACH64_DMA_CHUNKSIZE; + remainder = bytes - i * MACH64_DMA_CHUNKSIZE; + + /* Save dword offset of last descriptor for this buffer. + * This is needed to check for completion of the buffer in freelist_get + */ + entry->ring_ofs = RING_WRITE_OFS; + + OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); + OUT_RING( page ); + OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); + OUT_RING( 0 ); + + ADVANCE_RING(); + + return 0; +} + +/*@}*/ + + +/*******************************************************************/ /** \name DMA test and initialization */ /*@{*/ @@ -582,7 +828,7 @@ u32 src_cntl, pat_reg0, pat_reg1; int i, count, failed; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); table = (u32 *) dev_priv->ring.start; @@ -758,7 +1004,7 @@ u32 tmp; int i, ret; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); dev_priv = drm_alloc(sizeof(drm_mach64_private_t), DRM_MEM_DRIVER); if (dev_priv == NULL) @@ -968,7 +1214,7 @@ /** MMIO Pseudo-DMA (intended primarily for debugging, not performance) */ -int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t * dev_priv) +int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t *dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; volatile u32 *ring_read; @@ -983,9 +1229,7 @@ target = MACH64_BM_ADDR; if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) { - DRM_INFO - ("%s: idle failed before pseudo-dma dispatch, resetting engine\n", - __FUNCTION__); + DRM_INFO("idle failed before pseudo-dma dispatch, resetting engine\n"); mach64_dump_engine_info(dev_priv); mach64_do_engine_reset(dev_priv); return ret; @@ -1106,7 +1350,7 @@ MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD, ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB); - DRM_DEBUG("%s completed\n", __FUNCTION__); + DRM_DEBUG("completed\n"); return 0; } @@ -1119,7 +1363,7 @@ int mach64_do_cleanup_dma(struct drm_device * dev) { - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); /* Make sure interrupts are disabled here because the uninstall ioctl * may not have been called from userspace and after dev_private @@ -1163,7 +1407,7 @@ { drm_mach64_init_t *init = data; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1182,7 +1426,7 @@ { drm_mach64_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1194,7 +1438,7 @@ { drm_mach64_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1206,7 +1450,7 @@ { drm_mach64_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1228,8 +1472,7 @@ struct list_head *ptr; int i; - DRM_DEBUG("%s: adding %d buffers to freelist\n", __FUNCTION__, - dma->buf_count); + DRM_DEBUG("adding %d buffers to freelist\n", dma->buf_count); for (i = 0; i < dma->buf_count; i++) { if ((entry = @@ -1253,7 +1496,7 @@ struct list_head *ptr; struct list_head *tmp; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); list_for_each_safe(ptr, tmp, &dev_priv->pending) { list_del(ptr); @@ -1276,7 +1519,7 @@ /* IMPORTANT: This function should only be called when the engine is idle or locked up, * as it assumes all buffers in the pending list have been completed by the hardware. */ -int mach64_do_release_used_buffers(drm_mach64_private_t * dev_priv) +int mach64_do_release_used_buffers(drm_mach64_private_t *dev_priv) { struct list_head *ptr; struct list_head *tmp; @@ -1298,13 +1541,12 @@ } } - DRM_DEBUG("%s: released %d buffers from pending list\n", __FUNCTION__, - i); + DRM_DEBUG("released %d buffers from pending list\n", i); return 0; } -static int mach64_do_reclaim_completed(drm_mach64_private_t * dev_priv) +static int mach64_do_reclaim_completed(drm_mach64_private_t *dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; struct list_head *ptr; @@ -1326,8 +1568,7 @@ #endif /* last pass is complete, so release everything */ mach64_do_release_used_buffers(dev_priv); - DRM_DEBUG("%s: idle engine, freed all buffers.\n", - __FUNCTION__); + DRM_DEBUG("idle engine, freed all buffers.\n"); if (list_empty(&dev_priv->free_list)) { DRM_ERROR("Freelist empty with idle engine\n"); return -1; @@ -1368,9 +1609,9 @@ list_del(ptr); list_add_tail(ptr, &dev_priv->free_list); DRM_DEBUG - ("%s: freed processed buffer (head=%d tail=%d " + ("freed processed buffer (head=%d tail=%d " "buf ring ofs=%d).\n", - __FUNCTION__, head, tail, ofs); + head, tail, ofs); return 0; } } @@ -1378,7 +1619,7 @@ return 1; } -struct drm_buf *mach64_freelist_get(drm_mach64_private_t * dev_priv) +struct drm_buf *mach64_freelist_get(drm_mach64_private_t *dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; drm_mach64_freelist_t *entry; @@ -1424,7 +1665,7 @@ return entry->buf; } -int mach64_freelist_put(drm_mach64_private_t * dev_priv, struct drm_buf * copy_buf) +int mach64_freelist_put(drm_mach64_private_t *dev_priv, struct drm_buf *copy_buf) { struct list_head *ptr; drm_mach64_freelist_t *entry; @@ -1433,8 +1674,7 @@ list_for_each(ptr, &dev_priv->pending) { entry = list_entry(ptr, drm_mach64_freelist_t, list); if (copy_buf == entry->buf) { - DRM_ERROR("%s: Trying to release a pending buf\n", - __FUNCTION__); + DRM_ERROR("Trying to release a pending buf\n"); return -EFAULT; } } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mach64_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mach64_drv.h --- libdrm-2.3.0.16/shared-core/mach64_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mach64_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -29,7 +29,7 @@ * Gareth Hughes * Frank C. Earl * Leif Delgass - * Jos�Fonseca + * José Fonseca */ #ifndef __MACH64_DRV_H__ @@ -96,6 +96,8 @@ unsigned int depth_bpp; unsigned int depth_offset, depth_pitch; + atomic_t vbl_received; /**< Number of vblanks received. */ + u32 front_offset_pitch; u32 back_offset_pitch; u32 depth_offset_pitch; @@ -140,6 +142,11 @@ extern void mach64_dump_ring_info(drm_mach64_private_t * dev_priv); extern int mach64_do_engine_reset(drm_mach64_private_t * dev_priv); +extern int mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv, + drm_mach64_freelist_t *_entry); +extern int mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv, + drm_mach64_freelist_t *_entry); + extern int mach64_do_dma_idle(drm_mach64_private_t * dev_priv); extern int mach64_do_dma_flush(drm_mach64_private_t * dev_priv); extern int mach64_do_cleanup_dma(struct drm_device * dev); @@ -155,13 +162,14 @@ struct drm_file *file_priv); extern int mach64_get_param(struct drm_device *dev, void *data, struct drm_file *file_priv); -extern int mach64_driver_vblank_wait(struct drm_device * dev, - unsigned int *sequence); +extern u32 mach64_get_vblank_counter(struct drm_device *dev, int crtc); +extern int mach64_enable_vblank(struct drm_device *dev, int crtc); +extern void mach64_disable_vblank(struct drm_device *dev, int crtc); extern irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS); -extern void mach64_driver_irq_preinstall(struct drm_device * dev); -extern void mach64_driver_irq_postinstall(struct drm_device * dev); -extern void mach64_driver_irq_uninstall(struct drm_device * dev); +extern void mach64_driver_irq_preinstall(struct drm_device *dev); +extern int mach64_driver_irq_postinstall(struct drm_device *dev); +extern void mach64_driver_irq_uninstall(struct drm_device *dev); /* ================================================================ * Registers @@ -171,14 +179,14 @@ #define MACH64_AGP_CNTL 0x014c #define MACH64_ALPHA_TST_CNTL 0x0550 -#define MACH64_DSP_CONFIG 0x0420 -#define MACH64_DSP_ON_OFF 0x0424 -#define MACH64_EXT_MEM_CNTL 0x04ac -#define MACH64_GEN_TEST_CNTL 0x04d0 -#define MACH64_HW_DEBUG 0x047c -#define MACH64_MEM_ADDR_CONFIG 0x0434 -#define MACH64_MEM_BUF_CNTL 0x042c -#define MACH64_MEM_CNTL 0x04b0 +#define MACH64_DSP_CONFIG 0x0420 +#define MACH64_DSP_ON_OFF 0x0424 +#define MACH64_EXT_MEM_CNTL 0x04ac +#define MACH64_GEN_TEST_CNTL 0x04d0 +#define MACH64_HW_DEBUG 0x047c +#define MACH64_MEM_ADDR_CONFIG 0x0434 +#define MACH64_MEM_BUF_CNTL 0x042c +#define MACH64_MEM_CNTL 0x04b0 #define MACH64_BM_ADDR 0x0648 #define MACH64_BM_COMMAND 0x0188 @@ -205,16 +213,16 @@ #define MACH64_CLR_CMP_CLR 0x0700 #define MACH64_CLR_CMP_CNTL 0x0708 #define MACH64_CLR_CMP_MASK 0x0704 -#define MACH64_CONFIG_CHIP_ID 0x04e0 -#define MACH64_CONFIG_CNTL 0x04dc -#define MACH64_CONFIG_STAT0 0x04e4 -#define MACH64_CONFIG_STAT1 0x0494 -#define MACH64_CONFIG_STAT2 0x0498 +#define MACH64_CONFIG_CHIP_ID 0x04e0 +#define MACH64_CONFIG_CNTL 0x04dc +#define MACH64_CONFIG_STAT0 0x04e4 +#define MACH64_CONFIG_STAT1 0x0494 +#define MACH64_CONFIG_STAT2 0x0498 #define MACH64_CONTEXT_LOAD_CNTL 0x072c #define MACH64_CONTEXT_MASK 0x0720 #define MACH64_COMPOSITE_SHADOW_ID 0x0798 -#define MACH64_CRC_SIG 0x04e8 -#define MACH64_CUSTOM_MACRO_CNTL 0x04d4 +#define MACH64_CRC_SIG 0x04e8 +#define MACH64_CUSTOM_MACRO_CNTL 0x04d4 #define MACH64_DP_BKGD_CLR 0x06c0 #define MACH64_DP_FOG_CLR 0x06c4 @@ -358,7 +366,7 @@ #define MACH64_TEX_0_OFF 0x05c0 #define MACH64_TEX_CNTL 0x0774 #define MACH64_TEX_SIZE_PITCH 0x0770 -#define MACH64_TIMER_CONFIG 0x0428 +#define MACH64_TIMER_CONFIG 0x0428 #define MACH64_VERTEX_1_ARGB 0x0254 #define MACH64_VERTEX_1_S 0x0240 @@ -521,95 +529,17 @@ #define MACH64_APERTURE_OFFSET 0x7ff800 /* frame-buffer offset for gui-masters */ /* ================================================================ - * Misc helper macros + * Ring operations + * + * Since the Mach64 bus master engine requires polling, these functions end + * up being called frequently, hence being inline. */ -static __inline__ void mach64_set_dma_eol(volatile u32 * addr) -{ -#if defined(__i386__) - int nr = 31; - - /* Taken from include/asm-i386/bitops.h linux header */ - __asm__ __volatile__("lock;" "btsl %1,%0":"=m"(*addr) - :"Ir"(nr)); -#elif defined(__powerpc__) - u32 old; - u32 mask = cpu_to_le32(MACH64_DMA_EOL); - - /* Taken from the include/asm-ppc/bitops.h linux header */ - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - or %0,%0,%2 \n\ - stwcx. %0,0,%3 \n\ - bne- 1b":"=&r"(old), "=m"(*addr) - :"r"(mask), "r"(addr), "m"(*addr) - :"cc"); -#elif defined(__alpha__) - u32 temp; - u32 mask = MACH64_DMA_EOL; - - /* Taken from the include/asm-alpha/bitops.h linux header */ - __asm__ __volatile__("1: ldl_l %0,%3\n" - " bis %0,%2,%0\n" - " stl_c %0,%1\n" - " beq %0,2f\n" - ".subsection 2\n" - "2: br 1b\n" - ".previous":"=&r"(temp), "=m"(*addr) - :"Ir"(mask), "m"(*addr)); -#else - u32 mask = cpu_to_le32(MACH64_DMA_EOL); - - *addr |= mask; -#endif -} - -static __inline__ void mach64_clear_dma_eol(volatile u32 * addr) -{ -#if defined(__i386__) - int nr = 31; - - /* Taken from include/asm-i386/bitops.h linux header */ - __asm__ __volatile__("lock;" "btrl %1,%0":"=m"(*addr) - :"Ir"(nr)); -#elif defined(__powerpc__) - u32 old; - u32 mask = cpu_to_le32(MACH64_DMA_EOL); - - /* Taken from the include/asm-ppc/bitops.h linux header */ - __asm__ __volatile__("\n\ -1: lwarx %0,0,%3 \n\ - andc %0,%0,%2 \n\ - stwcx. %0,0,%3 \n\ - bne- 1b":"=&r"(old), "=m"(*addr) - :"r"(mask), "r"(addr), "m"(*addr) - :"cc"); -#elif defined(__alpha__) - u32 temp; - u32 mask = ~MACH64_DMA_EOL; - - /* Taken from the include/asm-alpha/bitops.h linux header */ - __asm__ __volatile__("1: ldl_l %0,%3\n" - " and %0,%2,%0\n" - " stl_c %0,%1\n" - " beq %0,2f\n" - ".subsection 2\n" - "2: br 1b\n" - ".previous":"=&r"(temp), "=m"(*addr) - :"Ir"(mask), "m"(*addr)); -#else - u32 mask = cpu_to_le32(~MACH64_DMA_EOL); - - *addr &= mask; -#endif -} - static __inline__ void mach64_ring_start(drm_mach64_private_t * dev_priv) { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, + DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", ring->head_addr, ring->head, ring->tail, ring->space); if (mach64_do_wait_for_idle(dev_priv) < 0) { @@ -635,8 +565,7 @@ static __inline__ void mach64_ring_resume(drm_mach64_private_t * dev_priv, drm_mach64_descriptor_ring_t * ring) { - DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, + DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", ring->head_addr, ring->head, ring->tail, ring->space); /* reset descriptor table ring head */ @@ -655,8 +584,7 @@ MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0); if (dev_priv->driver_mode == MACH64_MODE_DMA_SYNC) { if ((mach64_do_wait_for_idle(dev_priv)) < 0) { - DRM_ERROR("%s: idle failed, resetting engine\n", - __FUNCTION__); + DRM_ERROR("idle failed, resetting engine\n"); mach64_dump_engine_info(dev_priv); mach64_do_engine_reset(dev_priv); return; @@ -666,11 +594,22 @@ } } +/** + * Poll the ring head and make sure the bus master is alive. + * + * Mach64's bus master engine will stop if there are no more entries to process. + * This function polls the engine for the last processed entry and calls + * mach64_ring_resume if there is an unprocessed entry. + * + * Note also that, since we update the ring tail while the bus master engine is + * in operation, it is possible that the last tail update was too late to be + * processed, and the bus master engine stops at the previous tail position. + * Therefore it is important to call this function frequently. + */ static __inline__ void mach64_ring_tick(drm_mach64_private_t * dev_priv, drm_mach64_descriptor_ring_t * ring) { - DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, + DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", ring->head_addr, ring->head, ring->tail, ring->space); if (!dev_priv->ring_running) { @@ -717,8 +656,7 @@ static __inline__ void mach64_ring_stop(drm_mach64_private_t * dev_priv) { - DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n", - __FUNCTION__, + DRM_DEBUG("head_addr: 0x%08x head: %d tail: %d space: %d\n", dev_priv->ring.head_addr, dev_priv->ring.head, dev_priv->ring.tail, dev_priv->ring.space); @@ -739,7 +677,7 @@ { drm_mach64_descriptor_ring_t *ring = &dev_priv->ring; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); mach64_ring_tick(dev_priv, ring); @@ -750,70 +688,22 @@ } /* ================================================================ - * DMA descriptor ring macros - */ - -#define RING_LOCALS \ - int _ring_tail, _ring_write; unsigned int _ring_mask; volatile u32 *_ring - -#define RING_WRITE_OFS _ring_write - -#define BEGIN_RING( n ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ - } \ - if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ - int ret; \ - if ((ret=mach64_wait_ring( dev_priv, (n) * sizeof(u32))) < 0 ) { \ - DRM_ERROR( "wait_ring failed, resetting engine\n"); \ - mach64_dump_engine_info( dev_priv ); \ - mach64_do_engine_reset( dev_priv ); \ - return ret; \ - } \ - } \ - dev_priv->ring.space -= (n) * sizeof(u32); \ - _ring = (u32 *) dev_priv->ring.start; \ - _ring_tail = _ring_write = dev_priv->ring.tail; \ - _ring_mask = dev_priv->ring.tail_mask; \ -} while (0) - -#define OUT_RING( x ) \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ - (unsigned int)(x), _ring_write ); \ - } \ - _ring[_ring_write++] = cpu_to_le32( x ); \ - _ring_write &= _ring_mask; \ -} while (0) - -#define ADVANCE_RING() \ -do { \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ - _ring_write, _ring_tail ); \ - } \ - DRM_MEMORYBARRIER(); \ - mach64_clear_dma_eol( &_ring[(_ring_tail - 2) & _ring_mask] ); \ - DRM_MEMORYBARRIER(); \ - dev_priv->ring.tail = _ring_write; \ - mach64_ring_tick( dev_priv, &(dev_priv)->ring ); \ -} while (0) - -/* ================================================================ * DMA macros + * + * Mach64's ring buffer doesn't take register writes directly. These + * have to be written indirectly in DMA buffers. These macros simplify + * the task of setting up a buffer, writing commands to it, and + * queuing the buffer in the ring. */ #define DMALOCALS \ drm_mach64_freelist_t *_entry = NULL; \ - struct drm_buf *_buf = NULL; \ + struct drm_buf *_buf = NULL; \ u32 *_buf_wptr; int _outcount #define GETBUFPTR( __buf ) \ -((dev_priv->is_pci) ? \ - ((u32 *)(__buf)->address) : \ +((dev_priv->is_pci) ? \ + ((u32 *)(__buf)->address) : \ ((u32 *)((char *)dev_priv->dev_buffers->handle + (__buf)->offset))) #define GETBUFADDR( __buf ) ((u32)(__buf)->bus_address) @@ -828,7 +718,7 @@ struct list_head *ptr; #if MACH64_EXTRA_CHECKING if (list_empty(&dev_priv->pending)) { - DRM_ERROR("Empty pending list in %s\n", __FUNCTION__); + DRM_ERROR("Empty pending list in \n"); return -EINVAL; } #endif @@ -844,7 +734,7 @@ return 0; } -#define DMASETPTR( _p ) \ +#define DMASETPTR( _p ) \ do { \ _buf = (_p); \ _outcount = 0; \ @@ -855,18 +745,15 @@ #define DMAGETPTR( file_priv, dev_priv, n ) \ do { \ if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAGETPTR( %d ) in %s\n", \ - n, __FUNCTION__ ); \ + DRM_INFO( "DMAGETPTR( %d )\n", (n) ); \ } \ _buf = mach64_freelist_get( dev_priv ); \ if (_buf == NULL) { \ - DRM_ERROR("%s: couldn't get buffer in DMAGETPTR\n", \ - __FUNCTION__ ); \ + DRM_ERROR("couldn't get buffer in DMAGETPTR\n"); \ return -EAGAIN; \ } \ if (_buf->pending) { \ - DRM_ERROR("%s: pending buf in DMAGETPTR\n", \ - __FUNCTION__ ); \ + DRM_ERROR("pending buf in DMAGETPTR\n"); \ return -EFAULT; \ } \ _buf->file_priv = file_priv; \ @@ -886,173 +773,87 @@ _buf->used += 8; \ } while (0) -#define DMAADVANCE( dev_priv, _discard ) \ -do { \ - struct list_head *ptr; \ - RING_LOCALS; \ - \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAADVANCE() in %s\n", __FUNCTION__ ); \ - } \ - \ - if (_buf->used <= 0) { \ - DRM_ERROR( "DMAADVANCE() in %s: sending empty buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return -EFAULT; \ - } \ - if (_buf->pending) { \ - /* This is a resued buffer, so we need to find it in the pending list */ \ - int ret; \ - if ( (ret=mach64_find_pending_buf_entry(dev_priv, &_entry, _buf)) ) { \ - DRM_ERROR( "DMAADVANCE() in %s: couldn't find pending buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return ret; \ - } \ - if (_entry->discard) { \ - DRM_ERROR( "DMAADVANCE() in %s: sending discarded pending buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return -EFAULT; \ - } \ - } else { \ - if (list_empty(&dev_priv->placeholders)) { \ - DRM_ERROR( "DMAADVANCE() in %s: empty placeholder list\n", \ - __FUNCTION__ ); \ - return -EFAULT; \ - } \ - ptr = dev_priv->placeholders.next; \ - list_del(ptr); \ - _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ - _buf->pending = 1; \ - _entry->buf = _buf; \ - list_add_tail(ptr, &dev_priv->pending); \ - } \ - _entry->discard = (_discard); \ - ADD_BUF_TO_RING( dev_priv ); \ -} while (0) - -#define DMADISCARDBUF() \ -do { \ - if (_entry == NULL) { \ - int ret; \ - if ( (ret=mach64_find_pending_buf_entry(dev_priv, &_entry, _buf)) ) { \ - DRM_ERROR( "%s: couldn't find pending buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return ret; \ - } \ - } \ - _entry->discard = 1; \ -} while(0) - -#define ADD_BUF_TO_RING( dev_priv ) \ -do { \ - int bytes, pages, remainder; \ - u32 address, page; \ - int i; \ - \ - bytes = _buf->used; \ - address = GETBUFADDR( _buf ); \ - \ - pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; \ - \ - BEGIN_RING( pages * 4 ); \ - \ - for ( i = 0 ; i < pages-1 ; i++ ) { \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); \ - OUT_RING( page ); \ - OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); \ - OUT_RING( 0 ); \ - } \ - \ - /* generate the final descriptor for any remaining commands in this buffer */ \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - remainder = bytes - i * MACH64_DMA_CHUNKSIZE; \ - \ - /* Save dword offset of last descriptor for this buffer. \ - * This is needed to check for completion of the buffer in freelist_get \ - */ \ - _entry->ring_ofs = RING_WRITE_OFS; \ - \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); \ - OUT_RING( page ); \ - OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); \ - OUT_RING( 0 ); \ - \ - ADVANCE_RING(); \ -} while(0) - -#define DMAADVANCEHOSTDATA( dev_priv ) \ -do { \ - struct list_head *ptr; \ - RING_LOCALS; \ - \ - if ( MACH64_VERBOSE ) { \ - DRM_INFO( "DMAADVANCEHOSTDATA() in %s\n", __FUNCTION__ ); \ - } \ - \ - if (_buf->used <= 0) { \ - DRM_ERROR( "DMAADVANCEHOSTDATA() in %s: sending empty buf %d\n", \ - __FUNCTION__, _buf->idx ); \ - return -EFAULT; \ - } \ - if (list_empty(&dev_priv->placeholders)) { \ - DRM_ERROR( "%s: empty placeholder list in DMAADVANCEHOSTDATA()\n", \ - __FUNCTION__ ); \ - return -EFAULT; \ - } \ - \ - ptr = dev_priv->placeholders.next; \ - list_del(ptr); \ - _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ - _entry->buf = _buf; \ - _entry->buf->pending = 1; \ - list_add_tail(ptr, &dev_priv->pending); \ - _entry->discard = 1; \ - ADD_HOSTDATA_BUF_TO_RING( dev_priv ); \ -} while (0) - -#define ADD_HOSTDATA_BUF_TO_RING( dev_priv ) \ -do { \ - int bytes, pages, remainder; \ - u32 address, page; \ - int i; \ - \ - bytes = _buf->used - MACH64_HOSTDATA_BLIT_OFFSET; \ - pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE; \ - address = GETBUFADDR( _buf ); \ - \ - BEGIN_RING( 4 + pages * 4 ); \ - \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR ); \ - OUT_RING( address ); \ - OUT_RING( MACH64_HOSTDATA_BLIT_OFFSET | MACH64_DMA_HOLD_OFFSET ); \ - OUT_RING( 0 ); \ - \ - address += MACH64_HOSTDATA_BLIT_OFFSET; \ - \ - for ( i = 0 ; i < pages-1 ; i++ ) { \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); \ - OUT_RING( page ); \ - OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET ); \ - OUT_RING( 0 ); \ - } \ - \ - /* generate the final descriptor for any remaining commands in this buffer */ \ - page = address + i * MACH64_DMA_CHUNKSIZE; \ - remainder = bytes - i * MACH64_DMA_CHUNKSIZE; \ - \ - /* Save dword offset of last descriptor for this buffer. \ - * This is needed to check for completion of the buffer in freelist_get \ - */ \ - _entry->ring_ofs = RING_WRITE_OFS; \ - \ - OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA ); \ - OUT_RING( page ); \ - OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL ); \ - OUT_RING( 0 ); \ - \ - ADVANCE_RING(); \ -} while(0) +#define DMAADVANCE( dev_priv, _discard ) \ + do { \ + struct list_head *ptr; \ + int ret; \ + \ + if ( MACH64_VERBOSE ) { \ + DRM_INFO( "DMAADVANCE() in \n" ); \ + } \ + \ + if (_buf->used <= 0) { \ + DRM_ERROR( "DMAADVANCE(): sending empty buf %d\n", \ + _buf->idx ); \ + return -EFAULT; \ + } \ + if (_buf->pending) { \ + /* This is a resued buffer, so we need to find it in the pending list */ \ + if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \ + DRM_ERROR( "DMAADVANCE(): couldn't find pending buf %d\n", _buf->idx ); \ + return ret; \ + } \ + if (_entry->discard) { \ + DRM_ERROR( "DMAADVANCE(): sending discarded pending buf %d\n", _buf->idx ); \ + return -EFAULT; \ + } \ + } else { \ + if (list_empty(&dev_priv->placeholders)) { \ + DRM_ERROR( "DMAADVANCE(): empty placeholder list\n"); \ + return -EFAULT; \ + } \ + ptr = dev_priv->placeholders.next; \ + list_del(ptr); \ + _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ + _buf->pending = 1; \ + _entry->buf = _buf; \ + list_add_tail(ptr, &dev_priv->pending); \ + } \ + _entry->discard = (_discard); \ + if ((ret = mach64_add_buf_to_ring( dev_priv, _entry ))) \ + return ret; \ + } while (0) + +#define DMADISCARDBUF() \ + do { \ + if (_entry == NULL) { \ + int ret; \ + if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \ + DRM_ERROR( "couldn't find pending buf %d\n", \ + _buf->idx ); \ + return ret; \ + } \ + } \ + _entry->discard = 1; \ + } while(0) + +#define DMAADVANCEHOSTDATA( dev_priv ) \ + do { \ + struct list_head *ptr; \ + int ret; \ + \ + if ( MACH64_VERBOSE ) { \ + DRM_INFO( "DMAADVANCEHOSTDATA() in \n" ); \ + } \ + \ + if (_buf->used <= 0) { \ + DRM_ERROR( "DMAADVANCEHOSTDATA(): sending empty buf %d\n", _buf->idx ); \ + return -EFAULT; \ + } \ + if (list_empty(&dev_priv->placeholders)) { \ + DRM_ERROR( "empty placeholder list in DMAADVANCEHOSTDATA()\n" ); \ + return -EFAULT; \ + } \ + \ + ptr = dev_priv->placeholders.next; \ + list_del(ptr); \ + _entry = list_entry(ptr, drm_mach64_freelist_t, list); \ + _entry->buf = _buf; \ + _entry->buf->pending = 1; \ + list_add_tail(ptr, &dev_priv->pending); \ + _entry->discard = 1; \ + if ((ret = mach64_add_hostdata_buf_to_ring( dev_priv, _entry ))) \ + return ret; \ + } while (0) #endif /* __MACH64_DRV_H__ */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mach64_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mach64_irq.c --- libdrm-2.3.0.16/shared-core/mach64_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mach64_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -42,9 +42,8 @@ irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS) { - struct drm_device *dev = (struct drm_device *) arg; - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *) dev->dev_private; + struct drm_device *dev = arg; + drm_mach64_private_t *dev_priv = dev->dev_private; int status; status = MACH64_READ(MACH64_CRTC_INT_CNTL); @@ -62,74 +61,98 @@ (status & ~MACH64_CRTC_INT_ACKS) | MACH64_CRTC_VBLANK_INT); - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - drm_vbl_send_signals(dev); + atomic_inc(&dev_priv->vbl_received); + drm_handle_vblank(dev, 0); return IRQ_HANDLED; } return IRQ_NONE; } -int mach64_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence) +u32 mach64_get_vblank_counter(struct drm_device * dev, int crtc) { - unsigned int cur_vblank; - int ret = 0; + const drm_mach64_private_t *const dev_priv = dev->dev_private; - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(&dev->vbl_received)) - - *sequence) <= (1 << 23))); + if (crtc != 0) + return 0; + + return atomic_read(&dev_priv->vbl_received); +} + +int mach64_enable_vblank(struct drm_device * dev, int crtc) +{ + drm_mach64_private_t *dev_priv = dev->dev_private; + u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL); + + if (crtc != 0) { + DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", + crtc); + return -EINVAL; + } + + DRM_DEBUG("before enable vblank CRTC_INT_CTNL: 0x%08x\n", status); - *sequence = cur_vblank; + /* Turn on VBLANK interrupt */ + MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL) + | MACH64_CRTC_VBLANK_INT_EN); - return ret; + return 0; } -/* drm_dma.h hooks -*/ -void mach64_driver_irq_preinstall(struct drm_device * dev) +void mach64_disable_vblank(struct drm_device * dev, int crtc) { - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *) dev->dev_private; + if (crtc != 0) { + DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", + crtc); + return; + } + + /* + * FIXME: implement proper interrupt disable by using the vblank + * counter register (if available). + */ +} +static void mach64_disable_vblank_local(struct drm_device * dev, int crtc) +{ + drm_mach64_private_t *dev_priv = dev->dev_private; u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL); - DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status); + if (crtc != 0) { + DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", + crtc); + return; + } + + DRM_DEBUG("before disable vblank CRTC_INT_CTNL: 0x%08x\n", status); /* Disable and clear VBLANK interrupt */ MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN) | MACH64_CRTC_VBLANK_INT); } -void mach64_driver_irq_postinstall(struct drm_device * dev) +void mach64_driver_irq_preinstall(struct drm_device * dev) { - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *) dev->dev_private; + drm_mach64_private_t *dev_priv = dev->dev_private; - /* Turn on VBLANK interrupt */ - MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL) - | MACH64_CRTC_VBLANK_INT_EN); + u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL); - DRM_DEBUG("after install CRTC_INT_CTNL: 0x%08x\n", - MACH64_READ(MACH64_CRTC_INT_CNTL)); + DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status); + + mach64_disable_vblank_local(dev, 0); +} +int mach64_driver_irq_postinstall(struct drm_device * dev) +{ + return drm_vblank_init(dev, 1); } void mach64_driver_irq_uninstall(struct drm_device * dev) { - drm_mach64_private_t *dev_priv = - (drm_mach64_private_t *) dev->dev_private; + drm_mach64_private_t *dev_priv = dev->dev_private; if (!dev_priv) return; - /* Disable and clear VBLANK interrupt */ - MACH64_WRITE(MACH64_CRTC_INT_CNTL, - (MACH64_READ(MACH64_CRTC_INT_CNTL) & - ~MACH64_CRTC_VBLANK_INT_EN) - | MACH64_CRTC_VBLANK_INT); + mach64_disable_vblank_local(dev, 0); DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n", MACH64_READ(MACH64_CRTC_INT_CNTL)); diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mach64_state.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mach64_state.c --- libdrm-2.3.0.16/shared-core/mach64_state.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mach64_state.c 2009-04-20 07:00:29.000000000 +0100 @@ -27,7 +27,7 @@ * Authors: * Gareth Hughes * Leif Delgass - * Jos�Fonseca + * José Fonseca */ #include "drmP.h" @@ -95,7 +95,7 @@ drm_mach64_context_regs_t *regs = &sarea_priv->context_state; DMALOCALS; - DRM_DEBUG("%s: box=%p\n", __FUNCTION__, box); + DRM_DEBUG("box=%p\n", box); /* Get GL scissor */ /* FIXME: store scissor in SAREA as a cliprect instead of in @@ -146,7 +146,7 @@ if (MACH64_VERBOSE) { mach64_print_dirty(__FUNCTION__, dirty); } else { - DRM_DEBUG("%s: dirty=0x%08x\n", __FUNCTION__, dirty); + DRM_DEBUG("dirty=0x%08x\n", dirty); } DMAGETPTR(file_priv, dev_priv, 17); /* returns on failure to get buffer */ @@ -229,7 +229,7 @@ int i; DMALOCALS; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); switch (dev_priv->fb_bpp) { case 16: @@ -368,7 +368,7 @@ int i; DMALOCALS; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); switch (dev_priv->fb_bpp) { case 16: @@ -445,7 +445,7 @@ int i, start; u32 head, tail, ofs; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); if (sarea_priv->frames_queued == 0) return 0; @@ -525,15 +525,14 @@ from += count; to += count; } else { - DRM_ERROR("%s: Got bad command: 0x%04x\n", - __FUNCTION__, reg); + DRM_ERROR("Got bad command: 0x%04x\n", reg); drm_free(orig_from, bytes, DRM_MEM_DRIVER); return -EACCES; } } else { DRM_ERROR - ("%s: Got bad command count(=%u) dwords remaining=%lu\n", - __FUNCTION__, count, n); + ("Got bad command count(=%u) dwords remaining=%lu\n", + count, n); drm_free(orig_from, bytes, DRM_MEM_DRIVER); return -EINVAL; } @@ -543,7 +542,7 @@ if (n == 0) return 0; else { - DRM_ERROR("%s: Bad buf->used(=%lu)\n", __FUNCTION__, bytes); + DRM_ERROR("Bad buf->used(=%lu)\n", bytes); return -EINVAL; } } @@ -563,18 +562,22 @@ int verify_ret = 0; DMALOCALS; - DRM_DEBUG("%s: buf=%p used=%lu nbox=%d\n", - __FUNCTION__, buf, used, sarea_priv->nbox); + DRM_DEBUG("buf=%p used=%lu nbox=%d\n", + buf, used, sarea_priv->nbox); if (!used) goto _vertex_done; copy_buf = mach64_freelist_get(dev_priv); if (copy_buf == NULL) { - DRM_ERROR("%s: couldn't get buffer\n", __FUNCTION__); + DRM_ERROR("couldn't get buffer\n"); return -EAGAIN; } + /* Mach64's vertex data is actually register writes. To avoid security + * compromises these register writes have to be verified and copied from + * user space into a private DMA buffer. + */ verify_ret = copy_from_user_vertex(GETBUFPTR(copy_buf), buf, used); if (verify_ret != 0) { @@ -694,10 +697,20 @@ copy_buf = mach64_freelist_get(dev_priv); if (copy_buf == NULL) { - DRM_ERROR("%s: couldn't get buffer\n", __FUNCTION__); + DRM_ERROR("couldn't get buffer\n"); return -EAGAIN; } + /* Copy the blit data from userspace. + * + * XXX: This is overkill. The most efficient solution would be having + * two sets of buffers (one set private for vertex data, the other set + * client-writable for blits). However that would bring more complexity + * and would break backward compatability. The solution currently + * implemented is keeping all buffers private, allowing to secure the + * driver, without increasing complexity at the expense of some speed + * transfering data. + */ verify_ret = copy_from_user_blit(GETBUFPTR(copy_buf), blit->buf, used); if (verify_ret != 0) { @@ -745,7 +758,7 @@ DMAOUTREG(MACH64_DST_X_Y, (blit->y << 16) | blit->x); DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (blit->height << 16) | blit->width); - DRM_DEBUG("%s: %lu bytes\n", __FUNCTION__, used); + DRM_DEBUG("%lu bytes\n", used); /* Add the buffer to the queue */ DMAADVANCEHOSTDATA(dev_priv); @@ -766,7 +779,7 @@ drm_mach64_clear_t *clear = data; int ret; - DRM_DEBUG("%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID); + DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -791,7 +804,7 @@ drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv; int ret; - DRM_DEBUG("%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID); + DRM_DEBUG("pid=%d\n", DRM_CURRENTPID); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -816,12 +829,12 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } - DRM_DEBUG("%s: pid=%d buf=%p used=%lu discard=%d\n", - __FUNCTION__, DRM_CURRENTPID, + DRM_DEBUG("pid=%d buf=%p used=%lu discard=%d\n", + DRM_CURRENTPID, vertex->buf, vertex->used, vertex->discard); if (vertex->prim < 0 || vertex->prim > MACH64_PRIM_POLYGON) { @@ -868,10 +881,10 @@ drm_mach64_getparam_t *param = data; int value; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/Makefile.am /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/Makefile.am --- libdrm-2.3.0.16/shared-core/Makefile.am 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/Makefile.am 2008-07-01 08:51:40.000000000 +0100 @@ -29,7 +29,6 @@ i915_drm.h \ mach64_drm.h \ mga_drm.h \ - nouveau_drm.h \ r128_drm.h \ radeon_drm.h \ savage_drm.h \ @@ -37,4 +36,3 @@ via_drm.h \ r300_reg.h \ via_3d_reg.h - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/Makefile.in /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/Makefile.in --- libdrm-2.3.0.16/shared-core/Makefile.in 2008-05-15 22:47:17.000000000 +0100 +++ libdrm-2.3.1/shared-core/Makefile.in 2009-04-20 07:00:29.000000000 +0100 @@ -196,7 +196,6 @@ i915_drm.h \ mach64_drm.h \ mga_drm.h \ - nouveau_drm.h \ r128_drm.h \ radeon_drm.h \ savage_drm.h \ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mga_dma.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mga_dma.c --- libdrm-2.3.0.16/shared-core/mga_dma.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mga_dma.c 2009-04-20 07:00:29.000000000 +0100 @@ -28,7 +28,7 @@ /** * \file mga_dma.c * DMA support for MGA G200 / G400. - * + * * \author Rickard E. (Rik) Faith * \author Jeff Hartmann * \author Keith Whitwell @@ -46,7 +46,7 @@ #define MINIMAL_CLEANUP 0 #define FULL_CLEANUP 1 -static int mga_do_cleanup_dma(struct drm_device * dev, int full_cleanup); +static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup); /* ================================================================ * Engine control @@ -395,7 +395,7 @@ int mga_driver_load(struct drm_device *dev, unsigned long flags) { - drm_mga_private_t * dev_priv; + drm_mga_private_t *dev_priv; dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER); if (!dev_priv) @@ -420,7 +420,7 @@ /** * Bootstrap the driver for AGP DMA. - * + * * \todo * Investigate whether there is any benifit to storing the WARP microcode in * AGP memory. If not, the microcode may as well always be put in PCI @@ -436,10 +436,11 @@ static int mga_do_agp_dma_bootstrap(struct drm_device *dev, drm_mga_dma_bootstrap_t * dma_bs) { - drm_mga_private_t * const dev_priv = (drm_mga_private_t *) dev->dev_private; + drm_mga_private_t *const dev_priv = + (drm_mga_private_t *)dev->dev_private; unsigned int warp_size = mga_warp_microcode_size(dev_priv); int err; - unsigned offset; + unsigned offset; const unsigned secondary_size = dma_bs->secondary_bin_count * dma_bs->secondary_bin_size; const unsigned agp_size = (dma_bs->agp_size << 20); @@ -481,11 +482,10 @@ } } - /* Allocate and bind AGP memory. */ agp_req.size = agp_size; agp_req.type = 0; - err = drm_agp_alloc( dev, & agp_req ); + err = drm_agp_alloc(dev, &agp_req); if (err) { dev_priv->agp_size = 0; DRM_ERROR("Unable to allocate %uMB AGP memory\n", @@ -511,36 +511,36 @@ warp_size = PAGE_SIZE; offset = 0; - err = drm_addmap( dev, offset, warp_size, - _DRM_AGP, _DRM_READ_ONLY, & dev_priv->warp ); + err = drm_addmap(dev, offset, warp_size, + _DRM_AGP, _DRM_READ_ONLY, &dev_priv->warp); if (err) { DRM_ERROR("Unable to map WARP microcode: %d\n", err); return err; } offset += warp_size; - err = drm_addmap( dev, offset, dma_bs->primary_size, - _DRM_AGP, _DRM_READ_ONLY, & dev_priv->primary ); + err = drm_addmap(dev, offset, dma_bs->primary_size, + _DRM_AGP, _DRM_READ_ONLY, & dev_priv->primary); if (err) { DRM_ERROR("Unable to map primary DMA region: %d\n", err); return err; } offset += dma_bs->primary_size; - err = drm_addmap( dev, offset, secondary_size, - _DRM_AGP, 0, & dev->agp_buffer_map ); + err = drm_addmap(dev, offset, secondary_size, + _DRM_AGP, 0, & dev->agp_buffer_map); if (err) { DRM_ERROR("Unable to map secondary DMA region: %d\n", err); return err; } - (void) memset( &req, 0, sizeof(req) ); + (void)memset( &req, 0, sizeof(req) ); req.count = dma_bs->secondary_bin_count; req.size = dma_bs->secondary_bin_size; req.flags = _DRM_AGP_BUFFER; req.agp_start = offset; - err = drm_addbufs_agp( dev, & req ); + err = drm_addbufs_agp(dev, &req); if (err) { DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err); return err; @@ -563,8 +563,8 @@ #endif offset += secondary_size; - err = drm_addmap( dev, offset, agp_size - offset, - _DRM_AGP, 0, & dev_priv->agp_textures ); + err = drm_addmap(dev, offset, agp_size - offset, + _DRM_AGP, 0, & dev_priv->agp_textures); if (err) { DRM_ERROR("Unable to map AGP texture region: %d\n", err); return err; @@ -591,7 +591,7 @@ /** * Bootstrap the driver for PCI DMA. - * + * * \todo * The algorithm for decreasing the size of the primary DMA buffer could be * better. The size should be rounded up to the nearest page size, then @@ -600,20 +600,21 @@ * \todo * Determine whether the maximum address passed to drm_pci_alloc is correct. * The same goes for drm_addbufs_pci. - * + * * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap */ static int mga_do_pci_dma_bootstrap(struct drm_device * dev, drm_mga_dma_bootstrap_t * dma_bs) { - drm_mga_private_t * const dev_priv = (drm_mga_private_t *) dev->dev_private; + drm_mga_private_t *const dev_priv = + (drm_mga_private_t *) dev->dev_private; unsigned int warp_size = mga_warp_microcode_size(dev_priv); unsigned int primary_size; unsigned int bin_count; int err; struct drm_buf_desc req; - + if (dev->dma == NULL) { DRM_ERROR("dev->dma is NULL\n"); return -EFAULT; @@ -639,9 +640,8 @@ * alignment of the primary or secondary DMA buffers. */ - for ( primary_size = dma_bs->primary_size - ; primary_size != 0 - ; primary_size >>= 1 ) { + for (primary_size = dma_bs->primary_size; primary_size != 0; + primary_size >>= 1 ) { /* The proper alignment for this mapping is 0x04 */ err = drm_addmap(dev, 0, primary_size, _DRM_CONSISTENT, _DRM_READ_ONLY, &dev_priv->primary); @@ -656,24 +656,23 @@ if (dev_priv->primary->size != dma_bs->primary_size) { DRM_INFO("Primary DMA buffer size reduced from %u to %u.\n", - dma_bs->primary_size, - (unsigned) dev_priv->primary->size); + dma_bs->primary_size, + (unsigned)dev_priv->primary->size); dma_bs->primary_size = dev_priv->primary->size; } - for ( bin_count = dma_bs->secondary_bin_count - ; bin_count > 0 - ; bin_count-- ) { - (void) memset( &req, 0, sizeof(req) ); + for (bin_count = dma_bs->secondary_bin_count; bin_count > 0; + bin_count-- ) { + (void)memset(&req, 0, sizeof(req)); req.count = bin_count; req.size = dma_bs->secondary_bin_size; - err = drm_addbufs_pci( dev, & req ); + err = drm_addbufs_pci(dev, &req); if (!err) { break; } } - + if (bin_count == 0) { DRM_ERROR("Unable to add secondary DMA buffers: %d\n", err); return err; @@ -696,12 +695,12 @@ } -static int mga_do_dma_bootstrap(struct drm_device * dev, - drm_mga_dma_bootstrap_t * dma_bs) +static int mga_do_dma_bootstrap(struct drm_device *dev, + drm_mga_dma_bootstrap_t *dma_bs) { const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev); int err; - drm_mga_private_t * const dev_priv = + drm_mga_private_t *const dev_priv = (drm_mga_private_t *) dev->dev_private; @@ -710,17 +709,17 @@ /* The first steps are the same for both PCI and AGP based DMA. Map * the cards MMIO registers and map a status page. */ - err = drm_addmap( dev, dev_priv->mmio_base, dev_priv->mmio_size, - _DRM_REGISTERS, _DRM_READ_ONLY, & dev_priv->mmio ); + err = drm_addmap(dev, dev_priv->mmio_base, dev_priv->mmio_size, + _DRM_REGISTERS, _DRM_READ_ONLY, & dev_priv->mmio); if (err) { DRM_ERROR("Unable to map MMIO region: %d\n", err); return err; } - err = drm_addmap( dev, 0, SAREA_MAX, _DRM_SHM, - _DRM_READ_ONLY | _DRM_LOCKED | _DRM_KERNEL, - & dev_priv->status ); + err = drm_addmap(dev, 0, SAREA_MAX, _DRM_SHM, + _DRM_READ_ONLY | _DRM_LOCKED | _DRM_KERNEL, + & dev_priv->status); if (err) { DRM_ERROR("Unable to map status region: %d\n", err); return err; @@ -736,7 +735,7 @@ if (is_agp) { err = mga_do_agp_dma_bootstrap(dev, dma_bs); } - + /* If we attempted to initialize the card for AGP DMA but failed, * clean-up any mess that may have been created. */ @@ -768,7 +767,7 @@ drm_mga_dma_bootstrap_t *bootstrap = data; int err; static const int modes[] = { 0, 1, 2, 2, 4, 4, 4, 4 }; - const drm_mga_private_t * const dev_priv = + const drm_mga_private_t *const dev_priv = (drm_mga_private_t *) dev->dev_private; @@ -829,7 +828,7 @@ return -EINVAL; } - if (! dev_priv->used_new_dma_init) { + if (!dev_priv->used_new_dma_init) { dev_priv->dma_access = MGA_PAGPXFER; dev_priv->wagp_enable = MGA_WAGP_ENABLE; @@ -855,7 +854,8 @@ return -EINVAL; } dev->agp_buffer_token = init->buffers_offset; - dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); + dev->agp_buffer_map = + drm_core_findmap(dev, init->buffers_offset); if (!dev->agp_buffer_map) { DRM_ERROR("failed to find dma buffer region!\n"); return -EINVAL; @@ -898,10 +898,6 @@ /* Init the primary DMA registers. */ MGA_WRITE(MGA_PRIMADDRESS, dev_priv->primary->offset | MGA_DMA_GENERAL); -#if 0 - MGA_WRITE(MGA_PRIMPTR, virt_to_bus((void *)dev_priv->prim.status) | MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */ - MGA_PRIMPTREN1); /* DWGSYNC */ -#endif dev_priv->prim.start = (u8 *) dev_priv->primary->handle; dev_priv->prim.end = ((u8 *) dev_priv->primary->handle @@ -932,7 +928,7 @@ return 0; } -static int mga_do_cleanup_dma(struct drm_device * dev, int full_cleanup) +static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup) { int err = 0; DRM_DEBUG("\n"); @@ -951,7 +947,7 @@ && (dev_priv->warp->type != _DRM_CONSISTENT)) drm_core_ioremapfree(dev_priv->warp, dev); - if ((dev_priv->primary != NULL) + if ((dev_priv->primary != NULL) && (dev_priv->primary->type != _DRM_CONSISTENT)) drm_core_ioremapfree(dev_priv->primary, dev); @@ -993,14 +989,15 @@ memset(&dev_priv->prim, 0, sizeof(dev_priv->prim)); dev_priv->warp_pipe = 0; - memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); + memset(dev_priv->warp_pipe_phys, 0, + sizeof(dev_priv->warp_pipe_phys)); if (dev_priv->head != NULL) { mga_freelist_cleanup(dev); } } - return 0; + return err; } int mga_dma_init(struct drm_device *dev, void *data, @@ -1015,7 +1012,7 @@ case MGA_INIT_DMA: err = mga_do_init_dma(dev, init); if (err) { - (void) mga_do_cleanup_dma(dev, FULL_CLEANUP); + (void)mga_do_cleanup_dma(dev, FULL_CLEANUP); } return err; case MGA_CLEANUP_DMA: @@ -1052,7 +1049,7 @@ #if MGA_DMA_DEBUG int ret = mga_do_wait_for_idle(dev_priv); if (ret < 0) - DRM_INFO("%s: -EBUSY\n", __FUNCTION__); + DRM_INFO("-EBUSY\n"); return ret; #else return mga_do_wait_for_idle(dev_priv); diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mga_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mga_drv.h --- libdrm-2.3.0.16/shared-core/mga_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mga_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -109,17 +109,18 @@ /** * \name MMIO region parameters. - * + * * \sa drm_mga_private_t::mmio */ /*@{*/ - u32 mmio_base; /**< Bus address of base of MMIO. */ - u32 mmio_size; /**< Size of the MMIO region. */ + u32 mmio_base; /**< Bus address of base of MMIO. */ + u32 mmio_size; /**< Size of the MMIO region. */ /*@}*/ u32 clear_cmd; u32 maccess; + atomic_t vbl_received; /**< Number of vblanks received. */ wait_queue_head_t fence_queue; atomic_t last_fence_retired; u32 next_fence_to_post; @@ -143,7 +144,7 @@ drm_local_map_t *warp; drm_local_map_t *primary; drm_local_map_t *agp_textures; - + unsigned long agp_handle; unsigned int agp_size; } drm_mga_private_t; @@ -181,11 +182,14 @@ extern int mga_warp_init(drm_mga_private_t * dev_priv); /* mga_irq.c */ +extern int mga_enable_vblank(struct drm_device *dev, int crtc); +extern void mga_disable_vblank(struct drm_device *dev, int crtc); +extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc); extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence); extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS); extern void mga_driver_irq_preinstall(struct drm_device * dev); -extern void mga_driver_irq_postinstall(struct drm_device * dev); +extern int mga_driver_irq_postinstall(struct drm_device * dev); extern void mga_driver_irq_uninstall(struct drm_device * dev); extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); @@ -216,8 +220,8 @@ #define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val)) #endif -#define DWGREG0 0x1c00 -#define DWGREG0_END 0x1dff +#define DWGREG0 0x1c00 +#define DWGREG0_END 0x1dff #define DWGREG1 0x2c00 #define DWGREG1_END 0x2dff @@ -249,7 +253,7 @@ } else if ( dev_priv->prim.space < \ dev_priv->prim.high_mark ) { \ if ( MGA_DMA_DEBUG ) \ - DRM_INFO( "%s: wrap...\n", __FUNCTION__ ); \ + DRM_INFO( "wrap...\n"); \ return -EBUSY; \ } \ } \ @@ -260,7 +264,7 @@ if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \ if ( MGA_DMA_DEBUG ) \ - DRM_INFO( "%s: wrap...\n", __FUNCTION__ ); \ + DRM_INFO( "wrap...\n"); \ return -EBUSY; \ } \ mga_do_dma_wrap_end( dev_priv ); \ @@ -280,8 +284,7 @@ #define BEGIN_DMA( n ) \ do { \ if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ + DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \ DRM_INFO( " space=0x%x req=0x%Zx\n", \ dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ } \ @@ -292,7 +295,7 @@ #define BEGIN_DMA_WRAP() \ do { \ if ( MGA_VERBOSE ) { \ - DRM_INFO( "BEGIN_DMA() in %s\n", __FUNCTION__ ); \ + DRM_INFO( "BEGIN_DMA()\n" ); \ DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ } \ prim = dev_priv->prim.start; \ @@ -311,7 +314,7 @@ #define FLUSH_DMA() \ do { \ if ( 0 ) { \ - DRM_INFO( "%s:\n", __FUNCTION__ ); \ + DRM_INFO( "\n" ); \ DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ dev_priv->prim.tail, \ MGA_READ( MGA_PRIMADDRESS ) - \ @@ -394,22 +397,22 @@ #define MGA_VINTCLR (1 << 4) #define MGA_VINTEN (1 << 5) -#define MGA_ALPHACTRL 0x2c7c -#define MGA_AR0 0x1c60 -#define MGA_AR1 0x1c64 -#define MGA_AR2 0x1c68 -#define MGA_AR3 0x1c6c -#define MGA_AR4 0x1c70 -#define MGA_AR5 0x1c74 -#define MGA_AR6 0x1c78 +#define MGA_ALPHACTRL 0x2c7c +#define MGA_AR0 0x1c60 +#define MGA_AR1 0x1c64 +#define MGA_AR2 0x1c68 +#define MGA_AR3 0x1c6c +#define MGA_AR4 0x1c70 +#define MGA_AR5 0x1c74 +#define MGA_AR6 0x1c78 #define MGA_CXBNDRY 0x1c80 -#define MGA_CXLEFT 0x1ca0 +#define MGA_CXLEFT 0x1ca0 #define MGA_CXRIGHT 0x1ca4 -#define MGA_DMAPAD 0x1c54 -#define MGA_DSTORG 0x2cb8 -#define MGA_DWGCTL 0x1c00 +#define MGA_DMAPAD 0x1c54 +#define MGA_DSTORG 0x2cb8 +#define MGA_DWGCTL 0x1c00 # define MGA_OPCOD_MASK (15 << 0) # define MGA_OPCOD_TRAP (4 << 0) # define MGA_OPCOD_TEXTURE_TRAP (6 << 0) @@ -455,27 +458,27 @@ # define MGA_CLIPDIS (1 << 31) #define MGA_DWGSYNC 0x2c4c -#define MGA_FCOL 0x1c24 -#define MGA_FIFOSTATUS 0x1e10 -#define MGA_FOGCOL 0x1cf4 +#define MGA_FCOL 0x1c24 +#define MGA_FIFOSTATUS 0x1e10 +#define MGA_FOGCOL 0x1cf4 #define MGA_FXBNDRY 0x1c84 -#define MGA_FXLEFT 0x1ca8 +#define MGA_FXLEFT 0x1ca8 #define MGA_FXRIGHT 0x1cac -#define MGA_ICLEAR 0x1e18 +#define MGA_ICLEAR 0x1e18 # define MGA_SOFTRAPICLR (1 << 0) # define MGA_VLINEICLR (1 << 5) -#define MGA_IEN 0x1e1c +#define MGA_IEN 0x1e1c # define MGA_SOFTRAPIEN (1 << 0) # define MGA_VLINEIEN (1 << 5) -#define MGA_LEN 0x1c5c +#define MGA_LEN 0x1c5c #define MGA_MACCESS 0x1c04 -#define MGA_PITCH 0x1c8c -#define MGA_PLNWT 0x1c1c -#define MGA_PRIMADDRESS 0x1e58 +#define MGA_PITCH 0x1c8c +#define MGA_PLNWT 0x1c1c +#define MGA_PRIMADDRESS 0x1e58 # define MGA_DMA_GENERAL (0 << 0) # define MGA_DMA_BLIT (1 << 0) # define MGA_DMA_VECTOR (2 << 0) @@ -487,43 +490,43 @@ # define MGA_PRIMPTREN0 (1 << 0) # define MGA_PRIMPTREN1 (1 << 1) -#define MGA_RST 0x1e40 +#define MGA_RST 0x1e40 # define MGA_SOFTRESET (1 << 0) # define MGA_SOFTEXTRST (1 << 1) -#define MGA_SECADDRESS 0x2c40 -#define MGA_SECEND 0x2c44 -#define MGA_SETUPADDRESS 0x2cd0 -#define MGA_SETUPEND 0x2cd4 +#define MGA_SECADDRESS 0x2c40 +#define MGA_SECEND 0x2c44 +#define MGA_SETUPADDRESS 0x2cd0 +#define MGA_SETUPEND 0x2cd4 #define MGA_SGN 0x1c58 #define MGA_SOFTRAP 0x2c48 -#define MGA_SRCORG 0x2cb4 +#define MGA_SRCORG 0x2cb4 # define MGA_SRMMAP_MASK (1 << 0) # define MGA_SRCMAP_FB (0 << 0) # define MGA_SRCMAP_SYSMEM (1 << 0) # define MGA_SRCACC_MASK (1 << 1) # define MGA_SRCACC_PCI (0 << 1) # define MGA_SRCACC_AGP (1 << 1) -#define MGA_STATUS 0x1e14 +#define MGA_STATUS 0x1e14 # define MGA_SOFTRAPEN (1 << 0) # define MGA_VSYNCPEN (1 << 4) # define MGA_VLINEPEN (1 << 5) # define MGA_DWGENGSTS (1 << 16) # define MGA_ENDPRDMASTS (1 << 17) #define MGA_STENCIL 0x2cc8 -#define MGA_STENCILCTL 0x2ccc +#define MGA_STENCILCTL 0x2ccc -#define MGA_TDUALSTAGE0 0x2cf8 -#define MGA_TDUALSTAGE1 0x2cfc -#define MGA_TEXBORDERCOL 0x2c5c -#define MGA_TEXCTL 0x2c30 +#define MGA_TDUALSTAGE0 0x2cf8 +#define MGA_TDUALSTAGE1 0x2cfc +#define MGA_TEXBORDERCOL 0x2c5c +#define MGA_TEXCTL 0x2c30 #define MGA_TEXCTL2 0x2c3c # define MGA_DUALTEX (1 << 7) # define MGA_G400_TC2_MAGIC (1 << 15) # define MGA_MAP1_ENABLE (1 << 31) -#define MGA_TEXFILTER 0x2c58 -#define MGA_TEXHEIGHT 0x2c2c -#define MGA_TEXORG 0x2c24 +#define MGA_TEXFILTER 0x2c58 +#define MGA_TEXHEIGHT 0x2c2c +#define MGA_TEXORG 0x2c24 # define MGA_TEXORGMAP_MASK (1 << 0) # define MGA_TEXORGMAP_FB (0 << 0) # define MGA_TEXORGMAP_SYSMEM (1 << 0) @@ -534,45 +537,45 @@ #define MGA_TEXORG2 0x2ca8 #define MGA_TEXORG3 0x2cac #define MGA_TEXORG4 0x2cb0 -#define MGA_TEXTRANS 0x2c34 -#define MGA_TEXTRANSHIGH 0x2c38 -#define MGA_TEXWIDTH 0x2c28 - -#define MGA_WACCEPTSEQ 0x1dd4 -#define MGA_WCODEADDR 0x1e6c -#define MGA_WFLAG 0x1dc4 -#define MGA_WFLAG1 0x1de0 +#define MGA_TEXTRANS 0x2c34 +#define MGA_TEXTRANSHIGH 0x2c38 +#define MGA_TEXWIDTH 0x2c28 + +#define MGA_WACCEPTSEQ 0x1dd4 +#define MGA_WCODEADDR 0x1e6c +#define MGA_WFLAG 0x1dc4 +#define MGA_WFLAG1 0x1de0 #define MGA_WFLAGNB 0x1e64 -#define MGA_WFLAGNB1 0x1e08 +#define MGA_WFLAGNB1 0x1e08 #define MGA_WGETMSB 0x1dc8 -#define MGA_WIADDR 0x1dc0 +#define MGA_WIADDR 0x1dc0 #define MGA_WIADDR2 0x1dd8 # define MGA_WMODE_SUSPEND (0 << 0) # define MGA_WMODE_RESUME (1 << 0) # define MGA_WMODE_JUMP (2 << 0) # define MGA_WMODE_START (3 << 0) # define MGA_WAGP_ENABLE (1 << 2) -#define MGA_WMISC 0x1e70 +#define MGA_WMISC 0x1e70 # define MGA_WUCODECACHE_ENABLE (1 << 0) # define MGA_WMASTER_ENABLE (1 << 1) # define MGA_WCACHEFLUSH_ENABLE (1 << 3) #define MGA_WVRTXSZ 0x1dcc -#define MGA_YBOT 0x1c9c -#define MGA_YDST 0x1c90 +#define MGA_YBOT 0x1c9c +#define MGA_YDST 0x1c90 #define MGA_YDSTLEN 0x1c88 #define MGA_YDSTORG 0x1c94 -#define MGA_YTOP 0x1c98 +#define MGA_YTOP 0x1c98 -#define MGA_ZORG 0x1c0c +#define MGA_ZORG 0x1c0c /* This finishes the current batch of commands */ -#define MGA_EXEC 0x0100 +#define MGA_EXEC 0x0100 /* AGP PLL encoding (for G200 only). */ -#define MGA_AGP_PLL 0x1e4c +#define MGA_AGP_PLL 0x1e4c # define MGA_AGP2XPLL_DISABLE (0 << 0) # define MGA_AGP2XPLL_ENABLE (1 << 0) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mga_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mga_irq.c --- libdrm-2.3.0.16/shared-core/mga_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mga_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -36,6 +36,20 @@ #include "mga_drm.h" #include "mga_drv.h" +u32 mga_get_vblank_counter(struct drm_device *dev, int crtc) +{ + const drm_mga_private_t *const dev_priv = + (drm_mga_private_t *) dev->dev_private; + + if (crtc != 0) { + return 0; + } + + + return atomic_read(&dev_priv->vbl_received); +} + + irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS) { struct drm_device *dev = (struct drm_device *) arg; @@ -48,16 +62,15 @@ /* VBLANK interrupt */ if (status & MGA_VLINEPEN) { MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR); - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - drm_vbl_send_signals(dev); + atomic_inc(&dev_priv->vbl_received); + drm_handle_vblank(dev, 0); handled = 1; } /* SOFTRAP interrupt */ if (status & MGA_SOFTRAPEN) { const u32 prim_start = MGA_READ(MGA_PRIMADDRESS); - const u32 prim_end = MGA_READ(MGA_PRIMEND); + const u32 prim_end = MGA_READ(MGA_PRIMEND); MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR); @@ -65,7 +78,7 @@ /* In addition to clearing the interrupt-pending bit, we * have to write to MGA_PRIMEND to re-start the DMA operation. */ - if ( (prim_start & ~0x03) != (prim_end & ~0x03) ) { + if ((prim_start & ~0x03) != (prim_end & ~0x03)) { MGA_WRITE(MGA_PRIMEND, prim_end); } @@ -74,28 +87,39 @@ handled = 1; } - if ( handled ) { + if (handled) return IRQ_HANDLED; - } return IRQ_NONE; } -int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence) +int mga_enable_vblank(struct drm_device *dev, int crtc) { - unsigned int cur_vblank; - int ret = 0; + drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(&dev->vbl_received)) - - *sequence) <= (1 << 23))); + if (crtc != 0) { + DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", + crtc); + return 0; + } - *sequence = cur_vblank; + MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); + return 0; +} - return ret; + +void mga_disable_vblank(struct drm_device *dev, int crtc) +{ + if (crtc != 0) { + DRM_ERROR("tried to disable vblank on non-existent crtc %d\n", + crtc); + } + + /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have + * a nice hardware counter that tracks the number of refreshes when + * the interrupt is disabled, and the kernel doesn't know the refresh + * rate to calculate an estimate. + */ + /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */ } int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence) @@ -127,14 +151,22 @@ MGA_WRITE(MGA_ICLEAR, ~0); } -void mga_driver_irq_postinstall(struct drm_device * dev) +int mga_driver_irq_postinstall(struct drm_device * dev) { drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; + int ret; - DRM_INIT_WAITQUEUE( &dev_priv->fence_queue ); + ret = drm_vblank_init(dev, 1); + if (ret) + return ret; - /* Turn on vertical blank interrupt and soft trap interrupt. */ - MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); + DRM_INIT_WAITQUEUE(&dev_priv->fence_queue); + + /* Turn on soft trap interrupt. Vertical blank interrupts are enabled + * in mga_enable_vblank. + */ + MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN); + return 0; } void mga_driver_irq_uninstall(struct drm_device * dev) @@ -145,6 +177,6 @@ /* Disable *all* interrupts */ MGA_WRITE(MGA_IEN, 0); - + dev->irq_enabled = 0; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/mga_state.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/mga_state.c --- libdrm-2.3.0.16/shared-core/mga_state.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/mga_state.c 2009-04-20 07:00:29.000000000 +0100 @@ -62,8 +62,7 @@ } DMA_BLOCK(MGA_DMAPAD, 0x00000000, MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1, - MGA_YTOP, box->y1 * pitch, - MGA_YBOT, (box->y2 - 1) * pitch); + MGA_YTOP, box->y1 * pitch, MGA_YBOT, (box->y2 - 1) * pitch); ADVANCE_DMA(); } @@ -78,18 +77,15 @@ DMA_BLOCK(MGA_DSTORG, ctx->dstorg, MGA_MACCESS, ctx->maccess, - MGA_PLNWT, ctx->plnwt, - MGA_DWGCTL, ctx->dwgctl); + MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl); DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl, MGA_FOGCOL, ctx->fogcolor, - MGA_WFLAG, ctx->wflag, - MGA_ZORG, dev_priv->depth_offset); + MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset); DMA_BLOCK(MGA_FCOL, ctx->fcol, MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000, - MGA_DMAPAD, 0x00000000); + MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000); ADVANCE_DMA(); } @@ -162,8 +158,8 @@ drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; DMA_LOCALS; -/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ +/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */ +/* tex->texctl, tex->texctl2); */ BEGIN_DMA(6); @@ -206,8 +202,8 @@ drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; DMA_LOCALS; -/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */ -/* tex->texctl, tex->texctl2); */ +/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */ +/* tex->texctl, tex->texctl2); */ BEGIN_DMA(5); @@ -276,7 +272,7 @@ unsigned int pipe = sarea_priv->warp_pipe; DMA_LOCALS; -/* printk("mga_g400_emit_pipe %x\n", pipe); */ +/* printk("mga_g400_emit_pipe %x\n", pipe); */ BEGIN_DMA(10); @@ -648,7 +644,7 @@ FLUSH_DMA(); - DRM_DEBUG("%s... done.\n", __FUNCTION__); + DRM_DEBUG("... done.\n"); } static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) @@ -660,7 +656,7 @@ u32 length = (u32) buf->used; int i = 0; DMA_LOCALS; - DRM_DEBUG("vertex: buf=%d used=%d\n", buf->idx, buf->used); + DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used); if (buf->used) { buf_priv->dispatched = 1; @@ -707,7 +703,7 @@ u32 address = (u32) buf->bus_address; int i = 0; DMA_LOCALS; - DRM_DEBUG("indices: buf=%d start=%d end=%d\n", buf->idx, start, end); + DRM_DEBUG("buf=%d start=%d end=%d\n", buf->idx, start, end); if (start != end) { buf_priv->dispatched = 1; @@ -992,7 +988,7 @@ #if 0 if (mga_do_wait_for_idle(dev_priv) < 0) { if (MGA_DMA_DEBUG) - DRM_INFO("%s: -EBUSY\n", __FUNCTION__); + DRM_INFO("-EBUSY\n"); return -EBUSY; } #endif @@ -1051,7 +1047,7 @@ int value; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -1083,7 +1079,7 @@ DMA_LOCALS; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -1112,7 +1108,7 @@ u32 *fence = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_dma.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_dma.c --- libdrm-2.3.0.16/shared-core/nouveau_dma.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_dma.c 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,172 @@ +/* + * Copyright (C) 2007 Ben Skeggs. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "drmP.h" +#include "drm.h" +#include "nouveau_drv.h" +#include "nouveau_dma.h" + +int +nouveau_dma_channel_init(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_drm_channel *dchan = &dev_priv->channel; + struct nouveau_gpuobj *gpuobj = NULL; + struct mem_block *pushbuf; + int grclass, ret, i; + + DRM_DEBUG("\n"); + + pushbuf = nouveau_mem_alloc(dev, 0, 0x8000, + NOUVEAU_MEM_FB | NOUVEAU_MEM_MAPPED, + (struct drm_file *)-2); + if (!pushbuf) { + DRM_ERROR("Failed to allocate DMA push buffer\n"); + return -ENOMEM; + } + + /* Allocate channel */ + ret = nouveau_fifo_alloc(dev, &dchan->chan, (struct drm_file *)-2, + pushbuf, NvDmaFB, NvDmaTT); + if (ret) { + DRM_ERROR("Error allocating GPU channel: %d\n", ret); + return ret; + } + DRM_DEBUG("Using FIFO channel %d\n", dchan->chan->id); + + /* Map push buffer */ + drm_core_ioremap(dchan->chan->pushbuf_mem->map, dev); + if (!dchan->chan->pushbuf_mem->map->handle) { + DRM_ERROR("Failed to ioremap push buffer\n"); + return -EINVAL; + } + dchan->pushbuf = (void*)dchan->chan->pushbuf_mem->map->handle; + + /* Initialise DMA vars */ + dchan->max = (dchan->chan->pushbuf_mem->size >> 2) - 2; + dchan->put = dchan->chan->pushbuf_base >> 2; + dchan->cur = dchan->put; + dchan->free = dchan->max - dchan->cur; + + /* Insert NOPS for NOUVEAU_DMA_SKIPS */ + dchan->free -= NOUVEAU_DMA_SKIPS; + dchan->push_free = NOUVEAU_DMA_SKIPS; + for (i=0; i < NOUVEAU_DMA_SKIPS; i++) + OUT_RING(0); + + /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier */ + if ((ret = nouveau_notifier_alloc(dchan->chan, NvNotify0, 1, + &dchan->notify0_offset))) { + DRM_ERROR("Error allocating NvNotify0: %d\n", ret); + return ret; + } + + /* We use NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */ + if (dev_priv->card_type < NV_50) grclass = NV_MEMORY_TO_MEMORY_FORMAT; + else grclass = NV50_MEMORY_TO_MEMORY_FORMAT; + if ((ret = nouveau_gpuobj_gr_new(dchan->chan, grclass, &gpuobj))) { + DRM_ERROR("Error creating NvM2MF: %d\n", ret); + return ret; + } + + if ((ret = nouveau_gpuobj_ref_add(dev, dchan->chan, NvM2MF, + gpuobj, NULL))) { + DRM_ERROR("Error referencing NvM2MF: %d\n", ret); + return ret; + } + dchan->m2mf_dma_source = NvDmaFB; + dchan->m2mf_dma_destin = NvDmaFB; + + BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1); + OUT_RING (NvM2MF); + BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_NOTIFY, 1); + OUT_RING (NvNotify0); + BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE, 2); + OUT_RING (dchan->m2mf_dma_source); + OUT_RING (dchan->m2mf_dma_destin); + FIRE_RING(); + + return 0; +} + +void +nouveau_dma_channel_takedown(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_drm_channel *dchan = &dev_priv->channel; + + DRM_DEBUG("\n"); + + if (dchan->chan) { + nouveau_fifo_free(dchan->chan); + dchan->chan = NULL; + } +} + +#define READ_GET() ((NV_READ(dchan->chan->get) - \ + dchan->chan->pushbuf_base) >> 2) +#define WRITE_PUT(val) do { \ + NV_WRITE(dchan->chan->put, \ + ((val) << 2) + dchan->chan->pushbuf_base); \ +} while(0) + +int +nouveau_dma_wait(struct drm_device *dev, int size) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_drm_channel *dchan = &dev_priv->channel; + uint32_t get; + + while (dchan->free < size) { + get = READ_GET(); + + if (dchan->put >= get) { + dchan->free = dchan->max - dchan->cur; + + if (dchan->free < size) { + dchan->push_free = 1; + OUT_RING(0x20000000|dchan->chan->pushbuf_base); + if (get <= NOUVEAU_DMA_SKIPS) { + /*corner case - will be idle*/ + if (dchan->put <= NOUVEAU_DMA_SKIPS) + WRITE_PUT(NOUVEAU_DMA_SKIPS + 1); + + do { + get = READ_GET(); + } while (get <= NOUVEAU_DMA_SKIPS); + } + + WRITE_PUT(NOUVEAU_DMA_SKIPS); + dchan->cur = dchan->put = NOUVEAU_DMA_SKIPS; + dchan->free = get - (NOUVEAU_DMA_SKIPS + 1); + } + } else { + dchan->free = get - dchan->cur - 1; + } + } + + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_dma.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_dma.h --- libdrm-2.3.0.16/shared-core/nouveau_dma.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_dma.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2007 Ben Skeggs. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __NOUVEAU_DMA_H__ +#define __NOUVEAU_DMA_H__ + +typedef enum { + NvSubM2MF = 0, +} nouveau_subchannel_id_t; + +typedef enum { + NvM2MF = 0x80039001, + NvDmaFB = 0x8003d001, + NvDmaTT = 0x8003d002, + NvNotify0 = 0x8003d003 +} nouveau_object_handle_t; + +#define NV_MEMORY_TO_MEMORY_FORMAT 0x00000039 +#define NV_MEMORY_TO_MEMORY_FORMAT_NAME 0x00000000 +#define NV_MEMORY_TO_MEMORY_FORMAT_SET_REF 0x00000050 +#define NV_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100 +#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 +#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE 0x00000000 +#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN 0x00000001 +#define NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_NOTIFY 0x00000180 +#define NV_MEMORY_TO_MEMORY_FORMAT_SET_DMA_SOURCE 0x00000184 +#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c + +#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039 +#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK200 0x00000200 +#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK21C 0x0000021c +#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238 +#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c + +#define BEGIN_RING(subc, mthd, cnt) do { \ + int push_size = (cnt) + 1; \ + if (dchan->push_free) { \ + DRM_ERROR("prior packet incomplete: %d\n", dchan->push_free); \ + break; \ + } \ + if (dchan->free < push_size) { \ + if (nouveau_dma_wait(dev, push_size)) { \ + DRM_ERROR("FIFO timeout\n"); \ + break; \ + } \ + } \ + dchan->free -= push_size; \ + dchan->push_free = push_size; \ + OUT_RING(((cnt)<<18) | ((subc)<<15) | mthd); \ +} while(0) + +#define OUT_RING(data) do { \ + if (dchan->push_free == 0) { \ + DRM_ERROR("no space left in packet\n"); \ + break; \ + } \ + dchan->pushbuf[dchan->cur++] = (data); \ + dchan->push_free--; \ +} while(0) + +#define FIRE_RING() do { \ + if (dchan->push_free) { \ + DRM_ERROR("packet incomplete: %d\n", dchan->push_free); \ + break; \ + } \ + if (dchan->cur != dchan->put) { \ + DRM_MEMORYBARRIER(); \ + dchan->put = dchan->cur; \ + NV_WRITE(dchan->chan->put, dchan->put << 2); \ + } \ +} while(0) + +#endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_drm.h --- libdrm-2.3.0.16/shared-core/nouveau_drm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_drm.h 2009-04-20 07:00:29.000000000 +0100 @@ -70,6 +70,12 @@ uint32_t handle; }; +/* This is needed to avoid a race condition. + * Otherwise you may be writing in the fetch area. + * Is this large enough, as it's only 32 bytes, and the maximum fetch size is 256 bytes? + */ +#define NOUVEAU_DMA_SKIPS 8 + #define NOUVEAU_MEM_FB 0x00000001 #define NOUVEAU_MEM_AGP 0x00000002 #define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004 @@ -81,6 +87,10 @@ #define NOUVEAU_MEM_MAPPED 0x00000100 #define NOUVEAU_MEM_INSTANCE 0x00000200 /* internal */ #define NOUVEAU_MEM_NOTIFIER 0x00000400 /* internal */ +#define NOUVEAU_MEM_NOVM 0x00000800 /* internal */ +#define NOUVEAU_MEM_INTERNAL (NOUVEAU_MEM_INSTANCE | \ + NOUVEAU_MEM_NOTIFIER | \ + NOUVEAU_MEM_NOVM) struct drm_nouveau_mem_alloc { int flags; @@ -123,12 +133,9 @@ NV_05 =5, NV_10 =10, NV_11 =11, - NV_15 =11, NV_17 =17, NV_20 =20, - NV_25 =20, NV_30 =30, - NV_34 =30, NV_40 =40, NV_44 =44, NV_50 =50, @@ -161,4 +168,3 @@ #define DRM_NOUVEAU_MEM_FREE 0x09 #endif /* __NOUVEAU_DRM_H__ */ - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_drv.h --- libdrm-2.3.0.16/shared-core/nouveau_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -59,7 +59,7 @@ }; #define NVOBJ_ENGINE_SW 0 -#define NVOBJ_ENGINE_GR 1 +#define NVOBJ_ENGINE_GR 1 #define NVOBJ_ENGINE_INT 0xdeadbeef #define NVOBJ_FLAG_ALLOW_NO_REFS (1 << 0) @@ -106,11 +106,20 @@ /* mapping of the regs controling the fifo */ drm_local_map_t *regs; + /* Fencing */ + uint32_t next_sequence; + /* DMA push buffer */ struct nouveau_gpuobj_ref *pushbuf; struct mem_block *pushbuf_mem; uint32_t pushbuf_base; + /* FIFO user control regs */ + uint32_t user, user_size; + uint32_t put; + uint32_t get; + uint32_t ref_cnt; + /* Notifier memory */ struct mem_block *notifier_block; struct mem_block *notifier_heap; @@ -120,12 +129,14 @@ struct nouveau_gpuobj_ref *ramfc; /* PGRAPH context */ + /* XXX may be merge 2 pointers as private data ??? */ struct nouveau_gpuobj_ref *ramin_grctx; - uint32_t pgraph_ctx [340]; /* XXX dynamic alloc ? */ + void *pgraph_ctx; /* NV50 VM */ struct nouveau_gpuobj *vm_pd; struct nouveau_gpuobj_ref *vm_gart_pt; + struct nouveau_gpuobj_ref *vm_vram_pt; /* Objects */ struct nouveau_gpuobj_ref *ramin; /* Private instmem */ @@ -189,9 +200,13 @@ struct nouveau_fifo_engine { void *priv; + int channels; + int (*init)(struct drm_device *); void (*takedown)(struct drm_device *); + int (*channel_id)(struct drm_device *); + int (*create_context)(struct nouveau_channel *); void (*destroy_context)(struct nouveau_channel *); int (*load_context)(struct nouveau_channel *); @@ -217,6 +232,7 @@ struct nouveau_fifo_engine fifo; }; +#define NOUVEAU_MAX_CHANNEL_NR 128 struct drm_nouveau_private { enum { NOUVEAU_CARD_INIT_DOWN, @@ -224,6 +240,8 @@ NOUVEAU_CARD_INIT_FAILED } init_state; + int ttm; + /* the card type, takes NV_* as values */ int card_type; /* exact chipset, derived from NV_PMC_BOOT_0 */ @@ -235,7 +253,7 @@ drm_local_map_t *ramin; /* NV40 onwards */ int fifo_alloc_count; - struct nouveau_channel *fifos[NV_MAX_FIFO_NUMBER]; + struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; struct nouveau_engine Engine; struct nouveau_drm_channel channel; @@ -273,6 +291,9 @@ unsigned long sg_handle; } gart_info; + /* G8x global VRAM page table */ + struct nouveau_gpuobj *vm_vram_pt; + /* the mtrr covering the FB */ int fb_mtrr; @@ -343,6 +364,7 @@ int flags, struct drm_file *); extern void nouveau_mem_free(struct drm_device *dev, struct mem_block*); extern int nouveau_mem_init(struct drm_device *); +extern int nouveau_mem_init_ttm(struct drm_device *); extern void nouveau_mem_close(struct drm_device *); /* nouveau_notifier.c */ @@ -357,7 +379,6 @@ /* nouveau_fifo.c */ extern int nouveau_fifo_init(struct drm_device *); -extern int nouveau_fifo_number(struct drm_device *); extern int nouveau_fifo_ctx_size(struct drm_device *); extern void nouveau_fifo_cleanup(struct drm_device *, struct drm_file *); extern int nouveau_fifo_owner(struct drm_device *, struct drm_file *, @@ -415,7 +436,7 @@ /* nouveau_irq.c */ extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS); extern void nouveau_irq_preinstall(struct drm_device *); -extern void nouveau_irq_postinstall(struct drm_device *); +extern int nouveau_irq_postinstall(struct drm_device *); extern void nouveau_irq_uninstall(struct drm_device *); /* nouveau_sgdma.c */ @@ -445,12 +466,14 @@ extern void nv40_fb_takedown(struct drm_device *); /* nv04_fifo.c */ +extern int nv04_fifo_channel_id(struct drm_device *); extern int nv04_fifo_create_context(struct nouveau_channel *); extern void nv04_fifo_destroy_context(struct nouveau_channel *); extern int nv04_fifo_load_context(struct nouveau_channel *); extern int nv04_fifo_save_context(struct nouveau_channel *); /* nv10_fifo.c */ +extern int nv10_fifo_channel_id(struct drm_device *); extern int nv10_fifo_create_context(struct nouveau_channel *); extern void nv10_fifo_destroy_context(struct nouveau_channel *); extern int nv10_fifo_load_context(struct nouveau_channel *); @@ -466,6 +489,7 @@ /* nv50_fifo.c */ extern int nv50_fifo_init(struct drm_device *); extern void nv50_fifo_takedown(struct drm_device *); +extern int nv50_fifo_channel_id(struct drm_device *); extern int nv50_fifo_create_context(struct nouveau_channel *); extern void nv50_fifo_destroy_context(struct nouveau_channel *); extern int nv50_fifo_load_context(struct nouveau_channel *); @@ -490,21 +514,13 @@ extern int nv10_graph_save_context(struct nouveau_channel *); /* nv20_graph.c */ -extern void nouveau_nv20_context_switch(struct drm_device *); -extern int nv20_graph_init(struct drm_device *); -extern void nv20_graph_takedown(struct drm_device *); extern int nv20_graph_create_context(struct nouveau_channel *); extern void nv20_graph_destroy_context(struct nouveau_channel *); extern int nv20_graph_load_context(struct nouveau_channel *); extern int nv20_graph_save_context(struct nouveau_channel *); - -/* nv30_graph.c */ +extern int nv20_graph_init(struct drm_device *); +extern void nv20_graph_takedown(struct drm_device *); extern int nv30_graph_init(struct drm_device *); -extern void nv30_graph_takedown(struct drm_device *); -extern int nv30_graph_create_context(struct nouveau_channel *); -extern void nv30_graph_destroy_context(struct nouveau_channel *); -extern int nv30_graph_load_context(struct nouveau_channel *); -extern int nv30_graph_save_context(struct nouveau_channel *); /* nv40_graph.c */ extern int nv40_graph_init(struct drm_device *); @@ -560,6 +576,13 @@ extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg); +/* nouveau_buffer.c */ +extern struct drm_bo_driver nouveau_bo_driver; + +/* nouveau_fence.c */ +extern struct drm_fence_driver nouveau_fence_driver; +extern void nouveau_fence_handler(struct drm_device *dev, int channel); + #if defined(__powerpc__) #define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) ) #define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) ) @@ -581,4 +604,3 @@ #define INSTANCE_WR(o,i,v) NV_WI32((o)->im_pramin->start + ((i)<<2), (v)) #endif /* __NOUVEAU_DRV_H__ */ - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_fifo.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_fifo.c --- libdrm-2.3.0.16/shared-core/nouveau_fifo.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_fifo.c 2009-04-20 07:00:29.000000000 +0100 @@ -1,4 +1,4 @@ -/* +/* * Copyright 2005-2006 Stephane Marchesin * All Rights Reserved. * @@ -28,22 +28,6 @@ #include "nouveau_drm.h" -/* returns the number of hw fifos */ -int nouveau_fifo_number(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv=dev->dev_private; - switch(dev_priv->card_type) - { - case NV_04: - case NV_05: - return 16; - case NV_50: - return 128; - default: - return 32; - } -} - /* returns the size of fifo context */ int nouveau_fifo_ctx_size(struct drm_device *dev) { @@ -61,17 +45,12 @@ * functions doing the actual work ***********************************/ -/* voir nv_xaa.c : NVResetGraphics - * mémoire mappée par nv_driver.c : NVMapMem - * voir nv_driver.c : NVPreInit - */ - static int nouveau_fifo_instmem_configure(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; NV_WRITE(NV03_PFIFO_RAMHT, - (0x03 << 24) /* search 128 */ | + (0x03 << 24) /* search 128 */ | ((dev_priv->ramht_bits - 9) << 16) | (dev_priv->ramht_offset >> 8) ); @@ -80,7 +59,6 @@ switch(dev_priv->card_type) { - case NV_50: case NV_40: switch (dev_priv->chipset) { case 0x47: @@ -166,7 +144,7 @@ NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4 | #ifdef __BIG_ENDIAN NV_PFIFO_CACHE1_BIG_ENDIAN | -#endif +#endif 0x00000000); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, 0x00000001); @@ -282,18 +260,19 @@ /* * Alright, here is the full story - * Nvidia cards have multiple hw fifo contexts (praise them for that, + * Nvidia cards have multiple hw fifo contexts (praise them for that, * no complicated crash-prone context switches) - * We allocate a new context for each app and let it write to it directly + * We allocate a new context for each app and let it write to it directly * (woo, full userspace command submission !) * When there are no more contexts, you lost */ - for(channel=0; channelfifo.channels; channel++) { if (dev_priv->fifos[channel] == NULL) break; } + /* no more fifos. you lost. */ - if (channel==nouveau_fifo_number(dev)) + if (channel == engine->fifo.channels) return -EINVAL; dev_priv->fifos[channel] = drm_calloc(1, sizeof(struct nouveau_channel), @@ -309,6 +288,28 @@ DRM_INFO("Allocating FIFO number %d\n", channel); + /* Locate channel's user control regs */ + if (dev_priv->card_type < NV_40) { + chan->user = NV03_USER(channel); + chan->user_size = NV03_USER_SIZE; + chan->put = NV03_USER_DMA_PUT(channel); + chan->get = NV03_USER_DMA_GET(channel); + chan->ref_cnt = NV03_USER_REF_CNT(channel); + } else + if (dev_priv->card_type < NV_50) { + chan->user = NV40_USER(channel); + chan->user_size = NV40_USER_SIZE; + chan->put = NV40_USER_DMA_PUT(channel); + chan->get = NV40_USER_DMA_GET(channel); + chan->ref_cnt = NV40_USER_REF_CNT(channel); + } else { + chan->user = NV50_USER(channel); + chan->user_size = NV50_USER_SIZE; + chan->put = NV50_USER_DMA_PUT(channel); + chan->get = NV50_USER_DMA_GET(channel); + chan->ref_cnt = NV50_USER_REF_CNT(channel); + } + /* Allocate space for per-channel fixed notifier memory */ ret = nouveau_notifier_init_channel(chan); if (ret) { @@ -352,14 +353,11 @@ return ret; } - /* setup channel's default get/put values */ - if (dev_priv->card_type < NV_50) { - NV_WRITE(NV03_FIFO_REGS_DMAPUT(channel), chan->pushbuf_base); - NV_WRITE(NV03_FIFO_REGS_DMAGET(channel), chan->pushbuf_base); - } else { - NV_WRITE(NV50_FIFO_REGS_DMAPUT(channel), chan->pushbuf_base); - NV_WRITE(NV50_FIFO_REGS_DMAGET(channel), chan->pushbuf_base); - } + /* setup channel's default get/put values + * XXX: quite possibly extremely pointless.. + */ + NV_WRITE(chan->get, chan->pushbuf_base); + NV_WRITE(chan->put, chan->pushbuf_base); /* If this is the first channel, setup PFIFO ourselves. For any * other case, the GPU will handle this when it switches contexts. @@ -392,17 +390,63 @@ return 0; } +static int +nouveau_channel_idle(struct nouveau_channel *chan) +{ + struct drm_device *dev = chan->dev; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; + uint32_t caches; + int idle; + + caches = NV_READ(NV03_PFIFO_CACHES); + NV_WRITE(NV03_PFIFO_CACHES, caches & ~1); + + if (engine->fifo.channel_id(dev) != chan->id) { + struct nouveau_gpuobj *ramfc = chan->ramfc->gpuobj; + + if (INSTANCE_RD(ramfc, 0) != INSTANCE_RD(ramfc, 1)) + idle = 0; + else + idle = 1; + } else { + idle = (NV_READ(NV04_PFIFO_CACHE1_DMA_GET) == + NV_READ(NV04_PFIFO_CACHE1_DMA_PUT)); + } + + NV_WRITE(NV03_PFIFO_CACHES, caches); + return idle; +} + /* stops a fifo */ void nouveau_fifo_free(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; struct nouveau_engine *engine = &dev_priv->Engine; + uint64_t t_start; DRM_INFO("%s: freeing fifo %d\n", __func__, chan->id); + /* Give the channel a chance to idle, wait 2s (hopefully) */ + t_start = engine->timer.read(dev); + while (!nouveau_channel_idle(chan)) { + if (engine->timer.read(dev) - t_start > 2000000000ULL) { + DRM_ERROR("Failed to idle channel %d before destroy." + "Prepare for strangeness..\n", chan->id); + break; + } + } + + /*XXX: Maybe should wait for PGRAPH to finish with the stuff it fetched + * from CACHE1 too? + */ + /* disable the fifo caches */ NV_WRITE(NV03_PFIFO_CACHES, 0x00000000); + NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH)&(~0x1)); + NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000); + NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000); // FIXME XXX needs more code @@ -412,6 +456,10 @@ engine->graph.destroy_context(chan); /* reenable the fifo caches */ + NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, + NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH) | 1); + NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000001); + NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000001); NV_WRITE(NV03_PFIFO_CACHES, 0x00000001); /* Deallocate push buffer */ @@ -435,10 +483,11 @@ void nouveau_fifo_cleanup(struct drm_device *dev, struct drm_file *file_priv) { struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; int i; DRM_DEBUG("clearing FIFO enables from file_priv\n"); - for(i = 0; i < nouveau_fifo_number(dev); i++) { + for(i = 0; i < engine->fifo.channels; i++) { struct nouveau_channel *chan = dev_priv->fifos[i]; if (chan && chan->file_priv == file_priv) @@ -451,8 +500,9 @@ int channel) { struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; - if (channel >= nouveau_fifo_number(dev)) + if (channel >= engine->fifo.channels) return 0; if (dev_priv->fifos[channel] == NULL) return 0; @@ -492,14 +542,8 @@ /* make the fifo available to user space */ /* first, the fifo control regs */ - init->ctrl = dev_priv->mmio->offset; - if (dev_priv->card_type < NV_50) { - init->ctrl += NV03_FIFO_REGS(init->channel); - init->ctrl_size = NV03_FIFO_REGS_SIZE; - } else { - init->ctrl += NV50_FIFO_REGS(init->channel); - init->ctrl_size = NV50_FIFO_REGS_SIZE; - } + init->ctrl = dev_priv->mmio->offset + chan->user; + init->ctrl_size = chan->user_size; res = drm_addmap(dev, init->ctrl, init->ctrl_size, _DRM_REGISTERS, 0, &chan->regs); if (res != 0) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_irq.c --- libdrm-2.3.0.16/shared-core/nouveau_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -35,8 +35,10 @@ #include "nouveau_drm.h" #include "nouveau_drv.h" #include "nouveau_reg.h" +#include "nouveau_swmthd.h" -void nouveau_irq_preinstall(struct drm_device *dev) +void +nouveau_irq_preinstall(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -44,15 +46,19 @@ NV_WRITE(NV03_PMC_INTR_EN_0, 0); } -void nouveau_irq_postinstall(struct drm_device *dev) +int +nouveau_irq_postinstall(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; /* Master enable */ NV_WRITE(NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE); + + return 0; } -void nouveau_irq_uninstall(struct drm_device *dev) +void +nouveau_irq_uninstall(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -60,125 +66,88 @@ NV_WRITE(NV03_PMC_INTR_EN_0, 0); } -static void nouveau_fifo_irq_handler(struct drm_device *dev) +static void +nouveau_fifo_irq_handler(struct drm_device *dev) { - uint32_t status, chmode, chstat, channel; struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; + uint32_t status, reassign; - status = NV_READ(NV03_PFIFO_INTR_0); - if (!status) - return; - chmode = NV_READ(NV04_PFIFO_MODE); - chstat = NV_READ(NV04_PFIFO_DMA); - channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); - - if (status & NV_PFIFO_INTR_CACHE_ERROR) { - uint32_t c1get, c1method, c1data; - - DRM_ERROR("PFIFO error interrupt\n"); - - c1get = NV_READ(NV03_PFIFO_CACHE1_GET) >> 2; - if (dev_priv->card_type < NV_40) { - /* Untested, so it may not work.. */ - c1method = NV_READ(NV04_PFIFO_CACHE1_METHOD(c1get)); - c1data = NV_READ(NV04_PFIFO_CACHE1_DATA(c1get)); - } else { - c1method = NV_READ(NV40_PFIFO_CACHE1_METHOD(c1get)); - c1data = NV_READ(NV40_PFIFO_CACHE1_DATA(c1get)); - } - - DRM_ERROR("Channel %d/%d - Method 0x%04x, Data 0x%08x\n", - channel, (c1method >> 13) & 7, c1method & 0x1ffc, - c1data); - - status &= ~NV_PFIFO_INTR_CACHE_ERROR; - NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); - } + reassign = NV_READ(NV03_PFIFO_CACHES) & 1; + while ((status = NV_READ(NV03_PFIFO_INTR_0))) { + uint32_t chid, get; + + NV_WRITE(NV03_PFIFO_CACHES, 0); + + chid = engine->fifo.channel_id(dev); + get = NV_READ(NV03_PFIFO_CACHE1_GET); + + if (status & NV_PFIFO_INTR_CACHE_ERROR) { + uint32_t mthd, data; + int ptr; + + ptr = get >> 2; + if (dev_priv->card_type < NV_40) { + mthd = NV_READ(NV04_PFIFO_CACHE1_METHOD(ptr)); + data = NV_READ(NV04_PFIFO_CACHE1_DATA(ptr)); + } else { + mthd = NV_READ(NV40_PFIFO_CACHE1_METHOD(ptr)); + data = NV_READ(NV40_PFIFO_CACHE1_DATA(ptr)); + } - if (status & NV_PFIFO_INTR_DMA_PUSHER) { - DRM_ERROR("PFIFO DMA pusher interrupt: ch%d, 0x%08x\n", - channel, NV_READ(NV04_PFIFO_CACHE1_DMA_GET)); + DRM_INFO("PFIFO_CACHE_ERROR - " + "Ch %d/%d Mthd 0x%04x Data 0x%08x\n", + chid, (mthd >> 13) & 7, mthd & 0x1ffc, data); - status &= ~NV_PFIFO_INTR_DMA_PUSHER; - NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_DMA_PUSHER); + NV_WRITE(NV03_PFIFO_CACHE1_GET, get + 4); + NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 1); - NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, 0x00000000); - if (NV_READ(NV04_PFIFO_CACHE1_DMA_PUT)!=NV_READ(NV04_PFIFO_CACHE1_DMA_GET)) - { - uint32_t getval=NV_READ(NV04_PFIFO_CACHE1_DMA_GET)+4; - NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET,getval); + status &= ~NV_PFIFO_INTR_CACHE_ERROR; + NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); } - } - if (status) { - DRM_ERROR("Unhandled PFIFO interrupt: status=0x%08x\n", status); + if (status & NV_PFIFO_INTR_DMA_PUSHER) { + DRM_INFO("PFIFO_DMA_PUSHER - Ch %d\n", chid); - NV_WRITE(NV03_PFIFO_INTR_0, status); - } + status &= ~NV_PFIFO_INTR_DMA_PUSHER; + NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_DMA_PUSHER); - NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PFIFO_PENDING); -} + NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, 0x00000000); + if (NV_READ(NV04_PFIFO_CACHE1_DMA_PUT) != get) + NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, get + 4); + } -#if 0 -static void nouveau_nv04_context_switch(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t channel,i; - uint32_t max=0; - NV_WRITE(NV04_PGRAPH_FIFO,0x0); - channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); - //DRM_INFO("raw PFIFO_CACH1_PHS1 reg is %x\n",NV_READ(NV03_PFIFO_CACHE1_PUSH1)); - //DRM_INFO("currently on channel %d\n",channel); - for (i=0;ififos[i].used)&&(i!=channel)) { - uint32_t put,get,pending; - //put=NV_READ(dev_priv->ramfc_offset+i*32); - //get=NV_READ(dev_priv->ramfc_offset+4+i*32); - put=NV_READ(NV03_FIFO_REGS_DMAPUT(i)); - get=NV_READ(NV03_FIFO_REGS_DMAGET(i)); - pending=NV_READ(NV04_PFIFO_DMA); - //DRM_INFO("Channel %d (put/get %x/%x)\n",i,put,get); - /* mark all pending channels as such */ - if ((put!=get)&!(pending&(1<cur_fifo=channel; - NV_WRITE(NV04_PFIFO_NEXT_CHANNEL,channel|0x100); -#endif - //NV_WRITE(NV03_PFIFO_CACHE1_PUSH1,max|0x100); - //NV_WRITE(0x2050,max|0x100); + NV_WRITE(NV03_PFIFO_CACHES, reassign); + } - NV_WRITE(NV04_PGRAPH_FIFO,0x1); - + NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PFIFO_PENDING); } -#endif - -struct nouveau_bitfield_names -{ +struct nouveau_bitfield_names { uint32_t mask; const char * name; }; static struct nouveau_bitfield_names nouveau_nstatus_names[] = { - { NV03_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" }, - { NV03_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" }, - { NV03_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" }, - { NV03_PGRAPH_NSTATUS_PROTECTION_FAULT, "PROTECTION_FAULT" } + { NV04_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" }, + { NV04_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" }, + { NV04_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" }, + { NV04_PGRAPH_NSTATUS_PROTECTION_FAULT, "PROTECTION_FAULT" } +}; + +static struct nouveau_bitfield_names nouveau_nstatus_names_nv10[] = +{ + { NV10_PGRAPH_NSTATUS_STATE_IN_USE, "STATE_IN_USE" }, + { NV10_PGRAPH_NSTATUS_INVALID_STATE, "INVALID_STATE" }, + { NV10_PGRAPH_NSTATUS_BAD_ARGUMENT, "BAD_ARGUMENT" }, + { NV10_PGRAPH_NSTATUS_PROTECTION_FAULT, "PROTECTION_FAULT" } }; static struct nouveau_bitfield_names nouveau_nsource_names[] = @@ -222,55 +191,54 @@ } static int -nouveau_graph_trapped_channel(struct drm_device *dev, int *channel_ret) +nouveau_graph_chid_from_grctx(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - int channel; + uint32_t inst; + int i; - if (dev_priv->card_type < NV_10) { - channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0xf; - } else if (dev_priv->card_type < NV_40) { - channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f; - } else - if (dev_priv->card_type < NV_50) { - uint32_t cur_grctx = (NV_READ(0x40032C) & 0xfffff) << 4; + if (dev_priv->card_type < NV_40) + return dev_priv->Engine.fifo.channels; + else + if (dev_priv->card_type < NV_50) + inst = (NV_READ(0x40032c) & 0xfffff) << 4; + else + inst = NV_READ(0x40032c) & 0xfffff; - /* 0x400704 *sometimes* contains a sensible channel ID, but - * mostly not.. for now lookup which channel owns the active - * PGRAPH context. Probably a better way, but this'll do - * for now. - */ - for (channel = 0; channel < 32; channel++) { - if (dev_priv->fifos[channel] == NULL) - continue; - if (cur_grctx == - dev_priv->fifos[channel]->ramin_grctx->instance) - break; - } - if (channel == 32) { - DRM_ERROR("AIII, unable to determine active channel " - "from PGRAPH context 0x%08x\n", cur_grctx); - return -EINVAL; - } - } else { - uint32_t cur_grctx = (NV_READ(0x40032C) & 0xfffff) << 12; + for (i = 0; i < dev_priv->Engine.fifo.channels; i++) { + struct nouveau_channel *chan = dev_priv->fifos[i]; + + if (!chan || !chan->ramin_grctx) + continue; - for (channel = 0; channel < 128; channel++) { - if (dev_priv->fifos[channel] == NULL) - continue; - if (cur_grctx == - dev_priv->fifos[channel]->ramin_grctx->instance) + if (dev_priv->card_type < NV_50) { + if (inst == chan->ramin_grctx->instance) + break; + } else { + if (inst == INSTANCE_RD(chan->ramin_grctx->gpuobj, 0)) break; - } - if (channel == 128) { - DRM_ERROR("AIII, unable to determine active channel " - "from PGRAPH context 0x%08x\n", cur_grctx); - return -EINVAL; } } - if (channel > nouveau_fifo_number(dev) || - dev_priv->fifos[channel] == NULL) { + return i; +} + +static int +nouveau_graph_trapped_channel(struct drm_device *dev, int *channel_ret) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; + int channel; + + if (dev_priv->card_type < NV_10) + channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0xf; + else + if (dev_priv->card_type < NV_40) + channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f; + else + channel = nouveau_graph_chid_from_grctx(dev); + + if (channel >= engine->fifo.channels || !dev_priv->fifos[channel]) { DRM_ERROR("AIII, invalid/inactive channel id %d\n", channel); return -EINVAL; } @@ -279,112 +247,246 @@ return 0; } +struct nouveau_pgraph_trap { + int channel; + int class; + int subc, mthd, size; + uint32_t data, data2; + uint32_t nsource, nstatus; +}; + static void -nouveau_graph_dump_trap_info(struct drm_device *dev) +nouveau_graph_trap_info(struct drm_device *dev, + struct nouveau_pgraph_trap *trap) { struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t address; - uint32_t channel, class; - uint32_t method, subc, data, data2; - uint32_t nsource, nstatus; - if (nouveau_graph_trapped_channel(dev, &channel)) - channel = -1; + trap->nsource = trap->nstatus = 0; + if (dev_priv->card_type < NV_50) { + trap->nsource = NV_READ(NV03_PGRAPH_NSOURCE); + trap->nstatus = NV_READ(NV03_PGRAPH_NSTATUS); + } - data = NV_READ(NV04_PGRAPH_TRAPPED_DATA); + if (nouveau_graph_trapped_channel(dev, &trap->channel)) + trap->channel = -1; address = NV_READ(NV04_PGRAPH_TRAPPED_ADDR); - method = address & 0x1FFC; + + trap->mthd = address & 0x1FFC; + trap->data = NV_READ(NV04_PGRAPH_TRAPPED_DATA); if (dev_priv->card_type < NV_10) { - subc = (address >> 13) & 0x7; - data2= 0; + trap->subc = (address >> 13) & 0x7; } else { - subc = (address >> 16) & 0x7; - data2= NV_READ(NV10_PGRAPH_TRAPPED_DATA_HIGH); + trap->subc = (address >> 16) & 0x7; + trap->data2 = NV_READ(NV10_PGRAPH_TRAPPED_DATA_HIGH); } - nsource = NV_READ(NV03_PGRAPH_NSOURCE); - nstatus = NV_READ(NV03_PGRAPH_NSTATUS); - if (dev_priv->card_type < NV_50) { - class = NV_READ(0x400160 + subc*4) & 0xFFFF; + + if (dev_priv->card_type < NV_10) { + trap->class = NV_READ(0x400180 + trap->subc*4) & 0xFF; + } else if (dev_priv->card_type < NV_40) { + trap->class = NV_READ(0x400160 + trap->subc*4) & 0xFFF; + } else if (dev_priv->card_type < NV_50) { + trap->class = NV_READ(0x400160 + trap->subc*4) & 0xFFFF; } else { - class = NV_READ(0x400814); + trap->class = NV_READ(0x400814); } +} - DRM_ERROR("nSource:"); +static void +nouveau_graph_dump_trap_info(struct drm_device *dev, const char *id, + struct nouveau_pgraph_trap *trap) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t nsource = trap->nsource, nstatus = trap->nstatus; + + DRM_INFO("%s - nSource:", id); nouveau_print_bitfield_names(nsource, nouveau_nsource_names, ARRAY_SIZE(nouveau_nsource_names)); printk(", nStatus:"); - nouveau_print_bitfield_names(nstatus, nouveau_nstatus_names, + if (dev_priv->card_type < NV_10) + nouveau_print_bitfield_names(nstatus, nouveau_nstatus_names, ARRAY_SIZE(nouveau_nstatus_names)); + else + nouveau_print_bitfield_names(nstatus, nouveau_nstatus_names_nv10, + ARRAY_SIZE(nouveau_nstatus_names_nv10)); printk("\n"); - DRM_ERROR("Channel %d/%d (class 0x%04x) - Method 0x%04x, Data 0x%08x:0x%08x\n", - channel, subc, class, method, data2, data); + DRM_INFO("%s - Ch %d/%d Class 0x%04x Mthd 0x%04x Data 0x%08x:0x%08x\n", + id, trap->channel, trap->subc, trap->class, trap->mthd, + trap->data2, trap->data); } -static void nouveau_pgraph_irq_handler(struct drm_device *dev) +static inline void +nouveau_pgraph_intr_notify(struct drm_device *dev, uint32_t nsource) { - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t status, nsource; + struct nouveau_pgraph_trap trap; + int unhandled = 0; - status = NV_READ(NV03_PGRAPH_INTR); - if (!status) - return; - nsource = NV_READ(NV03_PGRAPH_NSOURCE); + nouveau_graph_trap_info(dev, &trap); + + if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) { + /* NV4 (nvidia TNT 1) reports software methods with + * PGRAPH NOTIFY ILLEGAL_MTHD + */ + DRM_DEBUG("Got NV04 software method method %x for class %#x\n", + trap.mthd, trap.class); + + if (nouveau_sw_method_execute(dev, trap.class, trap.mthd)) { + DRM_ERROR("Unable to execute NV04 software method %x " + "for object class %x. Please report.\n", + trap.mthd, trap.class); + unhandled = 1; + } + } else { + unhandled = 1; + } - if (status & NV_PGRAPH_INTR_NOTIFY) { - DRM_DEBUG("PGRAPH notify interrupt\n"); + if (unhandled) + nouveau_graph_dump_trap_info(dev, "PGRAPH_NOTIFY", &trap); +} + +static inline void +nouveau_pgraph_intr_error(struct drm_device *dev, uint32_t nsource) +{ + struct nouveau_pgraph_trap trap; + int unhandled = 0; - nouveau_graph_dump_trap_info(dev); + nouveau_graph_trap_info(dev, &trap); + trap.nsource = nsource; - status &= ~NV_PGRAPH_INTR_NOTIFY; - NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_NOTIFY); + if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) { + if (trap.channel >= 0 && trap.mthd == 0x0150) { + nouveau_fence_handler(dev, trap.channel); + } else + if (nouveau_sw_method_execute(dev, trap.class, trap.mthd)) { + unhandled = 1; + } + } else { + unhandled = 1; } - if (status & NV_PGRAPH_INTR_ERROR) { - DRM_ERROR("PGRAPH error interrupt\n"); + if (unhandled) + nouveau_graph_dump_trap_info(dev, "PGRAPH_ERROR", &trap); +} + +static inline void +nouveau_pgraph_intr_context_switch(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; + uint32_t chid; - nouveau_graph_dump_trap_info(dev); + chid = engine->fifo.channel_id(dev); + DRM_DEBUG("PGRAPH context switch interrupt channel %x\n", chid); - status &= ~NV_PGRAPH_INTR_ERROR; - NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_ERROR); + switch(dev_priv->card_type) { + case NV_04: + case NV_05: + nouveau_nv04_context_switch(dev); + break; + case NV_10: + case NV_11: + case NV_17: + nouveau_nv10_context_switch(dev); + break; + default: + DRM_ERROR("Context switch not implemented\n"); + break; } +} - if (status & NV_PGRAPH_INTR_CONTEXT_SWITCH) { - uint32_t channel=NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); - DRM_DEBUG("PGRAPH context switch interrupt channel %x\n",channel); - switch(dev_priv->card_type) - { - case NV_04: - case NV_05: - nouveau_nv04_context_switch(dev); - break; - case NV_10: - case NV_11: - case NV_17: - nouveau_nv10_context_switch(dev); - break; - case NV_20: - case NV_30: - nouveau_nv20_context_switch(dev); - break; - default: - DRM_ERROR("Context switch not implemented\n"); - break; +static void +nouveau_pgraph_irq_handler(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t status; + + while ((status = NV_READ(NV03_PGRAPH_INTR))) { + uint32_t nsource = NV_READ(NV03_PGRAPH_NSOURCE); + + if (status & NV_PGRAPH_INTR_NOTIFY) { + nouveau_pgraph_intr_notify(dev, nsource); + + status &= ~NV_PGRAPH_INTR_NOTIFY; + NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_NOTIFY); + } + + if (status & NV_PGRAPH_INTR_ERROR) { + nouveau_pgraph_intr_error(dev, nsource); + + status &= ~NV_PGRAPH_INTR_ERROR; + NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_ERROR); + } + + if (status & NV_PGRAPH_INTR_CONTEXT_SWITCH) { + nouveau_pgraph_intr_context_switch(dev); + + status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH; + NV_WRITE(NV03_PGRAPH_INTR, + NV_PGRAPH_INTR_CONTEXT_SWITCH); + } + + if (status) { + DRM_INFO("Unhandled PGRAPH_INTR - 0x%08x\n", status); + NV_WRITE(NV03_PGRAPH_INTR, status); } - status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH; - NV_WRITE(NV03_PGRAPH_INTR, NV_PGRAPH_INTR_CONTEXT_SWITCH); + if ((NV_READ(NV04_PGRAPH_FIFO) & (1 << 0)) == 0) + NV_WRITE(NV04_PGRAPH_FIFO, 1); + } + + NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING); +} + +static void +nv50_pgraph_irq_handler(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t status; + + status = NV_READ(NV03_PGRAPH_INTR); + + if (status & 0x00000020) { + nouveau_pgraph_intr_error(dev, + NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD); + + status &= ~0x00000020; + NV_WRITE(NV03_PGRAPH_INTR, 0x00000020); + } + + if (status & 0x00100000) { + nouveau_pgraph_intr_error(dev, + NV03_PGRAPH_NSOURCE_DATA_ERROR); + + status &= ~0x00100000; + NV_WRITE(NV03_PGRAPH_INTR, 0x00100000); + } + + if (status & 0x00200000) { + nouveau_pgraph_intr_error(dev, + NV03_PGRAPH_NSOURCE_PROTECTION_ERROR); + + status &= ~0x00200000; + NV_WRITE(NV03_PGRAPH_INTR, 0x00200000); } if (status) { - DRM_ERROR("Unhandled PGRAPH interrupt: STAT=0x%08x\n", status); + DRM_INFO("Unhandled PGRAPH_INTR - 0x%08x\n", status); NV_WRITE(NV03_PGRAPH_INTR, status); } + { + const int isb = (1 << 16) | (1 << 0); + + if ((NV_READ(0x400500) & isb) != isb) + NV_WRITE(0x400500, NV_READ(0x400500) | isb); + } + NV_WRITE(NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING); } -static void nouveau_crtc_irq_handler(struct drm_device *dev, int crtc) +static void +nouveau_crtc_irq_handler(struct drm_device *dev, int crtc) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -397,7 +499,30 @@ } } -irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS) +static void +nouveau_nv50_display_irq_handler(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t val = NV_READ(NV50_DISPLAY_SUPERVISOR); + + DRM_INFO("NV50_DISPLAY_INTR - 0x%08X\n", val); + + NV_WRITE(NV50_DISPLAY_SUPERVISOR, val); +} + +static void +nouveau_nv50_i2c_irq_handler(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + DRM_INFO("NV50_I2C_INTR - 0x%08X\n", NV_READ(NV50_I2C_CONTROLLER)); + + /* This seems to be the way to acknowledge an interrupt. */ + NV_WRITE(NV50_I2C_CONTROLLER, 0x7FFF7FFF); +} + +irqreturn_t +nouveau_irq_handler(DRM_IRQ_ARGS) { struct drm_device *dev = (struct drm_device*)arg; struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -413,7 +538,11 @@ } if (status & NV_PMC_INTR_0_PGRAPH_PENDING) { - nouveau_pgraph_irq_handler(dev); + if (dev_priv->card_type >= NV_50) + nv50_pgraph_irq_handler(dev); + else + nouveau_pgraph_irq_handler(dev); + status &= ~NV_PMC_INTR_0_PGRAPH_PENDING; } @@ -422,9 +551,18 @@ status &= ~NV_PMC_INTR_0_CRTCn_PENDING; } + if (status & NV_PMC_INTR_0_NV50_DISPLAY_PENDING) { + nouveau_nv50_display_irq_handler(dev); + status &= ~NV_PMC_INTR_0_NV50_DISPLAY_PENDING; + } + + if (status & NV_PMC_INTR_0_NV50_I2C_PENDING) { + nouveau_nv50_i2c_irq_handler(dev); + status &= ~NV_PMC_INTR_0_NV50_I2C_PENDING; + } + if (status) DRM_ERROR("Unhandled PMC INTR status bits 0x%08x\n", status); return IRQ_HANDLED; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_mem.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_mem.c --- libdrm-2.3.0.16/shared-core/nouveau_mem.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_mem.c 2009-04-20 07:00:29.000000000 +0100 @@ -159,7 +159,7 @@ return 0; } -/* +/* * Free all blocks associated with the releasing file_priv */ void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap) @@ -189,7 +189,7 @@ } } -/* +/* * Cleanup everything */ void nouveau_mem_takedown(struct mem_block **heap) @@ -223,7 +223,7 @@ static uint32_t nouveau_mem_fb_amount_igp(struct drm_device *dev) { -#if defined(LINUX) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)) +#if defined(__linux__) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)) struct drm_nouveau_private *dev_priv = dev->dev_private; struct pci_dev *bridge; uint32_t mem; @@ -288,7 +288,7 @@ } else { uint64_t mem; - mem = (NV_READ(NV04_FIFO_DATA) & + mem = (NV_READ(NV04_FIFO_DATA) & NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >> NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT; return mem*1024*1024; @@ -300,16 +300,42 @@ return 0; } +static void nouveau_mem_reset_agp(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable; + + saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1); + saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19); + + /* clear busmaster bit */ + NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4); + /* clear SBA and AGP bits */ + NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff); + + /* power cycle pgraph, if enabled */ + pmc_enable = NV_READ(NV03_PMC_ENABLE); + if (pmc_enable & NV_PMC_ENABLE_PGRAPH) { + NV_WRITE(NV03_PMC_ENABLE, pmc_enable & ~NV_PMC_ENABLE_PGRAPH); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | + NV_PMC_ENABLE_PGRAPH); + } + + /* and restore (gives effect of resetting AGP) */ + NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19); + NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1); +} + static int -nouveau_mem_init_agp(struct drm_device *dev) +nouveau_mem_init_agp(struct drm_device *dev, int ttm) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct drm_agp_info info; struct drm_agp_mode mode; - struct drm_agp_buffer agp_req; - struct drm_agp_binding bind_req; int ret; + nouveau_mem_reset_agp(dev); + ret = drm_agp_acquire(dev); if (ret) { DRM_ERROR("Unable to acquire AGP: %d\n", ret); @@ -330,20 +356,25 @@ return ret; } - agp_req.size = info.aperture_size; - agp_req.type = 0; - ret = drm_agp_alloc(dev, &agp_req); - if (ret) { - DRM_ERROR("Unable to alloc AGP: %d\n", ret); - return ret; - } + if (!ttm) { + struct drm_agp_buffer agp_req; + struct drm_agp_binding bind_req; + + agp_req.size = info.aperture_size; + agp_req.type = 0; + ret = drm_agp_alloc(dev, &agp_req); + if (ret) { + DRM_ERROR("Unable to alloc AGP: %d\n", ret); + return ret; + } - bind_req.handle = agp_req.handle; - bind_req.offset = 0; - ret = drm_agp_bind(dev, &bind_req); - if (ret) { - DRM_ERROR("Unable to bind AGP: %d\n", ret); - return ret; + bind_req.handle = agp_req.handle; + bind_req.offset = 0; + ret = drm_agp_bind(dev, &bind_req); + if (ret) { + DRM_ERROR("Unable to bind AGP: %d\n", ret); + return ret; + } } dev_priv->gart_info.type = NOUVEAU_GART_AGP; @@ -352,6 +383,73 @@ return 0; } +#define HACK_OLD_MM +int +nouveau_mem_init_ttm(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t vram_size, bar1_size; + int ret; + + dev_priv->agp_heap = dev_priv->pci_heap = dev_priv->fb_heap = NULL; + dev_priv->fb_phys = drm_get_resource_start(dev,1); + dev_priv->gart_info.type = NOUVEAU_GART_NONE; + + drm_bo_driver_init(dev); + + /* non-mappable vram */ + dev_priv->fb_available_size = nouveau_mem_fb_amount(dev); + dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram; + vram_size = dev_priv->fb_available_size >> PAGE_SHIFT; + bar1_size = drm_get_resource_len(dev, 1) >> PAGE_SHIFT; + if (bar1_size < vram_size) { + if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_PRIV0, + bar1_size, vram_size - bar1_size, 1))) { + DRM_ERROR("Failed PRIV0 mm init: %d\n", ret); + return ret; + } + vram_size = bar1_size; + } + + /* mappable vram */ +#ifdef HACK_OLD_MM + vram_size /= 4; +#endif + if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_VRAM, 0, vram_size, 1))) { + DRM_ERROR("Failed VRAM mm init: %d\n", ret); + return ret; + } + + /* GART */ +#if !defined(__powerpc__) && !defined(__ia64__) + if (drm_device_is_agp(dev) && dev->agp) { + if ((ret = nouveau_mem_init_agp(dev, 1))) + DRM_ERROR("Error initialising AGP: %d\n", ret); + } +#endif + + if (dev_priv->gart_info.type == NOUVEAU_GART_NONE) { + if ((ret = nouveau_sgdma_init(dev))) + DRM_ERROR("Error initialising PCI SGDMA: %d\n", ret); + } + + if ((ret = drm_bo_init_mm(dev, DRM_BO_MEM_TT, 0, + dev_priv->gart_info.aper_size >> + PAGE_SHIFT, 1))) { + DRM_ERROR("Failed TT mm init: %d\n", ret); + return ret; + } + +#ifdef HACK_OLD_MM + vram_size <<= PAGE_SHIFT; + DRM_INFO("Old MM using %dKiB VRAM\n", (vram_size * 3) >> 10); + if (nouveau_mem_init_heap(&dev_priv->fb_heap, vram_size, vram_size * 3)) + return -ENOMEM; +#endif + + return 0; +} + int nouveau_mem_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -370,6 +468,11 @@ /* Init FB */ dev_priv->fb_phys=drm_get_resource_start(dev,1); fb_size = nouveau_mem_fb_amount(dev); + /* On G80, limit VRAM to 512MiB temporarily due to limits in how + * we handle VRAM page tables. + */ + if (dev_priv->card_type >= NV_50 && fb_size > (512 * 1024 * 1024)) + fb_size = (512 * 1024 * 1024); /* On at least NV40, RAMIN is actually at the end of vram. * We don't want to allocate this... */ if (dev_priv->card_type >= NV_40) @@ -378,7 +481,7 @@ DRM_DEBUG("Available VRAM: %dKiB\n", fb_size>>10); if (fb_size>256*1024*1024) { - /* On cards with > 256Mb, you can't map everything. + /* On cards with > 256Mb, you can't map everything. * So we create a second FB heap for that type of memory */ if (nouveau_mem_init_heap(&dev_priv->fb_heap, 0, 256*1024*1024)) @@ -392,11 +495,13 @@ dev_priv->fb_nomap_heap=NULL; } +#if !defined(__powerpc__) && !defined(__ia64__) /* Init AGP / NV50 PCIEGART */ if (drm_device_is_agp(dev) && dev->agp) { - if ((ret = nouveau_mem_init_agp(dev))) + if ((ret = nouveau_mem_init_agp(dev, 0))) DRM_ERROR("Error initialising AGP: %d\n", ret); } +#endif /*Note: this is *not* just NV50 code, but only used on NV50 for now */ if (dev_priv->gart_info.type == NOUVEAU_GART_NONE && @@ -405,7 +510,7 @@ if (!ret) { ret = nouveau_sgdma_nottm_hack_init(dev); if (ret) - nouveau_sgdma_takedown(dev); + nouveau_sgdma_takedown(dev); } if (ret) @@ -417,7 +522,7 @@ 0, dev_priv->gart_info.aper_size)) { if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA) { nouveau_sgdma_nottm_hack_takedown(dev); - nouveau_sgdma_takedown(dev); + nouveau_sgdma_takedown(dev); } } } @@ -430,16 +535,31 @@ sgreq.size = 16 << 20; //16MB of PCI scatter-gather zone if (drm_sg_alloc(dev, &sgreq)) { - DRM_ERROR("Unable to allocate %dMB of scatter-gather" + DRM_ERROR("Unable to allocate %ldMB of scatter-gather" " pages for PCI DMA!",sgreq.size>>20); } else { if (nouveau_mem_init_heap(&dev_priv->pci_heap, 0, dev->sg->pages * PAGE_SIZE)) { - DRM_ERROR("Unable to initialize pci_heap!"); + DRM_ERROR("Unable to initialize pci_heap!"); } } } + /* G8x: Allocate shared page table to map real VRAM pages into */ + if (dev_priv->card_type >= NV_50) { + unsigned size = ((512 * 1024 * 1024) / 65536) * 8; + + ret = nouveau_gpuobj_new(dev, NULL, size, 0, + NVOBJ_FLAG_ZERO_ALLOC | + NVOBJ_FLAG_ALLOW_NO_REFS, + &dev_priv->vm_vram_pt); + if (ret) { + DRM_ERROR("Error creating VRAM page table: %d\n", ret); + return ret; + } + } + + return 0; } @@ -451,13 +571,19 @@ int type; struct drm_nouveau_private *dev_priv = dev->dev_private; - /* - * Make things easier on ourselves: all allocations are page-aligned. + /* + * Make things easier on ourselves: all allocations are page-aligned. * We need that to map allocated regions into the user space */ if (alignment < PAGE_SHIFT) alignment = PAGE_SHIFT; + /* Align allocation sizes to 64KiB blocks on G8x. We use a 64KiB + * page size in the GPU VM. + */ + if (flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50) + size = (size + (64 * 1024)) & ~((64 * 1024) - 1); + /* * Warn about 0 sized allocations, but let it go through. It'll return 1 page */ @@ -512,6 +638,30 @@ alloc_ok: block->flags=type; + /* On G8x, map memory into VM */ + if (block->flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50 && + !(flags & NOUVEAU_MEM_NOVM)) { + struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt; + unsigned offset = block->start; + unsigned count = block->size / 65536; + + if (!pt) { + DRM_ERROR("vm alloc without vm pt\n"); + nouveau_mem_free_block(block); + return NULL; + } + + while (count--) { + unsigned pte = offset / 65536; + + INSTANCE_WR(pt, (pte * 2) + 0, offset | 1); + INSTANCE_WR(pt, (pte * 2) + 1, 0x00000000); + offset += 65536; + } + } else { + block->flags |= NOUVEAU_MEM_NOVM; + } + if (flags&NOUVEAU_MEM_MAPPED) { struct drm_map_list *entry; @@ -534,7 +684,7 @@ ret = drm_addmap(dev, block->start, block->size, _DRM_SCATTER_GATHER, 0, &block->map); - if (ret) { + if (ret) { nouveau_mem_free_block(block); return NULL; } @@ -547,15 +697,40 @@ block->map_handle = entry->user_token; } - DRM_DEBUG("allocated 0x%llx type=0x%08x\n", block->start, block->flags); + DRM_DEBUG("allocated %lld bytes at 0x%llx type=0x%08x\n", block->size, block->start, block->flags); return block; } void nouveau_mem_free(struct drm_device* dev, struct mem_block* block) { + struct drm_nouveau_private *dev_priv = dev->dev_private; + DRM_DEBUG("freeing 0x%llx type=0x%08x\n", block->start, block->flags); + if (block->flags&NOUVEAU_MEM_MAPPED) drm_rmmap(dev, block->map); + + /* G8x: Remove pages from vm */ + if (block->flags & NOUVEAU_MEM_FB && dev_priv->card_type >= NV_50 && + !(block->flags & NOUVEAU_MEM_NOVM)) { + struct nouveau_gpuobj *pt = dev_priv->vm_vram_pt; + unsigned offset = block->start; + unsigned count = block->size / 65536; + + if (!pt) { + DRM_ERROR("vm free without vm pt\n"); + goto out_free; + } + + while (count--) { + unsigned pte = offset / 65536; + INSTANCE_WR(pt, (pte * 2) + 0, 0); + INSTANCE_WR(pt, (pte * 2) + 1, 0); + offset += 65536; + } + } + +out_free: nouveau_mem_free_block(block); } @@ -570,6 +745,9 @@ NOUVEAU_CHECK_INITIALISED_WITH_RETURN; + if (alloc->flags & NOUVEAU_MEM_INTERNAL) + return -EINVAL; + block=nouveau_mem_alloc(dev, alloc->alignment, alloc->size, alloc->flags, file_priv); if (!block) @@ -604,5 +782,3 @@ nouveau_mem_free(dev, block); return 0; } - - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_notifier.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_notifier.c --- libdrm-2.3.0.16/shared-core/nouveau_notifier.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_notifier.c 2009-04-20 07:00:29.000000000 +0100 @@ -33,17 +33,10 @@ nouveau_notifier_init_channel(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; int flags, ret; - /*TODO: PCI notifier blocks */ - if (dev_priv->agp_heap) - flags = NOUVEAU_MEM_AGP; - else if (dev_priv->pci_heap) - flags = NOUVEAU_MEM_PCI; - else - flags = NOUVEAU_MEM_FB; - flags |= (NOUVEAU_MEM_MAPPED | NOUVEAU_MEM_FB_ACCEPTABLE); + flags = (NOUVEAU_MEM_PCI | NOUVEAU_MEM_MAPPED | + NOUVEAU_MEM_FB_ACCEPTABLE); chan->notifier_block = nouveau_mem_alloc(dev, 0, PAGE_SIZE, flags, (struct drm_file *)-2); @@ -122,7 +115,7 @@ } else { target = NV_DMA_TARGET_AGP; } - } else + } else if (chan->notifier_block->flags & NOUVEAU_MEM_PCI) { target = NV_DMA_TARGET_PCI_NONLINEAR; } else { @@ -170,4 +163,3 @@ return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_object.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_object.c --- libdrm-2.3.0.16/shared-core/nouveau_object.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_object.c 2009-04-20 07:00:29.000000000 +0100 @@ -524,7 +524,7 @@ struct nouveau_gpuobj_ref *ref; struct list_head *entry, *tmp; - list_for_each_safe(entry, tmp, &chan->ramht_refs) { + list_for_each_safe(entry, tmp, &chan->ramht_refs) { ref = list_entry(entry, struct nouveau_gpuobj_ref, list); if (ref->handle == handle) { @@ -616,7 +616,7 @@ DMA objects are used to reference a piece of memory in the framebuffer, PCI or AGP address space. Each object is 16 bytes big and looks as follows: - + entry[0] 11:0 class (seems like I can always use 0 here) 12 page table present? @@ -648,7 +648,7 @@ struct drm_nouveau_private *dev_priv = dev->dev_private; int ret; uint32_t is_scatter_gather = 0; - + /* Total number of pages covered by the request. */ const unsigned int page_count = (size + PAGE_SIZE - 1) / PAGE_SIZE; @@ -671,7 +671,7 @@ default: break; } - + ret = nouveau_gpuobj_new(dev, chan, is_scatter_gather ? ((page_count << 2) + 12) : nouveau_gpuobj_class_instmem_size(dev, class), 16, @@ -687,11 +687,11 @@ adjust = offset & 0x00000fff; if (access != NV_DMA_ACCESS_RO) pte_flags |= (1<<1); - - if ( ! is_scatter_gather ) + + if ( ! is_scatter_gather ) { frame = offset & ~0x00000fff; - + INSTANCE_WR(*gpuobj, 0, ((1<<12) | (1<<13) | (adjust << 20) | (access << 14) | @@ -701,7 +701,7 @@ INSTANCE_WR(*gpuobj, 2, frame | pte_flags); INSTANCE_WR(*gpuobj, 3, frame | pte_flags); } - else + else { /* Intial page entry in the scatter-gather area that * corresponds to the base offset @@ -728,7 +728,7 @@ /*write starting at the third dword*/ instance_offset = 2; - + /*for each PAGE, get its bus address, fill in the page table entry, and advance*/ for (i = 0; i < page_count; i++) { if (dev->sg->busaddr[idx] == 0) { @@ -745,12 +745,12 @@ } frame = (uint32_t) dev->sg->busaddr[idx]; - INSTANCE_WR(*gpuobj, instance_offset, + INSTANCE_WR(*gpuobj, instance_offset, frame | pte_flags); - + idx++; instance_offset ++; - } + } } } else { uint32_t flags0, flags5; @@ -848,7 +848,7 @@ entry[0]: 11:0 class (maybe uses more bits here?) 17 user clip enable - 21:19 patch config + 21:19 patch config 25 patch status valid ? entry[1]: 15:0 DMA notifier (maybe 20:0) @@ -983,10 +983,14 @@ return ret; } - /* NV50 VM, point offset 0-512MiB at shared PCIEGART table */ + /* NV50 VM + * - Allocate per-channel page-directory + * - Point offset 0-512MiB at shared PCIEGART table + * - Point offset 512-1024MiB at shared VRAM table + */ if (dev_priv->card_type >= NV_50) { uint32_t vm_offset; - + vm_offset = (dev_priv->chipset & 0xf0) == 0x50 ? 0x1400 : 0x200; vm_offset += chan->ramin->gpuobj->im_pramin->start; if ((ret = nouveau_gpuobj_new_fake(dev, vm_offset, ~0, 0x4000, @@ -1004,6 +1008,14 @@ INSTANCE_WR(chan->vm_pd, (0+0)/4, chan->vm_gart_pt->instance | 0x03); INSTANCE_WR(chan->vm_pd, (0+4)/4, 0x00000000); + + if ((ret = nouveau_gpuobj_ref_add(dev, NULL, 0, + dev_priv->vm_vram_pt, + &chan->vm_vram_pt))) + return ret; + INSTANCE_WR(chan->vm_pd, (8+0)/4, + chan->vm_vram_pt->instance | 0x61); + INSTANCE_WR(chan->vm_pd, (8+4)/4, 0x00000000); } /* RAMHT */ @@ -1022,6 +1034,17 @@ } /* VRAM ctxdma */ + if (dev_priv->card_type >= NV_50) { + ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, + 512*1024*1024, + dev_priv->fb_available_size, + NV_DMA_ACCESS_RW, + NV_DMA_TARGET_AGP, &vram); + if (ret) { + DRM_ERROR("Error creating VRAM ctxdma: %d\n", ret); + return ret; + } + } else if ((ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0, dev_priv->fb_available_size, NV_DMA_ACCESS_RW, @@ -1074,7 +1097,7 @@ DRM_DEBUG("ch%d\n", chan->id); - list_for_each_safe(entry, tmp, &chan->ramht_refs) { + list_for_each_safe(entry, tmp, &chan->ramht_refs) { ref = list_entry(entry, struct nouveau_gpuobj_ref, list); nouveau_gpuobj_ref_del(dev, &ref); @@ -1084,6 +1107,7 @@ nouveau_gpuobj_del(dev, &chan->vm_pd); nouveau_gpuobj_ref_del(dev, &chan->vm_gart_pt); + nouveau_gpuobj_ref_del(dev, &chan->vm_vram_pt); if (chan->ramin_heap) nouveau_mem_takedown(&chan->ramin_heap); @@ -1104,7 +1128,7 @@ NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(init->channel, file_priv, chan); //FIXME: check args, only allow trusted objects to be created - + if (init->handle == ~0) return -EINVAL; @@ -1145,4 +1169,3 @@ return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_reg.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_reg.h --- libdrm-2.3.0.16/shared-core/nouveau_reg.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_reg.h 2009-04-20 07:00:29.000000000 +0100 @@ -45,23 +45,50 @@ #define NV_CLASS_NULL 0x00000030 #define NV_CLASS_DMA_IN_MEMORY 0x0000003D +#define NV03_USER(i) (0x00800000+(i*NV03_USER_SIZE)) +#define NV03_USER__SIZE 16 +#define NV10_USER__SIZE 32 +#define NV03_USER_SIZE 0x00010000 +#define NV03_USER_DMA_PUT(i) (0x00800040+(i*NV03_USER_SIZE)) +#define NV03_USER_DMA_PUT__SIZE 16 +#define NV10_USER_DMA_PUT__SIZE 32 +#define NV03_USER_DMA_GET(i) (0x00800044+(i*NV03_USER_SIZE)) +#define NV03_USER_DMA_GET__SIZE 16 +#define NV10_USER_DMA_GET__SIZE 32 +#define NV03_USER_REF_CNT(i) (0x00800048+(i*NV03_USER_SIZE)) +#define NV03_USER_REF_CNT__SIZE 16 +#define NV10_USER_REF_CNT__SIZE 32 + +#define NV40_USER(i) (0x00c00000+(i*NV40_USER_SIZE)) +#define NV40_USER_SIZE 0x00001000 +#define NV40_USER_DMA_PUT(i) (0x00c00040+(i*NV40_USER_SIZE)) +#define NV40_USER_DMA_PUT__SIZE 32 +#define NV40_USER_DMA_GET(i) (0x00c00044+(i*NV40_USER_SIZE)) +#define NV40_USER_DMA_GET__SIZE 32 +#define NV40_USER_REF_CNT(i) (0x00c00048+(i*NV40_USER_SIZE)) +#define NV40_USER_REF_CNT__SIZE 32 + +#define NV50_USER(i) (0x00c00000+(i*NV50_USER_SIZE)) +#define NV50_USER_SIZE 0x00002000 +#define NV50_USER_DMA_PUT(i) (0x00c00040+(i*NV50_USER_SIZE)) +#define NV50_USER_DMA_PUT__SIZE 128 +#define NV50_USER_DMA_GET(i) (0x00c00044+(i*NV50_USER_SIZE)) +#define NV50_USER_DMA_GET__SIZE 128 +/*XXX: I don't think this actually exists.. */ +#define NV50_USER_REF_CNT(i) (0x00c00048+(i*NV50_USER_SIZE)) +#define NV50_USER_REF_CNT__SIZE 128 + #define NV03_FIFO_SIZE 0x8000UL -#define NV_MAX_FIFO_NUMBER 128 -#define NV03_FIFO_REGS_SIZE 0x10000 -#define NV03_FIFO_REGS(i) (0x00800000+i*NV03_FIFO_REGS_SIZE) -# define NV03_FIFO_REGS_DMAPUT(i) (NV03_FIFO_REGS(i)+0x40) -# define NV03_FIFO_REGS_DMAGET(i) (NV03_FIFO_REGS(i)+0x44) -#define NV50_FIFO_REGS_SIZE 0x2000 -#define NV50_FIFO_REGS(i) (0x00c00000+i*NV50_FIFO_REGS_SIZE) -# define NV50_FIFO_REGS_DMAPUT(i) (NV50_FIFO_REGS(i)+0x40) -# define NV50_FIFO_REGS_DMAGET(i) (NV50_FIFO_REGS(i)+0x44) #define NV03_PMC_BOOT_0 0x00000000 +#define NV03_PMC_BOOT_1 0x00000004 #define NV03_PMC_INTR_0 0x00000100 # define NV_PMC_INTR_0_PFIFO_PENDING (1<< 8) # define NV_PMC_INTR_0_PGRAPH_PENDING (1<<12) +# define NV_PMC_INTR_0_NV50_I2C_PENDING (1<<21) # define NV_PMC_INTR_0_CRTC0_PENDING (1<<24) # define NV_PMC_INTR_0_CRTC1_PENDING (1<<25) +# define NV_PMC_INTR_0_NV50_DISPLAY_PENDING (1<<26) # define NV_PMC_INTR_0_CRTCn_PENDING (3<<24) #define NV03_PMC_INTR_EN_0 0x00000140 # define NV_PMC_INTR_EN_0_MASTER_ENABLE (1<< 0) @@ -87,6 +114,9 @@ #define NV50_PUNK_BAR3_CTXDMA_VALID (1<<31) #define NV50_PUNK_UNK1710 0x00001710 +#define NV04_PBUS_PCI_NV_1 0x00001804 +#define NV04_PBUS_PCI_NV_19 0x0000184C + #define NV04_PTIMER_INTR_0 0x00009100 #define NV04_PTIMER_INTR_EN_0 0x00009140 #define NV04_PTIMER_NUMERATOR 0x00009200 @@ -95,6 +125,8 @@ #define NV04_PTIMER_TIME_1 0x00009410 #define NV04_PTIMER_ALARM_0 0x00009420 +#define NV50_I2C_CONTROLLER 0x0000E054 + #define NV04_PFB_CFG0 0x00100200 #define NV04_PFB_CFG1 0x00100204 #define NV40_PFB_020C 0x0010020C @@ -110,6 +142,7 @@ #define NV40_PFB_TLIMIT(i) (0x00100604 + (i*16)) #define NV40_PFB_TSIZE(i) (0x00100608 + (i*16)) #define NV40_PFB_TSTATUS(i) (0x0010060C + (i*16)) +#define NV40_PFB_UNK_800 0x00100800 #define NV04_PGRAPH_DEBUG_0 0x00400080 #define NV04_PGRAPH_DEBUG_1 0x00400084 @@ -118,10 +151,14 @@ #define NV10_PGRAPH_DEBUG_4 0x00400090 #define NV03_PGRAPH_INTR 0x00400100 #define NV03_PGRAPH_NSTATUS 0x00400104 -# define NV03_PGRAPH_NSTATUS_STATE_IN_USE (1<<23) -# define NV03_PGRAPH_NSTATUS_INVALID_STATE (1<<24) -# define NV03_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25) -# define NV03_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26) +# define NV04_PGRAPH_NSTATUS_STATE_IN_USE (1<<11) +# define NV04_PGRAPH_NSTATUS_INVALID_STATE (1<<12) +# define NV04_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<13) +# define NV04_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<14) +# define NV10_PGRAPH_NSTATUS_STATE_IN_USE (1<<23) +# define NV10_PGRAPH_NSTATUS_INVALID_STATE (1<<24) +# define NV10_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25) +# define NV10_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26) #define NV03_PGRAPH_NSOURCE 0x00400108 # define NV03_PGRAPH_NSOURCE_NOTIFICATION (1<< 0) # define NV03_PGRAPH_NSOURCE_DATA_ERROR (1<< 1) @@ -286,10 +323,8 @@ #define NV10_PGRAPH_DMA_PITCH 0x00400770 #define NV10_PGRAPH_DVD_COLORFMT 0x00400774 #define NV10_PGRAPH_SCALED_FORMAT 0x00400778 -#define NV10_PGRAPH_CHANNEL_CTX_TABLE 0x00400780 -#define NV10_PGRAPH_CHANNEL_CTX_SIZE 0x00400784 +#define NV20_PGRAPH_CHANNEL_CTX_TABLE 0x00400780 #define NV20_PGRAPH_CHANNEL_CTX_POINTER 0x00400784 -#define NV10_PGRAPH_CHANNEL_CTX_POINTER 0x00400788 #define NV20_PGRAPH_CHANNEL_CTX_XFER 0x00400788 #define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD 0x00000001 #define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE 0x00000002 @@ -304,19 +339,19 @@ #define NV04_PGRAPH_BLEND 0x00400824 #define NV04_PGRAPH_STORED_FMT 0x00400830 #define NV04_PGRAPH_PATT_COLORRAM 0x00400900 -#define NV40_PGRAPH_TILE0(i) 0x00400900 -#define NV40_PGRAPH_TLIMIT0(i) 0x00400904 -#define NV40_PGRAPH_TSIZE0(i) 0x00400908 -#define NV40_PGRAPH_TSTATUS0(i) 0x0040090C +#define NV40_PGRAPH_TILE0(i) (0x00400900 + (i*16)) +#define NV40_PGRAPH_TLIMIT0(i) (0x00400904 + (i*16)) +#define NV40_PGRAPH_TSIZE0(i) (0x00400908 + (i*16)) +#define NV40_PGRAPH_TSTATUS0(i) (0x0040090C + (i*16)) #define NV10_PGRAPH_TILE(i) (0x00400B00 + (i*16)) #define NV10_PGRAPH_TLIMIT(i) (0x00400B04 + (i*16)) #define NV10_PGRAPH_TSIZE(i) (0x00400B08 + (i*16)) #define NV10_PGRAPH_TSTATUS(i) (0x00400B0C + (i*16)) #define NV04_PGRAPH_U_RAM 0x00400D00 -#define NV47_PGRAPH_TILE0(i) 0x00400D00 -#define NV47_PGRAPH_TLIMIT0(i) 0x00400D04 -#define NV47_PGRAPH_TSIZE0(i) 0x00400D08 -#define NV47_PGRAPH_TSTATUS0(i) 0x00400D0C +#define NV47_PGRAPH_TILE0(i) (0x00400D00 + (i*16)) +#define NV47_PGRAPH_TLIMIT0(i) (0x00400D04 + (i*16)) +#define NV47_PGRAPH_TSIZE0(i) (0x00400D08 + (i*16)) +#define NV47_PGRAPH_TSTATUS0(i) (0x00400D0C + (i*16)) #define NV04_PGRAPH_V_RAM 0x00400D40 #define NV04_PGRAPH_W_RAM 0x00400D80 #define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40 @@ -364,10 +399,10 @@ #define NV04_PGRAPH_DMA_B_OFFSET 0x00401098 #define NV04_PGRAPH_DMA_B_SIZE 0x0040109C #define NV04_PGRAPH_DMA_B_Y_SIZE 0x004010A0 -#define NV40_PGRAPH_TILE1(i) 0x00406900 -#define NV40_PGRAPH_TLIMIT1(i) 0x00406904 -#define NV40_PGRAPH_TSIZE1(i) 0x00406908 -#define NV40_PGRAPH_TSTATUS1(i) 0x0040690C +#define NV40_PGRAPH_TILE1(i) (0x00406900 + (i*16)) +#define NV40_PGRAPH_TLIMIT1(i) (0x00406904 + (i*16)) +#define NV40_PGRAPH_TSIZE1(i) (0x00406908 + (i*16)) +#define NV40_PGRAPH_TSTATUS1(i) (0x0040690C + (i*16)) /* It's a guess that this works on NV03. Confirmed on NV04, though */ @@ -403,6 +438,12 @@ #define NV04_PFIFO_CACHE0_PULL1 0x00003054 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 #define NV03_PFIFO_CACHE1_PUSH1 0x00003204 +#define NV03_PFIFO_CACHE1_PUSH1_DMA (1<<8) +#define NV40_PFIFO_CACHE1_PUSH1_DMA (1<<16) +#define NV03_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000000f +#define NV10_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000001f +#define NV50_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000007f +#define NV03_PFIFO_CACHE1_PUT 0x00003210 #define NV04_PFIFO_CACHE1_DMA_PUSH 0x00003220 #define NV04_PFIFO_CACHE1_DMA_FETCH 0x00003224 # define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES 0x00000000 @@ -498,6 +539,9 @@ #define NV_CRTC1_INTEN 0x00602140 # define NV_CRTC_INTR_VBLANK (1<<0) +/* This name is a partial guess. */ +#define NV50_DISPLAY_SUPERVISOR 0x00610024 + /* Fifo commands. These are not regs, neither masks */ #define NV03_FIFO_CMD_JUMP 0x20000000 #define NV03_FIFO_CMD_JUMP_OFFSET_MASK 0x1ffffffc @@ -547,4 +591,3 @@ #define NV40_RAMFC_UNK_48 0x48 #define NV40_RAMFC_UNK_4C 0x4C #define NV40_RAMFC_UNK_50 0x50 - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_state.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_state.c --- libdrm-2.3.0.16/shared-core/nouveau_state.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_state.c 2009-04-20 07:00:29.000000000 +0100 @@ -1,4 +1,4 @@ -/* +/* * Copyright 2005 Stephane Marchesin * All Rights Reserved. * @@ -40,13 +40,13 @@ /* map the mmio regs */ ret = drm_addmap(dev, drm_get_resource_start(dev, 0), - drm_get_resource_len(dev, 0), + drm_get_resource_len(dev, 0), _DRM_REGISTERS, _DRM_READ_ONLY, &dev_priv->mmio); if (ret) { DRM_ERROR("Unable to initialize the mmio mapping (%d). " "Please report your setup to " DRIVER_EMAIL "\n", ret); - return 1; + return -EINVAL; } DRM_DEBUG("regs mapped ok at 0x%lx\n", dev_priv->mmio->offset); @@ -88,7 +88,6 @@ static int nouveau_stub_init(struct drm_device *dev) { return 0; } static void nouveau_stub_takedown(struct drm_device *dev) {} -static uint64_t nouveau_stub_timer_read(struct drm_device *dev) { return 0; } static int nouveau_init_engine_ptrs(struct drm_device *dev) { @@ -116,8 +115,10 @@ engine->graph.destroy_context = nv04_graph_destroy_context; engine->graph.load_context = nv04_graph_load_context; engine->graph.save_context = nv04_graph_save_context; + engine->fifo.channels = 16; engine->fifo.init = nouveau_fifo_init; engine->fifo.takedown = nouveau_stub_takedown; + engine->fifo.channel_id = nv04_fifo_channel_id; engine->fifo.create_context = nv04_fifo_create_context; engine->fifo.destroy_context = nv04_fifo_destroy_context; engine->fifo.load_context = nv04_fifo_load_context; @@ -143,8 +144,10 @@ engine->graph.destroy_context = nv10_graph_destroy_context; engine->graph.load_context = nv10_graph_load_context; engine->graph.save_context = nv10_graph_save_context; + engine->fifo.channels = 32; engine->fifo.init = nouveau_fifo_init; engine->fifo.takedown = nouveau_stub_takedown; + engine->fifo.channel_id = nv10_fifo_channel_id; engine->fifo.create_context = nv10_fifo_create_context; engine->fifo.destroy_context = nv10_fifo_destroy_context; engine->fifo.load_context = nv10_fifo_load_context; @@ -170,8 +173,10 @@ engine->graph.destroy_context = nv20_graph_destroy_context; engine->graph.load_context = nv20_graph_load_context; engine->graph.save_context = nv20_graph_save_context; + engine->fifo.channels = 32; engine->fifo.init = nouveau_fifo_init; engine->fifo.takedown = nouveau_stub_takedown; + engine->fifo.channel_id = nv10_fifo_channel_id; engine->fifo.create_context = nv10_fifo_create_context; engine->fifo.destroy_context = nv10_fifo_destroy_context; engine->fifo.load_context = nv10_fifo_load_context; @@ -192,19 +197,22 @@ engine->fb.init = nv10_fb_init; engine->fb.takedown = nv10_fb_takedown; engine->graph.init = nv30_graph_init; - engine->graph.takedown = nv30_graph_takedown; - engine->graph.create_context = nv30_graph_create_context; - engine->graph.destroy_context = nv30_graph_destroy_context; - engine->graph.load_context = nv30_graph_load_context; - engine->graph.save_context = nv30_graph_save_context; + engine->graph.takedown = nv20_graph_takedown; + engine->graph.create_context = nv20_graph_create_context; + engine->graph.destroy_context = nv20_graph_destroy_context; + engine->graph.load_context = nv20_graph_load_context; + engine->graph.save_context = nv20_graph_save_context; + engine->fifo.channels = 32; engine->fifo.init = nouveau_fifo_init; engine->fifo.takedown = nouveau_stub_takedown; + engine->fifo.channel_id = nv10_fifo_channel_id; engine->fifo.create_context = nv10_fifo_create_context; engine->fifo.destroy_context = nv10_fifo_destroy_context; engine->fifo.load_context = nv10_fifo_load_context; engine->fifo.save_context = nv10_fifo_save_context; break; case 0x40: + case 0x60: engine->instmem.init = nv04_instmem_init; engine->instmem.takedown= nv04_instmem_takedown; engine->instmem.populate = nv04_instmem_populate; @@ -224,8 +232,10 @@ engine->graph.destroy_context = nv40_graph_destroy_context; engine->graph.load_context = nv40_graph_load_context; engine->graph.save_context = nv40_graph_save_context; + engine->fifo.channels = 32; engine->fifo.init = nv40_fifo_init; engine->fifo.takedown = nouveau_stub_takedown; + engine->fifo.channel_id = nv10_fifo_channel_id; engine->fifo.create_context = nv40_fifo_create_context; engine->fifo.destroy_context = nv40_fifo_destroy_context; engine->fifo.load_context = nv40_fifo_load_context; @@ -233,6 +243,7 @@ break; case 0x50: case 0x80: /* gotta love NVIDIA's consistency.. */ + case 0x90: engine->instmem.init = nv50_instmem_init; engine->instmem.takedown= nv50_instmem_takedown; engine->instmem.populate = nv50_instmem_populate; @@ -241,9 +252,9 @@ engine->instmem.unbind = nv50_instmem_unbind; engine->mc.init = nv50_mc_init; engine->mc.takedown = nv50_mc_takedown; - engine->timer.init = nouveau_stub_init; - engine->timer.read = nouveau_stub_timer_read; - engine->timer.takedown = nouveau_stub_takedown; + engine->timer.init = nv04_timer_init; + engine->timer.read = nv04_timer_read; + engine->timer.takedown = nv04_timer_takedown; engine->fb.init = nouveau_stub_init; engine->fb.takedown = nouveau_stub_takedown; engine->graph.init = nv50_graph_init; @@ -252,8 +263,10 @@ engine->graph.destroy_context = nv50_graph_destroy_context; engine->graph.load_context = nv50_graph_load_context; engine->graph.save_context = nv50_graph_save_context; + engine->fifo.channels = 128; engine->fifo.init = nv50_fifo_init; engine->fifo.takedown = nv50_fifo_takedown; + engine->fifo.channel_id = nv50_fifo_channel_id; engine->fifo.create_context = nv50_fifo_create_context; engine->fifo.destroy_context = nv50_fifo_destroy_context; engine->fifo.load_context = nv50_fifo_load_context; @@ -278,10 +291,7 @@ if (dev_priv->init_state == NOUVEAU_CARD_INIT_DONE) return 0; - - /* Map any PCI resources we need on the card */ - ret = nouveau_init_card_mappings(dev); - if (ret) return ret; + dev_priv->ttm = 0; /* Determine exact chipset we're running on */ if (dev_priv->card_type < NV_10) @@ -307,8 +317,13 @@ if (ret) return ret; /* Setup the memory manager */ - ret = nouveau_mem_init(dev); - if (ret) return ret; + if (dev_priv->ttm) { + ret = nouveau_mem_init_ttm(dev); + if (ret) return ret; + } else { + ret = nouveau_mem_init(dev); + if (ret) return ret; + } ret = nouveau_gpuobj_init(dev); if (ret) return ret; @@ -370,6 +385,7 @@ nouveau_sgdma_takedown(dev); nouveau_gpuobj_takedown(dev); + nouveau_gpuobj_del(dev, &dev_priv->vm_vram_pt); nouveau_mem_close(dev); engine->instmem.takedown(dev); @@ -397,25 +413,142 @@ /* first module load, setup the mmio/fb mapping */ int nouveau_firstopen(struct drm_device *dev) { +#if defined(__powerpc__) + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct device_node *dn; +#endif + int ret; + /* Map any PCI resources we need on the card */ + ret = nouveau_init_card_mappings(dev); + if (ret) return ret; + +#if defined(__powerpc__) + /* Put the card in BE mode if it's not */ + if (NV_READ(NV03_PMC_BOOT_1)) + NV_WRITE(NV03_PMC_BOOT_1,0x00000001); + + DRM_MEMORYBARRIER(); +#endif + +#if defined(__linux__) && defined(__powerpc__) + /* if we have an OF card, copy vbios to RAMIN */ + dn = pci_device_to_OF_node(dev->pdev); + if (dn) + { + int size; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)) + const uint32_t *bios = of_get_property(dn, "NVDA,BMP", &size); +#else + const uint32_t *bios = get_property(dn, "NVDA,BMP", &size); +#endif + if (bios) + { + int i; + for(i=0;icard_type=flags&NOUVEAU_FAMILY; - dev_priv->flags=flags&NOUVEAU_FLAGS; + dev_priv->flags = flags & NOUVEAU_FLAGS; dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN; + DRM_DEBUG("vendor: 0x%X device: 0x%X class: 0x%X\n", dev->pci_vendor, dev->pci_device, dev->pdev->class); + + /* Time to determine the card architecture */ + regs = ioremap_nocache(pci_resource_start(dev->pdev, 0), 0x8); + if (!regs) { + DRM_ERROR("Could not ioremap to determine register\n"); + return -ENOMEM; + } + + reg0 = readl(regs+NV03_PMC_BOOT_0); + reg1 = readl(regs+NV03_PMC_BOOT_1); +#if defined(__powerpc__) + if (reg1) + reg0=___swab32(reg0); +#endif + + /* We're dealing with >=NV10 */ + if ((reg0 & 0x0f000000) > 0 ) { + /* Bit 27-20 contain the architecture in hex */ + architecture = (reg0 & 0xff00000) >> 20; + /* NV04 or NV05 */ + } else if ((reg0 & 0xff00fff0) == 0x20004000) { + architecture = 0x04; + } + + iounmap(regs); + + if (architecture >= 0x80) { + dev_priv->card_type = NV_50; + } else if (architecture >= 0x60) { + /* FIXME we need to figure out who's who for NV6x */ + dev_priv->card_type = NV_44; + } else if (architecture >= 0x50) { + dev_priv->card_type = NV_50; + } else if (architecture >= 0x40) { + uint8_t subarch = architecture & 0xf; + /* Selection criteria borrowed from NV40EXA */ + if (NV40_CHIPSET_MASK & (1 << subarch)) { + dev_priv->card_type = NV_40; + } else if (NV44_CHIPSET_MASK & (1 << subarch)) { + dev_priv->card_type = NV_44; + } else { + dev_priv->card_type = NV_UNKNOWN; + } + } else if (architecture >= 0x30) { + dev_priv->card_type = NV_30; + } else if (architecture >= 0x20) { + dev_priv->card_type = NV_20; + } else if (architecture >= 0x17) { + dev_priv->card_type = NV_17; + } else if (architecture >= 0x11) { + dev_priv->card_type = NV_11; + } else if (architecture >= 0x10) { + dev_priv->card_type = NV_10; + } else if (architecture >= 0x04) { + dev_priv->card_type = NV_04; + } else { + dev_priv->card_type = NV_UNKNOWN; + } + + DRM_INFO("Detected an NV%d generation card (0x%08x)\n", dev_priv->card_type,reg0); + + if (dev_priv->card_type == NV_UNKNOWN) { + return -EINVAL; + } + + /* Special flags */ + if (dev->pci_device == 0x01a0) { + dev_priv->flags |= NV_NFORCE; + } else if (dev->pci_device == 0x01f0) { + dev_priv->flags |= NV_NFORCE2; + } + dev->dev_private = (void *)dev_priv; + return 0; } @@ -423,12 +556,15 @@ { struct drm_nouveau_private *dev_priv = dev->dev_private; - nouveau_card_takedown(dev); - - if(dev_priv->fb_mtrr>0) - { - drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC); - dev_priv->fb_mtrr=0; + /* In the case of an error dev_priv may not be be allocated yet */ + if (dev_priv && dev_priv->card_type) { + nouveau_card_takedown(dev); + + if(dev_priv->fb_mtrr>0) + { + drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC); + dev_priv->fb_mtrr=0; + } } } @@ -479,8 +615,8 @@ break; case NOUVEAU_GETPARAM_PCI_PHYSICAL: if ( dev -> sg ) - getparam->value=(uint64_t) dev->sg->virtual; - else + getparam->value=(unsigned long)dev->sg->virtual; + else { DRM_ERROR("Requested PCIGART address, while no PCIGART was created\n"); return -EINVAL; @@ -562,5 +698,3 @@ } } } - - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_swmthd.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_swmthd.c --- libdrm-2.3.0.16/shared-core/nouveau_swmthd.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_swmthd.c 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,191 @@ +/* + * Copyright (C) 2007 Arthur Huillet. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/* + * Authors: + * Arthur Huillet + */ + +#include "drmP.h" +#include "drm.h" +#include "nouveau_drm.h" +#include "nouveau_drv.h" +#include "nouveau_reg.h" + +/*TODO: add a "card_type" attribute*/ +typedef struct{ + uint32_t oclass; /* object class for this software method */ + uint32_t mthd; /* method number */ + void (*method_code)(struct drm_device *dev, uint32_t oclass, uint32_t mthd); /* pointer to the function that does the work */ + } nouveau_software_method_t; + + + /* This function handles the NV04 setcontext software methods. +One function for all because they are very similar.*/ +static void nouveau_NV04_setcontext_sw_method(struct drm_device *dev, uint32_t oclass, uint32_t mthd) { + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t inst_loc = NV_READ(NV04_PGRAPH_CTX_SWITCH4) & 0xFFFF; + uint32_t value_to_set = 0, bit_to_set = 0; + + switch ( oclass ) { + case 0x4a: + switch ( mthd ) { + case 0x188 : + case 0x18c : + bit_to_set = 0; + break; + case 0x198 : + bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/ + break; + case 0x2fc : + bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/ + break; + default : ; + }; + break; + case 0x5c: + switch ( mthd ) { + case 0x184: + bit_to_set = 1 << 13; /*USER_CLIP_ENABLE*/ + break; + case 0x188: + case 0x18c: + bit_to_set = 0; + break; + case 0x198: + bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/ + break; + case 0x2fc : + bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/ + break; + }; + break; + case 0x5f: + switch ( mthd ) { + case 0x184 : + bit_to_set = 1 << 12; /*CHROMA_KEY_ENABLE*/ + break; + case 0x188 : + bit_to_set = 1 << 13; /*USER_CLIP_ENABLE*/ + break; + case 0x18c : + case 0x190 : + bit_to_set = 0; + break; + case 0x19c : + bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/ + break; + case 0x2fc : + bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/ + break; + }; + break; + case 0x61: + switch ( mthd ) { + case 0x188 : + bit_to_set = 1 << 13; /*USER_CLIP_ENABLE*/ + break; + case 0x18c : + case 0x190 : + bit_to_set = 0; + break; + case 0x19c : + bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/ + break; + case 0x2fc : + bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; /*PATCH_CONFIG = NV04_PGRAPH_TRAPPED_DATA*/ + break; + }; + break; + case 0x77: + switch ( mthd ) { + case 0x198 : + bit_to_set = 1 << 24; /*PATCH_STATUS_VALID*/ + break; + case 0x304 : + bit_to_set = NV_READ(NV04_PGRAPH_TRAPPED_DATA) << 15; //PATCH_CONFIG + break; + }; + break; + default :; + }; + + value_to_set = (NV_READ(0x00700000 | inst_loc << 4))| bit_to_set; + + /*RAMIN*/ + nouveau_wait_for_idle(dev); + NV_WRITE(0x00700000 | inst_loc << 4, value_to_set); + + /*DRM_DEBUG("CTX_SWITCH1 value is %#x\n", NV_READ(NV04_PGRAPH_CTX_SWITCH1));*/ + NV_WRITE(NV04_PGRAPH_CTX_SWITCH1, value_to_set); + + /*DRM_DEBUG("CTX_CACHE1 + xxx value is %#x\n", NV_READ(NV04_PGRAPH_CTX_CACHE1 + (((NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7) << 2)));*/ + NV_WRITE(NV04_PGRAPH_CTX_CACHE1 + (((NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7) << 2), value_to_set); +} + + nouveau_software_method_t nouveau_sw_methods[] = { + /*NV04 context software methods*/ + { 0x4a, 0x188, nouveau_NV04_setcontext_sw_method }, + { 0x4a, 0x18c, nouveau_NV04_setcontext_sw_method }, + { 0x4a, 0x198, nouveau_NV04_setcontext_sw_method }, + { 0x4a, 0x2fc, nouveau_NV04_setcontext_sw_method }, + { 0x5c, 0x184, nouveau_NV04_setcontext_sw_method }, + { 0x5c, 0x188, nouveau_NV04_setcontext_sw_method }, + { 0x5c, 0x18c, nouveau_NV04_setcontext_sw_method }, + { 0x5c, 0x198, nouveau_NV04_setcontext_sw_method }, + { 0x5c, 0x2fc, nouveau_NV04_setcontext_sw_method }, + { 0x5f, 0x184, nouveau_NV04_setcontext_sw_method }, + { 0x5f, 0x188, nouveau_NV04_setcontext_sw_method }, + { 0x5f, 0x18c, nouveau_NV04_setcontext_sw_method }, + { 0x5f, 0x190, nouveau_NV04_setcontext_sw_method }, + { 0x5f, 0x19c, nouveau_NV04_setcontext_sw_method }, + { 0x5f, 0x2fc, nouveau_NV04_setcontext_sw_method }, + { 0x61, 0x188, nouveau_NV04_setcontext_sw_method }, + { 0x61, 0x18c, nouveau_NV04_setcontext_sw_method }, + { 0x61, 0x190, nouveau_NV04_setcontext_sw_method }, + { 0x61, 0x19c, nouveau_NV04_setcontext_sw_method }, + { 0x61, 0x2fc, nouveau_NV04_setcontext_sw_method }, + { 0x77, 0x198, nouveau_NV04_setcontext_sw_method }, + { 0x77, 0x304, nouveau_NV04_setcontext_sw_method }, + /*terminator*/ + { 0x0, 0x0, NULL, }, + }; + + int nouveau_sw_method_execute(struct drm_device *dev, uint32_t oclass, uint32_t method) { + int i = 0; + while ( nouveau_sw_methods[ i ] . method_code != NULL ) + { + if ( nouveau_sw_methods[ i ] . oclass == oclass && nouveau_sw_methods[ i ] . mthd == method ) + { + nouveau_sw_methods[ i ] . method_code(dev, oclass, method); + return 0; + } + i ++; + } + + return 1; + } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nouveau_swmthd.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nouveau_swmthd.h --- libdrm-2.3.0.16/shared-core/nouveau_swmthd.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/nouveau_swmthd.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2007 Arthur Huillet. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/* + * Authors: + * Arthur Huillet + */ + +int nouveau_sw_method_execute(struct drm_device *dev, uint32_t oclass, uint32_t method); /* execute the given software method, returns 0 on success */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv04_fb.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv04_fb.c --- libdrm-2.3.0.16/shared-core/nv04_fb.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv04_fb.c 2009-04-20 07:00:29.000000000 +0100 @@ -21,4 +21,3 @@ nv04_fb_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv04_fifo.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv04_fifo.c --- libdrm-2.3.0.16/shared-core/nv04_fifo.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv04_fifo.c 2009-04-20 07:00:29.000000000 +0100 @@ -36,6 +36,15 @@ #define NV04_RAMFC__SIZE 32 int +nv04_fifo_channel_id(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) & + NV03_PFIFO_CACHE1_PUSH1_CHID_MASK); +} + +int nv04_fifo_create_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; @@ -71,7 +80,7 @@ { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - + NV_WRITE(NV04_PFIFO_MODE, NV_READ(NV04_PFIFO_MODE)&~(1<id)); nouveau_gpuobj_ref_del(dev, &chan->ramfc); @@ -84,15 +93,16 @@ struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; - NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, (1<<8) | chan->id); + NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, + NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id); NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET, RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT, RAMFC_RD(DMA_PUT)); - + tmp = RAMFC_RD(DMA_INSTANCE); NV_WRITE(NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp & 0xFFFF); NV_WRITE(NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp >> 16); - + NV_WRITE(NV04_PFIFO_CACHE1_DMA_STATE, RAMFC_RD(DMA_STATE)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_FETCH, RAMFC_RD(DMA_FETCH)); NV_WRITE(NV04_PFIFO_CACHE1_ENGINE, RAMFC_RD(ENGINE)); @@ -123,7 +133,6 @@ RAMFC_WR(DMA_FETCH, NV_READ(NV04_PFIFO_CACHE1_DMA_FETCH)); RAMFC_WR(ENGINE, NV_READ(NV04_PFIFO_CACHE1_ENGINE)); RAMFC_WR(PULL1_ENGINE, NV_READ(NV04_PFIFO_CACHE1_PULL1)); - + return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv04_graph.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv04_graph.c --- libdrm-2.3.0.16/shared-core/nv04_graph.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv04_graph.c 2009-04-20 07:00:29.000000000 +0100 @@ -1,4 +1,4 @@ -/* +/* * Copyright 2007 Stephane Marchesin * All Rights Reserved. * @@ -346,19 +346,49 @@ }; +struct graph_state { + int nv04[sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0])]; +}; + void nouveau_nv04_context_switch(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; struct nouveau_channel *next, *last; int chid; - chid = NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); + if (!dev) { + DRM_DEBUG("Invalid drm_device\n"); + return; + } + dev_priv = dev->dev_private; + if (!dev_priv) { + DRM_DEBUG("Invalid drm_nouveau_private\n"); + return; + } + if (!dev_priv->fifos) { + DRM_DEBUG("Invalid drm_nouveau_private->fifos\n"); + return; + } + + chid = engine->fifo.channel_id(dev); next = dev_priv->fifos[chid]; - chid = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); + if (!next) { + DRM_DEBUG("Invalid next channel\n"); + return; + } + + chid = (NV_READ(NV04_PGRAPH_CTX_USER) >> 24) & (engine->fifo.channels - 1); last = dev_priv->fifos[chid]; - DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n",last->id, next->id); + if (!last) { + DRM_DEBUG("WARNING: Invalid last channel, switch to %x\n", + next->id); + } else { + DRM_INFO("NV: PGRAPH context switch interrupt channel %x -> %x\n", + last->id, next->id); + } /* NV_WRITE(NV03_PFIFO_CACHES, 0x0); NV_WRITE(NV04_PFIFO_CACHE0_PULL0, 0x0); @@ -389,12 +419,17 @@ } int nv04_graph_create_context(struct nouveau_channel *chan) { + struct graph_state* pgraph_ctx; DRM_DEBUG("nv04_graph_context_create %d\n", chan->id); - memset(chan->pgraph_ctx, 0, sizeof(chan->pgraph_ctx)); + chan->pgraph_ctx = pgraph_ctx = drm_calloc(1, sizeof(*pgraph_ctx), + DRM_MEM_DRIVER); + + if (pgraph_ctx == NULL) + return -ENOMEM; //dev_priv->fifos[channel].pgraph_ctx_user = channel << 24; - chan->pgraph_ctx[0] = 0x0001ffff; + pgraph_ctx->nv04[0] = 0x0001ffff; /* is it really needed ??? */ //dev_priv->fifos[channel].pgraph_ctx[1] = NV_READ(NV_PGRAPH_DEBUG_4); //dev_priv->fifos[channel].pgraph_ctx[2] = NV_READ(0x004006b0); @@ -404,16 +439,21 @@ void nv04_graph_destroy_context(struct nouveau_channel *chan) { + struct graph_state* pgraph_ctx = chan->pgraph_ctx; + + drm_free(pgraph_ctx, sizeof(*pgraph_ctx), DRM_MEM_DRIVER); + chan->pgraph_ctx = NULL; } int nv04_graph_load_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; int i; for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) - NV_WRITE(nv04_graph_ctx_regs[i], chan->pgraph_ctx[i]); + NV_WRITE(nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]); return 0; } @@ -422,10 +462,11 @@ { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; int i; for (i = 0; i < sizeof(nv04_graph_ctx_regs)/sizeof(nv04_graph_ctx_regs[0]); i++) - chan->pgraph_ctx[i] = NV_READ(nv04_graph_ctx_regs[i]); + pgraph_ctx->nv04[i] = NV_READ(nv04_graph_ctx_regs[i]); return 0; } @@ -442,20 +483,22 @@ NV_WRITE(NV03_PGRAPH_INTR, 0xFFFFFFFF); NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); - // check the context is big enough - if ( sizeof(nv04_graph_ctx_regs)>sizeof(dev_priv->fifos[0]->pgraph_ctx) ) - DRM_ERROR("pgraph_ctx too small\n"); - - NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x000001FF); + NV_WRITE(NV04_PGRAPH_VALID1, 0); + NV_WRITE(NV04_PGRAPH_VALID2, 0); + /*NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x000001FF); + NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x001FFFFF);*/ NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x1231c000); - NV_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100); - NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11d5f870); - NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x0004FF31); - NV_WRITE(NV04_PGRAPH_DEBUG_3, 0x4004FF31 | - (0x00D00000) | - (1<<29) | - (1<<31)); - NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xfad4ff31); + /*1231C000 blob, 001 haiku*/ + //*V_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);*/ + NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x72111100); + /*0x72111100 blob , 01 haiku*/ + /*NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11d5f870);*/ + NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x11d5f071); + /*haiku same*/ + + /*NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xfad4ff31);*/ + NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xf0d4ff31); + /*haiku and blob 10d4*/ NV_WRITE(NV04_PGRAPH_STATE , 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_CTX_CONTROL , 0x10010100); @@ -471,4 +514,3 @@ void nv04_graph_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv04_instmem.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv04_instmem.c --- libdrm-2.3.0.16/shared-core/nv04_instmem.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv04_instmem.c 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,159 @@ +#include "drmP.h" +#include "drm.h" +#include "nouveau_drv.h" + +static void +nv04_instmem_determine_amount(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + int i; + + /* Figure out how much instance memory we need */ + if (dev_priv->card_type >= NV_40) { + /* We'll want more instance memory than this on some NV4x cards. + * There's a 16MB aperture to play with that maps onto the end + * of vram. For now, only reserve a small piece until we know + * more about what each chipset requires. + */ + dev_priv->ramin_rsvd_vram = (1*1024* 1024); + } else { + /*XXX: what *are* the limits on ramin_rsvd_vram = (512*1024); + } + DRM_DEBUG("RAMIN size: %dKiB\n", dev_priv->ramin_rsvd_vram>>10); + + /* Clear all of it, except the BIOS image that's in the first 64KiB */ + for (i=(64*1024); iramin_rsvd_vram; i+=4) + NV_WI32(i, 0x00000000); +} + +static void +nv04_instmem_configure_fixed_tables(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; + + /* FIFO hash table (RAMHT) + * use 4k hash table at RAMIN+0x10000 + * TODO: extend the hash table + */ + dev_priv->ramht_offset = 0x10000; + dev_priv->ramht_bits = 9; + dev_priv->ramht_size = (1 << dev_priv->ramht_bits); + DRM_DEBUG("RAMHT offset=0x%x, size=%d\n", dev_priv->ramht_offset, + dev_priv->ramht_size); + + /* FIFO runout table (RAMRO) - 512k at 0x11200 */ + dev_priv->ramro_offset = 0x11200; + dev_priv->ramro_size = 512; + DRM_DEBUG("RAMRO offset=0x%x, size=%d\n", dev_priv->ramro_offset, + dev_priv->ramro_size); + + /* FIFO context table (RAMFC) + * NV40 : Not sure exactly how to position RAMFC on some cards, + * 0x30002 seems to position it at RAMIN+0x20000 on these + * cards. RAMFC is 4kb (32 fifos, 128byte entries). + * Others: Position RAMFC at RAMIN+0x11400 + */ + switch(dev_priv->card_type) + { + case NV_40: + case NV_44: + dev_priv->ramfc_offset = 0x20000; + dev_priv->ramfc_size = engine->fifo.channels * + nouveau_fifo_ctx_size(dev); + break; + case NV_30: + case NV_20: + case NV_17: + case NV_11: + case NV_10: + case NV_04: + default: + dev_priv->ramfc_offset = 0x11400; + dev_priv->ramfc_size = engine->fifo.channels * + nouveau_fifo_ctx_size(dev); + break; + } + DRM_DEBUG("RAMFC offset=0x%x, size=%d\n", dev_priv->ramfc_offset, + dev_priv->ramfc_size); +} + +int nv04_instmem_init(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + uint32_t offset; + int ret = 0; + + nv04_instmem_determine_amount(dev); + nv04_instmem_configure_fixed_tables(dev); + + /* Create a heap to manage RAMIN allocations, we don't allocate + * the space that was reserved for RAMHT/FC/RO. + */ + offset = dev_priv->ramfc_offset + dev_priv->ramfc_size; + + /* On my NV4E, there's *something* clobbering the 16KiB just after + * where we setup these fixed tables. No idea what it is just yet, + * so reserve this space on all NV4X cards for now. + */ + if (dev_priv->card_type >= NV_40) + offset += 16*1024; + + ret = nouveau_mem_init_heap(&dev_priv->ramin_heap, + offset, dev_priv->ramin_rsvd_vram - offset); + if (ret) { + dev_priv->ramin_heap = NULL; + DRM_ERROR("Failed to init RAMIN heap\n"); + } + + return ret; +} + +void +nv04_instmem_takedown(struct drm_device *dev) +{ +} + +int +nv04_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz) +{ + if (gpuobj->im_backing) + return -EINVAL; + + return 0; +} + +void +nv04_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + if (gpuobj && gpuobj->im_backing) { + if (gpuobj->im_bound) + dev_priv->Engine.instmem.unbind(dev, gpuobj); + gpuobj->im_backing = NULL; + } +} + +int +nv04_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) +{ + if (!gpuobj->im_pramin || gpuobj->im_bound) + return -EINVAL; + + gpuobj->im_bound = 1; + return 0; +} + +int +nv04_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) +{ + if (gpuobj->im_bound == 0) + return -EINVAL; + + gpuobj->im_bound = 0; + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv04_mc.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv04_mc.c --- libdrm-2.3.0.16/shared-core/nv04_mc.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv04_mc.c 2009-04-20 07:00:29.000000000 +0100 @@ -20,4 +20,3 @@ nv04_mc_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv04_timer.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv04_timer.c --- libdrm-2.3.0.16/shared-core/nv04_timer.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv04_timer.c 2009-04-20 07:00:29.000000000 +0100 @@ -11,8 +11,17 @@ NV_WRITE(NV04_PTIMER_INTR_EN_0, 0x00000000); NV_WRITE(NV04_PTIMER_INTR_0, 0xFFFFFFFF); - NV_WRITE(NV04_PTIMER_NUMERATOR, 0x00000008); - NV_WRITE(NV04_PTIMER_DENOMINATOR, 0x00000003); + /* Just use the pre-existing values when possible for now; these regs + * are not written in nv (driver writer missed a /4 on the address), and + * writing 8 and 3 to the correct regs breaks the timings on the LVDS + * hardware sequencing microcode. + * A correct solution (involving calculations with the GPU PLL) can + * be done when kernel modesetting lands + */ + if (!NV_READ(NV04_PTIMER_NUMERATOR) || !NV_READ(NV04_PTIMER_DENOMINATOR)) { + NV_WRITE(NV04_PTIMER_NUMERATOR, 0x00000008); + NV_WRITE(NV04_PTIMER_DENOMINATOR, 0x00000003); + } return 0; } @@ -42,4 +51,3 @@ nv04_timer_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv10_fb.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv10_fb.c --- libdrm-2.3.0.16/shared-core/nv10_fb.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv10_fb.c 2009-04-20 07:00:29.000000000 +0100 @@ -23,4 +23,3 @@ nv10_fb_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv10_fifo.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv10_fifo.c --- libdrm-2.3.0.16/shared-core/nv10_fifo.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv10_fifo.c 2009-04-20 07:00:29.000000000 +0100 @@ -37,6 +37,15 @@ #define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32) int +nv10_fifo_channel_id(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) & + NV10_PFIFO_CACHE1_PUSH1_CHID_MASK); +} + +int nv10_fifo_create_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; @@ -87,7 +96,8 @@ struct drm_nouveau_private *dev_priv = dev->dev_private; uint32_t tmp; - NV_WRITE(NV03_PFIFO_CACHE1_PUSH1 , 0x00000100 | chan->id); + NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, + NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id); NV_WRITE(NV04_PFIFO_CACHE1_DMA_GET , RAMFC_RD(DMA_GET)); NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUT , RAMFC_RD(DMA_PUT)); @@ -157,4 +167,3 @@ return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv10_graph.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv10_graph.c --- libdrm-2.3.0.16/shared-core/nv10_graph.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv10_graph.c 2009-04-20 07:00:29.000000000 +0100 @@ -1,4 +1,4 @@ -/* +/* * Copyright 2007 Matthieu CASTET * All Rights Reserved. * @@ -42,244 +42,6 @@ uint32_t pipe_0x7800[0x0c0/4]; }; -/* TODO dynamic allocation ??? */ -static struct pipe_state pipe_state[NV10_FIFO_NUMBER]; - -static void nv10_graph_save_pipe(struct nouveau_channel *chan) { - struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; - struct pipe_state *fifo_pipe_state = pipe_state + chan->id; - int i; -#define PIPE_SAVE(addr) \ - do { \ - NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, addr); \ - for (i=0; i < sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]); i++) \ - fifo_pipe_state->pipe_##addr[i] = NV_READ(NV10_PGRAPH_PIPE_DATA); \ - } while (0) - - PIPE_SAVE(0x4400); - PIPE_SAVE(0x0200); - PIPE_SAVE(0x6400); - PIPE_SAVE(0x6800); - PIPE_SAVE(0x6c00); - PIPE_SAVE(0x7000); - PIPE_SAVE(0x7400); - PIPE_SAVE(0x7800); - PIPE_SAVE(0x0040); - PIPE_SAVE(0x0000); - -#undef PIPE_SAVE -} - -static void nv10_graph_load_pipe(struct nouveau_channel *chan) { - struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; - struct pipe_state *fifo_pipe_state = pipe_state + chan->id; - int i; - uint32_t xfmode0, xfmode1; -#define PIPE_RESTORE(addr) \ - do { \ - NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, addr); \ - for (i=0; i < sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]); i++) \ - NV_WRITE(NV10_PGRAPH_PIPE_DATA, fifo_pipe_state->pipe_##addr[i]); \ - } while (0) - - - nouveau_wait_for_idle(dev); - /* XXX check haiku comments */ - xfmode0 = NV_READ(NV10_PGRAPH_XFMODE0); - xfmode1 = NV_READ(NV10_PGRAPH_XFMODE1); - NV_WRITE(NV10_PGRAPH_XFMODE0, 0x10000000); - NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000); - NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0); - for (i = 0; i < 4; i++) - NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); - for (i = 0; i < 4; i++) - NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - - NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0); - for (i = 0; i < 3; i++) - NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); - - NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80); - for (i = 0; i < 3; i++) - NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); - - NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040); - NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000008); - - - PIPE_RESTORE(0x0200); - nouveau_wait_for_idle(dev); - - /* restore XFMODE */ - NV_WRITE(NV10_PGRAPH_XFMODE0, xfmode0); - NV_WRITE(NV10_PGRAPH_XFMODE1, xfmode1); - PIPE_RESTORE(0x6400); - PIPE_RESTORE(0x6800); - PIPE_RESTORE(0x6c00); - PIPE_RESTORE(0x7000); - PIPE_RESTORE(0x7400); - PIPE_RESTORE(0x7800); - PIPE_RESTORE(0x4400); - PIPE_RESTORE(0x0000); - PIPE_RESTORE(0x0040); - nouveau_wait_for_idle(dev); - -#undef PIPE_RESTORE -} - -static void nv10_graph_create_pipe(struct nouveau_channel *chan) { - struct pipe_state *fifo_pipe_state = pipe_state + chan->id; - uint32_t *fifo_pipe_state_addr; - int i; -#define PIPE_INIT(addr) \ - do { \ - fifo_pipe_state_addr = fifo_pipe_state->pipe_##addr; \ - } while (0) -#define PIPE_INIT_END(addr) \ - do { \ - if (fifo_pipe_state_addr != \ - sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]) + fifo_pipe_state->pipe_##addr) \ - DRM_ERROR("incomplete pipe init for 0x%x : %p/%p\n", addr, fifo_pipe_state_addr, \ - sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]) + fifo_pipe_state->pipe_##addr); \ - } while (0) -#define NV_WRITE_PIPE_INIT(value) *(fifo_pipe_state_addr++) = value - - PIPE_INIT(0x0200); - for (i = 0; i < 48; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x0200); - - PIPE_INIT(0x6400); - for (i = 0; i < 211; i++) - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x3f800000); - NV_WRITE_PIPE_INIT(0x40000000); - NV_WRITE_PIPE_INIT(0x40000000); - NV_WRITE_PIPE_INIT(0x40000000); - NV_WRITE_PIPE_INIT(0x40000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x3f800000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x3f000000); - NV_WRITE_PIPE_INIT(0x3f000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x3f800000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x3f800000); - NV_WRITE_PIPE_INIT(0x3f800000); - NV_WRITE_PIPE_INIT(0x3f800000); - NV_WRITE_PIPE_INIT(0x3f800000); - PIPE_INIT_END(0x6400); - - PIPE_INIT(0x6800); - for (i = 0; i < 162; i++) - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x3f800000); - for (i = 0; i < 25; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x6800); - - PIPE_INIT(0x6c00); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0xbf800000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x6c00); - - PIPE_INIT(0x7000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x00000000); - NV_WRITE_PIPE_INIT(0x7149f2ca); - for (i = 0; i < 35; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x7000); - - PIPE_INIT(0x7400); - for (i = 0; i < 48; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x7400); - - PIPE_INIT(0x7800); - for (i = 0; i < 48; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x7800); - - PIPE_INIT(0x4400); - for (i = 0; i < 32; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x4400); - - PIPE_INIT(0x0000); - for (i = 0; i < 16; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x0000); - - PIPE_INIT(0x0040); - for (i = 0; i < 4; i++) - NV_WRITE_PIPE_INIT(0x00000000); - PIPE_INIT_END(0x0040); - -#undef PIPE_INIT -#undef PIPE_INIT_END -#undef NV_WRITE_PIPE_INIT -} - static int nv10_graph_ctx_regs [] = { NV10_PGRAPH_CTX_SWITCH1, NV10_PGRAPH_CTX_SWITCH2, @@ -623,20 +385,269 @@ 0x00400a04, }; +struct graph_state { + int nv10[sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0])]; + int nv17[sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0])]; + struct pipe_state pipe_state; +}; + +static void nv10_graph_save_pipe(struct nouveau_channel *chan) { + struct drm_device *dev = chan->dev; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; + struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state; + int i; +#define PIPE_SAVE(addr) \ + do { \ + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, addr); \ + for (i=0; i < sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]); i++) \ + fifo_pipe_state->pipe_##addr[i] = NV_READ(NV10_PGRAPH_PIPE_DATA); \ + } while (0) + + PIPE_SAVE(0x4400); + PIPE_SAVE(0x0200); + PIPE_SAVE(0x6400); + PIPE_SAVE(0x6800); + PIPE_SAVE(0x6c00); + PIPE_SAVE(0x7000); + PIPE_SAVE(0x7400); + PIPE_SAVE(0x7800); + PIPE_SAVE(0x0040); + PIPE_SAVE(0x0000); + +#undef PIPE_SAVE +} + +static void nv10_graph_load_pipe(struct nouveau_channel *chan) { + struct drm_device *dev = chan->dev; + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; + struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state; + int i; + uint32_t xfmode0, xfmode1; +#define PIPE_RESTORE(addr) \ + do { \ + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, addr); \ + for (i=0; i < sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]); i++) \ + NV_WRITE(NV10_PGRAPH_PIPE_DATA, fifo_pipe_state->pipe_##addr[i]); \ + } while (0) + + + nouveau_wait_for_idle(dev); + /* XXX check haiku comments */ + xfmode0 = NV_READ(NV10_PGRAPH_XFMODE0); + xfmode1 = NV_READ(NV10_PGRAPH_XFMODE1); + NV_WRITE(NV10_PGRAPH_XFMODE0, 0x10000000); + NV_WRITE(NV10_PGRAPH_XFMODE1, 0x00000000); + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0); + for (i = 0; i < 4; i++) + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + for (i = 0; i < 4; i++) + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0); + for (i = 0; i < 3; i++) + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x3f800000); + + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80); + for (i = 0; i < 3; i++) + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000000); + + NV_WRITE(NV10_PGRAPH_PIPE_ADDRESS, 0x00000040); + NV_WRITE(NV10_PGRAPH_PIPE_DATA, 0x00000008); + + + PIPE_RESTORE(0x0200); + nouveau_wait_for_idle(dev); + + /* restore XFMODE */ + NV_WRITE(NV10_PGRAPH_XFMODE0, xfmode0); + NV_WRITE(NV10_PGRAPH_XFMODE1, xfmode1); + PIPE_RESTORE(0x6400); + PIPE_RESTORE(0x6800); + PIPE_RESTORE(0x6c00); + PIPE_RESTORE(0x7000); + PIPE_RESTORE(0x7400); + PIPE_RESTORE(0x7800); + PIPE_RESTORE(0x4400); + PIPE_RESTORE(0x0000); + PIPE_RESTORE(0x0040); + nouveau_wait_for_idle(dev); + +#undef PIPE_RESTORE +} + +static void nv10_graph_create_pipe(struct nouveau_channel *chan) { + struct graph_state* pgraph_ctx = chan->pgraph_ctx; + struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state; + uint32_t *fifo_pipe_state_addr; + int i; +#define PIPE_INIT(addr) \ + do { \ + fifo_pipe_state_addr = fifo_pipe_state->pipe_##addr; \ + } while (0) +#define PIPE_INIT_END(addr) \ + do { \ + if (fifo_pipe_state_addr != \ + sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]) + fifo_pipe_state->pipe_##addr) \ + DRM_ERROR("incomplete pipe init for 0x%x : %p/%p\n", addr, fifo_pipe_state_addr, \ + sizeof(fifo_pipe_state->pipe_##addr)/sizeof(fifo_pipe_state->pipe_##addr[0]) + fifo_pipe_state->pipe_##addr); \ + } while (0) +#define NV_WRITE_PIPE_INIT(value) *(fifo_pipe_state_addr++) = value + + PIPE_INIT(0x0200); + for (i = 0; i < 48; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x0200); + + PIPE_INIT(0x6400); + for (i = 0; i < 211; i++) + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x3f800000); + NV_WRITE_PIPE_INIT(0x40000000); + NV_WRITE_PIPE_INIT(0x40000000); + NV_WRITE_PIPE_INIT(0x40000000); + NV_WRITE_PIPE_INIT(0x40000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x3f800000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x3f000000); + NV_WRITE_PIPE_INIT(0x3f000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x3f800000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x3f800000); + NV_WRITE_PIPE_INIT(0x3f800000); + NV_WRITE_PIPE_INIT(0x3f800000); + NV_WRITE_PIPE_INIT(0x3f800000); + PIPE_INIT_END(0x6400); + + PIPE_INIT(0x6800); + for (i = 0; i < 162; i++) + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x3f800000); + for (i = 0; i < 25; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x6800); + + PIPE_INIT(0x6c00); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0xbf800000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x6c00); + + PIPE_INIT(0x7000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x00000000); + NV_WRITE_PIPE_INIT(0x7149f2ca); + for (i = 0; i < 35; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x7000); + + PIPE_INIT(0x7400); + for (i = 0; i < 48; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x7400); + + PIPE_INIT(0x7800); + for (i = 0; i < 48; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x7800); + + PIPE_INIT(0x4400); + for (i = 0; i < 32; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x4400); + + PIPE_INIT(0x0000); + for (i = 0; i < 16; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x0000); + + PIPE_INIT(0x0040); + for (i = 0; i < 4; i++) + NV_WRITE_PIPE_INIT(0x00000000); + PIPE_INIT_END(0x0040); + +#undef PIPE_INIT +#undef PIPE_INIT_END +#undef NV_WRITE_PIPE_INIT +} + static int nv10_graph_ctx_regs_find_offset(struct drm_device *dev, int reg) { - struct drm_nouveau_private *dev_priv = dev->dev_private; - int i, j; + int i; for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++) { if (nv10_graph_ctx_regs[i] == reg) return i; } - if (dev_priv->chipset>=0x17) { - for (j = 0; j < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++,j++) { - if (nv17_graph_ctx_regs[j] == reg) - return i; - } + DRM_ERROR("unknow offset nv10_ctx_regs %d\n", reg); + return -1; +} + +static int nv17_graph_ctx_regs_find_offset(struct drm_device *dev, int reg) +{ + int i; + for (i = 0; i < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++) { + if (nv17_graph_ctx_regs[i] == reg) + return i; } + DRM_ERROR("unknow offset nv17_ctx_regs %d\n", reg); return -1; } @@ -644,13 +655,14 @@ { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - int i, j; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; + int i; for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++) - NV_WRITE(nv10_graph_ctx_regs[i], chan->pgraph_ctx[i]); + NV_WRITE(nv10_graph_ctx_regs[i], pgraph_ctx->nv10[i]); if (dev_priv->chipset>=0x17) { - for (j = 0; j < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++,j++) - NV_WRITE(nv17_graph_ctx_regs[j], chan->pgraph_ctx[i]); + for (i = 0; i < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++) + NV_WRITE(nv17_graph_ctx_regs[i], pgraph_ctx->nv17[i]); } nv10_graph_load_pipe(chan); @@ -662,13 +674,14 @@ { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - int i, j; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; + int i; for (i = 0; i < sizeof(nv10_graph_ctx_regs)/sizeof(nv10_graph_ctx_regs[0]); i++) - chan->pgraph_ctx[i] = NV_READ(nv10_graph_ctx_regs[i]); + pgraph_ctx->nv10[i] = NV_READ(nv10_graph_ctx_regs[i]); if (dev_priv->chipset>=0x17) { - for (j = 0; j < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++,j++) - chan->pgraph_ctx[i] = NV_READ(nv17_graph_ctx_regs[j]); + for (i = 0; i < sizeof(nv17_graph_ctx_regs)/sizeof(nv17_graph_ctx_regs[0]); i++) + pgraph_ctx->nv17[i] = NV_READ(nv17_graph_ctx_regs[i]); } nv10_graph_save_pipe(chan); @@ -679,6 +692,7 @@ void nouveau_nv10_context_switch(struct drm_device *dev) { struct drm_nouveau_private *dev_priv; + struct nouveau_engine *engine; struct nouveau_channel *next, *last; int chid; @@ -695,20 +709,23 @@ DRM_DEBUG("Invalid drm_nouveau_private->fifos\n"); return; } + engine = &dev_priv->Engine; - chid = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20)&(nouveau_fifo_number(dev)-1); + chid = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20) & + (engine->fifo.channels - 1); next = dev_priv->fifos[chid]; if (!next) { - DRM_DEBUG("Invalid next channel\n"); + DRM_ERROR("Invalid next channel\n"); return; } - chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); + chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & + (engine->fifo.channels - 1); last = dev_priv->fifos[chid]; if (!last) { - DRM_DEBUG("WARNING: Invalid last channel, switch to %x\n", + DRM_INFO("WARNING: Invalid last channel, switch to %x\n", next->id); } else { DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n", @@ -719,7 +736,7 @@ if (last) { nouveau_wait_for_idle(dev); nv10_graph_save_context(last); - } + } nouveau_wait_for_idle(dev); @@ -737,16 +754,27 @@ #define NV_WRITE_CTX(reg, val) do { \ int offset = nv10_graph_ctx_regs_find_offset(dev, reg); \ if (offset > 0) \ - chan->pgraph_ctx[offset] = val; \ + pgraph_ctx->nv10[offset] = val; \ + } while (0) + +#define NV17_WRITE_CTX(reg, val) do { \ + int offset = nv17_graph_ctx_regs_find_offset(dev, reg); \ + if (offset > 0) \ + pgraph_ctx->nv17[offset] = val; \ } while (0) int nv10_graph_create_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; + struct graph_state* pgraph_ctx; DRM_DEBUG("nv10_graph_context_create %d\n", chan->id); - memset(chan->pgraph_ctx, 0, sizeof(chan->pgraph_ctx)); + chan->pgraph_ctx = pgraph_ctx = drm_calloc(1, sizeof(*pgraph_ctx), + DRM_MEM_DRIVER); + + if (pgraph_ctx == NULL) + return -ENOMEM; /* mmio trace suggest that should be done in ddx with methods/objects */ #if 0 @@ -786,12 +814,12 @@ NV_WRITE_CTX(0x00400e34, 0x00080008); if (dev_priv->chipset>=0x17) { /* is it really needed ??? */ - NV_WRITE_CTX(NV10_PGRAPH_DEBUG_4, NV_READ(NV10_PGRAPH_DEBUG_4)); - NV_WRITE_CTX(0x004006b0, NV_READ(0x004006b0)); - NV_WRITE_CTX(0x00400eac, 0x0fff0000); - NV_WRITE_CTX(0x00400eb0, 0x0fff0000); - NV_WRITE_CTX(0x00400ec0, 0x00000080); - NV_WRITE_CTX(0x00400ed0, 0x00000080); + NV17_WRITE_CTX(NV10_PGRAPH_DEBUG_4, NV_READ(NV10_PGRAPH_DEBUG_4)); + NV17_WRITE_CTX(0x004006b0, NV_READ(0x004006b0)); + NV17_WRITE_CTX(0x00400eac, 0x0fff0000); + NV17_WRITE_CTX(0x00400eb0, 0x0fff0000); + NV17_WRITE_CTX(0x00400ec0, 0x00000080); + NV17_WRITE_CTX(0x00400ed0, 0x00000080); } NV_WRITE_CTX(NV10_PGRAPH_CTX_USER, chan->id << 24); @@ -803,9 +831,18 @@ { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_engine *engine = &dev_priv->Engine; + struct graph_state* pgraph_ctx = chan->pgraph_ctx; int chid; - chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); + drm_free(pgraph_ctx, sizeof(*pgraph_ctx), DRM_MEM_DRIVER); + chan->pgraph_ctx = NULL; + + chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (engine->fifo.channels - 1); + + /* This code seems to corrupt the 3D pipe, but blob seems to do similar things ???? + */ +#if 0 /* does this avoid a potential context switch while we are written graph * reg, or we should mask graph interrupt ??? */ @@ -814,10 +851,16 @@ DRM_INFO("cleanning a channel with graph in current context\n"); nouveau_wait_for_idle(dev); DRM_INFO("reseting current graph context\n"); - nv10_graph_create_context(chan); + /* can't be call here because of dynamic mem alloc */ + //nv10_graph_create_context(chan); nv10_graph_load_context(chan); } - NV_WRITE(NV04_PGRAPH_FIFO,0x1); + NV_WRITE(NV04_PGRAPH_FIFO, 0x1); +#else + if (chid == chan->id) { + DRM_INFO("cleanning a channel with graph in current context\n"); + } +#endif } int nv10_graph_init(struct drm_device *dev) { @@ -869,4 +912,3 @@ void nv10_graph_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv20_graph.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv20_graph.c --- libdrm-2.3.0.16/shared-core/nv20_graph.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv20_graph.c 2009-04-20 07:00:29.000000000 +0100 @@ -1,147 +1,686 @@ -/* - * Copyright 2007 Matthieu CASTET - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - #include "drmP.h" #include "drm.h" #include "nouveau_drv.h" #include "nouveau_drm.h" -#define NV20_GRCTX_SIZE (3529*4) +/* + * NV20 + * ----- + * There are 3 families : + * NV20 is 0x10de:0x020* + * NV25/28 is 0x10de:0x025* / 0x10de:0x028* + * NV2A is 0x10de:0x02A0 + * + * NV30 + * ----- + * There are 3 families : + * NV30/31 is 0x10de:0x030* / 0x10de:0x031* + * NV34 is 0x10de:0x032* + * NV35/36 is 0x10de:0x033* / 0x10de:0x034* + * + * Not seen in the wild, no dumps (probably NV35) : + * NV37 is 0x10de:0x00fc, 0x10de:0x00fd + * NV38 is 0x10de:0x0333, 0x10de:0x00fe + * + */ -int nv20_graph_create_context(struct nouveau_channel *chan) { - struct drm_device *dev = chan->dev; +#define NV20_GRCTX_SIZE (3580*4) +#define NV25_GRCTX_SIZE (3529*4) +#define NV2A_GRCTX_SIZE (3500*4) + +#define NV30_31_GRCTX_SIZE (24392) +#define NV34_GRCTX_SIZE (18140) +#define NV35_36_GRCTX_SIZE (22396) + +static void nv20_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ struct drm_nouveau_private *dev_priv = dev->dev_private; - unsigned int ctx_size = NV20_GRCTX_SIZE; - int ret; + int i; +/* +write32 #1 block at +0x00740adc NV_PRAMIN+0x40adc of 3369 (0xd29) elements: ++0x00740adc: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b3c: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000 ++0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740bbc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740bdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740bfc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 + ++0x00740c1c: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000 ++0x00740c3c: 00000000 00000000 00000000 44400000 00000000 00000000 00000000 00000000 ++0x00740c5c: 00000000 00000000 00000000 00000000 00000000 00000000 00030303 00030303 ++0x00740c7c: 00030303 00030303 00000000 00000000 00000000 00000000 00080000 00080000 ++0x00740c9c: 00080000 00080000 00000000 00000000 01012000 01012000 01012000 01012000 ++0x00740cbc: 000105b8 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008 ++0x00740cdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740cfc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 ++0x00740d1c: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 ++0x00740d3c: 00000000 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000 + ++0x00740d5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740d7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740d9c: 00000001 00000000 00004000 00000000 00000000 00000001 00000000 00040000 ++0x00740dbc: 00010000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740ddc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +... +*/ + INSTANCE_WR(ctx, (0x33c/4)+0, 0xffff0000); + INSTANCE_WR(ctx, (0x33c/4)+25, 0x0fff0000); + INSTANCE_WR(ctx, (0x33c/4)+26, 0x0fff0000); + INSTANCE_WR(ctx, (0x33c/4)+80, 0x00000101); + INSTANCE_WR(ctx, (0x33c/4)+85, 0x00000111); + INSTANCE_WR(ctx, (0x33c/4)+91, 0x44400000); + for (i = 0; i < 4; ++i) + INSTANCE_WR(ctx, (0x33c/4)+102+i, 0x00030303); + for (i = 0; i < 4; ++i) + INSTANCE_WR(ctx, (0x33c/4)+110+i, 0x00080000); + for (i = 0; i < 4; ++i) + INSTANCE_WR(ctx, (0x33c/4)+116+i, 0x01012000); + for (i = 0; i < 4; ++i) + INSTANCE_WR(ctx, (0x33c/4)+120+i, 0x000105b8); + for (i = 0; i < 4; ++i) + INSTANCE_WR(ctx, (0x33c/4)+124+i, 0x00080008); + for (i = 0; i < 16; ++i) + INSTANCE_WR(ctx, (0x33c/4)+136+i, 0x07ff0000); + INSTANCE_WR(ctx, (0x33c/4)+154, 0x4b7fffff); + INSTANCE_WR(ctx, (0x33c/4)+176, 0x00000001); + INSTANCE_WR(ctx, (0x33c/4)+178, 0x00004000); + INSTANCE_WR(ctx, (0x33c/4)+181, 0x00000001); + INSTANCE_WR(ctx, (0x33c/4)+183, 0x00040000); + INSTANCE_WR(ctx, (0x33c/4)+184, 0x00010000); + +/* +... ++0x0074239c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x007423bc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x007423dc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x007423fc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 +... ++0x00742bdc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742bfc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742c1c: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742c3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +... +*/ + for (i = 0; i < 0x880; i += 0x10) { + INSTANCE_WR(ctx, ((0x1c1c + i)/4)+0, 0x10700ff9); + INSTANCE_WR(ctx, ((0x1c1c + i)/4)+1, 0x0436086c); + INSTANCE_WR(ctx, ((0x1c1c + i)/4)+2, 0x000c001b); + } - if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16, - NVOBJ_FLAG_ZERO_ALLOC, - &chan->ramin_grctx))) - return ret; +/* +write32 #1 block at +0x00742fbc NV_PRAMIN+0x42fbc of 4 (0x4) elements: ++0x00742fbc: 3f800000 00000000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x281c/4), 0x3f800000); + +/* +write32 #1 block at +0x00742ffc NV_PRAMIN+0x42ffc of 12 (0xc) elements: ++0x00742ffc: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000 ++0x0074301c: 00000000 bf800000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x285c/4)+0, 0x40000000); + INSTANCE_WR(ctx, (0x285c/4)+1, 0x3f800000); + INSTANCE_WR(ctx, (0x285c/4)+2, 0x3f000000); + INSTANCE_WR(ctx, (0x285c/4)+4, 0x40000000); + INSTANCE_WR(ctx, (0x285c/4)+5, 0x3f800000); + INSTANCE_WR(ctx, (0x285c/4)+7, 0xbf800000); + INSTANCE_WR(ctx, (0x285c/4)+9, 0xbf800000); + +/* +write32 #1 block at +0x00742fcc NV_PRAMIN+0x42fcc of 4 (0x4) elements: ++0x00742fcc: 00000000 3f800000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x282c/4)+1, 0x3f800000); + +/* +write32 #1 block at +0x0074302c NV_PRAMIN+0x4302c of 4 (0x4) elements: ++0x0074302c: 00000000 00000000 00000000 00000000 +write32 #1 block at +0x00743c9c NV_PRAMIN+0x43c9c of 4 (0x4) elements: ++0x00743c9c: 00000000 00000000 00000000 00000000 +write32 #1 block at +0x00743c3c NV_PRAMIN+0x43c3c of 8 (0x8) elements: ++0x00743c3c: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x349c/4)+2, 0x000fe000); + +/* +write32 #1 block at +0x00743c6c NV_PRAMIN+0x43c6c of 4 (0x4) elements: ++0x00743c6c: 00000000 00000000 00000000 00000000 +write32 #1 block at +0x00743ccc NV_PRAMIN+0x43ccc of 4 (0x4) elements: ++0x00743ccc: 00000000 000003f8 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x352c/4)+1, 0x000003f8); + +/* write32 #1 NV_PRAMIN+0x43ce0 <- 0x002fe000 */ + INSTANCE_WR(ctx, 0x3540/4, 0x002fe000); + +/* +write32 #1 block at +0x00743cfc NV_PRAMIN+0x43cfc of 8 (0x8) elements: ++0x00743cfc: 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c +*/ + for (i = 0; i < 8; ++i) + INSTANCE_WR(ctx, (0x355c/4)+i, 0x001c527c); +} - /* Initialise default context values */ - INSTANCE_WR(chan->ramin_grctx->gpuobj, 10, chan->id<<24); /* CTX_USER */ +static void nv2a_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + int i; - INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, - chan->ramin_grctx->instance >> 4); - return 0; + INSTANCE_WR(ctx, 0x33c/4, 0xffff0000); + for(i = 0x3a0; i< 0x3a8; i += 4) + INSTANCE_WR(ctx, i/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x47c/4, 0x00000101); + INSTANCE_WR(ctx, 0x490/4, 0x00000111); + INSTANCE_WR(ctx, 0x4a8/4, 0x44400000); + for(i = 0x4d4; i< 0x4e4; i += 4) + INSTANCE_WR(ctx, i/4, 0x00030303); + for(i = 0x4f4; i< 0x504; i += 4) + INSTANCE_WR(ctx, i/4, 0x00080000); + for(i = 0x50c; i< 0x51c; i += 4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for(i = 0x51c; i< 0x52c; i += 4) + INSTANCE_WR(ctx, i/4, 0x000105b8); + for(i = 0x52c; i< 0x53c; i += 4) + INSTANCE_WR(ctx, i/4, 0x00080008); + for(i = 0x55c; i< 0x59c; i += 4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x5a4/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x5fc/4, 0x00000001); + INSTANCE_WR(ctx, 0x604/4, 0x00004000); + INSTANCE_WR(ctx, 0x610/4, 0x00000001); + INSTANCE_WR(ctx, 0x618/4, 0x00040000); + INSTANCE_WR(ctx, 0x61c/4, 0x00010000); + + for (i=0x1a9c; i <= 0x22fc/4; i += 32) { + INSTANCE_WR(ctx, i/4 , 0x10700ff9); + INSTANCE_WR(ctx, i/4 + 1, 0x0436086c); + INSTANCE_WR(ctx, i/4 + 2, 0x000c001b); + } + + INSTANCE_WR(ctx, 0x269c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x26b0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x26dc/4, 0x40000000); + INSTANCE_WR(ctx, 0x26e0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x26e4/4, 0x3f000000); + INSTANCE_WR(ctx, 0x26ec/4, 0x40000000); + INSTANCE_WR(ctx, 0x26f0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x26f8/4, 0xbf800000); + INSTANCE_WR(ctx, 0x2700/4, 0xbf800000); + INSTANCE_WR(ctx, 0x3024/4, 0x000fe000); + INSTANCE_WR(ctx, 0x30a0/4, 0x000003f8); + INSTANCE_WR(ctx, 0x33fc/4, 0x002fe000); + for(i = 0x341c; i< 0x343c; i += 4) + INSTANCE_WR(ctx, i/4, 0x001c527c); } -void nv20_graph_destroy_context(struct nouveau_channel *chan) { - struct drm_device *dev = chan->dev; +static void nv25_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ struct drm_nouveau_private *dev_priv = dev->dev_private; + int i; +/* +write32 #1 block at +0x00740a7c NV_PRAMIN.GRCTX0+0x35c of 173 (0xad) elements: ++0x00740a7c: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740a9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740abc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740adc: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000 ++0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 + ++0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740bbc: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000 ++0x00740bdc: 00000000 00000000 00000000 00000080 ffff0000 00000001 00000000 00000000 ++0x00740bfc: 00000000 00000000 44400000 00000000 00000000 00000000 00000000 00000000 ++0x00740c1c: 4b800000 00000000 00000000 00000000 00000000 00030303 00030303 00030303 ++0x00740c3c: 00030303 00000000 00000000 00000000 00000000 00080000 00080000 00080000 ++0x00740c5c: 00080000 00000000 00000000 01012000 01012000 01012000 01012000 000105b8 + ++0x00740c7c: 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008 00000000 ++0x00740c9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 07ff0000 ++0x00740cbc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 ++0x00740cdc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 00000000 ++0x00740cfc: 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740d1c: 00000000 00000000 00000000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x35c/4)+0, 0xffff0000); + INSTANCE_WR(ctx, (0x35c/4)+25, 0x0fff0000); + INSTANCE_WR(ctx, (0x35c/4)+26, 0x0fff0000); + INSTANCE_WR(ctx, (0x35c/4)+80, 0x00000101); + INSTANCE_WR(ctx, (0x35c/4)+85, 0x00000111); + INSTANCE_WR(ctx, (0x35c/4)+91, 0x00000080); + INSTANCE_WR(ctx, (0x35c/4)+92, 0xffff0000); + INSTANCE_WR(ctx, (0x35c/4)+93, 0x00000001); + INSTANCE_WR(ctx, (0x35c/4)+98, 0x44400000); + INSTANCE_WR(ctx, (0x35c/4)+104, 0x4b800000); + INSTANCE_WR(ctx, (0x35c/4)+109, 0x00030303); + INSTANCE_WR(ctx, (0x35c/4)+110, 0x00030303); + INSTANCE_WR(ctx, (0x35c/4)+111, 0x00030303); + INSTANCE_WR(ctx, (0x35c/4)+112, 0x00030303); + INSTANCE_WR(ctx, (0x35c/4)+117, 0x00080000); + INSTANCE_WR(ctx, (0x35c/4)+118, 0x00080000); + INSTANCE_WR(ctx, (0x35c/4)+119, 0x00080000); + INSTANCE_WR(ctx, (0x35c/4)+120, 0x00080000); + INSTANCE_WR(ctx, (0x35c/4)+123, 0x01012000); + INSTANCE_WR(ctx, (0x35c/4)+124, 0x01012000); + INSTANCE_WR(ctx, (0x35c/4)+125, 0x01012000); + INSTANCE_WR(ctx, (0x35c/4)+126, 0x01012000); + INSTANCE_WR(ctx, (0x35c/4)+127, 0x000105b8); + INSTANCE_WR(ctx, (0x35c/4)+128, 0x000105b8); + INSTANCE_WR(ctx, (0x35c/4)+129, 0x000105b8); + INSTANCE_WR(ctx, (0x35c/4)+130, 0x000105b8); + INSTANCE_WR(ctx, (0x35c/4)+131, 0x00080008); + INSTANCE_WR(ctx, (0x35c/4)+132, 0x00080008); + INSTANCE_WR(ctx, (0x35c/4)+133, 0x00080008); + INSTANCE_WR(ctx, (0x35c/4)+134, 0x00080008); + for (i=0; i<16; ++i) + INSTANCE_WR(ctx, (0x35c/4)+143+i, 0x07ff0000); + INSTANCE_WR(ctx, (0x35c/4)+161, 0x4b7fffff); + +/* +write32 #1 block at +0x00740d34 NV_PRAMIN.GRCTX0+0x614 of 3136 (0xc40) elements: ++0x00740d34: 00000000 00000000 00000000 00000080 30201000 70605040 b0a09080 f0e0d0c0 ++0x00740d54: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00740d74: 00000000 00000000 00000000 00000000 00000001 00000000 00004000 00000000 ++0x00740d94: 00000000 00000001 00000000 00040000 00010000 00000000 00000000 00000000 ++0x00740db4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +... ++0x00742214: 00000000 00000000 00000000 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742234: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742254: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742274: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 +... ++0x00742a34: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742a54: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742a74: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000 ++0x00742a94: 10700ff9 0436086c 000c001b 00000000 00000000 00000000 00000000 00000000 ++0x00742ab4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ++0x00742ad4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x614/4)+3, 0x00000080); + INSTANCE_WR(ctx, (0x614/4)+4, 0x30201000); + INSTANCE_WR(ctx, (0x614/4)+5, 0x70605040); + INSTANCE_WR(ctx, (0x614/4)+6, 0xb0a09080); + INSTANCE_WR(ctx, (0x614/4)+7, 0xf0e0d0c0); + INSTANCE_WR(ctx, (0x614/4)+20, 0x00000001); + INSTANCE_WR(ctx, (0x614/4)+22, 0x00004000); + INSTANCE_WR(ctx, (0x614/4)+25, 0x00000001); + INSTANCE_WR(ctx, (0x614/4)+27, 0x00040000); + INSTANCE_WR(ctx, (0x614/4)+28, 0x00010000); + for (i=0; i < 0x880/4; i+=4) { + INSTANCE_WR(ctx, (0x1b04/4)+i+0, 0x10700ff9); + INSTANCE_WR(ctx, (0x1b04/4)+i+1, 0x0436086c); + INSTANCE_WR(ctx, (0x1b04/4)+i+2, 0x000c001b); + } - nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx); +/* +write32 #1 block at +0x00742e24 NV_PRAMIN.GRCTX0+0x2704 of 4 (0x4) elements: ++0x00742e24: 3f800000 00000000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x2704/4), 0x3f800000); + +/* +write32 #1 block at +0x00742e64 NV_PRAMIN.GRCTX0+0x2744 of 12 (0xc) elements: ++0x00742e64: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000 ++0x00742e84: 00000000 bf800000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x2744/4)+0, 0x40000000); + INSTANCE_WR(ctx, (0x2744/4)+1, 0x3f800000); + INSTANCE_WR(ctx, (0x2744/4)+2, 0x3f000000); + INSTANCE_WR(ctx, (0x2744/4)+4, 0x40000000); + INSTANCE_WR(ctx, (0x2744/4)+5, 0x3f800000); + INSTANCE_WR(ctx, (0x2744/4)+7, 0xbf800000); + INSTANCE_WR(ctx, (0x2744/4)+9, 0xbf800000); + +/* +write32 #1 block at +0x00742e34 NV_PRAMIN.GRCTX0+0x2714 of 4 (0x4) elements: ++0x00742e34: 00000000 3f800000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x2714/4)+1, 0x3f800000); + +/* +write32 #1 block at +0x00742e94 NV_PRAMIN.GRCTX0+0x2774 of 4 (0x4) elements: ++0x00742e94: 00000000 00000000 00000000 00000000 +write32 #1 block at +0x00743804 NV_PRAMIN.GRCTX0+0x30e4 of 4 (0x4) elements: ++0x00743804: 00000000 00000000 00000000 00000000 +write32 #1 block at +0x007437a4 NV_PRAMIN.GRCTX0+0x3084 of 8 (0x8) elements: ++0x007437a4: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x3084/4)+2, 0x000fe000); + +/* +write32 #1 block at +0x007437d4 NV_PRAMIN.GRCTX0+0x30b4 of 4 (0x4) elements: ++0x007437d4: 00000000 00000000 00000000 00000000 +write32 #1 block at +0x00743824 NV_PRAMIN.GRCTX0+0x3104 of 4 (0x4) elements: ++0x00743824: 00000000 000003f8 00000000 00000000 +*/ + INSTANCE_WR(ctx, (0x3104/4)+1, 0x000003f8); + +/* write32 #1 NV_PRAMIN.GRCTX0+0x3468 <- 0x002fe000 */ + INSTANCE_WR(ctx, 0x3468/4, 0x002fe000); + +/* +write32 #1 block at +0x00743ba4 NV_PRAMIN.GRCTX0+0x3484 of 8 (0x8) elements: ++0x00743ba4: 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c +*/ + for (i=0; i<8; ++i) + INSTANCE_WR(ctx, (0x3484/4)+i, 0x001c527c); +} - INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, 0); +static void nv30_31_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + int i; + + INSTANCE_WR(ctx, 0x410/4, 0x00000101); + INSTANCE_WR(ctx, 0x424/4, 0x00000111); + INSTANCE_WR(ctx, 0x428/4, 0x00000060); + INSTANCE_WR(ctx, 0x444/4, 0x00000080); + INSTANCE_WR(ctx, 0x448/4, 0xffff0000); + INSTANCE_WR(ctx, 0x44c/4, 0x00000001); + INSTANCE_WR(ctx, 0x460/4, 0x44400000); + INSTANCE_WR(ctx, 0x48c/4, 0xffff0000); + for(i = 0x4e0; i< 0x4e8; i += 4) + INSTANCE_WR(ctx, i/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x4ec/4, 0x00011100); + for(i = 0x508; i< 0x548; i += 4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x550/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x58c/4, 0x00000080); + INSTANCE_WR(ctx, 0x590/4, 0x30201000); + INSTANCE_WR(ctx, 0x594/4, 0x70605040); + INSTANCE_WR(ctx, 0x598/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x59c/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x5b0/4, 0xb0000000); + for(i = 0x600; i< 0x640; i += 4) + INSTANCE_WR(ctx, i/4, 0x00010588); + for(i = 0x640; i< 0x680; i += 4) + INSTANCE_WR(ctx, i/4, 0x00030303); + for(i = 0x6c0; i< 0x700; i += 4) + INSTANCE_WR(ctx, i/4, 0x0008aae4); + for(i = 0x700; i< 0x740; i += 4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for(i = 0x740; i< 0x780; i += 4) + INSTANCE_WR(ctx, i/4, 0x00080008); + INSTANCE_WR(ctx, 0x85c/4, 0x00040000); + INSTANCE_WR(ctx, 0x860/4, 0x00010000); + for(i = 0x864; i< 0x874; i += 4) + INSTANCE_WR(ctx, i/4, 0x00040004); + for(i = 0x1f18; i<= 0x3088 ; i+= 16) { + INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9); + INSTANCE_WR(ctx, i/4 + 1, 0x0436086c); + INSTANCE_WR(ctx, i/4 + 2, 0x000c001b); + } + for(i = 0x30b8; i< 0x30c8; i += 4) + INSTANCE_WR(ctx, i/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x344c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3808/4, 0x3f800000); + INSTANCE_WR(ctx, 0x381c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3848/4, 0x40000000); + INSTANCE_WR(ctx, 0x384c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3850/4, 0x3f000000); + INSTANCE_WR(ctx, 0x3858/4, 0x40000000); + INSTANCE_WR(ctx, 0x385c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3864/4, 0xbf800000); + INSTANCE_WR(ctx, 0x386c/4, 0xbf800000); } -static void nv20_graph_rdi(struct drm_device *dev) { +static void nv34_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ struct drm_nouveau_private *dev_priv = dev->dev_private; int i; - NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x2c80000); - for (i = 0; i < 32; i++) - NV_WRITE(NV10_PGRAPH_RDI_DATA, 0); + INSTANCE_WR(ctx, 0x40c/4, 0x01000101); + INSTANCE_WR(ctx, 0x420/4, 0x00000111); + INSTANCE_WR(ctx, 0x424/4, 0x00000060); + INSTANCE_WR(ctx, 0x440/4, 0x00000080); + INSTANCE_WR(ctx, 0x444/4, 0xffff0000); + INSTANCE_WR(ctx, 0x448/4, 0x00000001); + INSTANCE_WR(ctx, 0x45c/4, 0x44400000); + INSTANCE_WR(ctx, 0x480/4, 0xffff0000); + for(i = 0x4d4; i< 0x4dc; i += 4) + INSTANCE_WR(ctx, i/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x4e0/4, 0x00011100); + for(i = 0x4fc; i< 0x53c; i += 4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x544/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x57c/4, 0x00000080); + INSTANCE_WR(ctx, 0x580/4, 0x30201000); + INSTANCE_WR(ctx, 0x584/4, 0x70605040); + INSTANCE_WR(ctx, 0x588/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x58c/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x5a0/4, 0xb0000000); + for(i = 0x5f0; i< 0x630; i += 4) + INSTANCE_WR(ctx, i/4, 0x00010588); + for(i = 0x630; i< 0x670; i += 4) + INSTANCE_WR(ctx, i/4, 0x00030303); + for(i = 0x6b0; i< 0x6f0; i += 4) + INSTANCE_WR(ctx, i/4, 0x0008aae4); + for(i = 0x6f0; i< 0x730; i += 4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for(i = 0x730; i< 0x770; i += 4) + INSTANCE_WR(ctx, i/4, 0x00080008); + INSTANCE_WR(ctx, 0x850/4, 0x00040000); + INSTANCE_WR(ctx, 0x854/4, 0x00010000); + for(i = 0x858; i< 0x868; i += 4) + INSTANCE_WR(ctx, i/4, 0x00040004); + for(i = 0x15ac; i<= 0x271c ; i+= 16) { + INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9); + INSTANCE_WR(ctx, i/4 + 1, 0x0436086c); + INSTANCE_WR(ctx, i/4 + 2, 0x000c001b); + } + for(i = 0x274c; i< 0x275c; i += 4) + INSTANCE_WR(ctx, i/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x2ae0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x2e9c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x2eb0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x2edc/4, 0x40000000); + INSTANCE_WR(ctx, 0x2ee0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x2ee4/4, 0x3f000000); + INSTANCE_WR(ctx, 0x2eec/4, 0x40000000); + INSTANCE_WR(ctx, 0x2ef0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x2ef8/4, 0xbf800000); + INSTANCE_WR(ctx, 0x2f00/4, 0xbf800000); +} - nouveau_wait_for_idle(dev); +static void nv35_36_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + int i; + + INSTANCE_WR(ctx, 0x40c/4, 0x00000101); + INSTANCE_WR(ctx, 0x420/4, 0x00000111); + INSTANCE_WR(ctx, 0x424/4, 0x00000060); + INSTANCE_WR(ctx, 0x440/4, 0x00000080); + INSTANCE_WR(ctx, 0x444/4, 0xffff0000); + INSTANCE_WR(ctx, 0x448/4, 0x00000001); + INSTANCE_WR(ctx, 0x45c/4, 0x44400000); + INSTANCE_WR(ctx, 0x488/4, 0xffff0000); + for(i = 0x4dc; i< 0x4e4; i += 4) + INSTANCE_WR(ctx, i/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x4e8/4, 0x00011100); + for(i = 0x504; i< 0x544; i += 4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x54c/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x588/4, 0x00000080); + INSTANCE_WR(ctx, 0x58c/4, 0x30201000); + INSTANCE_WR(ctx, 0x590/4, 0x70605040); + INSTANCE_WR(ctx, 0x594/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x598/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x5ac/4, 0xb0000000); + for(i = 0x604; i< 0x644; i += 4) + INSTANCE_WR(ctx, i/4, 0x00010588); + for(i = 0x644; i< 0x684; i += 4) + INSTANCE_WR(ctx, i/4, 0x00030303); + for(i = 0x6c4; i< 0x704; i += 4) + INSTANCE_WR(ctx, i/4, 0x0008aae4); + for(i = 0x704; i< 0x744; i += 4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for(i = 0x744; i< 0x784; i += 4) + INSTANCE_WR(ctx, i/4, 0x00080008); + INSTANCE_WR(ctx, 0x860/4, 0x00040000); + INSTANCE_WR(ctx, 0x864/4, 0x00010000); + for(i = 0x868; i< 0x878; i += 4) + INSTANCE_WR(ctx, i/4, 0x00040004); + for(i = 0x1f1c; i<= 0x308c ; i+= 16) { + INSTANCE_WR(ctx, i/4 + 0, 0x10700ff9); + INSTANCE_WR(ctx, i/4 + 1, 0x0436086c); + INSTANCE_WR(ctx, i/4 + 2, 0x000c001b); + } + for(i = 0x30bc; i< 0x30cc; i += 4) + INSTANCE_WR(ctx, i/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x3450/4, 0x3f800000); + INSTANCE_WR(ctx, 0x380c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3820/4, 0x3f800000); + INSTANCE_WR(ctx, 0x384c/4, 0x40000000); + INSTANCE_WR(ctx, 0x3850/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3854/4, 0x3f000000); + INSTANCE_WR(ctx, 0x385c/4, 0x40000000); + INSTANCE_WR(ctx, 0x3860/4, 0x3f800000); + INSTANCE_WR(ctx, 0x3868/4, 0xbf800000); + INSTANCE_WR(ctx, 0x3870/4, 0xbf800000); } -/* Save current context (from PGRAPH) into the channel's context - */ -int nv20_graph_save_context(struct nouveau_channel *chan) { +int nv20_graph_create_context(struct nouveau_channel *chan) +{ struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t instance; + void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *); + unsigned int ctx_size; + unsigned int idoffs = 0x28/4; + int ret; - instance = INSTANCE_RD(dev_priv->ctx_table->gpuobj, chan->id); - if (!instance) { - return -EINVAL; + switch (dev_priv->chipset) { + case 0x20: + ctx_size = NV20_GRCTX_SIZE; + ctx_init = nv20_graph_context_init; + idoffs = 0; + break; + case 0x25: + case 0x28: + ctx_size = NV25_GRCTX_SIZE; + ctx_init = nv25_graph_context_init; + break; + case 0x2a: + ctx_size = NV2A_GRCTX_SIZE; + ctx_init = nv2a_graph_context_init; + idoffs = 0; + break; + case 0x30: + case 0x31: + ctx_size = NV30_31_GRCTX_SIZE; + ctx_init = nv30_31_graph_context_init; + break; + case 0x34: + ctx_size = NV34_GRCTX_SIZE; + ctx_init = nv34_graph_context_init; + break; + case 0x35: + case 0x36: + ctx_size = NV35_36_GRCTX_SIZE; + ctx_init = nv35_36_graph_context_init; + break; + default: + ctx_size = 0; + ctx_init = nv35_36_graph_context_init; + DRM_ERROR("Please contact the devs if you want your NV%x" + " card to work\n", dev_priv->chipset); + return -ENOSYS; + break; } - if (instance != (chan->ramin_grctx->instance >> 4)) - DRM_ERROR("nv20_graph_save_context : bad instance\n"); - NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_SIZE, instance); - NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_POINTER, 2 /* save ctx */); + if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16, + NVOBJ_FLAG_ZERO_ALLOC, + &chan->ramin_grctx))) + return ret; + + /* Initialise default context values */ + ctx_init(dev, chan->ramin_grctx->gpuobj); + + /* nv20: INSTANCE_WR(chan->ramin_grctx->gpuobj, 10, chan->id<<24); */ + INSTANCE_WR(chan->ramin_grctx->gpuobj, idoffs, (chan->id<<24)|0x1); + /* CTX_USER */ + + INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, + chan->ramin_grctx->instance >> 4); + return 0; } +void nv20_graph_destroy_context(struct nouveau_channel *chan) +{ + struct drm_device *dev = chan->dev; + struct drm_nouveau_private *dev_priv = dev->dev_private; + + if (chan->ramin_grctx) + nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx); -/* Restore the context for a specific channel into PGRAPH - */ -int nv20_graph_load_context(struct nouveau_channel *chan) { + INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, 0); +} + +int nv20_graph_load_context(struct nouveau_channel *chan) +{ struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t instance; + uint32_t inst; - instance = INSTANCE_RD(dev_priv->ctx_table->gpuobj, chan->id); - if (!instance) { + if (!chan->ramin_grctx) return -EINVAL; - } - if (instance != (chan->ramin_grctx->instance >> 4)) - DRM_ERROR("nv20_graph_load_context_current : bad instance\n"); + inst = chan->ramin_grctx->instance >> 4; + + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER, + NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD); + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); - NV_WRITE(NV10_PGRAPH_CTX_USER, chan->id << 24); - NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_SIZE, instance); - NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_POINTER, 1 /* restore ctx */); + nouveau_wait_for_idle(dev); return 0; } -void nouveau_nv20_context_switch(struct drm_device *dev) +int nv20_graph_save_context(struct nouveau_channel *chan) { + struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - struct nouveau_channel *next, *last; - int chid; - - chid = NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1); - next = dev_priv->fifos[chid]; - - chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); - last = dev_priv->fifos[chid]; + uint32_t inst; - DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n", - last->id, next->id); + if (!chan->ramin_grctx) + return -EINVAL; + inst = chan->ramin_grctx->instance >> 4; - NV_WRITE(NV04_PGRAPH_FIFO,0x0); + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER, + NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE); - nv20_graph_save_context(last); - nouveau_wait_for_idle(dev); + return 0; +} - NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000000); - - nv20_graph_load_context(next); +static void nv20_graph_rdi(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = dev->dev_private; + int i, writecount = 32; + uint32_t rdi_index = 0x2c80000; - nouveau_wait_for_idle(dev); - - if ((NV_READ(NV10_PGRAPH_CTX_USER) >> 24) != next->id) - DRM_ERROR("nouveau_nv20_context_switch : wrong channel restored %x %x!!!\n", next->id, NV_READ(NV10_PGRAPH_CTX_USER) >> 24); + if (dev_priv->chipset == 0x20) { + rdi_index = 0x3d0000; + writecount = 15; + } - NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10010100); - NV_WRITE(NV10_PGRAPH_FFINTFC_ST2, NV_READ(NV10_PGRAPH_FFINTFC_ST2)&0xCFFFFFFF); + NV_WRITE(NV10_PGRAPH_RDI_INDEX, rdi_index); + for (i = 0; i < writecount; i++) + NV_WRITE(NV10_PGRAPH_RDI_DATA, 0); - NV_WRITE(NV04_PGRAPH_FIFO,0x1); + nouveau_wait_for_idle(dev); } int nv20_graph_init(struct drm_device *dev) { @@ -163,10 +702,9 @@ &dev_priv->ctx_table))) return ret; - NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_TABLE, + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_TABLE, dev_priv->ctx_table->instance >> 4); - //XXX need to be done and save/restore for each fifo ??? nv20_graph_rdi(dev); NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); @@ -175,7 +713,7 @@ NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x00118700); - NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xF20E0431); + NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xF3CE0475); /* 0x4 = auto ctx switch */ NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00000000); NV_WRITE(0x40009C , 0x00000040); @@ -187,9 +725,9 @@ NV_WRITE(0x400098, 0x40000080); NV_WRITE(0x400B88, 0x000000ff); } else { - NV_WRITE(0x400880, 0x00080000); + NV_WRITE(0x400880, 0x00080000); /* 0x0008c7df */ NV_WRITE(0x400094, 0x00000005); - NV_WRITE(0x400B80, 0x45CAA208); + NV_WRITE(0x400B80, 0x45CAA208); /* 0x45eae20e */ NV_WRITE(0x400B84, 0x24000000); NV_WRITE(0x400098, 0x00000040); NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00E00038); @@ -199,14 +737,30 @@ } /* copy tile info from PFB */ - for (i=0; ictx_table); } +int nv30_graph_init(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; +// uint32_t vramsz, tmp; + int ret, i; + + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & + ~NV_PMC_ENABLE_PGRAPH); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | + NV_PMC_ENABLE_PGRAPH); + + /* Create Context Pointer Table */ + dev_priv->ctx_table_size = 32 * 4; + if ((ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, + dev_priv->ctx_table_size, 16, + NVOBJ_FLAG_ZERO_ALLOC, + &dev_priv->ctx_table))) + return ret; + + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_TABLE, + dev_priv->ctx_table->instance >> 4); + + NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); + NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); + + NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); + NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); + NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x401287c0); + NV_WRITE(0x400890, 0x01b463ff); + NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xf2de0475); + NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00008000); + NV_WRITE(NV04_PGRAPH_LIMIT_VIOL_PIX, 0xf04bdff6); + NV_WRITE(0x400B80, 0x1003d888); + NV_WRITE(0x400B84, 0x0c000000); + NV_WRITE(0x400098, 0x00000000); + NV_WRITE(0x40009C, 0x0005ad00); + NV_WRITE(0x400B88, 0x62ff00ff); // suspiciously like PGRAPH_DEBUG_2 + NV_WRITE(0x4000a0, 0x00000000); + NV_WRITE(0x4000a4, 0x00000008); + NV_WRITE(0x4008a8, 0xb784a400); + NV_WRITE(0x400ba0, 0x002f8685); + NV_WRITE(0x400ba4, 0x00231f3f); + NV_WRITE(0x4008a4, 0x40000020); + + if (dev_priv->chipset == 0x34) { + NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0004); + NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00200201); + NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0008); + NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000008); + NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00EA0000); + NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000032); + NV_WRITE(NV10_PGRAPH_RDI_INDEX, 0x00E00004); + NV_WRITE(NV10_PGRAPH_RDI_DATA , 0x00000002); + } + + NV_WRITE(0x4000c0, 0x00000016); + + /* copy tile info from PFB */ + for (i = 0; i < NV10_PFB_TILE__SIZE; i++) { + NV_WRITE(0x00400904 + i*0x10, NV_READ(NV10_PFB_TLIMIT(i))); + /* which is NV40_PGRAPH_TLIMIT0(i) ?? */ + NV_WRITE(0x00400908 + i*0x10, NV_READ(NV10_PFB_TSIZE(i))); + /* which is NV40_PGRAPH_TSIZE0(i) ?? */ + NV_WRITE(0x00400900 + i*0x10, NV_READ(NV10_PFB_TILE(i))); + /* which is NV40_PGRAPH_TILE0(i) ?? */ + } + + NV_WRITE(NV10_PGRAPH_CTX_CONTROL, 0x10000100); + NV_WRITE(NV10_PGRAPH_STATE , 0xFFFFFFFF); + NV_WRITE(0x0040075c , 0x00000001); + NV_WRITE(NV04_PGRAPH_FIFO , 0x00000001); + + /* begin RAM config */ +// vramsz = drm_get_resource_len(dev, 0) - 1; + NV_WRITE(0x4009A4, NV_READ(NV04_PFB_CFG0)); + NV_WRITE(0x4009A8, NV_READ(NV04_PFB_CFG1)); + if (dev_priv->chipset != 0x34) { + NV_WRITE(0x400750, 0x00EA0000); + NV_WRITE(0x400754, NV_READ(NV04_PFB_CFG0)); + NV_WRITE(0x400750, 0x00EA0004); + NV_WRITE(0x400754, NV_READ(NV04_PFB_CFG1)); + } + +#if 0 + NV_WRITE(0x400820, 0); + NV_WRITE(0x400824, 0); + NV_WRITE(0x400864, vramsz-1); + NV_WRITE(0x400868, vramsz-1); + + NV_WRITE(0x400B20, 0x00000000); + NV_WRITE(0x400B04, 0xFFFFFFFF); + + /* per-context state, doesn't belong here */ + tmp = NV_READ(NV10_PGRAPH_SURFACE) & 0x0007ff00; + NV_WRITE(NV10_PGRAPH_SURFACE, tmp); + tmp = NV_READ(NV10_PGRAPH_SURFACE) | 0x00020100; + NV_WRITE(NV10_PGRAPH_SURFACE, tmp); + + NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMIN, 0); + NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMIN, 0); + NV_WRITE(NV03_PGRAPH_ABS_UCLIP_XMAX, 0x7fff); + NV_WRITE(NV03_PGRAPH_ABS_UCLIP_YMAX, 0x7fff); +#endif + + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv30_graph.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv30_graph.c --- libdrm-2.3.0.16/shared-core/nv30_graph.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv30_graph.c 1970-01-01 01:00:00.000000000 +0100 @@ -1,2912 +0,0 @@ -/* - * Based on nv40_graph.c - * Someday this will all go away... - */ -#include "drmP.h" -#include "drm.h" -#include "nouveau_drv.h" -#include "nouveau_drm.h" - -/* - * There are 3 families : - * NV30 is 0x10de:0x030* - * NV31 is 0x10de:0x031* - * - * NV34 is 0x10de:0x032* - * - * NV35 is 0x10de:0x033* (NV35 and NV36 are the same) - * NV36 is 0x10de:0x034* - * - * Not seen in the wild, no dumps (probably NV35) : - * NV37 is 0x10de:0x00fc, 0x10de:0x00fd - * NV38 is 0x10de:0x0333, 0x10de:0x00fe - * - */ - - -#define NV30_31_GRCTX_SIZE (22392) -#define NV34_GRCTX_SIZE (18140) -#define NV35_36_GRCTX_SIZE (22396) - -static void nv30_31_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - int i; - - INSTANCE_WR(ctx, 0x410/4, 0x00000101); - INSTANCE_WR(ctx, 0x424/4, 0x00000111); - INSTANCE_WR(ctx, 0x428/4, 0x00000060); - INSTANCE_WR(ctx, 0x444/4, 0x00000080); - INSTANCE_WR(ctx, 0x448/4, 0xffff0000); - INSTANCE_WR(ctx, 0x44c/4, 0x00000001); - INSTANCE_WR(ctx, 0x460/4, 0x44400000); - INSTANCE_WR(ctx, 0x48c/4, 0xffff0000); - for(i = 0x4e0; i< 0x4e8; i += 4) - INSTANCE_WR(ctx, i/4, 0x0fff0000); - INSTANCE_WR(ctx, 0x4ec/4, 0x00011100); - for(i = 0x508; i< 0x548; i += 4) - INSTANCE_WR(ctx, i/4, 0x07ff0000); - INSTANCE_WR(ctx, 0x550/4, 0x4b7fffff); - INSTANCE_WR(ctx, 0x58c/4, 0x00000080); - INSTANCE_WR(ctx, 0x590/4, 0x30201000); - INSTANCE_WR(ctx, 0x594/4, 0x70605040); - INSTANCE_WR(ctx, 0x598/4, 0xb8a89888); - INSTANCE_WR(ctx, 0x59c/4, 0xf8e8d8c8); - INSTANCE_WR(ctx, 0x5b0/4, 0xb0000000); - for(i = 0x600; i< 0x640; i += 4) - INSTANCE_WR(ctx, i/4, 0x00010588); - for(i = 0x640; i< 0x680; i += 4) - INSTANCE_WR(ctx, i/4, 0x00030303); - for(i = 0x6c0; i< 0x700; i += 4) - INSTANCE_WR(ctx, i/4, 0x0008aae4); - for(i = 0x700; i< 0x740; i += 4) - INSTANCE_WR(ctx, i/4, 0x01012000); - for(i = 0x740; i< 0x780; i += 4) - INSTANCE_WR(ctx, i/4, 0x00080008); - INSTANCE_WR(ctx, 0x85c/4, 0x00040000); - INSTANCE_WR(ctx, 0x860/4, 0x00010000); - for(i = 0x864; i< 0x874; i += 4) - INSTANCE_WR(ctx, i/4, 0x00040004); - INSTANCE_WR(ctx, 0x1f18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fa0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fa8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fb0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fb8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fbc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fc0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fc8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fcc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fd0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fd8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fdc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fe0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fe8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ff0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ff8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ffc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2000/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2008/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x200c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2010/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2018/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x201c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2020/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2028/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x202c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2030/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2038/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x203c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2040/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2048/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x204c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2050/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2058/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x205c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2060/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2068/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x206c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2070/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2078/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x207c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2080/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2088/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x208c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2090/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2098/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x209c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2100/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2108/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x210c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2110/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2118/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x211c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2120/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2128/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x212c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2130/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2138/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x213c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2140/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2148/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x214c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2150/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2158/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x215c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2160/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2168/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x216c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2170/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2178/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x217c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2180/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2188/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x218c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2190/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2198/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x219c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2200/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2208/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x220c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2210/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2218/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x221c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2220/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2228/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x222c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2230/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2238/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x223c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2240/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2248/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x224c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2250/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2258/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x225c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2260/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2268/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x226c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2270/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2278/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x227c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2280/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2288/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x228c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2290/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2298/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x229c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2300/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2308/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x230c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2310/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2318/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x231c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2320/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2328/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x232c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2330/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2338/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x233c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2340/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2348/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x234c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2350/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2358/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x235c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2360/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2368/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x236c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2370/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2378/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x237c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2380/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2388/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x238c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2390/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2398/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x239c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2400/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2408/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x240c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2410/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2418/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x241c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2420/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2428/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x242c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2430/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2438/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x243c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2440/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2448/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x244c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2450/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2458/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x245c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2460/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2468/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x246c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2470/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2478/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x247c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2480/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2488/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x248c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2490/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2498/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x249c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2500/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2508/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x250c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2510/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2518/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x251c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2520/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2528/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x252c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2530/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2538/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x253c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2540/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2548/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x254c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2550/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2558/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x255c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2560/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2568/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x256c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2570/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2578/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x257c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2580/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2588/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x258c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2590/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2598/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x259c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2600/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2608/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x260c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2610/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2618/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x261c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2620/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2628/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x262c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2630/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2638/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x263c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2640/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2648/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x264c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2650/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2658/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x265c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2660/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2668/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x266c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2670/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2678/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x267c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2680/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2688/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x268c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2690/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2698/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x269c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2700/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2708/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x270c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2710/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2718/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x271c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2720/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2728/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x272c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2730/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2738/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x273c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2740/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2748/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x274c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2750/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2758/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x275c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2760/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2768/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x276c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2770/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2778/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x277c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2780/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2788/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x278c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2790/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2798/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x279c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2800/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2808/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x280c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2810/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2818/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x281c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2820/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2828/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x282c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2830/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2838/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x283c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2840/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2848/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x284c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2850/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2858/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x285c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2860/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2868/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x286c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2870/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2878/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x287c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2880/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2888/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x288c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2890/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2898/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x289c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2900/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2908/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x290c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2910/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2918/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x291c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2920/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2928/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x292c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2930/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2938/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x293c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2940/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2948/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x294c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2950/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2958/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x295c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2960/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2968/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x296c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2970/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2978/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x297c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2980/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2988/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x298c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2990/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2998/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x299c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29a0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29a8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29ac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29b0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29b8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29bc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29c0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29c8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29cc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29d0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29d8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29dc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29e0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29e8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29ec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29f0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29f8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29fc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a00/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a08/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a0c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a10/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2aa0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2aa8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2aac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ab0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ab8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2abc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ac0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ac8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2acc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ad0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ad8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2adc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ae0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ae8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2aec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2af0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2af8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2afc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b00/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b08/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b0c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b10/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ba0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ba8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bb0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bb8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bbc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bc0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bc8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bcc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bd0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bd8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bdc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2be0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2be8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bf0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bf8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bfc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c00/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c08/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c0c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c10/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ca0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ca8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cb0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cb8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cbc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cc0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cc8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ccc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cd0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cd8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cdc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ce0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ce8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cf0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cf8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cfc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d00/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d08/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d0c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d10/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2da0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2da8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2db0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2db8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dbc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2dc0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dc8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dcc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2dd0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dd8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ddc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2de0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2de8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2df0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2df8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dfc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e00/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e08/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e0c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e10/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ea0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ea8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2eac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2eb0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2eb8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ebc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ec0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ec8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ecc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ed0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ed8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2edc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ee0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ee8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2eec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ef0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ef8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2efc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f00/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f08/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f0c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f10/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f18/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f1c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f20/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f28/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f2c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f30/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f38/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f3c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f40/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f48/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f4c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f50/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f58/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f5c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f60/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f68/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f6c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f70/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f78/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f7c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f80/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f88/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f8c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f90/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f98/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f9c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fa0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fa8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fac/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fb0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fb8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fbc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fc0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fc8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fcc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fd0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fd8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fdc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fe0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fe8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fec/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ff0/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ff8/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ffc/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3000/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3008/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x300c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3010/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3018/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x301c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3020/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3028/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x302c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3030/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3038/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x303c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3040/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3048/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x304c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3050/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3058/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x305c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3060/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3068/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x306c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3070/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3078/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x307c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3080/4, 0x000c001b); - INSTANCE_WR(ctx, 0x3088/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x308c/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3090/4, 0x000c001b); - for(i = 0x30b8; i< 0x30c8; i += 4) - INSTANCE_WR(ctx, i/4, 0x0000ffff); - INSTANCE_WR(ctx, 0x344c/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3808/4, 0x3f800000); - INSTANCE_WR(ctx, 0x381c/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3848/4, 0x40000000); - INSTANCE_WR(ctx, 0x384c/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3850/4, 0x3f000000); - INSTANCE_WR(ctx, 0x3858/4, 0x40000000); - INSTANCE_WR(ctx, 0x385c/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3864/4, 0xbf800000); - INSTANCE_WR(ctx, 0x386c/4, 0xbf800000); -} - -static void nv34_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - int i; - - INSTANCE_WR(ctx, 0x40c/4, 0x01000101); - INSTANCE_WR(ctx, 0x420/4, 0x00000111); - INSTANCE_WR(ctx, 0x424/4, 0x00000060); - INSTANCE_WR(ctx, 0x440/4, 0x00000080); - INSTANCE_WR(ctx, 0x444/4, 0xffff0000); - INSTANCE_WR(ctx, 0x448/4, 0x00000001); - INSTANCE_WR(ctx, 0x45c/4, 0x44400000); - INSTANCE_WR(ctx, 0x480/4, 0xffff0000); - for(i = 0x4d4; i< 0x4dc; i += 4) - INSTANCE_WR(ctx, i/4, 0x0fff0000); - INSTANCE_WR(ctx, 0x4e0/4, 0x00011100); - for(i = 0x4fc; i< 0x53c; i += 4) - INSTANCE_WR(ctx, i/4, 0x07ff0000); - INSTANCE_WR(ctx, 0x544/4, 0x4b7fffff); - INSTANCE_WR(ctx, 0x57c/4, 0x00000080); - INSTANCE_WR(ctx, 0x580/4, 0x30201000); - INSTANCE_WR(ctx, 0x584/4, 0x70605040); - INSTANCE_WR(ctx, 0x588/4, 0xb8a89888); - INSTANCE_WR(ctx, 0x58c/4, 0xf8e8d8c8); - INSTANCE_WR(ctx, 0x5a0/4, 0xb0000000); - for(i = 0x5f0; i< 0x630; i += 4) - INSTANCE_WR(ctx, i/4, 0x00010588); - for(i = 0x630; i< 0x670; i += 4) - INSTANCE_WR(ctx, i/4, 0x00030303); - for(i = 0x6b0; i< 0x6f0; i += 4) - INSTANCE_WR(ctx, i/4, 0x0008aae4); - for(i = 0x6f0; i< 0x730; i += 4) - INSTANCE_WR(ctx, i/4, 0x01012000); - for(i = 0x730; i< 0x770; i += 4) - INSTANCE_WR(ctx, i/4, 0x00080008); - INSTANCE_WR(ctx, 0x850/4, 0x00040000); - INSTANCE_WR(ctx, 0x854/4, 0x00010000); - for(i = 0x858; i< 0x868; i += 4) - INSTANCE_WR(ctx, i/4, 0x00040004); - INSTANCE_WR(ctx, 0x15ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x15b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x15b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x15bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x15c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x15c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x15cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x15d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x15d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x15dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x15e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x15e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x15ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x15f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x15f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x15fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1600/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1604/4, 0x000c001b); - INSTANCE_WR(ctx, 0x160c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1610/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1614/4, 0x000c001b); - INSTANCE_WR(ctx, 0x161c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1620/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1624/4, 0x000c001b); - INSTANCE_WR(ctx, 0x162c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1630/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1634/4, 0x000c001b); - INSTANCE_WR(ctx, 0x163c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1640/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1644/4, 0x000c001b); - INSTANCE_WR(ctx, 0x164c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1650/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1654/4, 0x000c001b); - INSTANCE_WR(ctx, 0x165c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1660/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1664/4, 0x000c001b); - INSTANCE_WR(ctx, 0x166c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1670/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1674/4, 0x000c001b); - INSTANCE_WR(ctx, 0x167c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1680/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1684/4, 0x000c001b); - INSTANCE_WR(ctx, 0x168c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1690/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1694/4, 0x000c001b); - INSTANCE_WR(ctx, 0x169c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x16a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x16a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x16ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x16b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x16b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x16bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x16c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x16c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x16cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x16d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x16d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x16dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x16e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x16e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x16ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x16f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x16f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x16fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1700/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1704/4, 0x000c001b); - INSTANCE_WR(ctx, 0x170c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1710/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1714/4, 0x000c001b); - INSTANCE_WR(ctx, 0x171c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1720/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1724/4, 0x000c001b); - INSTANCE_WR(ctx, 0x172c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1730/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1734/4, 0x000c001b); - INSTANCE_WR(ctx, 0x173c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1740/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1744/4, 0x000c001b); - INSTANCE_WR(ctx, 0x174c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1750/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1754/4, 0x000c001b); - INSTANCE_WR(ctx, 0x175c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1760/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1764/4, 0x000c001b); - INSTANCE_WR(ctx, 0x176c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1770/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1774/4, 0x000c001b); - INSTANCE_WR(ctx, 0x177c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1780/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1784/4, 0x000c001b); - INSTANCE_WR(ctx, 0x178c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1790/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1794/4, 0x000c001b); - INSTANCE_WR(ctx, 0x179c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x17a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x17a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x17ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x17b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x17b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x17bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x17c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x17c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x17cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x17d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x17d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x17dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x17e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x17e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x17ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x17f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x17f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x17fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1800/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1804/4, 0x000c001b); - INSTANCE_WR(ctx, 0x180c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1810/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1814/4, 0x000c001b); - INSTANCE_WR(ctx, 0x181c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1820/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1824/4, 0x000c001b); - INSTANCE_WR(ctx, 0x182c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1830/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1834/4, 0x000c001b); - INSTANCE_WR(ctx, 0x183c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1840/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1844/4, 0x000c001b); - INSTANCE_WR(ctx, 0x184c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1850/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1854/4, 0x000c001b); - INSTANCE_WR(ctx, 0x185c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1860/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1864/4, 0x000c001b); - INSTANCE_WR(ctx, 0x186c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1870/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1874/4, 0x000c001b); - INSTANCE_WR(ctx, 0x187c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1880/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1884/4, 0x000c001b); - INSTANCE_WR(ctx, 0x188c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1890/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1894/4, 0x000c001b); - INSTANCE_WR(ctx, 0x189c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x18a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x18a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x18ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x18b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x18b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x18bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x18c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x18c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x18cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x18d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x18d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x18dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x18e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x18e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x18ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x18f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x18f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x18fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1900/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1904/4, 0x000c001b); - INSTANCE_WR(ctx, 0x190c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1910/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1914/4, 0x000c001b); - INSTANCE_WR(ctx, 0x191c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1920/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1924/4, 0x000c001b); - INSTANCE_WR(ctx, 0x192c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1930/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1934/4, 0x000c001b); - INSTANCE_WR(ctx, 0x193c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1940/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1944/4, 0x000c001b); - INSTANCE_WR(ctx, 0x194c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1950/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1954/4, 0x000c001b); - INSTANCE_WR(ctx, 0x195c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1960/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1964/4, 0x000c001b); - INSTANCE_WR(ctx, 0x196c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1970/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1974/4, 0x000c001b); - INSTANCE_WR(ctx, 0x197c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1980/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1984/4, 0x000c001b); - INSTANCE_WR(ctx, 0x198c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1990/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1994/4, 0x000c001b); - INSTANCE_WR(ctx, 0x199c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x19a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x19a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x19ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x19b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x19b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x19bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x19c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x19c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x19cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x19d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x19d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x19dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x19e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x19e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x19ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x19f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x19f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x19fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1a90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1a94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1a9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1aa0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1aa4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1aac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ab0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ab4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1abc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ac0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ac4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1acc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ad0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ad4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1adc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ae0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ae4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1aec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1af0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1af4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1afc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1b90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1b94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1b9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ba0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ba4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1bac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1bb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1bb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1bbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1bc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1bc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1bcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1bd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1bd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1bdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1be0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1be4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1bec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1bf0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1bf4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1bfc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1c90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1c94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1c9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ca0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ca4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1cac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1cb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1cb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1cbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1cc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1cc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ccc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1cd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1cd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1cdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ce0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ce4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1cec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1cf0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1cf4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1cfc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1d90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1d94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1d9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1da0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1da4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1dac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1db0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1db4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1dbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1dc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1dc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1dcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1dd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1dd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ddc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1de0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1de4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1dec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1df0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1df4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1dfc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1e90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1e94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1e9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ea0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ea4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1eac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1eb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1eb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ebc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ec0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ec4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ecc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ed0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ed4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1edc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ee0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ee4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1eec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ef0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ef4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1efc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fa0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fa4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fe0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fe4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ff0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ff4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ffc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2000/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2004/4, 0x000c001b); - INSTANCE_WR(ctx, 0x200c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2010/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2014/4, 0x000c001b); - INSTANCE_WR(ctx, 0x201c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2020/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2024/4, 0x000c001b); - INSTANCE_WR(ctx, 0x202c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2030/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2034/4, 0x000c001b); - INSTANCE_WR(ctx, 0x203c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2040/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2044/4, 0x000c001b); - INSTANCE_WR(ctx, 0x204c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2050/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2054/4, 0x000c001b); - INSTANCE_WR(ctx, 0x205c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2060/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2064/4, 0x000c001b); - INSTANCE_WR(ctx, 0x206c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2070/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2074/4, 0x000c001b); - INSTANCE_WR(ctx, 0x207c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2080/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2084/4, 0x000c001b); - INSTANCE_WR(ctx, 0x208c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2090/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2094/4, 0x000c001b); - INSTANCE_WR(ctx, 0x209c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2100/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2104/4, 0x000c001b); - INSTANCE_WR(ctx, 0x210c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2110/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2114/4, 0x000c001b); - INSTANCE_WR(ctx, 0x211c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2120/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2124/4, 0x000c001b); - INSTANCE_WR(ctx, 0x212c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2130/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2134/4, 0x000c001b); - INSTANCE_WR(ctx, 0x213c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2140/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2144/4, 0x000c001b); - INSTANCE_WR(ctx, 0x214c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2150/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2154/4, 0x000c001b); - INSTANCE_WR(ctx, 0x215c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2160/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2164/4, 0x000c001b); - INSTANCE_WR(ctx, 0x216c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2170/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2174/4, 0x000c001b); - INSTANCE_WR(ctx, 0x217c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2180/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2184/4, 0x000c001b); - INSTANCE_WR(ctx, 0x218c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2190/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2194/4, 0x000c001b); - INSTANCE_WR(ctx, 0x219c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2200/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2204/4, 0x000c001b); - INSTANCE_WR(ctx, 0x220c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2210/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2214/4, 0x000c001b); - INSTANCE_WR(ctx, 0x221c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2220/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2224/4, 0x000c001b); - INSTANCE_WR(ctx, 0x222c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2230/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2234/4, 0x000c001b); - INSTANCE_WR(ctx, 0x223c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2240/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2244/4, 0x000c001b); - INSTANCE_WR(ctx, 0x224c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2250/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2254/4, 0x000c001b); - INSTANCE_WR(ctx, 0x225c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2260/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2264/4, 0x000c001b); - INSTANCE_WR(ctx, 0x226c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2270/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2274/4, 0x000c001b); - INSTANCE_WR(ctx, 0x227c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2280/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2284/4, 0x000c001b); - INSTANCE_WR(ctx, 0x228c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2290/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2294/4, 0x000c001b); - INSTANCE_WR(ctx, 0x229c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2300/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2304/4, 0x000c001b); - INSTANCE_WR(ctx, 0x230c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2310/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2314/4, 0x000c001b); - INSTANCE_WR(ctx, 0x231c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2320/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2324/4, 0x000c001b); - INSTANCE_WR(ctx, 0x232c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2330/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2334/4, 0x000c001b); - INSTANCE_WR(ctx, 0x233c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2340/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2344/4, 0x000c001b); - INSTANCE_WR(ctx, 0x234c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2350/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2354/4, 0x000c001b); - INSTANCE_WR(ctx, 0x235c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2360/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2364/4, 0x000c001b); - INSTANCE_WR(ctx, 0x236c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2370/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2374/4, 0x000c001b); - INSTANCE_WR(ctx, 0x237c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2380/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2384/4, 0x000c001b); - INSTANCE_WR(ctx, 0x238c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2390/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2394/4, 0x000c001b); - INSTANCE_WR(ctx, 0x239c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2400/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2404/4, 0x000c001b); - INSTANCE_WR(ctx, 0x240c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2410/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2414/4, 0x000c001b); - INSTANCE_WR(ctx, 0x241c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2420/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2424/4, 0x000c001b); - INSTANCE_WR(ctx, 0x242c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2430/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2434/4, 0x000c001b); - INSTANCE_WR(ctx, 0x243c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2440/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2444/4, 0x000c001b); - INSTANCE_WR(ctx, 0x244c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2450/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2454/4, 0x000c001b); - INSTANCE_WR(ctx, 0x245c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2460/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2464/4, 0x000c001b); - INSTANCE_WR(ctx, 0x246c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2470/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2474/4, 0x000c001b); - INSTANCE_WR(ctx, 0x247c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2480/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2484/4, 0x000c001b); - INSTANCE_WR(ctx, 0x248c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2490/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2494/4, 0x000c001b); - INSTANCE_WR(ctx, 0x249c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2500/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2504/4, 0x000c001b); - INSTANCE_WR(ctx, 0x250c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2510/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2514/4, 0x000c001b); - INSTANCE_WR(ctx, 0x251c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2520/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2524/4, 0x000c001b); - INSTANCE_WR(ctx, 0x252c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2530/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2534/4, 0x000c001b); - INSTANCE_WR(ctx, 0x253c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2540/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2544/4, 0x000c001b); - INSTANCE_WR(ctx, 0x254c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2550/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2554/4, 0x000c001b); - INSTANCE_WR(ctx, 0x255c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2560/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2564/4, 0x000c001b); - INSTANCE_WR(ctx, 0x256c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2570/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2574/4, 0x000c001b); - INSTANCE_WR(ctx, 0x257c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2580/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2584/4, 0x000c001b); - INSTANCE_WR(ctx, 0x258c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2590/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2594/4, 0x000c001b); - INSTANCE_WR(ctx, 0x259c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2600/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2604/4, 0x000c001b); - INSTANCE_WR(ctx, 0x260c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2610/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2614/4, 0x000c001b); - INSTANCE_WR(ctx, 0x261c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2620/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2624/4, 0x000c001b); - INSTANCE_WR(ctx, 0x262c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2630/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2634/4, 0x000c001b); - INSTANCE_WR(ctx, 0x263c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2640/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2644/4, 0x000c001b); - INSTANCE_WR(ctx, 0x264c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2650/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2654/4, 0x000c001b); - INSTANCE_WR(ctx, 0x265c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2660/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2664/4, 0x000c001b); - INSTANCE_WR(ctx, 0x266c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2670/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2674/4, 0x000c001b); - INSTANCE_WR(ctx, 0x267c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2680/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2684/4, 0x000c001b); - INSTANCE_WR(ctx, 0x268c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2690/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2694/4, 0x000c001b); - INSTANCE_WR(ctx, 0x269c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2700/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2704/4, 0x000c001b); - INSTANCE_WR(ctx, 0x270c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2710/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2714/4, 0x000c001b); - INSTANCE_WR(ctx, 0x271c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2720/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2724/4, 0x000c001b); - for(i = 0x274c; i< 0x275c; i += 4) - INSTANCE_WR(ctx, i/4, 0x0000ffff); - INSTANCE_WR(ctx, 0x2ae0/4, 0x3f800000); - INSTANCE_WR(ctx, 0x2e9c/4, 0x3f800000); - INSTANCE_WR(ctx, 0x2eb0/4, 0x3f800000); - INSTANCE_WR(ctx, 0x2edc/4, 0x40000000); - INSTANCE_WR(ctx, 0x2ee0/4, 0x3f800000); - INSTANCE_WR(ctx, 0x2ee4/4, 0x3f000000); - INSTANCE_WR(ctx, 0x2eec/4, 0x40000000); - INSTANCE_WR(ctx, 0x2ef0/4, 0x3f800000); - INSTANCE_WR(ctx, 0x2ef8/4, 0xbf800000); - INSTANCE_WR(ctx, 0x2f00/4, 0xbf800000); -} - -static void nv35_36_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - int i; - - INSTANCE_WR(ctx, 0x40c/4, 0x00000101); - INSTANCE_WR(ctx, 0x420/4, 0x00000111); - INSTANCE_WR(ctx, 0x424/4, 0x00000060); - INSTANCE_WR(ctx, 0x440/4, 0x00000080); - INSTANCE_WR(ctx, 0x444/4, 0xffff0000); - INSTANCE_WR(ctx, 0x448/4, 0x00000001); - INSTANCE_WR(ctx, 0x45c/4, 0x44400000); - INSTANCE_WR(ctx, 0x488/4, 0xffff0000); - for(i = 0x4dc; i< 0x4e4; i += 4) - INSTANCE_WR(ctx, i/4, 0x0fff0000); - INSTANCE_WR(ctx, 0x4e8/4, 0x00011100); - for(i = 0x504; i< 0x544; i += 4) - INSTANCE_WR(ctx, i/4, 0x07ff0000); - INSTANCE_WR(ctx, 0x54c/4, 0x4b7fffff); - INSTANCE_WR(ctx, 0x588/4, 0x00000080); - INSTANCE_WR(ctx, 0x58c/4, 0x30201000); - INSTANCE_WR(ctx, 0x590/4, 0x70605040); - INSTANCE_WR(ctx, 0x594/4, 0xb8a89888); - INSTANCE_WR(ctx, 0x598/4, 0xf8e8d8c8); - INSTANCE_WR(ctx, 0x5ac/4, 0xb0000000); - for(i = 0x604; i< 0x644; i += 4) - INSTANCE_WR(ctx, i/4, 0x00010588); - for(i = 0x644; i< 0x684; i += 4) - INSTANCE_WR(ctx, i/4, 0x00030303); - for(i = 0x6c4; i< 0x704; i += 4) - INSTANCE_WR(ctx, i/4, 0x0008aae4); - for(i = 0x704; i< 0x744; i += 4) - INSTANCE_WR(ctx, i/4, 0x01012000); - for(i = 0x744; i< 0x784; i += 4) - INSTANCE_WR(ctx, i/4, 0x00080008); - INSTANCE_WR(ctx, 0x860/4, 0x00040000); - INSTANCE_WR(ctx, 0x864/4, 0x00010000); - for(i = 0x868; i< 0x878; i += 4) - INSTANCE_WR(ctx, i/4, 0x00040004); - INSTANCE_WR(ctx, 0x1f1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1f90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1f94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1f9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fa0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fa4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1fe0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1fe4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1fec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x1ff0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x1ff4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x1ffc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2000/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2004/4, 0x000c001b); - INSTANCE_WR(ctx, 0x200c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2010/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2014/4, 0x000c001b); - INSTANCE_WR(ctx, 0x201c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2020/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2024/4, 0x000c001b); - INSTANCE_WR(ctx, 0x202c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2030/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2034/4, 0x000c001b); - INSTANCE_WR(ctx, 0x203c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2040/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2044/4, 0x000c001b); - INSTANCE_WR(ctx, 0x204c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2050/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2054/4, 0x000c001b); - INSTANCE_WR(ctx, 0x205c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2060/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2064/4, 0x000c001b); - INSTANCE_WR(ctx, 0x206c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2070/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2074/4, 0x000c001b); - INSTANCE_WR(ctx, 0x207c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2080/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2084/4, 0x000c001b); - INSTANCE_WR(ctx, 0x208c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2090/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2094/4, 0x000c001b); - INSTANCE_WR(ctx, 0x209c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x20f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x20f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x20fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2100/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2104/4, 0x000c001b); - INSTANCE_WR(ctx, 0x210c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2110/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2114/4, 0x000c001b); - INSTANCE_WR(ctx, 0x211c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2120/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2124/4, 0x000c001b); - INSTANCE_WR(ctx, 0x212c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2130/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2134/4, 0x000c001b); - INSTANCE_WR(ctx, 0x213c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2140/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2144/4, 0x000c001b); - INSTANCE_WR(ctx, 0x214c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2150/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2154/4, 0x000c001b); - INSTANCE_WR(ctx, 0x215c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2160/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2164/4, 0x000c001b); - INSTANCE_WR(ctx, 0x216c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2170/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2174/4, 0x000c001b); - INSTANCE_WR(ctx, 0x217c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2180/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2184/4, 0x000c001b); - INSTANCE_WR(ctx, 0x218c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2190/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2194/4, 0x000c001b); - INSTANCE_WR(ctx, 0x219c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x21f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x21f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x21fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2200/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2204/4, 0x000c001b); - INSTANCE_WR(ctx, 0x220c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2210/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2214/4, 0x000c001b); - INSTANCE_WR(ctx, 0x221c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2220/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2224/4, 0x000c001b); - INSTANCE_WR(ctx, 0x222c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2230/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2234/4, 0x000c001b); - INSTANCE_WR(ctx, 0x223c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2240/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2244/4, 0x000c001b); - INSTANCE_WR(ctx, 0x224c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2250/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2254/4, 0x000c001b); - INSTANCE_WR(ctx, 0x225c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2260/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2264/4, 0x000c001b); - INSTANCE_WR(ctx, 0x226c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2270/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2274/4, 0x000c001b); - INSTANCE_WR(ctx, 0x227c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2280/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2284/4, 0x000c001b); - INSTANCE_WR(ctx, 0x228c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2290/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2294/4, 0x000c001b); - INSTANCE_WR(ctx, 0x229c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x22f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x22f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x22fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2300/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2304/4, 0x000c001b); - INSTANCE_WR(ctx, 0x230c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2310/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2314/4, 0x000c001b); - INSTANCE_WR(ctx, 0x231c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2320/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2324/4, 0x000c001b); - INSTANCE_WR(ctx, 0x232c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2330/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2334/4, 0x000c001b); - INSTANCE_WR(ctx, 0x233c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2340/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2344/4, 0x000c001b); - INSTANCE_WR(ctx, 0x234c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2350/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2354/4, 0x000c001b); - INSTANCE_WR(ctx, 0x235c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2360/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2364/4, 0x000c001b); - INSTANCE_WR(ctx, 0x236c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2370/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2374/4, 0x000c001b); - INSTANCE_WR(ctx, 0x237c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2380/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2384/4, 0x000c001b); - INSTANCE_WR(ctx, 0x238c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2390/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2394/4, 0x000c001b); - INSTANCE_WR(ctx, 0x239c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x23f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x23f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x23fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2400/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2404/4, 0x000c001b); - INSTANCE_WR(ctx, 0x240c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2410/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2414/4, 0x000c001b); - INSTANCE_WR(ctx, 0x241c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2420/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2424/4, 0x000c001b); - INSTANCE_WR(ctx, 0x242c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2430/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2434/4, 0x000c001b); - INSTANCE_WR(ctx, 0x243c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2440/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2444/4, 0x000c001b); - INSTANCE_WR(ctx, 0x244c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2450/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2454/4, 0x000c001b); - INSTANCE_WR(ctx, 0x245c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2460/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2464/4, 0x000c001b); - INSTANCE_WR(ctx, 0x246c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2470/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2474/4, 0x000c001b); - INSTANCE_WR(ctx, 0x247c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2480/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2484/4, 0x000c001b); - INSTANCE_WR(ctx, 0x248c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2490/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2494/4, 0x000c001b); - INSTANCE_WR(ctx, 0x249c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x24f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x24f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x24fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2500/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2504/4, 0x000c001b); - INSTANCE_WR(ctx, 0x250c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2510/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2514/4, 0x000c001b); - INSTANCE_WR(ctx, 0x251c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2520/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2524/4, 0x000c001b); - INSTANCE_WR(ctx, 0x252c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2530/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2534/4, 0x000c001b); - INSTANCE_WR(ctx, 0x253c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2540/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2544/4, 0x000c001b); - INSTANCE_WR(ctx, 0x254c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2550/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2554/4, 0x000c001b); - INSTANCE_WR(ctx, 0x255c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2560/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2564/4, 0x000c001b); - INSTANCE_WR(ctx, 0x256c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2570/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2574/4, 0x000c001b); - INSTANCE_WR(ctx, 0x257c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2580/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2584/4, 0x000c001b); - INSTANCE_WR(ctx, 0x258c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2590/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2594/4, 0x000c001b); - INSTANCE_WR(ctx, 0x259c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x25f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x25f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x25fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2600/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2604/4, 0x000c001b); - INSTANCE_WR(ctx, 0x260c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2610/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2614/4, 0x000c001b); - INSTANCE_WR(ctx, 0x261c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2620/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2624/4, 0x000c001b); - INSTANCE_WR(ctx, 0x262c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2630/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2634/4, 0x000c001b); - INSTANCE_WR(ctx, 0x263c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2640/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2644/4, 0x000c001b); - INSTANCE_WR(ctx, 0x264c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2650/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2654/4, 0x000c001b); - INSTANCE_WR(ctx, 0x265c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2660/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2664/4, 0x000c001b); - INSTANCE_WR(ctx, 0x266c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2670/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2674/4, 0x000c001b); - INSTANCE_WR(ctx, 0x267c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2680/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2684/4, 0x000c001b); - INSTANCE_WR(ctx, 0x268c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2690/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2694/4, 0x000c001b); - INSTANCE_WR(ctx, 0x269c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x26f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x26f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x26fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2700/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2704/4, 0x000c001b); - INSTANCE_WR(ctx, 0x270c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2710/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2714/4, 0x000c001b); - INSTANCE_WR(ctx, 0x271c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2720/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2724/4, 0x000c001b); - INSTANCE_WR(ctx, 0x272c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2730/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2734/4, 0x000c001b); - INSTANCE_WR(ctx, 0x273c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2740/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2744/4, 0x000c001b); - INSTANCE_WR(ctx, 0x274c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2750/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2754/4, 0x000c001b); - INSTANCE_WR(ctx, 0x275c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2760/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2764/4, 0x000c001b); - INSTANCE_WR(ctx, 0x276c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2770/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2774/4, 0x000c001b); - INSTANCE_WR(ctx, 0x277c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2780/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2784/4, 0x000c001b); - INSTANCE_WR(ctx, 0x278c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2790/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2794/4, 0x000c001b); - INSTANCE_WR(ctx, 0x279c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x27f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x27f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x27fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2800/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2804/4, 0x000c001b); - INSTANCE_WR(ctx, 0x280c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2810/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2814/4, 0x000c001b); - INSTANCE_WR(ctx, 0x281c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2820/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2824/4, 0x000c001b); - INSTANCE_WR(ctx, 0x282c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2830/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2834/4, 0x000c001b); - INSTANCE_WR(ctx, 0x283c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2840/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2844/4, 0x000c001b); - INSTANCE_WR(ctx, 0x284c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2850/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2854/4, 0x000c001b); - INSTANCE_WR(ctx, 0x285c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2860/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2864/4, 0x000c001b); - INSTANCE_WR(ctx, 0x286c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2870/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2874/4, 0x000c001b); - INSTANCE_WR(ctx, 0x287c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2880/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2884/4, 0x000c001b); - INSTANCE_WR(ctx, 0x288c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2890/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2894/4, 0x000c001b); - INSTANCE_WR(ctx, 0x289c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x28f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x28f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x28fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2900/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2904/4, 0x000c001b); - INSTANCE_WR(ctx, 0x290c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2910/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2914/4, 0x000c001b); - INSTANCE_WR(ctx, 0x291c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2920/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2924/4, 0x000c001b); - INSTANCE_WR(ctx, 0x292c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2930/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2934/4, 0x000c001b); - INSTANCE_WR(ctx, 0x293c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2940/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2944/4, 0x000c001b); - INSTANCE_WR(ctx, 0x294c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2950/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2954/4, 0x000c001b); - INSTANCE_WR(ctx, 0x295c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2960/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2964/4, 0x000c001b); - INSTANCE_WR(ctx, 0x296c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2970/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2974/4, 0x000c001b); - INSTANCE_WR(ctx, 0x297c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2980/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2984/4, 0x000c001b); - INSTANCE_WR(ctx, 0x298c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2990/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2994/4, 0x000c001b); - INSTANCE_WR(ctx, 0x299c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29a0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29a4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29ac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29b0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29b4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29bc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29c0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29c4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29cc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29d0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29d4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29dc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29e0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29e4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29ec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x29f0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x29f4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x29fc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2a90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2a94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2a9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2aa0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2aa4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2aac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ab0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ab4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2abc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ac0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ac4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2acc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ad0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ad4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2adc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ae0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ae4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2aec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2af0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2af4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2afc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2b90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2b94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2b9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ba0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ba4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2be0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2be4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2bf0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2bf4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2bfc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2c90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2c94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2c9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ca0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ca4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ccc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ce0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ce4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2cf0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2cf4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2cfc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2d90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2d94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2d9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2da0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2da4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2db0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2db4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2dc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2dd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2dd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ddc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2de0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2de4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2df0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2df4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2dfc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2e90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2e94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2e9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ea0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ea4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2eac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2eb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2eb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ebc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ec0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ec4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ecc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ed0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ed4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2edc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ee0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ee4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2eec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ef0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ef4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2efc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f00/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f04/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f0c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f10/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f14/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f1c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f20/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f24/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f2c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f30/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f34/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f3c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f40/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f44/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f4c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f50/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f54/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f5c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f60/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f64/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f6c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f70/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f74/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f7c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f80/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f84/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f8c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2f90/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2f94/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2f9c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fa0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fa4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fac/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fb0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fb4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fbc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fc0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fc4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fcc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fd0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fd4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fdc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2fe0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2fe4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2fec/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x2ff0/4, 0x0436086c); - INSTANCE_WR(ctx, 0x2ff4/4, 0x000c001b); - INSTANCE_WR(ctx, 0x2ffc/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3000/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3004/4, 0x000c001b); - INSTANCE_WR(ctx, 0x300c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3010/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3014/4, 0x000c001b); - INSTANCE_WR(ctx, 0x301c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3020/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3024/4, 0x000c001b); - INSTANCE_WR(ctx, 0x302c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3030/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3034/4, 0x000c001b); - INSTANCE_WR(ctx, 0x303c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3040/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3044/4, 0x000c001b); - INSTANCE_WR(ctx, 0x304c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3050/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3054/4, 0x000c001b); - INSTANCE_WR(ctx, 0x305c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3060/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3064/4, 0x000c001b); - INSTANCE_WR(ctx, 0x306c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3070/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3074/4, 0x000c001b); - INSTANCE_WR(ctx, 0x307c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3080/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3084/4, 0x000c001b); - INSTANCE_WR(ctx, 0x308c/4, 0x10700ff9); - INSTANCE_WR(ctx, 0x3090/4, 0x0436086c); - INSTANCE_WR(ctx, 0x3094/4, 0x000c001b); - for(i = 0x30bc; i< 0x30cc; i += 4) - INSTANCE_WR(ctx, i/4, 0x0000ffff); - INSTANCE_WR(ctx, 0x3450/4, 0x3f800000); - INSTANCE_WR(ctx, 0x380c/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3820/4, 0x3f800000); - INSTANCE_WR(ctx, 0x384c/4, 0x40000000); - INSTANCE_WR(ctx, 0x3850/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3854/4, 0x3f000000); - INSTANCE_WR(ctx, 0x385c/4, 0x40000000); - INSTANCE_WR(ctx, 0x3860/4, 0x3f800000); - INSTANCE_WR(ctx, 0x3868/4, 0xbf800000); - INSTANCE_WR(ctx, 0x3870/4, 0xbf800000);} - -int nv30_graph_create_context(struct nouveau_channel *chan) -{ - struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; - void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *); - unsigned int ctx_size; - int ret; - - switch (dev_priv->chipset) { - case 0x30: - case 0x31: - ctx_size = NV30_31_GRCTX_SIZE; - ctx_init = nv30_31_graph_context_init; - break; - case 0x34: - ctx_size = NV34_GRCTX_SIZE; - ctx_init = nv34_graph_context_init; - break; - case 0x35: - case 0x36: - ctx_size = NV35_36_GRCTX_SIZE; - ctx_init = nv35_36_graph_context_init; - break; - default: - ctx_size = 0; - ctx_init = nv35_36_graph_context_init; - DRM_ERROR("Please contact the devs if you want your NV%x card to work\n",dev_priv->chipset); - break; - } - - if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16, - NVOBJ_FLAG_ZERO_ALLOC, - &chan->ramin_grctx))) - return ret; - - /* Initialise default context values */ - ctx_init(dev, chan->ramin_grctx->gpuobj); - - INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x28/4, (chan->id<<24)|0x1); /* CTX_USER */ - INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, - chan->ramin_grctx->instance >> 4); - - return 0; -} - -void nv30_graph_destroy_context(struct nouveau_channel *chan) -{ - struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; - - if (chan->ramin_grctx) - nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx); - - INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, 0); -} - -static int -nouveau_graph_wait_idle(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - int tv = 1000; - - while (tv--) { - if (NV_READ(0x400700) == 0) - break; - } - - if (NV_READ(0x400700)) { - DRM_ERROR("timeout!\n"); - return -EBUSY; - } - return 0; -} - -int nv30_graph_load_context(struct nouveau_channel *chan) -{ - struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t inst; - - if (!chan->ramin_grctx) - return -EINVAL; - inst = chan->ramin_grctx->instance >> 4; - - NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); - NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER, - NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD); - - return nouveau_graph_wait_idle(dev); -} - -int nv30_graph_save_context(struct nouveau_channel *chan) -{ - struct drm_device *dev = chan->dev; - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t inst; - - if (!chan->ramin_grctx) - return -EINVAL; - inst = chan->ramin_grctx->instance >> 4; - - NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); - NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_XFER, - NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE); - - return nouveau_graph_wait_idle(dev); -} - -int nv30_graph_init(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t vramsz, tmp; - int ret, i; - - NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & - ~NV_PMC_ENABLE_PGRAPH); - NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | - NV_PMC_ENABLE_PGRAPH); - - /* Create Context Pointer Table */ - dev_priv->ctx_table_size = 32 * 4; - if ((ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, - dev_priv->ctx_table_size, 16, - NVOBJ_FLAG_ZERO_ALLOC, - &dev_priv->ctx_table))) - return ret; - - NV_WRITE(NV10_PGRAPH_CHANNEL_CTX_TABLE, - dev_priv->ctx_table->instance >> 4); - - NV_WRITE(NV03_PGRAPH_INTR , 0xFFFFFFFF); - NV_WRITE(NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); - - NV_WRITE(NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF); - NV_WRITE(NV04_PGRAPH_DEBUG_0, 0x00000000); - NV_WRITE(NV04_PGRAPH_DEBUG_1, 0x401287c0); - NV_WRITE(0x400890, 0x01b463ff); - NV_WRITE(NV04_PGRAPH_DEBUG_3, 0xf3de0471); - NV_WRITE(NV10_PGRAPH_DEBUG_4, 0x00008000); - NV_WRITE(NV04_PGRAPH_LIMIT_VIOL_PIX, 0xf04bdff6); - NV_WRITE(0x400B80, 0x1003d888); - NV_WRITE(0x400098, 0x00000000); - NV_WRITE(0x40009C, 0x0005ad00); - NV_WRITE(0x400B88, 0x62ff00ff); // suspiciously like PGRAPH_DEBUG_2 - NV_WRITE(0x4000a0, 0x00000000); - NV_WRITE(0x4000a4, 0x00000008); - NV_WRITE(0x4008a8, 0xb784a400); - NV_WRITE(0x400ba0, 0x002f8685); - NV_WRITE(0x400ba4, 0x00231f3f); - NV_WRITE(0x4008a4, 0x40000020); - NV_WRITE(0x400B84, 0x0c000000); - NV_WRITE(NV04_PGRAPH_DEBUG_2, 0x62ff0f7f); - NV_WRITE(0x4000c0, 0x00000016); - NV_WRITE(0x400780, 0x000014e4); - - /* copy tile info from PFB */ - for (i=0; idev_private; - - nouveau_gpuobj_ref_del(dev, &dev_priv->ctx_table); -} - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv40_fb.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv40_fb.c --- libdrm-2.3.0.16/shared-core/nv40_fb.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv40_fb.c 2009-04-20 07:00:29.000000000 +0100 @@ -11,6 +11,13 @@ int num_tiles; int i; + /* This is strictly a NV4x register (don't know about NV5x). */ + /* The blob sets these to all kinds of values, and they mess up our setup. */ + /* I got value 0x52802 instead. For some cards the blob even sets it back to 0x1. */ + /* Note: the blob doesn't read this value, so i'm pretty sure this is safe for all cards. */ + /* Any idea what this is? */ + NV_WRITE(NV40_PFB_UNK_800, 0x1); + switch (dev_priv->chipset) { case 0x40: case 0x45: @@ -53,4 +60,3 @@ nv40_fb_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv40_fifo.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv40_fifo.c --- libdrm-2.3.0.16/shared-core/nv40_fifo.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv40_fifo.c 2009-04-20 07:00:29.000000000 +0100 @@ -135,7 +135,9 @@ NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, tmp); /* Set channel active, and in DMA mode */ - NV_WRITE(NV03_PFIFO_CACHE1_PUSH1 , 0x00010000 | chan->id); + NV_WRITE(NV03_PFIFO_CACHE1_PUSH1, + NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id); + /* Reset DMA_CTL_AT_INFO to INVALID */ tmp = NV_READ(NV04_PFIFO_CACHE1_DMA_CTL) & ~(1<<31); NV_WRITE(NV04_PFIFO_CACHE1_DMA_CTL, tmp); @@ -205,4 +207,3 @@ NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff); return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv40_graph.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv40_graph.c --- libdrm-2.3.0.16/shared-core/nv40_graph.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv40_graph.c 2009-04-20 07:00:29.000000000 +0100 @@ -28,21 +28,6 @@ #include "drm.h" #include "nouveau_drv.h" -/* The sizes are taken from the difference between the start of two - * grctx addresses while running the nvidia driver. Probably slightly - * larger than they actually are, because of other objects being created - * between the contexts - */ -#define NV40_GRCTX_SIZE (175*1024) -#define NV41_GRCTX_SIZE (92*1024) -#define NV43_GRCTX_SIZE (70*1024) -#define NV46_GRCTX_SIZE (70*1024) /* probably ~64KiB */ -#define NV49_GRCTX_SIZE (164640) -#define NV4A_GRCTX_SIZE (64*1024) -#define NV4B_GRCTX_SIZE (164640) -#define NV4C_GRCTX_SIZE (25*1024) -#define NV4E_GRCTX_SIZE (25*1024) - /*TODO: deciper what each offset in the context represents. The below * contexts are taken from dumps just after the 3D object is * created. @@ -303,7 +288,7 @@ { struct drm_nouveau_private *dev_priv = dev->dev_private; int i; - + INSTANCE_WR(ctx, 0x00000/4, ctx->im_pramin->start); INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff); INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff); @@ -565,6 +550,136 @@ INSTANCE_WR(ctx, i/4, 0x3f800000); } +/* This may only work on 7800 AGP cards, will include a warning */ +static void +nv47_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + int i; + + INSTANCE_WR(ctx, 0x00000000/4, ctx->im_pramin->start); + INSTANCE_WR(ctx, 0x00000024/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00000028/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00000030/4, 0x00000001); + INSTANCE_WR(ctx, 0x0000011c/4, 0x20010001); + INSTANCE_WR(ctx, 0x00000120/4, 0x0f73ef00); + INSTANCE_WR(ctx, 0x00000128/4, 0x02008821); + INSTANCE_WR(ctx, 0x00000178/4, 0x00000040); + INSTANCE_WR(ctx, 0x0000017c/4, 0x00000040); + INSTANCE_WR(ctx, 0x00000180/4, 0x00000040); + INSTANCE_WR(ctx, 0x00000188/4, 0x00000040); + for (i=0x00000194; i<=0x000001b0; i+=4) + INSTANCE_WR(ctx, i/4, 0x80000000); + INSTANCE_WR(ctx, 0x000001d0/4, 0x0b0b0b0c); + INSTANCE_WR(ctx, 0x00000340/4, 0x00040000); + INSTANCE_WR(ctx, 0x00000350/4, 0x55555555); + INSTANCE_WR(ctx, 0x00000354/4, 0x55555555); + INSTANCE_WR(ctx, 0x00000358/4, 0x55555555); + INSTANCE_WR(ctx, 0x0000035c/4, 0x55555555); + INSTANCE_WR(ctx, 0x00000388/4, 0x00000008); + INSTANCE_WR(ctx, 0x0000039c/4, 0x00001010); + for (i=0x000003c0; i<=0x000003fc; i+=4) + INSTANCE_WR(ctx, i/4, 0x00000111); + INSTANCE_WR(ctx, 0x00000454/4, 0x00000111); + INSTANCE_WR(ctx, 0x00000458/4, 0x00080060); + INSTANCE_WR(ctx, 0x00000474/4, 0x00000080); + INSTANCE_WR(ctx, 0x00000478/4, 0xffff0000); + INSTANCE_WR(ctx, 0x0000047c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00000490/4, 0x46400000); + INSTANCE_WR(ctx, 0x000004a0/4, 0xffff0000); + for (i=0x000004a4; i<=0x000004e0; i+=4) + INSTANCE_WR(ctx, i/4, 0x88888888); + INSTANCE_WR(ctx, 0x000004f4/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x000004f8/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x00000500/4, 0x00011100); + for (i=0x0000051c; i<=0x00000558; i+=4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x00000564/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x0000058c/4, 0x30201000); + INSTANCE_WR(ctx, 0x00000590/4, 0x70605040); + INSTANCE_WR(ctx, 0x00000594/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x00000598/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x000005ac/4, 0x40100000); + INSTANCE_WR(ctx, 0x000005c8/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x000005fc/4, 0x435185d6); + INSTANCE_WR(ctx, 0x00000600/4, 0x2155b699); + INSTANCE_WR(ctx, 0x00000604/4, 0xfedcba98); + INSTANCE_WR(ctx, 0x00000608/4, 0x00000098); + INSTANCE_WR(ctx, 0x00000618/4, 0xffffffff); + INSTANCE_WR(ctx, 0x0000061c/4, 0x00ff7000); + INSTANCE_WR(ctx, 0x00000620/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00000630/4, 0x00ff0000); + INSTANCE_WR(ctx, 0x0000066c/4, 0x00ffff00); + for (i=0x000006b0; i<=0x000006ec; i+=4) + INSTANCE_WR(ctx, i/4, 0x00018488); + for (i=0x000006f0; i<=0x0000072c; i+=4) + INSTANCE_WR(ctx, i/4, 0x00028202); + for (i=0x00000770; i<=0x000007ac; i+=4) + INSTANCE_WR(ctx, i/4, 0x0000aae4); + for (i=0x000007b0; i<=0x000007ec; i+=4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for (i=0x000007f0; i<=0x0000082c; i+=4) + INSTANCE_WR(ctx, i/4, 0x00080008); + for (i=0x00000870; i<=0x000008ac; i+=4) + INSTANCE_WR(ctx, i/4, 0x00100008); + INSTANCE_WR(ctx, 0x00000900/4, 0x0001bc80); + INSTANCE_WR(ctx, 0x00000904/4, 0x0001bc80); + INSTANCE_WR(ctx, 0x00000908/4, 0x0001bc80); + INSTANCE_WR(ctx, 0x0000090c/4, 0x0001bc80); + INSTANCE_WR(ctx, 0x00000910/4, 0x00000202); + INSTANCE_WR(ctx, 0x00000914/4, 0x00000202); + INSTANCE_WR(ctx, 0x00000918/4, 0x00000202); + INSTANCE_WR(ctx, 0x0000091c/4, 0x00000202); + for (i=0x00000930; i<=0x0000095c; i+=4) + INSTANCE_WR(ctx, i/4, 0x00000008); + INSTANCE_WR(ctx, 0x00000970/4, 0x00000002); + INSTANCE_WR(ctx, 0x000009a4/4, 0x00000021); + INSTANCE_WR(ctx, 0x000009a8/4, 0x030c30c3); + INSTANCE_WR(ctx, 0x000009b4/4, 0x3e020200); + INSTANCE_WR(ctx, 0x000009b8/4, 0x00ffffff); + INSTANCE_WR(ctx, 0x000009bc/4, 0x40103f00); + INSTANCE_WR(ctx, 0x000009c8/4, 0x00040000); + INSTANCE_WR(ctx, 0x00000a00/4, 0x00008100); + INSTANCE_WR(ctx, 0x00000a8c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00000ad0/4, 0x00001001); + INSTANCE_WR(ctx, 0x00000adc/4, 0x00000003); + INSTANCE_WR(ctx, 0x00000ae0/4, 0x00888001); + for (i=0x00000b10; i<=0x00000b8c; i+=4) + INSTANCE_WR(ctx, i/4, 0xffffffff); + INSTANCE_WR(ctx, 0x00000bb4/4, 0x00000005); + INSTANCE_WR(ctx, 0x00000bc0/4, 0x0000ffff); + for (i=0x00000bdc; i<=0x00000bf8; i+=4) + INSTANCE_WR(ctx, i/4, 0x00005555); + INSTANCE_WR(ctx, 0x00000bfc/4, 0x00000001); + INSTANCE_WR(ctx, 0x00000c34/4, 0x00000001); + INSTANCE_WR(ctx, 0x00000c38/4, 0x08e00001); + INSTANCE_WR(ctx, 0x00000c3c/4, 0x000e3000); + for (i=0x00003000; i<=0x00003078; i+=8) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x00004dc0; i<=0x00006fb0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x00006fc0; i<=0x000073b0; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x00009800; i<=0x0000b9f0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x0000ba00; i<=0x00010430; i+=24) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x00010440; i<=0x00010830; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x00012c80; i<=0x00014e70; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x00014e80; i<=0x00015270; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x000176c0; i<=0x000198b0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x000198c0; i<=0x00019cb0; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x0001c100; i<=0x0001e2f0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x0001e300; i<=0x0001e6f0; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); +} + static void nv49_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { @@ -1340,55 +1455,60 @@ struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *); - unsigned int ctx_size; int ret; + /* These functions populate the graphics context with a whole heap + * of default state. All these functions are very similar, with + * a minimal amount of chipset-specific changes. However, as we're + * currently dependant on the context programs used by the NVIDIA + * binary driver these functions must match the layout expected by + * them. Hopefully at some point this will all change. + */ switch (dev_priv->chipset) { case 0x40: - ctx_size = NV40_GRCTX_SIZE; ctx_init = nv40_graph_context_init; break; case 0x41: case 0x42: - ctx_size = NV41_GRCTX_SIZE; ctx_init = nv41_graph_context_init; break; case 0x43: - ctx_size = NV43_GRCTX_SIZE; ctx_init = nv43_graph_context_init; break; case 0x46: - ctx_size = NV46_GRCTX_SIZE; ctx_init = nv46_graph_context_init; break; + case 0x47: + ctx_init = nv47_graph_context_init; + break; case 0x49: - ctx_size = NV49_GRCTX_SIZE; ctx_init = nv49_graph_context_init; break; case 0x44: case 0x4a: - ctx_size = NV4A_GRCTX_SIZE; ctx_init = nv4a_graph_context_init; break; case 0x4b: - ctx_size = NV4B_GRCTX_SIZE; ctx_init = nv4b_graph_context_init; break; case 0x4c: - ctx_size = NV4C_GRCTX_SIZE; + case 0x67: ctx_init = nv4c_graph_context_init; break; case 0x4e: - ctx_size = NV4E_GRCTX_SIZE; ctx_init = nv4e_graph_context_init; break; default: - ctx_size = NV40_GRCTX_SIZE; ctx_init = nv40_graph_context_init; break; } - if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16, + /* Allocate a 175KiB block of PRAMIN to store the context. This + * is massive overkill for a lot of chipsets, but it should be safe + * until we're able to implement this properly (will happen at more + * or less the same time we're able to write our own context programs. + */ + if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 175*1024, 16, NVOBJ_FLAG_ZERO_ALLOC, &chan->ramin_grctx))) return ret; @@ -1419,7 +1539,7 @@ tmp |= save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE : NV40_PGRAPH_CTXCTL_0310_XFER_LOAD; NV_WRITE(NV40_PGRAPH_CTXCTL_0310, tmp); - + tmp = NV_READ(NV40_PGRAPH_CTXCTL_0304); tmp |= NV40_PGRAPH_CTXCTL_0304_XFER_CTX; NV_WRITE(NV40_PGRAPH_CTXCTL_0304, tmp); @@ -1497,25 +1617,12 @@ return 0; } -/* Some voodoo that makes context switching work without the binary driver - * initialising the card first. - * - * It is possible to effect how the context is saved from PGRAPH into a block - * of instance memory by altering the values in these tables. This may mean - * that the context layout of each chipset is slightly different (at least - * NV40 and C51 are different). It would also be possible for chipsets to - * have an identical context layout, but pull the data from different PGRAPH - * registers. - * - * TODO: decode the meaning of the magic values, may provide clues about the - * differences between the various NV40 chipsets. - * TODO: one we have a better idea of how each chipset differs, perhaps think - * about unifying these instead of providing a separate table for each - * chip. - * - * mmio-trace dumps from other nv4x/g7x/c5x cards very welcome :) +/* These blocks of "magic numbers" are actually a microcode that the GPU uses + * to control how graphics contexts get saved and restored between PRAMIN + * and PGRAPH during a context switch. We're currently using values seen + * in mmio-traces of the binary driver. */ -static uint32_t nv40_ctx_voodoo[] = { +static uint32_t nv40_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409406, 0x0040a268, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, @@ -1547,7 +1654,7 @@ ~0 }; -static uint32_t nv41_ctx_voodoo[] = { +static uint32_t nv41_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409306, 0x0040a068, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042, @@ -1578,7 +1685,7 @@ 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0 }; -static uint32_t nv43_ctx_voodoo[] = { +static uint32_t nv43_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06, 0x0040a868, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, @@ -1611,7 +1718,7 @@ ~0 }; -static uint32_t nv44_ctx_voodoo[] = { +static uint32_t nv44_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409a65, 0x00409f06, 0x0040ac68, 0x0040248f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042, @@ -1644,7 +1751,7 @@ 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0 }; -static uint32_t nv46_ctx_voodoo[] = { +static uint32_t nv46_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00408f65, 0x00409306, 0x0040a068, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042, @@ -1675,8 +1782,40 @@ 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0 }; +static uint32_t nv47_ctx_prog[] = { + 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, + 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409265, 0x00409606, + 0x0040a368, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042, + 0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968, + 0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, + 0x004020e6, 0x007000a0, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d, + 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4, + 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e, + 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143, + 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d12, + 0x00500060, 0x00403f87, 0x0060000d, 0x00407ce6, 0x002000f0, 0x0060000a, + 0x00200020, 0x00100620, 0x00154650, 0x00104668, 0x0017466d, 0x0011068b, + 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, + 0x00200022, 0x001006cc, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7, + 0x001043e1, 0x00500060, 0x00200268, 0x0060000a, 0x00104800, 0x00108901, + 0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00144a00, 0x00104a19, + 0x0010ca1c, 0x00110b00, 0x00200028, 0x00100b08, 0x00134c2e, 0x0010cd00, + 0x0010cd04, 0x00120d08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, + 0x00104f06, 0x00105406, 0x00105709, 0x00200318, 0x0060000a, 0x00300000, + 0x00200680, 0x00407500, 0x00200684, 0x00800001, 0x00200b60, 0x0060000a, + 0x00209540, 0x00407b8a, 0x00201350, 0x00800041, 0x00408c00, 0x00600006, + 0x004088e6, 0x00700080, 0x0020007a, 0x0060000a, 0x00104280, 0x00200318, + 0x0060000a, 0x00200004, 0x00800001, 0x00700000, 0x00200000, 0x0060000a, + 0x00106002, 0x0040a368, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, + 0x00700080, 0x00400a68, 0x00500060, 0x00600007, 0x00409688, 0x0060000f, + 0x00500060, 0x00200000, 0x0060000a, 0x00700000, 0x00106001, 0x0091a880, + 0x00901ffe, 0x10940000, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c, + 0x00402168, 0x0040a506, 0x0040a605, 0x00600009, 0x00700005, 0x00700006, + 0x0060000e, ~0 +}; + //this is used for nv49 and nv4b -static uint32_t nv49_4b_ctx_voodoo[] ={ +static uint32_t nv49_4b_ctx_prog[] ={ 0x00400564, 0x00400505, 0x00408165, 0x00408206, 0x00409e68, 0x00200020, 0x0060000a, 0x00700080, 0x00104042, 0x00200020, 0x0060000a, 0x00700000, 0x001040c5, 0x00400f26, 0x00401068, 0x0060000d, 0x0070008f, 0x0070000e, @@ -1708,40 +1847,40 @@ }; -static uint32_t nv4a_ctx_voodoo[] = { - 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, - 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409965, 0x00409e06, - 0x0040ac68, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, - 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061, - 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d, - 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4, - 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e, - 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143, - 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10, - 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407de6, 0x002000f1, - 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b, - 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, - 0x001646cc, 0x001186e6, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700, - 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003, - 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200232, 0x0060000a, - 0x00104800, 0x00108901, 0x00104910, 0x00124920, 0x0020001f, 0x00100940, - 0x00140965, 0x00148a00, 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00, - 0x0010cd04, 0x0010cd08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, - 0x00104f06, 0x002002c8, 0x0060000a, 0x00300000, 0x00200080, 0x00407300, - 0x00200084, 0x00800001, 0x00200510, 0x0060000a, 0x002037e0, 0x0040798a, - 0x00201320, 0x00800029, 0x00407d84, 0x00201560, 0x00800002, 0x00409100, - 0x00600006, 0x00700003, 0x00408ae6, 0x00700080, 0x0020007a, 0x0060000a, - 0x00104280, 0x002002c8, 0x0060000a, 0x00200004, 0x00800001, 0x00700000, - 0x00200000, 0x0060000a, 0x00106002, 0x0040ac84, 0x00700002, 0x00600004, - 0x0040ac68, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x00700080, - 0x00400a84, 0x00700002, 0x00400a68, 0x00500060, 0x00600007, 0x00409d88, - 0x0060000f, 0x00000000, 0x00500060, 0x00200000, 0x0060000a, 0x00700000, - 0x00106001, 0x00700083, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020, - 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68, 0x0040ae06, 0x0040af05, +static uint32_t nv4a_ctx_prog[] = { + 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, + 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409965, 0x00409e06, + 0x0040ac68, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, + 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061, + 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d, + 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4, + 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e, + 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143, + 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10, + 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407de6, 0x002000f1, + 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b, + 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, + 0x001646cc, 0x001186e6, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700, + 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003, + 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200232, 0x0060000a, + 0x00104800, 0x00108901, 0x00104910, 0x00124920, 0x0020001f, 0x00100940, + 0x00140965, 0x00148a00, 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00, + 0x0010cd04, 0x0010cd08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, + 0x00104f06, 0x002002c8, 0x0060000a, 0x00300000, 0x00200080, 0x00407300, + 0x00200084, 0x00800001, 0x00200510, 0x0060000a, 0x002037e0, 0x0040798a, + 0x00201320, 0x00800029, 0x00407d84, 0x00201560, 0x00800002, 0x00409100, + 0x00600006, 0x00700003, 0x00408ae6, 0x00700080, 0x0020007a, 0x0060000a, + 0x00104280, 0x002002c8, 0x0060000a, 0x00200004, 0x00800001, 0x00700000, + 0x00200000, 0x0060000a, 0x00106002, 0x0040ac84, 0x00700002, 0x00600004, + 0x0040ac68, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x00700080, + 0x00400a84, 0x00700002, 0x00400a68, 0x00500060, 0x00600007, 0x00409d88, + 0x0060000f, 0x00000000, 0x00500060, 0x00200000, 0x0060000a, 0x00700000, + 0x00106001, 0x00700083, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020, + 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68, 0x0040ae06, 0x0040af05, 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0 }; -static uint32_t nv4c_ctx_voodoo[] = { +static uint32_t nv4c_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409065, 0x00409406, 0x0040a168, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042, @@ -1772,7 +1911,7 @@ 0x0040a405, 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0 }; -static uint32_t nv4e_ctx_voodoo[] = { +static uint32_t nv4e_ctx_prog[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06, 0x0040a868, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, @@ -1819,7 +1958,7 @@ { struct drm_nouveau_private *dev_priv = (struct drm_nouveau_private *)dev->dev_private; - uint32_t *ctx_voodoo; + uint32_t *ctx_prog; uint32_t vramsz, tmp; int i, j; @@ -1829,35 +1968,37 @@ NV_PMC_ENABLE_PGRAPH); switch (dev_priv->chipset) { - case 0x40: ctx_voodoo = nv40_ctx_voodoo; break; + case 0x40: ctx_prog = nv40_ctx_prog; break; case 0x41: - case 0x42: ctx_voodoo = nv41_ctx_voodoo; break; - case 0x43: ctx_voodoo = nv43_ctx_voodoo; break; - case 0x44: ctx_voodoo = nv44_ctx_voodoo; break; - case 0x46: ctx_voodoo = nv46_ctx_voodoo; break; - case 0x49: ctx_voodoo = nv49_4b_ctx_voodoo; break; - case 0x4a: ctx_voodoo = nv4a_ctx_voodoo; break; - case 0x4b: ctx_voodoo = nv49_4b_ctx_voodoo; break; - case 0x4c: ctx_voodoo = nv4c_ctx_voodoo; break; - case 0x4e: ctx_voodoo = nv4e_ctx_voodoo; break; + case 0x42: ctx_prog = nv41_ctx_prog; break; + case 0x43: ctx_prog = nv43_ctx_prog; break; + case 0x44: ctx_prog = nv44_ctx_prog; break; + case 0x46: ctx_prog = nv46_ctx_prog; break; + case 0x47: ctx_prog = nv47_ctx_prog; break; + case 0x49: ctx_prog = nv49_4b_ctx_prog; break; + case 0x4a: ctx_prog = nv4a_ctx_prog; break; + case 0x4b: ctx_prog = nv49_4b_ctx_prog; break; + case 0x4c: + case 0x67: ctx_prog = nv4c_ctx_prog; break; + case 0x4e: ctx_prog = nv4e_ctx_prog; break; default: - DRM_ERROR("Unknown ctx_voodoo for chipset 0x%02x\n", - dev_priv->chipset); - ctx_voodoo = NULL; + DRM_ERROR("Context program for 0x%02x unavailable\n", + dev_priv->chipset); + ctx_prog = NULL; break; } - /* Load the context voodoo onto the card */ - if (ctx_voodoo) { - DRM_DEBUG("Loading context-switch voodoo\n"); + /* Load the context program onto the card */ + if (ctx_prog) { + DRM_DEBUG("Loading context program\n"); i = 0; NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0); - while (ctx_voodoo[i] != ~0) { - NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_DATA, ctx_voodoo[i]); + while (ctx_prog[i] != ~0) { + NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_DATA, ctx_prog[i]); i++; } - } + } /* No context present currently */ NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, 0x00000000); @@ -2052,4 +2193,3 @@ void nv40_graph_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv40_mc.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv40_mc.c --- libdrm-2.3.0.16/shared-core/nv40_mc.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv40_mc.c 2009-04-20 07:00:29.000000000 +0100 @@ -36,4 +36,3 @@ nv40_mc_takedown(struct drm_device *dev) { } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv50_fifo.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv50_fifo.c --- libdrm-2.3.0.16/shared-core/nv50_fifo.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv50_fifo.c 2009-04-20 07:00:29.000000000 +0100 @@ -28,9 +28,10 @@ #include "drm.h" #include "nouveau_drv.h" -typedef struct { - struct nouveau_gpuobj_ref *thingo; -} nv50_fifo_priv; +struct nv50_fifo_priv { + struct nouveau_gpuobj_ref *thingo[2]; + int cur_thingo; +}; #define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50) @@ -38,23 +39,23 @@ nv50_fifo_init_thingo(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; - struct nouveau_gpuobj_ref *thingo = priv->thingo; - int i, fi=2; + struct nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; + struct nouveau_gpuobj_ref *cur; + int i, nr; DRM_DEBUG("\n"); - INSTANCE_WR(thingo->gpuobj, 0, 0x7e); - INSTANCE_WR(thingo->gpuobj, 1, 0x7e); - for (i = 1; i < 127; i++, fi) { + cur = priv->thingo[priv->cur_thingo]; + priv->cur_thingo = !priv->cur_thingo; + + /* We never schedule channel 0 or 127 */ + for (i = 1, nr = 0; i < 127; i++) { if (dev_priv->fifos[i]) { - INSTANCE_WR(thingo->gpuobj, fi, i); - fi++; + INSTANCE_WR(cur->gpuobj, nr++, i); } } - - NV_WRITE(0x32f4, thingo->instance >> 12); - NV_WRITE(0x32ec, fi); + NV_WRITE(0x32f4, cur->instance >> 12); + NV_WRITE(0x32ec, nr); NV_WRITE(0x2500, 0x101); } @@ -98,14 +99,12 @@ nv50_fifo_init_reset(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t pmc_e; + uint32_t pmc_e = NV_PMC_ENABLE_PFIFO; DRM_DEBUG("\n"); - pmc_e = NV_READ(NV03_PMC_ENABLE); - NV_WRITE(NV03_PMC_ENABLE, pmc_e & ~NV_PMC_ENABLE_PFIFO); - pmc_e = NV_READ(NV03_PMC_ENABLE); - NV_WRITE(NV03_PMC_ENABLE, pmc_e | NV_PMC_ENABLE_PFIFO); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & ~pmc_e); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | pmc_e); } static void @@ -141,7 +140,7 @@ NV_WRITE(0x250c, 0x6f3cfc34); } -static int +static void nv50_fifo_init_regs(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -158,15 +157,13 @@ /* Enable dummy channels setup by nv50_instmem.c */ nv50_fifo_channel_enable(dev, 0, 1); nv50_fifo_channel_enable(dev, 127, 1); - - return 0; } int nv50_fifo_init(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - nv50_fifo_priv *priv; + struct nv50_fifo_priv *priv; int ret; DRM_DEBUG("\n"); @@ -179,18 +176,23 @@ nv50_fifo_init_reset(dev); nv50_fifo_init_intr(dev); - if ((ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, (128+2)*4, 0x1000, - NVOBJ_FLAG_ZERO_ALLOC, - &priv->thingo))) { - DRM_ERROR("error creating thingo: %d\n", ret); + ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000, + NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[0]); + if (ret) { + DRM_ERROR("error creating thingo0: %d\n", ret); return ret; } - nv50_fifo_init_context_table(dev); + ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000, + NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[1]); + if (ret) { + DRM_ERROR("error creating thingo1: %d\n", ret); + return ret; + } + nv50_fifo_init_context_table(dev); nv50_fifo_init_regs__nv(dev); - if ((ret = nv50_fifo_init_regs(dev))) - return ret; + nv50_fifo_init_regs(dev); return 0; } @@ -199,20 +201,30 @@ nv50_fifo_takedown(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; + struct nv50_fifo_priv *priv = dev_priv->Engine.fifo.priv; DRM_DEBUG("\n"); if (!priv) return; - nouveau_gpuobj_ref_del(dev, &priv->thingo); + nouveau_gpuobj_ref_del(dev, &priv->thingo[0]); + nouveau_gpuobj_ref_del(dev, &priv->thingo[1]); dev_priv->Engine.fifo.priv = NULL; drm_free(priv, sizeof(*priv), DRM_MEM_DRIVER); } int +nv50_fifo_channel_id(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + return (NV_READ(NV03_PFIFO_CACHE1_PUSH1) & + NV50_PFIFO_CACHE1_PUSH1_CHID_MASK); +} + +int nv50_fifo_create_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; @@ -225,18 +237,18 @@ if (IS_G80) { uint32_t ramfc_offset = chan->ramin->gpuobj->im_pramin->start; uint32_t vram_offset = chan->ramin->gpuobj->im_backing->start; - if ((ret = nouveau_gpuobj_new_fake(dev, ramfc_offset, - vram_offset, 0x100, - NVOBJ_FLAG_ZERO_ALLOC | - NVOBJ_FLAG_ZERO_FREE, - &ramfc, &chan->ramfc))) - return ret; + ret = nouveau_gpuobj_new_fake(dev, ramfc_offset, vram_offset, + 0x100, NVOBJ_FLAG_ZERO_ALLOC | + NVOBJ_FLAG_ZERO_FREE, &ramfc, + &chan->ramfc); + if (ret) + return ret; } else { - if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 0x100, - 256, - NVOBJ_FLAG_ZERO_ALLOC | - NVOBJ_FLAG_ZERO_FREE, - &chan->ramfc))) + ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 0x100, 256, + NVOBJ_FLAG_ZERO_ALLOC | + NVOBJ_FLAG_ZERO_FREE, + &chan->ramfc); + if (ret) return ret; ramfc = chan->ramfc->gpuobj; } @@ -263,7 +275,8 @@ INSTANCE_WR(ramfc, 0x98/4, chan->ramin->instance >> 12); } - if ((ret = nv50_fifo_channel_enable(dev, chan->id, 0))) { + ret = nv50_fifo_channel_enable(dev, chan->id, 0); + if (ret) { DRM_ERROR("error enabling ch%d: %d\n", chan->id, ret); nouveau_gpuobj_ref_del(dev, &chan->ramfc); return ret; @@ -324,4 +337,3 @@ DRM_ERROR("stub!\n"); return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv50_graph.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv50_graph.c --- libdrm-2.3.0.16/shared-core/nv50_graph.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv50_graph.c 2009-04-20 07:00:29.000000000 +0100 @@ -34,14 +34,12 @@ nv50_graph_init_reset(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t pmc_e; + uint32_t pmc_e = NV_PMC_ENABLE_PGRAPH | (1 << 21); DRM_DEBUG("\n"); - pmc_e = NV_READ(NV03_PMC_ENABLE); - NV_WRITE(NV03_PMC_ENABLE, pmc_e & ~NV_PMC_ENABLE_PGRAPH); - pmc_e = NV_READ(NV03_PMC_ENABLE); - NV_WRITE(NV03_PMC_ENABLE, pmc_e | NV_PMC_ENABLE_PGRAPH); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) & ~pmc_e); + NV_WRITE(NV03_PMC_ENABLE, NV_READ(NV03_PMC_ENABLE) | pmc_e); } static void @@ -51,6 +49,7 @@ DRM_DEBUG("\n"); NV_WRITE(NV03_PGRAPH_INTR, 0xffffffff); + NV_WRITE(0x400138, 0xffffffff); NV_WRITE(NV40_PGRAPH_INTR_EN, 0xffffffff); } @@ -146,12 +145,53 @@ 0x00415e06, 0x00415f05, 0x0060000d, 0x00700005, 0x0070000d, 0x00700006, 0x0070000b, 0x0070000e, 0x0070001c, 0x0060000c, ~0 }; + +static uint32_t nv86_ctx_voodoo[] = { + 0x0070008e, 0x0070009c, 0x00200020, 0x00600008, 0x0050004c, 0x00400e89, + 0x00200000, 0x00600007, 0x00300000, 0x00c000ff, 0x00200000, 0x008000ff, + 0x00700009, 0x0040dd4d, 0x00402944, 0x00402905, 0x0040290d, 0x0040b906, + 0x00600005, 0x004015c5, 0x00600011, 0x0040270b, 0x004021c5, 0x00700000, + 0x00700081, 0x00600004, 0x0050004a, 0x00216d80, 0x00600007, 0x00c02801, + 0x0020002e, 0x00800001, 0x005000cb, 0x0090ffff, 0x0091ffff, 0x00200020, + 0x00600008, 0x0050004c, 0x00600009, 0x0040b945, 0x0040d44d, 0x0070009d, + 0x00402dcf, 0x0070009f, 0x0050009f, 0x00402ac0, 0x00200200, 0x00600008, + 0x00402a4f, 0x00402ac0, 0x004030cc, 0x00700081, 0x00200000, 0x00600006, + 0x00700000, 0x00111bfc, 0x00700083, 0x00300000, 0x00216d80, 0x00600007, + 0x00c00b01, 0x0020001e, 0x00800001, 0x005000cb, 0x00c000ff, 0x00700080, + 0x00700083, 0x00200047, 0x00600006, 0x0011020a, 0x00200280, 0x00600007, + 0x00300000, 0x00c000ff, 0x00c800ff, 0x0040c407, 0x00202916, 0x008000ff, + 0x0040508c, 0x005000cb, 0x00a0023f, 0x00200040, 0x00600006, 0x0070000f, + 0x00170202, 0x0011020a, 0x00200032, 0x0010020d, 0x001c0242, 0x00120302, + 0x00140402, 0x00180500, 0x00130509, 0x00150550, 0x00110605, 0x0020000f, + 0x00100607, 0x00110700, 0x00110900, 0x00120902, 0x00110a00, 0x00160b02, + 0x00120b28, 0x00140b2b, 0x00110c01, 0x00111400, 0x00111405, 0x00111407, + 0x00111409, 0x0011140b, 0x002000cb, 0x00101500, 0x0040790f, 0x0040794b, + 0x00214b40, 0x00600007, 0x00200442, 0x008800ff, 0x0070008f, 0x0040798c, + 0x005000cb, 0x00000000, 0x0020002b, 0x00101a05, 0x00131c00, 0x00121c04, + 0x00141c20, 0x00111c25, 0x00131c40, 0x00121c44, 0x00141c60, 0x00111c65, + 0x00131f00, 0x00191f40, 0x004099e0, 0x002001d9, 0x00600006, 0x00200044, + 0x00102080, 0x001120c6, 0x001520c9, 0x001920d0, 0x00122100, 0x00122103, + 0x00162200, 0x00122207, 0x00112280, 0x00112300, 0x00112302, 0x00122380, + 0x0011238b, 0x00112394, 0x0011239c, 0x00000000, 0x0040a00f, 0x005000cb, + 0x00214b40, 0x00600007, 0x00200442, 0x008800ff, 0x005000cb, 0x0040a387, + 0x0060000a, 0x00000000, 0x0040b200, 0x007000a0, 0x00700080, 0x00200280, + 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff, 0x005000cb, 0x00700000, + 0x00200000, 0x00600006, 0x00111bfe, 0x0040d44d, 0x00700000, 0x00200000, + 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d, 0x0040114d, 0x00700081, + 0x00600004, 0x0050004a, 0x0040be88, 0x0060000b, 0x00200000, 0x00600006, + 0x00700000, 0x0040d40b, 0x00111bfd, 0x0040424d, 0x00202916, 0x008000fd, + 0x005000cb, 0x00c00002, 0x00200280, 0x00600007, 0x00200160, 0x00800002, + 0x005000cb, 0x00c01802, 0x002027b6, 0x00800002, 0x005000cb, 0x00404e4d, + 0x0060000b, 0x0040d24d, 0x00700001, 0x00700003, 0x0040d806, 0x0040d905, + 0x0060000d, 0x00700005, 0x0070000d, 0x00700006, 0x0070000b, 0x0070000e, + 0x0060000c, ~0 +}; -static void +static int nv50_graph_init_ctxctl(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t *voodoo; + uint32_t *voodoo = NULL; DRM_DEBUG("\n"); @@ -159,34 +199,42 @@ case 0x84: voodoo = nv84_ctx_voodoo; break; + case 0x86: + voodoo = nv86_ctx_voodoo; + break; default: DRM_ERROR("no voodoo for chipset NV%02x\n", dev_priv->chipset); - break; + return -EINVAL; } - if (voodoo) { - NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0); - while (*voodoo != ~0) { - NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_DATA, *voodoo); - voodoo++; - } + NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0); + while (*voodoo != ~0) { + NV_WRITE(NV40_PGRAPH_CTXCTL_UCODE_DATA, *voodoo); + voodoo++; } NV_WRITE(0x400320, 4); NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, 0); NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, 0); + + return 0; } -int +int nv50_graph_init(struct drm_device *dev) { + int ret; + DRM_DEBUG("\n"); nv50_graph_init_reset(dev); nv50_graph_init_intr(dev); nv50_graph_init_regs__nv(dev); nv50_graph_init_regs(dev); - nv50_graph_init_ctxctl(dev); + + ret = nv50_graph_init_ctxctl(dev); + if (ret) + return ret; return 0; } @@ -197,23 +245,1836 @@ DRM_DEBUG("\n"); } +static void +nv86_graph_init_ctxvals(struct drm_device *dev, struct nouveau_gpuobj_ref *ref) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_gpuobj *ctx = ref->gpuobj; + + INSTANCE_WR(ctx, 0x10C/4, 0x30); + INSTANCE_WR(ctx, 0x1D4/4, 0x3); + INSTANCE_WR(ctx, 0x1D8/4, 0x1000); + INSTANCE_WR(ctx, 0x218/4, 0xFE0C); + INSTANCE_WR(ctx, 0x22C/4, 0x1000); + INSTANCE_WR(ctx, 0x258/4, 0x187); + INSTANCE_WR(ctx, 0x26C/4, 0x1018); + INSTANCE_WR(ctx, 0x270/4, 0xFF); + INSTANCE_WR(ctx, 0x2AC/4, 0x4); + INSTANCE_WR(ctx, 0x2B0/4, 0x44D00DF); + INSTANCE_WR(ctx, 0x2B8/4, 0x600); + INSTANCE_WR(ctx, 0x2D0/4, 0x1000000); + INSTANCE_WR(ctx, 0x2D4/4, 0xFF); + INSTANCE_WR(ctx, 0x2DC/4, 0x400); + INSTANCE_WR(ctx, 0x2F4/4, 0x1); + INSTANCE_WR(ctx, 0x2F8/4, 0x80); + INSTANCE_WR(ctx, 0x2FC/4, 0x4); + INSTANCE_WR(ctx, 0x318/4, 0x2); + INSTANCE_WR(ctx, 0x31C/4, 0x1); + INSTANCE_WR(ctx, 0x328/4, 0x1); + INSTANCE_WR(ctx, 0x32C/4, 0x100); + INSTANCE_WR(ctx, 0x344/4, 0x2); + INSTANCE_WR(ctx, 0x348/4, 0x1); + INSTANCE_WR(ctx, 0x34C/4, 0x1); + INSTANCE_WR(ctx, 0x35C/4, 0x1); + INSTANCE_WR(ctx, 0x360/4, 0x3FFFFF); + INSTANCE_WR(ctx, 0x364/4, 0x1FFF); + INSTANCE_WR(ctx, 0x36C/4, 0x1); + INSTANCE_WR(ctx, 0x370/4, 0x1); + INSTANCE_WR(ctx, 0x378/4, 0x1); + INSTANCE_WR(ctx, 0x37C/4, 0x1); + INSTANCE_WR(ctx, 0x380/4, 0x1); + INSTANCE_WR(ctx, 0x384/4, 0x4); + INSTANCE_WR(ctx, 0x388/4, 0x1); + INSTANCE_WR(ctx, 0x38C/4, 0x1); + INSTANCE_WR(ctx, 0x390/4, 0x1); + INSTANCE_WR(ctx, 0x394/4, 0x7); + INSTANCE_WR(ctx, 0x398/4, 0x1); + INSTANCE_WR(ctx, 0x39C/4, 0x7); + INSTANCE_WR(ctx, 0x3A0/4, 0x1); + INSTANCE_WR(ctx, 0x3A4/4, 0x1); + INSTANCE_WR(ctx, 0x3A8/4, 0x1); + INSTANCE_WR(ctx, 0x3BC/4, 0x1); + INSTANCE_WR(ctx, 0x3C0/4, 0x100); + INSTANCE_WR(ctx, 0x3C8/4, 0x1); + INSTANCE_WR(ctx, 0x3D4/4, 0x100); + INSTANCE_WR(ctx, 0x3D8/4, 0x1); + INSTANCE_WR(ctx, 0x3DC/4, 0x100); + INSTANCE_WR(ctx, 0x3E4/4, 0x1); + INSTANCE_WR(ctx, 0x3F0/4, 0x100); + INSTANCE_WR(ctx, 0x404/4, 0x4); + INSTANCE_WR(ctx, 0x408/4, 0x70); + INSTANCE_WR(ctx, 0x40C/4, 0x80); + INSTANCE_WR(ctx, 0x420/4, 0xC); + INSTANCE_WR(ctx, 0x428/4, 0x8); + INSTANCE_WR(ctx, 0x42C/4, 0x14); + INSTANCE_WR(ctx, 0x434/4, 0x29); + INSTANCE_WR(ctx, 0x438/4, 0x27); + INSTANCE_WR(ctx, 0x43C/4, 0x26); + INSTANCE_WR(ctx, 0x440/4, 0x8); + INSTANCE_WR(ctx, 0x444/4, 0x4); + INSTANCE_WR(ctx, 0x448/4, 0x27); + INSTANCE_WR(ctx, 0x454/4, 0x1); + INSTANCE_WR(ctx, 0x458/4, 0x2); + INSTANCE_WR(ctx, 0x45C/4, 0x3); + INSTANCE_WR(ctx, 0x460/4, 0x4); + INSTANCE_WR(ctx, 0x464/4, 0x5); + INSTANCE_WR(ctx, 0x468/4, 0x6); + INSTANCE_WR(ctx, 0x46C/4, 0x7); + INSTANCE_WR(ctx, 0x470/4, 0x1); + INSTANCE_WR(ctx, 0x4B4/4, 0xCF); + INSTANCE_WR(ctx, 0x4E4/4, 0x80); + INSTANCE_WR(ctx, 0x4E8/4, 0x4); + INSTANCE_WR(ctx, 0x4EC/4, 0x4); + INSTANCE_WR(ctx, 0x4F0/4, 0x3); + INSTANCE_WR(ctx, 0x4F4/4, 0x1); + INSTANCE_WR(ctx, 0x500/4, 0x12); + INSTANCE_WR(ctx, 0x504/4, 0x10); + INSTANCE_WR(ctx, 0x508/4, 0xC); + INSTANCE_WR(ctx, 0x50C/4, 0x1); + INSTANCE_WR(ctx, 0x51C/4, 0x4); + INSTANCE_WR(ctx, 0x520/4, 0x2); + INSTANCE_WR(ctx, 0x524/4, 0x4); + INSTANCE_WR(ctx, 0x530/4, 0x3FFFFF); + INSTANCE_WR(ctx, 0x534/4, 0x1FFF); + INSTANCE_WR(ctx, 0x55C/4, 0x4); + INSTANCE_WR(ctx, 0x560/4, 0x14); + INSTANCE_WR(ctx, 0x564/4, 0x1); + INSTANCE_WR(ctx, 0x570/4, 0x2); + INSTANCE_WR(ctx, 0x57C/4, 0x1); + INSTANCE_WR(ctx, 0x584/4, 0x2); + INSTANCE_WR(ctx, 0x588/4, 0x1000); + INSTANCE_WR(ctx, 0x58C/4, 0xE00); + INSTANCE_WR(ctx, 0x590/4, 0x1000); + INSTANCE_WR(ctx, 0x594/4, 0x1E00); + INSTANCE_WR(ctx, 0x59C/4, 0x1); + INSTANCE_WR(ctx, 0x5A0/4, 0x1); + INSTANCE_WR(ctx, 0x5A4/4, 0x1); + INSTANCE_WR(ctx, 0x5A8/4, 0x1); + INSTANCE_WR(ctx, 0x5AC/4, 0x1); + INSTANCE_WR(ctx, 0x5BC/4, 0x200); + INSTANCE_WR(ctx, 0x5C4/4, 0x1); + INSTANCE_WR(ctx, 0x5C8/4, 0x70); + INSTANCE_WR(ctx, 0x5CC/4, 0x80); + INSTANCE_WR(ctx, 0x5D8/4, 0x1); + INSTANCE_WR(ctx, 0x5DC/4, 0x70); + INSTANCE_WR(ctx, 0x5E0/4, 0x80); + INSTANCE_WR(ctx, 0x5F0/4, 0x1); + INSTANCE_WR(ctx, 0x5F4/4, 0xCF); + INSTANCE_WR(ctx, 0x5FC/4, 0x1); + INSTANCE_WR(ctx, 0x60C/4, 0xCF); + INSTANCE_WR(ctx, 0x614/4, 0x2); + INSTANCE_WR(ctx, 0x61C/4, 0x1); + INSTANCE_WR(ctx, 0x624/4, 0x1); + INSTANCE_WR(ctx, 0x62C/4, 0xCF); + INSTANCE_WR(ctx, 0x630/4, 0xCF); + INSTANCE_WR(ctx, 0x634/4, 0x1); + INSTANCE_WR(ctx, 0x63C/4, 0xF80); + INSTANCE_WR(ctx, 0x684/4, 0x7F0080); + INSTANCE_WR(ctx, 0x6C0/4, 0x7F0080); + INSTANCE_WR(ctx, 0x6E4/4, 0x3B74F821); + INSTANCE_WR(ctx, 0x6E8/4, 0x89058001); + INSTANCE_WR(ctx, 0x6F0/4, 0x1000); + INSTANCE_WR(ctx, 0x6F4/4, 0x1F); + INSTANCE_WR(ctx, 0x6F8/4, 0x27C10FA); + INSTANCE_WR(ctx, 0x6FC/4, 0x400000C0); + INSTANCE_WR(ctx, 0x700/4, 0xB7892080); + INSTANCE_WR(ctx, 0x70C/4, 0x3B74F821); + INSTANCE_WR(ctx, 0x710/4, 0x89058001); + INSTANCE_WR(ctx, 0x718/4, 0x1000); + INSTANCE_WR(ctx, 0x71C/4, 0x1F); + INSTANCE_WR(ctx, 0x720/4, 0x27C10FA); + INSTANCE_WR(ctx, 0x724/4, 0x400000C0); + INSTANCE_WR(ctx, 0x728/4, 0xB7892080); + INSTANCE_WR(ctx, 0x734/4, 0x10040); + INSTANCE_WR(ctx, 0x73C/4, 0x22); + INSTANCE_WR(ctx, 0x748/4, 0x10040); + INSTANCE_WR(ctx, 0x74C/4, 0x22); + INSTANCE_WR(ctx, 0x764/4, 0x1800000); + INSTANCE_WR(ctx, 0x768/4, 0x160000); + INSTANCE_WR(ctx, 0x76C/4, 0x1800000); + INSTANCE_WR(ctx, 0x77C/4, 0x3FFFF); + INSTANCE_WR(ctx, 0x780/4, 0x8C0000); + INSTANCE_WR(ctx, 0x7A4/4, 0x10401); + INSTANCE_WR(ctx, 0x7AC/4, 0x78); + INSTANCE_WR(ctx, 0x7B4/4, 0xBF); + INSTANCE_WR(ctx, 0x7BC/4, 0x1210); + INSTANCE_WR(ctx, 0x7C0/4, 0x8000080); + INSTANCE_WR(ctx, 0x7E4/4, 0x1800000); + INSTANCE_WR(ctx, 0x7E8/4, 0x160000); + INSTANCE_WR(ctx, 0x7EC/4, 0x1800000); + INSTANCE_WR(ctx, 0x7FC/4, 0x3FFFF); + INSTANCE_WR(ctx, 0x800/4, 0x8C0000); + INSTANCE_WR(ctx, 0x824/4, 0x10401); + INSTANCE_WR(ctx, 0x82C/4, 0x78); + INSTANCE_WR(ctx, 0x834/4, 0xBF); + INSTANCE_WR(ctx, 0x83C/4, 0x1210); + INSTANCE_WR(ctx, 0x840/4, 0x8000080); + INSTANCE_WR(ctx, 0x868/4, 0x27070); + INSTANCE_WR(ctx, 0x874/4, 0x3FFFFFF); + INSTANCE_WR(ctx, 0x88C/4, 0x120407); + INSTANCE_WR(ctx, 0x890/4, 0x5091507); + INSTANCE_WR(ctx, 0x894/4, 0x5010202); + INSTANCE_WR(ctx, 0x898/4, 0x30201); + INSTANCE_WR(ctx, 0x8B4/4, 0x40); + INSTANCE_WR(ctx, 0x8B8/4, 0xD0C0B0A); + INSTANCE_WR(ctx, 0x8BC/4, 0x141210); + INSTANCE_WR(ctx, 0x8C0/4, 0x1F0); + INSTANCE_WR(ctx, 0x8C4/4, 0x1); + INSTANCE_WR(ctx, 0x8C8/4, 0x3); + INSTANCE_WR(ctx, 0x8D4/4, 0x39E00); + INSTANCE_WR(ctx, 0x8D8/4, 0x100); + INSTANCE_WR(ctx, 0x8DC/4, 0x3800); + INSTANCE_WR(ctx, 0x8E0/4, 0x404040); + INSTANCE_WR(ctx, 0x8E4/4, 0xFF0A); + INSTANCE_WR(ctx, 0x8EC/4, 0x77F005); + INSTANCE_WR(ctx, 0x8F0/4, 0x3F7FFF); + INSTANCE_WR(ctx, 0x7BA0/4, 0x21); + INSTANCE_WR(ctx, 0x7BC0/4, 0x1); + INSTANCE_WR(ctx, 0x7BE0/4, 0x2); + INSTANCE_WR(ctx, 0x7C00/4, 0x100); + INSTANCE_WR(ctx, 0x7C20/4, 0x100); + INSTANCE_WR(ctx, 0x7C40/4, 0x1); + INSTANCE_WR(ctx, 0x7CA0/4, 0x1); + INSTANCE_WR(ctx, 0x7CC0/4, 0x2); + INSTANCE_WR(ctx, 0x7CE0/4, 0x100); + INSTANCE_WR(ctx, 0x7D00/4, 0x100); + INSTANCE_WR(ctx, 0x7D20/4, 0x1); + INSTANCE_WR(ctx, 0x11640/4, 0x4); + INSTANCE_WR(ctx, 0x11660/4, 0x4); + INSTANCE_WR(ctx, 0x49FE0/4, 0x4); + INSTANCE_WR(ctx, 0x4A000/4, 0x4); + INSTANCE_WR(ctx, 0x4A020/4, 0x8100C12); + INSTANCE_WR(ctx, 0x4A040/4, 0x3); + INSTANCE_WR(ctx, 0x4A080/4, 0x8100C12); + INSTANCE_WR(ctx, 0x4A0C0/4, 0x80C14); + INSTANCE_WR(ctx, 0x4A0E0/4, 0x1); + INSTANCE_WR(ctx, 0x4A100/4, 0x80C14); + INSTANCE_WR(ctx, 0x4A160/4, 0x8100C12); + INSTANCE_WR(ctx, 0x4A180/4, 0x27); + INSTANCE_WR(ctx, 0x4A1E0/4, 0x1); + INSTANCE_WR(ctx, 0x51A20/4, 0x1); + INSTANCE_WR(ctx, 0x51D00/4, 0x8100C12); + INSTANCE_WR(ctx, 0x51EA0/4, 0x4000000); + INSTANCE_WR(ctx, 0x51EC0/4, 0x4000000); + INSTANCE_WR(ctx, 0x51F00/4, 0x80); + INSTANCE_WR(ctx, 0x51F80/4, 0x80); + INSTANCE_WR(ctx, 0x51FC0/4, 0x3F); + INSTANCE_WR(ctx, 0x52120/4, 0x2); + INSTANCE_WR(ctx, 0x52140/4, 0x4000000); + INSTANCE_WR(ctx, 0x52160/4, 0x4000000); + INSTANCE_WR(ctx, 0x52280/4, 0x4); + INSTANCE_WR(ctx, 0x52300/4, 0x4); + INSTANCE_WR(ctx, 0x52540/4, 0x1); + INSTANCE_WR(ctx, 0x52560/4, 0x1001); + INSTANCE_WR(ctx, 0x52580/4, 0xFFFF); + INSTANCE_WR(ctx, 0x525A0/4, 0xFFFF); + INSTANCE_WR(ctx, 0x525C0/4, 0xFFFF); + INSTANCE_WR(ctx, 0x525E0/4, 0xFFFF); + INSTANCE_WR(ctx, 0x52A00/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52A20/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52A40/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52A60/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52A80/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52AA0/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52AC0/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52AE0/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52B00/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52B20/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52B40/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52B60/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52B80/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52BA0/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52BC0/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52BE0/4, 0x3F800000); + INSTANCE_WR(ctx, 0x52C00/4, 0x10); + INSTANCE_WR(ctx, 0x52C60/4, 0x3); + INSTANCE_WR(ctx, 0xA84/4, 0xF); + INSTANCE_WR(ctx, 0xB24/4, 0x20); + INSTANCE_WR(ctx, 0xD04/4, 0x1A); + INSTANCE_WR(ctx, 0xEC4/4, 0x4); + INSTANCE_WR(ctx, 0xEE4/4, 0x4); + INSTANCE_WR(ctx, 0xF24/4, 0x4); + INSTANCE_WR(ctx, 0xF44/4, 0x8); + INSTANCE_WR(ctx, 0xF84/4, 0x7FF); + INSTANCE_WR(ctx, 0x1124/4, 0xF); + INSTANCE_WR(ctx, 0x3604/4, 0xF); + INSTANCE_WR(ctx, 0x3644/4, 0x1); + INSTANCE_WR(ctx, 0x41A4/4, 0xF); + INSTANCE_WR(ctx, 0x14844/4, 0xF); + INSTANCE_WR(ctx, 0x14AE4/4, 0x1); + INSTANCE_WR(ctx, 0x14B04/4, 0x100); + INSTANCE_WR(ctx, 0x14B24/4, 0x100); + INSTANCE_WR(ctx, 0x14B44/4, 0x11); + INSTANCE_WR(ctx, 0x14B84/4, 0x8); + INSTANCE_WR(ctx, 0x14C44/4, 0x1); + INSTANCE_WR(ctx, 0x14C84/4, 0x1); + INSTANCE_WR(ctx, 0x14CA4/4, 0x1); + INSTANCE_WR(ctx, 0x14CC4/4, 0x1); + INSTANCE_WR(ctx, 0x14CE4/4, 0xCF); + INSTANCE_WR(ctx, 0x14D04/4, 0x2); + INSTANCE_WR(ctx, 0x14DE4/4, 0x1); + INSTANCE_WR(ctx, 0x14E24/4, 0x1); + INSTANCE_WR(ctx, 0x14E44/4, 0x1); + INSTANCE_WR(ctx, 0x14E64/4, 0x1); + INSTANCE_WR(ctx, 0x14F04/4, 0x4); + INSTANCE_WR(ctx, 0x14F44/4, 0x1); + INSTANCE_WR(ctx, 0x14F64/4, 0x15); + INSTANCE_WR(ctx, 0x14FE4/4, 0x4444480); + INSTANCE_WR(ctx, 0x15764/4, 0x8100C12); + INSTANCE_WR(ctx, 0x15804/4, 0x100); + INSTANCE_WR(ctx, 0x15864/4, 0x10001); + INSTANCE_WR(ctx, 0x158A4/4, 0x10001); + INSTANCE_WR(ctx, 0x158C4/4, 0x1); + INSTANCE_WR(ctx, 0x158E4/4, 0x10001); + INSTANCE_WR(ctx, 0x15904/4, 0x1); + INSTANCE_WR(ctx, 0x15924/4, 0x4); + INSTANCE_WR(ctx, 0x15944/4, 0x2); + INSTANCE_WR(ctx, 0x166C4/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x166E4/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x16784/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x16904/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x16924/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x15948/4, 0x3FFFFF); + INSTANCE_WR(ctx, 0x159A8/4, 0x1FFF); + INSTANCE_WR(ctx, 0x15B88/4, 0x3F800000); + INSTANCE_WR(ctx, 0x15C68/4, 0x4); + INSTANCE_WR(ctx, 0x15C88/4, 0x1A); + INSTANCE_WR(ctx, 0x15CE8/4, 0x1); + INSTANCE_WR(ctx, 0x15F48/4, 0xFFFF00); + INSTANCE_WR(ctx, 0x16028/4, 0xF); + INSTANCE_WR(ctx, 0x16128/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x16148/4, 0x11); + INSTANCE_WR(ctx, 0x16348/4, 0x4); + INSTANCE_WR(ctx, 0x163E8/4, 0x2); + INSTANCE_WR(ctx, 0x16408/4, 0x4000000); + INSTANCE_WR(ctx, 0x16428/4, 0x4000000); + INSTANCE_WR(ctx, 0x164A8/4, 0x5); + INSTANCE_WR(ctx, 0x164C8/4, 0x52); + INSTANCE_WR(ctx, 0x16568/4, 0x1); + INSTANCE_WR(ctx, 0x16788/4, 0x3F800000); + INSTANCE_WR(ctx, 0x167A8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x167C8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x167E8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16808/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16828/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16848/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16868/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16888/4, 0x3F800000); + INSTANCE_WR(ctx, 0x168A8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x168C8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x168E8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16908/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16928/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16948/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16968/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16988/4, 0x10); + INSTANCE_WR(ctx, 0x16E68/4, 0x8100C12); + INSTANCE_WR(ctx, 0x16E88/4, 0x5); + INSTANCE_WR(ctx, 0x16EE8/4, 0x1); + INSTANCE_WR(ctx, 0x16F28/4, 0xFFFF); + INSTANCE_WR(ctx, 0x16F48/4, 0xFFFF); + INSTANCE_WR(ctx, 0x16F68/4, 0xFFFF); + INSTANCE_WR(ctx, 0x16F88/4, 0xFFFF); + INSTANCE_WR(ctx, 0x16FA8/4, 0x3); + INSTANCE_WR(ctx, 0x173A8/4, 0xFFFF00); + INSTANCE_WR(ctx, 0x173C8/4, 0x1A); + INSTANCE_WR(ctx, 0x17408/4, 0x3); + INSTANCE_WR(ctx, 0x178E8/4, 0x102); + INSTANCE_WR(ctx, 0x17928/4, 0x4); + INSTANCE_WR(ctx, 0x17948/4, 0x4); + INSTANCE_WR(ctx, 0x17968/4, 0x4); + INSTANCE_WR(ctx, 0x17988/4, 0x4); + INSTANCE_WR(ctx, 0x179A8/4, 0x4); + INSTANCE_WR(ctx, 0x179C8/4, 0x4); + INSTANCE_WR(ctx, 0x17A08/4, 0x7FF); + INSTANCE_WR(ctx, 0x17A48/4, 0x102); + INSTANCE_WR(ctx, 0x17B88/4, 0x4); + INSTANCE_WR(ctx, 0x17BA8/4, 0x4); + INSTANCE_WR(ctx, 0x17BC8/4, 0x4); + INSTANCE_WR(ctx, 0x17BE8/4, 0x4); + INSTANCE_WR(ctx, 0x18228/4, 0x80C14); + INSTANCE_WR(ctx, 0x18288/4, 0x804); + INSTANCE_WR(ctx, 0x182C8/4, 0x4); + INSTANCE_WR(ctx, 0x182E8/4, 0x4); + INSTANCE_WR(ctx, 0x18308/4, 0x8100C12); + INSTANCE_WR(ctx, 0x18348/4, 0x4); + INSTANCE_WR(ctx, 0x18368/4, 0x4); + INSTANCE_WR(ctx, 0x183A8/4, 0x10); + INSTANCE_WR(ctx, 0x18448/4, 0x804); + INSTANCE_WR(ctx, 0x18468/4, 0x1); + INSTANCE_WR(ctx, 0x18488/4, 0x1A); + INSTANCE_WR(ctx, 0x184A8/4, 0x7F); + INSTANCE_WR(ctx, 0x184E8/4, 0x1); + INSTANCE_WR(ctx, 0x18508/4, 0x80C14); + INSTANCE_WR(ctx, 0x18548/4, 0x8100C12); + INSTANCE_WR(ctx, 0x18568/4, 0x4); + INSTANCE_WR(ctx, 0x18588/4, 0x4); + INSTANCE_WR(ctx, 0x185C8/4, 0x10); + INSTANCE_WR(ctx, 0x18648/4, 0x1); + INSTANCE_WR(ctx, 0x18668/4, 0x8100C12); + INSTANCE_WR(ctx, 0x18748/4, 0x7FF); + INSTANCE_WR(ctx, 0x18768/4, 0x80C14); + INSTANCE_WR(ctx, 0x18E88/4, 0x1); + INSTANCE_WR(ctx, 0x18EE8/4, 0x10); + INSTANCE_WR(ctx, 0x19608/4, 0x88); + INSTANCE_WR(ctx, 0x19628/4, 0x88); + INSTANCE_WR(ctx, 0x19688/4, 0x4); + INSTANCE_WR(ctx, 0x19968/4, 0x26); + INSTANCE_WR(ctx, 0x199C8/4, 0x3F800000); + INSTANCE_WR(ctx, 0x19A48/4, 0x1A); + INSTANCE_WR(ctx, 0x19A68/4, 0x10); + INSTANCE_WR(ctx, 0x19F88/4, 0x52); + INSTANCE_WR(ctx, 0x19FC8/4, 0x26); + INSTANCE_WR(ctx, 0x1A008/4, 0x4); + INSTANCE_WR(ctx, 0x1A028/4, 0x4); + INSTANCE_WR(ctx, 0x1A068/4, 0x1A); + INSTANCE_WR(ctx, 0x1A0C8/4, 0xFFFF00); + INSTANCE_WR(ctx, 0x1A108/4, 0x4); + INSTANCE_WR(ctx, 0x1A128/4, 0x4); + INSTANCE_WR(ctx, 0x1A168/4, 0x80); + INSTANCE_WR(ctx, 0x1A188/4, 0x4); + INSTANCE_WR(ctx, 0x1A1A8/4, 0x80C14); + INSTANCE_WR(ctx, 0x1A1E8/4, 0x7FF); + INSTANCE_WR(ctx, 0x24A48/4, 0x4); + INSTANCE_WR(ctx, 0x24A68/4, 0x4); + INSTANCE_WR(ctx, 0x24AA8/4, 0x80); + INSTANCE_WR(ctx, 0x24AC8/4, 0x4); + INSTANCE_WR(ctx, 0x24AE8/4, 0x1); + INSTANCE_WR(ctx, 0x24B28/4, 0x27); + INSTANCE_WR(ctx, 0x24B68/4, 0x26); + INSTANCE_WR(ctx, 0x24BE8/4, 0x4000000); + INSTANCE_WR(ctx, 0x24C08/4, 0x4000000); + INSTANCE_WR(ctx, 0x24C28/4, 0x4000000); + INSTANCE_WR(ctx, 0x24C48/4, 0x4000000); + INSTANCE_WR(ctx, 0x24C68/4, 0x4000000); + INSTANCE_WR(ctx, 0x24C88/4, 0x4000000); + INSTANCE_WR(ctx, 0x24CA8/4, 0x4000000); + INSTANCE_WR(ctx, 0x24CC8/4, 0x4000000); + INSTANCE_WR(ctx, 0x24CE8/4, 0x4000000); + INSTANCE_WR(ctx, 0x24D08/4, 0x4000000); + INSTANCE_WR(ctx, 0x24D28/4, 0x4000000); + INSTANCE_WR(ctx, 0x24D48/4, 0x4000000); + INSTANCE_WR(ctx, 0x24D68/4, 0x4000000); + INSTANCE_WR(ctx, 0x24D88/4, 0x4000000); + INSTANCE_WR(ctx, 0x24DA8/4, 0x4000000); + INSTANCE_WR(ctx, 0x24DC8/4, 0x4000000); + INSTANCE_WR(ctx, 0x25268/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x25288/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x252E8/4, 0x1FE21); + INSTANCE_WR(ctx, 0xB0C/4, 0x2); + INSTANCE_WR(ctx, 0xB4C/4, 0x1FFE67); + INSTANCE_WR(ctx, 0xCEC/4, 0x1); + INSTANCE_WR(ctx, 0xD0C/4, 0x10); + INSTANCE_WR(ctx, 0xD6C/4, 0x1); + INSTANCE_WR(ctx, 0xE0C/4, 0x4); + INSTANCE_WR(ctx, 0xE2C/4, 0x400); + INSTANCE_WR(ctx, 0xE4C/4, 0x300); + INSTANCE_WR(ctx, 0xE6C/4, 0x1001); + INSTANCE_WR(ctx, 0xE8C/4, 0x15); + INSTANCE_WR(ctx, 0xF4C/4, 0x2); + INSTANCE_WR(ctx, 0x106C/4, 0x1); + INSTANCE_WR(ctx, 0x108C/4, 0x10); + INSTANCE_WR(ctx, 0x10CC/4, 0x1); + INSTANCE_WR(ctx, 0x134C/4, 0x10); + INSTANCE_WR(ctx, 0x156C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x158C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x15AC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x15CC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x15EC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x160C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x162C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x164C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x166C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x168C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16AC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16CC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x16EC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x170C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x172C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x174C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x1A8C/4, 0x10); + INSTANCE_WR(ctx, 0x1ACC/4, 0x3F); + INSTANCE_WR(ctx, 0x1BAC/4, 0x1); + INSTANCE_WR(ctx, 0x1BEC/4, 0x1); + INSTANCE_WR(ctx, 0x1C2C/4, 0x1); + INSTANCE_WR(ctx, 0x1DCC/4, 0x11); + INSTANCE_WR(ctx, 0x1ECC/4, 0xF); + INSTANCE_WR(ctx, 0x1FCC/4, 0x11); + INSTANCE_WR(ctx, 0x20AC/4, 0x1); + INSTANCE_WR(ctx, 0x20CC/4, 0x1); + INSTANCE_WR(ctx, 0x20EC/4, 0x1); + INSTANCE_WR(ctx, 0x210C/4, 0x2); + INSTANCE_WR(ctx, 0x212C/4, 0x1); + INSTANCE_WR(ctx, 0x214C/4, 0x2); + INSTANCE_WR(ctx, 0x216C/4, 0x1); + INSTANCE_WR(ctx, 0x21AC/4, 0x1FFE67); + INSTANCE_WR(ctx, 0x21EC/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x24AC/4, 0x1); + INSTANCE_WR(ctx, 0x24CC/4, 0x2); + INSTANCE_WR(ctx, 0x24EC/4, 0x1); + INSTANCE_WR(ctx, 0x250C/4, 0x1); + INSTANCE_WR(ctx, 0x252C/4, 0x2); + INSTANCE_WR(ctx, 0x254C/4, 0x1); + INSTANCE_WR(ctx, 0x256C/4, 0x1); + INSTANCE_WR(ctx, 0x25EC/4, 0x11); + INSTANCE_WR(ctx, 0x260C/4, 0x1); + INSTANCE_WR(ctx, 0x328C/4, 0x2); + INSTANCE_WR(ctx, 0x32CC/4, 0x1FFE67); + INSTANCE_WR(ctx, 0x346C/4, 0x1); + INSTANCE_WR(ctx, 0x348C/4, 0x10); + INSTANCE_WR(ctx, 0x34EC/4, 0x1); + INSTANCE_WR(ctx, 0x358C/4, 0x4); + INSTANCE_WR(ctx, 0x35AC/4, 0x400); + INSTANCE_WR(ctx, 0x35CC/4, 0x300); + INSTANCE_WR(ctx, 0x35EC/4, 0x1001); + INSTANCE_WR(ctx, 0x360C/4, 0x15); + INSTANCE_WR(ctx, 0x36CC/4, 0x2); + INSTANCE_WR(ctx, 0x37EC/4, 0x1); + INSTANCE_WR(ctx, 0x380C/4, 0x10); + INSTANCE_WR(ctx, 0x384C/4, 0x1); + INSTANCE_WR(ctx, 0x3ACC/4, 0x10); + INSTANCE_WR(ctx, 0x3CEC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3D0C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3D2C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3D4C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3D6C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3D8C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3DAC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3DCC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3DEC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3E0C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3E2C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3E4C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3E6C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3E8C/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3EAC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x3ECC/4, 0x3F800000); + INSTANCE_WR(ctx, 0x420C/4, 0x10); + INSTANCE_WR(ctx, 0x424C/4, 0x3F); + INSTANCE_WR(ctx, 0x432C/4, 0x1); + INSTANCE_WR(ctx, 0x436C/4, 0x1); + INSTANCE_WR(ctx, 0x43AC/4, 0x1); + INSTANCE_WR(ctx, 0x454C/4, 0x11); + INSTANCE_WR(ctx, 0x464C/4, 0xF); + INSTANCE_WR(ctx, 0x474C/4, 0x11); + INSTANCE_WR(ctx, 0x482C/4, 0x1); + INSTANCE_WR(ctx, 0x484C/4, 0x1); + INSTANCE_WR(ctx, 0x486C/4, 0x1); + INSTANCE_WR(ctx, 0x488C/4, 0x2); + INSTANCE_WR(ctx, 0x48AC/4, 0x1); + INSTANCE_WR(ctx, 0x48CC/4, 0x2); + INSTANCE_WR(ctx, 0x48EC/4, 0x1); + INSTANCE_WR(ctx, 0x492C/4, 0x1FFE67); + INSTANCE_WR(ctx, 0x496C/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x4C2C/4, 0x1); + INSTANCE_WR(ctx, 0x4C4C/4, 0x2); + INSTANCE_WR(ctx, 0x4C6C/4, 0x1); + INSTANCE_WR(ctx, 0x4C8C/4, 0x1); + INSTANCE_WR(ctx, 0x4CAC/4, 0x2); + INSTANCE_WR(ctx, 0x4CCC/4, 0x1); + INSTANCE_WR(ctx, 0x4CEC/4, 0x1); + INSTANCE_WR(ctx, 0x4D6C/4, 0x11); + INSTANCE_WR(ctx, 0x4D8C/4, 0x1); + INSTANCE_WR(ctx, 0xA30/4, 0x4); + INSTANCE_WR(ctx, 0xCF0/4, 0x4); + INSTANCE_WR(ctx, 0xD10/4, 0x4); + INSTANCE_WR(ctx, 0xD30/4, 0x608080); + INSTANCE_WR(ctx, 0xDD0/4, 0x4); + INSTANCE_WR(ctx, 0xE30/4, 0x4); + INSTANCE_WR(ctx, 0xE50/4, 0x4); + INSTANCE_WR(ctx, 0xE70/4, 0x80); + INSTANCE_WR(ctx, 0xE90/4, 0x1E00); + INSTANCE_WR(ctx, 0xEB0/4, 0x4); + INSTANCE_WR(ctx, 0x1350/4, 0x4); + INSTANCE_WR(ctx, 0x1370/4, 0x80); + INSTANCE_WR(ctx, 0x1390/4, 0x4); + INSTANCE_WR(ctx, 0x13B0/4, 0x3020100); + INSTANCE_WR(ctx, 0x13D0/4, 0x3); + INSTANCE_WR(ctx, 0x13F0/4, 0x1E00); + INSTANCE_WR(ctx, 0x1410/4, 0x4); + INSTANCE_WR(ctx, 0x14B0/4, 0x4); + INSTANCE_WR(ctx, 0x14D0/4, 0x3); + INSTANCE_WR(ctx, 0x1550/4, 0x4); + INSTANCE_WR(ctx, 0x159F0/4, 0x4); + INSTANCE_WR(ctx, 0x15A10/4, 0x3); + INSTANCE_WR(ctx, 0x15C50/4, 0xF); + INSTANCE_WR(ctx, 0x15DD0/4, 0x4); + INSTANCE_WR(ctx, 0x15DF0/4, 0xFFFF); + INSTANCE_WR(ctx, 0x15E10/4, 0xFFFF); + INSTANCE_WR(ctx, 0x15E30/4, 0xFFFF); + INSTANCE_WR(ctx, 0x15E50/4, 0xFFFF); + INSTANCE_WR(ctx, 0x15F70/4, 0x1); + INSTANCE_WR(ctx, 0x15FF0/4, 0x1); + INSTANCE_WR(ctx, 0x160B0/4, 0x1); + INSTANCE_WR(ctx, 0x16250/4, 0x1); + INSTANCE_WR(ctx, 0x16270/4, 0x1); + INSTANCE_WR(ctx, 0x16290/4, 0x2); + INSTANCE_WR(ctx, 0x162B0/4, 0x1); + INSTANCE_WR(ctx, 0x162D0/4, 0x1); + INSTANCE_WR(ctx, 0x162F0/4, 0x2); + INSTANCE_WR(ctx, 0x16310/4, 0x1); + INSTANCE_WR(ctx, 0x16350/4, 0x11); + INSTANCE_WR(ctx, 0x16450/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x164B0/4, 0x4); + INSTANCE_WR(ctx, 0x16530/4, 0x11); + INSTANCE_WR(ctx, 0x16550/4, 0x1); + INSTANCE_WR(ctx, 0x16590/4, 0xCF); + INSTANCE_WR(ctx, 0x165B0/4, 0xCF); + INSTANCE_WR(ctx, 0x165D0/4, 0xCF); + INSTANCE_WR(ctx, 0x16730/4, 0x1); + INSTANCE_WR(ctx, 0x16750/4, 0x1); + INSTANCE_WR(ctx, 0x16770/4, 0x2); + INSTANCE_WR(ctx, 0x16790/4, 0x1); + INSTANCE_WR(ctx, 0x167B0/4, 0x1); + INSTANCE_WR(ctx, 0x167D0/4, 0x2); + INSTANCE_WR(ctx, 0x167F0/4, 0x1); + INSTANCE_WR(ctx, 0x16830/4, 0x1); + INSTANCE_WR(ctx, 0x16850/4, 0x1); + INSTANCE_WR(ctx, 0x16870/4, 0x1); + INSTANCE_WR(ctx, 0x16890/4, 0x1); + INSTANCE_WR(ctx, 0x168B0/4, 0x1); + INSTANCE_WR(ctx, 0x168D0/4, 0x1); + INSTANCE_WR(ctx, 0x168F0/4, 0x1); + INSTANCE_WR(ctx, 0x16910/4, 0x1); + INSTANCE_WR(ctx, 0x16930/4, 0x11); + INSTANCE_WR(ctx, 0x16A30/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x16A50/4, 0xF); + INSTANCE_WR(ctx, 0x16B50/4, 0x1FFE67); + INSTANCE_WR(ctx, 0x16BB0/4, 0x11); + INSTANCE_WR(ctx, 0x16BD0/4, 0x1); + INSTANCE_WR(ctx, 0x16C50/4, 0x4); + INSTANCE_WR(ctx, 0x16D10/4, 0x1); + INSTANCE_WR(ctx, 0x16DB0/4, 0x11); + INSTANCE_WR(ctx, 0x16EB0/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x16F30/4, 0x11); + INSTANCE_WR(ctx, 0x16F50/4, 0x1); + INSTANCE_WR(ctx, 0x16F90/4, 0x1); + INSTANCE_WR(ctx, 0x16FD0/4, 0x1); + INSTANCE_WR(ctx, 0x17010/4, 0x7FF); + INSTANCE_WR(ctx, 0x17050/4, 0x1); + INSTANCE_WR(ctx, 0x17090/4, 0x1); + INSTANCE_WR(ctx, 0x175F0/4, 0x8); + INSTANCE_WR(ctx, 0x17610/4, 0x8); + INSTANCE_WR(ctx, 0x17630/4, 0x8); + INSTANCE_WR(ctx, 0x17650/4, 0x8); + INSTANCE_WR(ctx, 0x17670/4, 0x8); + INSTANCE_WR(ctx, 0x17690/4, 0x8); + INSTANCE_WR(ctx, 0x176B0/4, 0x8); + INSTANCE_WR(ctx, 0x176D0/4, 0x8); + INSTANCE_WR(ctx, 0x176F0/4, 0x11); + INSTANCE_WR(ctx, 0x177F0/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x17810/4, 0x400); + INSTANCE_WR(ctx, 0x17830/4, 0x400); + INSTANCE_WR(ctx, 0x17850/4, 0x400); + INSTANCE_WR(ctx, 0x17870/4, 0x400); + INSTANCE_WR(ctx, 0x17890/4, 0x400); + INSTANCE_WR(ctx, 0x178B0/4, 0x400); + INSTANCE_WR(ctx, 0x178D0/4, 0x400); + INSTANCE_WR(ctx, 0x178F0/4, 0x400); + INSTANCE_WR(ctx, 0x17910/4, 0x300); + INSTANCE_WR(ctx, 0x17930/4, 0x300); + INSTANCE_WR(ctx, 0x17950/4, 0x300); + INSTANCE_WR(ctx, 0x17970/4, 0x300); + INSTANCE_WR(ctx, 0x17990/4, 0x300); + INSTANCE_WR(ctx, 0x179B0/4, 0x300); + INSTANCE_WR(ctx, 0x179D0/4, 0x300); + INSTANCE_WR(ctx, 0x179F0/4, 0x300); + INSTANCE_WR(ctx, 0x17A10/4, 0x1); + INSTANCE_WR(ctx, 0x17A30/4, 0xF); + INSTANCE_WR(ctx, 0x17B30/4, 0x20); + INSTANCE_WR(ctx, 0x17B50/4, 0x11); + INSTANCE_WR(ctx, 0x17B70/4, 0x100); + INSTANCE_WR(ctx, 0x17BB0/4, 0x1); + INSTANCE_WR(ctx, 0x17C10/4, 0x40); + INSTANCE_WR(ctx, 0x17C30/4, 0x100); + INSTANCE_WR(ctx, 0x17C70/4, 0x3); + INSTANCE_WR(ctx, 0x17D10/4, 0x1FFE67); + INSTANCE_WR(ctx, 0x17D90/4, 0x2); + INSTANCE_WR(ctx, 0x17DB0/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x17EF0/4, 0x1); + INSTANCE_WR(ctx, 0x17F90/4, 0x4); + INSTANCE_WR(ctx, 0x17FD0/4, 0x1); + INSTANCE_WR(ctx, 0x17FF0/4, 0x400); + INSTANCE_WR(ctx, 0x18010/4, 0x300); + INSTANCE_WR(ctx, 0x18030/4, 0x1001); + INSTANCE_WR(ctx, 0x180B0/4, 0x11); + INSTANCE_WR(ctx, 0x181B0/4, 0xFAC6881); + INSTANCE_WR(ctx, 0x181D0/4, 0xF); + INSTANCE_WR(ctx, 0x184D0/4, 0x1FFE67); + INSTANCE_WR(ctx, 0x18550/4, 0x11); + INSTANCE_WR(ctx, 0x185B0/4, 0x4); + INSTANCE_WR(ctx, 0x185F0/4, 0x1); + INSTANCE_WR(ctx, 0x18610/4, 0x1); + INSTANCE_WR(ctx, 0x18690/4, 0x1); + INSTANCE_WR(ctx, 0x18730/4, 0x1); + INSTANCE_WR(ctx, 0x18770/4, 0x1); + INSTANCE_WR(ctx, 0x187F0/4, 0x2A712488); + INSTANCE_WR(ctx, 0x18830/4, 0x4085C000); + INSTANCE_WR(ctx, 0x18850/4, 0x40); + INSTANCE_WR(ctx, 0x18870/4, 0x100); + INSTANCE_WR(ctx, 0x18890/4, 0x10100); + INSTANCE_WR(ctx, 0x188B0/4, 0x2800000); + INSTANCE_WR(ctx, 0x18B10/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x18B30/4, 0x4E3BFDF); + INSTANCE_WR(ctx, 0x18B50/4, 0x1); + INSTANCE_WR(ctx, 0x18B90/4, 0xFFFF00); + INSTANCE_WR(ctx, 0x18BB0/4, 0x1); + INSTANCE_WR(ctx, 0x18C10/4, 0xFFFF00); + INSTANCE_WR(ctx, 0x18D30/4, 0x1); + INSTANCE_WR(ctx, 0x18D70/4, 0x1); + INSTANCE_WR(ctx, 0x18D90/4, 0x30201000); + INSTANCE_WR(ctx, 0x18DB0/4, 0x70605040); + INSTANCE_WR(ctx, 0x18DD0/4, 0xB8A89888); + INSTANCE_WR(ctx, 0x18DF0/4, 0xF8E8D8C8); + INSTANCE_WR(ctx, 0x18E30/4, 0x1A); +} + + +static void +nv84_graph_init_ctxvals(struct drm_device *dev, struct nouveau_gpuobj_ref *ref) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_gpuobj *ctx = ref->gpuobj; + + INSTANCE_WR(ctx, 0x0010c/4, 0x00000030); + INSTANCE_WR(ctx, 0x00130/4, 0x00000002); + INSTANCE_WR(ctx, 0x001d4/4, 0x00000003); + INSTANCE_WR(ctx, 0x001d8/4, 0x00001000); + INSTANCE_WR(ctx, 0x00218/4, 0x0000fe0c); + INSTANCE_WR(ctx, 0x0022c/4, 0x00001000); + INSTANCE_WR(ctx, 0x00258/4, 0x00000187); + INSTANCE_WR(ctx, 0x0026c/4, 0x00001018); + INSTANCE_WR(ctx, 0x00270/4, 0x000000ff); + INSTANCE_WR(ctx, 0x002ac/4, 0x00000004); + INSTANCE_WR(ctx, 0x002b0/4, 0x044d00df); + INSTANCE_WR(ctx, 0x002b8/4, 0x00000600); + INSTANCE_WR(ctx, 0x002d0/4, 0x01000000); + INSTANCE_WR(ctx, 0x002d4/4, 0x000000ff); + INSTANCE_WR(ctx, 0x002dc/4, 0x00000400); + INSTANCE_WR(ctx, 0x002f4/4, 0x00000001); + INSTANCE_WR(ctx, 0x002f8/4, 0x000e0080); + INSTANCE_WR(ctx, 0x002fc/4, 0x00000004); + INSTANCE_WR(ctx, 0x00318/4, 0x00000002); + INSTANCE_WR(ctx, 0x0031c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00328/4, 0x00000001); + INSTANCE_WR(ctx, 0x0032c/4, 0x00000100); + INSTANCE_WR(ctx, 0x00344/4, 0x00000002); + INSTANCE_WR(ctx, 0x00348/4, 0x00000001); + INSTANCE_WR(ctx, 0x0034c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0035c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00360/4, 0x003fffff); + INSTANCE_WR(ctx, 0x00364/4, 0x00001fff); + INSTANCE_WR(ctx, 0x0036c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00370/4, 0x00000001); + INSTANCE_WR(ctx, 0x00378/4, 0x00000001); + INSTANCE_WR(ctx, 0x0037c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00380/4, 0x00000001); + INSTANCE_WR(ctx, 0x00384/4, 0x00000004); + INSTANCE_WR(ctx, 0x00388/4, 0x00000001); + INSTANCE_WR(ctx, 0x0038c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00390/4, 0x00000001); + INSTANCE_WR(ctx, 0x00394/4, 0x00000007); + INSTANCE_WR(ctx, 0x00398/4, 0x00000001); + INSTANCE_WR(ctx, 0x0039c/4, 0x00000007); + INSTANCE_WR(ctx, 0x003a0/4, 0x00000001); + INSTANCE_WR(ctx, 0x003a4/4, 0x00000001); + INSTANCE_WR(ctx, 0x003a8/4, 0x00000001); + INSTANCE_WR(ctx, 0x003bc/4, 0x00000001); + INSTANCE_WR(ctx, 0x003c0/4, 0x00000100); + INSTANCE_WR(ctx, 0x003c8/4, 0x00000001); + INSTANCE_WR(ctx, 0x003d4/4, 0x00000100); + INSTANCE_WR(ctx, 0x003d8/4, 0x00000001); + INSTANCE_WR(ctx, 0x003dc/4, 0x00000100); + INSTANCE_WR(ctx, 0x003e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x003f0/4, 0x00000100); + INSTANCE_WR(ctx, 0x00404/4, 0x00000004); + INSTANCE_WR(ctx, 0x00408/4, 0x00000070); + INSTANCE_WR(ctx, 0x0040c/4, 0x00000080); + INSTANCE_WR(ctx, 0x00420/4, 0x0000000c); + INSTANCE_WR(ctx, 0x00428/4, 0x00000008); + INSTANCE_WR(ctx, 0x0042c/4, 0x00000014); + INSTANCE_WR(ctx, 0x00434/4, 0x00000029); + INSTANCE_WR(ctx, 0x00438/4, 0x00000027); + INSTANCE_WR(ctx, 0x0043c/4, 0x00000026); + INSTANCE_WR(ctx, 0x00440/4, 0x00000008); + INSTANCE_WR(ctx, 0x00444/4, 0x00000004); + INSTANCE_WR(ctx, 0x00448/4, 0x00000027); + INSTANCE_WR(ctx, 0x00454/4, 0x00000001); + INSTANCE_WR(ctx, 0x00458/4, 0x00000002); + INSTANCE_WR(ctx, 0x0045c/4, 0x00000003); + INSTANCE_WR(ctx, 0x00460/4, 0x00000004); + INSTANCE_WR(ctx, 0x00464/4, 0x00000005); + INSTANCE_WR(ctx, 0x00468/4, 0x00000006); + INSTANCE_WR(ctx, 0x0046c/4, 0x00000007); + INSTANCE_WR(ctx, 0x00470/4, 0x00000001); + INSTANCE_WR(ctx, 0x004b4/4, 0x000000cf); + INSTANCE_WR(ctx, 0x004e4/4, 0x00000080); + INSTANCE_WR(ctx, 0x004e8/4, 0x00000004); + INSTANCE_WR(ctx, 0x004ec/4, 0x00000004); + INSTANCE_WR(ctx, 0x004f0/4, 0x00000003); + INSTANCE_WR(ctx, 0x004f4/4, 0x00000001); + INSTANCE_WR(ctx, 0x00500/4, 0x00000012); + INSTANCE_WR(ctx, 0x00504/4, 0x00000010); + INSTANCE_WR(ctx, 0x00508/4, 0x0000000c); + INSTANCE_WR(ctx, 0x0050c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0051c/4, 0x00000004); + INSTANCE_WR(ctx, 0x00520/4, 0x00000002); + INSTANCE_WR(ctx, 0x00524/4, 0x00000004); + INSTANCE_WR(ctx, 0x00530/4, 0x003fffff); + INSTANCE_WR(ctx, 0x00534/4, 0x00001fff); + INSTANCE_WR(ctx, 0x0055c/4, 0x00000004); + INSTANCE_WR(ctx, 0x00560/4, 0x00000014); + INSTANCE_WR(ctx, 0x00564/4, 0x00000001); + INSTANCE_WR(ctx, 0x00570/4, 0x00000002); + INSTANCE_WR(ctx, 0x0057c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00584/4, 0x00000002); + INSTANCE_WR(ctx, 0x00588/4, 0x00001000); + INSTANCE_WR(ctx, 0x0058c/4, 0x00000e00); + INSTANCE_WR(ctx, 0x00590/4, 0x00001000); + INSTANCE_WR(ctx, 0x00594/4, 0x00001e00); + INSTANCE_WR(ctx, 0x0059c/4, 0x00000001); + INSTANCE_WR(ctx, 0x005a0/4, 0x00000001); + INSTANCE_WR(ctx, 0x005a4/4, 0x00000001); + INSTANCE_WR(ctx, 0x005a8/4, 0x00000001); + INSTANCE_WR(ctx, 0x005ac/4, 0x00000001); + INSTANCE_WR(ctx, 0x005bc/4, 0x00000200); + INSTANCE_WR(ctx, 0x005c4/4, 0x00000001); + INSTANCE_WR(ctx, 0x005c8/4, 0x00000070); + INSTANCE_WR(ctx, 0x005cc/4, 0x00000080); + INSTANCE_WR(ctx, 0x005d8/4, 0x00000001); + INSTANCE_WR(ctx, 0x005dc/4, 0x00000070); + INSTANCE_WR(ctx, 0x005e0/4, 0x00000080); + INSTANCE_WR(ctx, 0x005f0/4, 0x00000001); + INSTANCE_WR(ctx, 0x005f4/4, 0x000000cf); + INSTANCE_WR(ctx, 0x005fc/4, 0x00000001); + INSTANCE_WR(ctx, 0x0060c/4, 0x000000cf); + INSTANCE_WR(ctx, 0x00614/4, 0x00000002); + INSTANCE_WR(ctx, 0x0061c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00624/4, 0x00000001); + INSTANCE_WR(ctx, 0x0062c/4, 0x000000cf); + INSTANCE_WR(ctx, 0x00630/4, 0x000000cf); + INSTANCE_WR(ctx, 0x00634/4, 0x00000001); + INSTANCE_WR(ctx, 0x0063c/4, 0x00000f80); + INSTANCE_WR(ctx, 0x00684/4, 0x007f0080); + INSTANCE_WR(ctx, 0x006c0/4, 0x007f0080); + + INSTANCE_WR(ctx, 0x006e4/4, 0x3b74f821); + INSTANCE_WR(ctx, 0x006e8/4, 0x89058001); + INSTANCE_WR(ctx, 0x006f0/4, 0x00001000); + INSTANCE_WR(ctx, 0x006f4/4, 0x0000001f); + INSTANCE_WR(ctx, 0x006f8/4, 0x027c10fa); + INSTANCE_WR(ctx, 0x006fc/4, 0x400000c0); + INSTANCE_WR(ctx, 0x00700/4, 0xb7892080); + + INSTANCE_WR(ctx, 0x0070c/4, 0x3b74f821); + INSTANCE_WR(ctx, 0x00710/4, 0x89058001); + INSTANCE_WR(ctx, 0x00718/4, 0x00001000); + INSTANCE_WR(ctx, 0x0071c/4, 0x0000001f); + INSTANCE_WR(ctx, 0x00720/4, 0x027c10fa); + INSTANCE_WR(ctx, 0x00724/4, 0x400000c0); + INSTANCE_WR(ctx, 0x00728/4, 0xb7892080); + + INSTANCE_WR(ctx, 0x00734/4, 0x3b74f821); + INSTANCE_WR(ctx, 0x00738/4, 0x89058001); + INSTANCE_WR(ctx, 0x00740/4, 0x00001000); + INSTANCE_WR(ctx, 0x00744/4, 0x0000001f); + INSTANCE_WR(ctx, 0x00748/4, 0x027c10fa); + INSTANCE_WR(ctx, 0x0074c/4, 0x400000c0); + INSTANCE_WR(ctx, 0x00750/4, 0xb7892080); + + INSTANCE_WR(ctx, 0x0075c/4, 0x3b74f821); + INSTANCE_WR(ctx, 0x00760/4, 0x89058001); + INSTANCE_WR(ctx, 0x00768/4, 0x00001000); + INSTANCE_WR(ctx, 0x0076c/4, 0x0000001f); + INSTANCE_WR(ctx, 0x00770/4, 0x027c10fa); + INSTANCE_WR(ctx, 0x00774/4, 0x400000c0); + INSTANCE_WR(ctx, 0x00778/4, 0xb7892080); + + INSTANCE_WR(ctx, 0x00784/4, 0x00010040); + INSTANCE_WR(ctx, 0x0078c/4, 0x00000022); + INSTANCE_WR(ctx, 0x00798/4, 0x00010040); + INSTANCE_WR(ctx, 0x0079c/4, 0x00000022); + + INSTANCE_WR(ctx, 0x007b4/4, 0x01800000); + INSTANCE_WR(ctx, 0x007b8/4, 0x00160000); + INSTANCE_WR(ctx, 0x007bc/4, 0x01800000); + INSTANCE_WR(ctx, 0x007cc/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x007d0/4, 0x00880000); + INSTANCE_WR(ctx, 0x007f4/4, 0x00010401); + INSTANCE_WR(ctx, 0x007fc/4, 0x00000078); + INSTANCE_WR(ctx, 0x00804/4, 0x000000bf); + INSTANCE_WR(ctx, 0x0080c/4, 0x00001210); + INSTANCE_WR(ctx, 0x00810/4, 0x08000080); + INSTANCE_WR(ctx, 0x00834/4, 0x01800000); + INSTANCE_WR(ctx, 0x00838/4, 0x00160000); + INSTANCE_WR(ctx, 0x0083c/4, 0x01800000); + INSTANCE_WR(ctx, 0x0084c/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00850/4, 0x00880000); + INSTANCE_WR(ctx, 0x00874/4, 0x00010401); + INSTANCE_WR(ctx, 0x0087c/4, 0x00000078); + INSTANCE_WR(ctx, 0x00884/4, 0x000000bf); + INSTANCE_WR(ctx, 0x0088c/4, 0x00001210); + INSTANCE_WR(ctx, 0x00890/4, 0x08000080); + INSTANCE_WR(ctx, 0x008b8/4, 0x00027070); + INSTANCE_WR(ctx, 0x008c4/4, 0x03ffffff); + INSTANCE_WR(ctx, 0x008dc/4, 0x00120407); + INSTANCE_WR(ctx, 0x008e0/4, 0x05091507); + INSTANCE_WR(ctx, 0x008e4/4, 0x05100202); + INSTANCE_WR(ctx, 0x008e8/4, 0x00030201); + INSTANCE_WR(ctx, 0x00904/4, 0x00000040); + INSTANCE_WR(ctx, 0x00908/4, 0x0d0c0b0a); + INSTANCE_WR(ctx, 0x0090c/4, 0x00141210); + INSTANCE_WR(ctx, 0x00910/4, 0x000001f0); + INSTANCE_WR(ctx, 0x00914/4, 0x00000001); + INSTANCE_WR(ctx, 0x00918/4, 0x00000003); + INSTANCE_WR(ctx, 0x00924/4, 0x00039e00); + INSTANCE_WR(ctx, 0x00928/4, 0x00000100); + INSTANCE_WR(ctx, 0x0092c/4, 0x00003800); + INSTANCE_WR(ctx, 0x00930/4, 0x00404040); + INSTANCE_WR(ctx, 0x00934/4, 0x0000ff0a); + INSTANCE_WR(ctx, 0x0093c/4, 0x0077f005); + INSTANCE_WR(ctx, 0x00940/4, 0x003f7fff); + + INSTANCE_WR(ctx, 0x00950/4, 0x01800000); + INSTANCE_WR(ctx, 0x00954/4, 0x00160000); + INSTANCE_WR(ctx, 0x00958/4, 0x01800000); + INSTANCE_WR(ctx, 0x00968/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x0096c/4, 0x00880000); + INSTANCE_WR(ctx, 0x00990/4, 0x00010401); + INSTANCE_WR(ctx, 0x00998/4, 0x00000078); + INSTANCE_WR(ctx, 0x009a0/4, 0x000000bf); + INSTANCE_WR(ctx, 0x009a8/4, 0x00001210); + INSTANCE_WR(ctx, 0x009ac/4, 0x08000080); + INSTANCE_WR(ctx, 0x009d0/4, 0x01800000); + INSTANCE_WR(ctx, 0x009d4/4, 0x00160000); + INSTANCE_WR(ctx, 0x009d8/4, 0x01800000); + INSTANCE_WR(ctx, 0x009e8/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x009ec/4, 0x00880000); + INSTANCE_WR(ctx, 0x00a10/4, 0x00010401); + INSTANCE_WR(ctx, 0x00a18/4, 0x00000078); + INSTANCE_WR(ctx, 0x00a20/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00a28/4, 0x00001210); + INSTANCE_WR(ctx, 0x00a2c/4, 0x08000080); + INSTANCE_WR(ctx, 0x00a54/4, 0x00027070); + INSTANCE_WR(ctx, 0x00a60/4, 0x03ffffff); + INSTANCE_WR(ctx, 0x00a78/4, 0x00120407); + INSTANCE_WR(ctx, 0x00a7c/4, 0x05091507); + INSTANCE_WR(ctx, 0x00a80/4, 0x05100202); + INSTANCE_WR(ctx, 0x00a84/4, 0x00030201); + INSTANCE_WR(ctx, 0x00aa0/4, 0x00000040); + INSTANCE_WR(ctx, 0x00aa4/4, 0x0d0c0b0a); + INSTANCE_WR(ctx, 0x00aa8/4, 0x00141210); + INSTANCE_WR(ctx, 0x00aac/4, 0x000001f0); + INSTANCE_WR(ctx, 0x00ab0/4, 0x00000001); + INSTANCE_WR(ctx, 0x00ab4/4, 0x00000003); + INSTANCE_WR(ctx, 0x00ac0/4, 0x00039e00); + INSTANCE_WR(ctx, 0x00ac4/4, 0x00000100); + INSTANCE_WR(ctx, 0x00ac8/4, 0x00003800); + INSTANCE_WR(ctx, 0x00acc/4, 0x00404040); + INSTANCE_WR(ctx, 0x00ad0/4, 0x0000ff0a); + INSTANCE_WR(ctx, 0x00ad8/4, 0x0077f005); + INSTANCE_WR(ctx, 0x00adc/4, 0x003f7fff); + + INSTANCE_WR(ctx, 0x00aec/4, 0x01800000); + INSTANCE_WR(ctx, 0x00af0/4, 0x00160000); + INSTANCE_WR(ctx, 0x00af4/4, 0x01800000); + INSTANCE_WR(ctx, 0x00b04/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00b08/4, 0x00880000); + INSTANCE_WR(ctx, 0x00b2c/4, 0x00010401); + INSTANCE_WR(ctx, 0x00b34/4, 0x00000078); + INSTANCE_WR(ctx, 0x00b3c/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00b44/4, 0x00001210); + INSTANCE_WR(ctx, 0x00b48/4, 0x08000080); + INSTANCE_WR(ctx, 0x00b6c/4, 0x01800000); + INSTANCE_WR(ctx, 0x00b70/4, 0x00160000); + INSTANCE_WR(ctx, 0x00b74/4, 0x01800000); + INSTANCE_WR(ctx, 0x00b84/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00b88/4, 0x00880000); + INSTANCE_WR(ctx, 0x00bac/4, 0x00010401); + INSTANCE_WR(ctx, 0x00bb4/4, 0x00000078); + INSTANCE_WR(ctx, 0x00bbc/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00bc4/4, 0x00001210); + INSTANCE_WR(ctx, 0x00bc8/4, 0x08000080); + INSTANCE_WR(ctx, 0x00bf0/4, 0x00027070); + INSTANCE_WR(ctx, 0x00bfc/4, 0x03ffffff); + INSTANCE_WR(ctx, 0x00c14/4, 0x00120407); + INSTANCE_WR(ctx, 0x00c18/4, 0x05091507); + INSTANCE_WR(ctx, 0x00c1c/4, 0x05100202); + INSTANCE_WR(ctx, 0x00c20/4, 0x00030201); + INSTANCE_WR(ctx, 0x00c3c/4, 0x00000040); + INSTANCE_WR(ctx, 0x00c40/4, 0x0d0c0b0a); + INSTANCE_WR(ctx, 0x00c44/4, 0x00141210); + INSTANCE_WR(ctx, 0x00c48/4, 0x000001f0); + INSTANCE_WR(ctx, 0x00c4c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00c50/4, 0x00000003); + INSTANCE_WR(ctx, 0x00c5c/4, 0x00039e00); + INSTANCE_WR(ctx, 0x00c60/4, 0x00000100); + INSTANCE_WR(ctx, 0x00c64/4, 0x00003800); + INSTANCE_WR(ctx, 0x00c68/4, 0x00404040); + INSTANCE_WR(ctx, 0x00c6c/4, 0x0000ff0a); + INSTANCE_WR(ctx, 0x00c74/4, 0x0077f005); + INSTANCE_WR(ctx, 0x00c78/4, 0x003f7fff); + + INSTANCE_WR(ctx, 0x00c88/4, 0x01800000); + INSTANCE_WR(ctx, 0x00c8c/4, 0x00160000); + INSTANCE_WR(ctx, 0x00c90/4, 0x01800000); + INSTANCE_WR(ctx, 0x00ca0/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00ca4/4, 0x00880000); + INSTANCE_WR(ctx, 0x00cc8/4, 0x00010401); + INSTANCE_WR(ctx, 0x00cd0/4, 0x00000078); + INSTANCE_WR(ctx, 0x00cd8/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00ce0/4, 0x00001210); + INSTANCE_WR(ctx, 0x00ce4/4, 0x08000080); + INSTANCE_WR(ctx, 0x00d08/4, 0x01800000); + INSTANCE_WR(ctx, 0x00d0c/4, 0x00160000); + INSTANCE_WR(ctx, 0x00d10/4, 0x01800000); + INSTANCE_WR(ctx, 0x00d20/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00d24/4, 0x00880000); + INSTANCE_WR(ctx, 0x00d48/4, 0x00010401); + INSTANCE_WR(ctx, 0x00d50/4, 0x00000078); + INSTANCE_WR(ctx, 0x00d58/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00d60/4, 0x00001210); + INSTANCE_WR(ctx, 0x00d64/4, 0x08000080); + INSTANCE_WR(ctx, 0x00d8c/4, 0x00027070); + INSTANCE_WR(ctx, 0x00d98/4, 0x03ffffff); + INSTANCE_WR(ctx, 0x00db0/4, 0x00120407); + INSTANCE_WR(ctx, 0x00db4/4, 0x05091507); + INSTANCE_WR(ctx, 0x00db8/4, 0x05100202); + INSTANCE_WR(ctx, 0x00dbc/4, 0x00030201); + INSTANCE_WR(ctx, 0x00dd8/4, 0x00000040); + INSTANCE_WR(ctx, 0x00ddc/4, 0x0d0c0b0a); + INSTANCE_WR(ctx, 0x00de0/4, 0x00141210); + INSTANCE_WR(ctx, 0x00de4/4, 0x000001f0); + INSTANCE_WR(ctx, 0x00de8/4, 0x00000001); + INSTANCE_WR(ctx, 0x00dec/4, 0x00000003); + INSTANCE_WR(ctx, 0x00df8/4, 0x00039e00); + INSTANCE_WR(ctx, 0x00dfc/4, 0x00000100); + INSTANCE_WR(ctx, 0x00e00/4, 0x00003800); + INSTANCE_WR(ctx, 0x00e04/4, 0x00404040); + INSTANCE_WR(ctx, 0x00e08/4, 0x0000ff0a); + INSTANCE_WR(ctx, 0x00e10/4, 0x0077f005); + INSTANCE_WR(ctx, 0x00e14/4, 0x003f7fff); + + INSTANCE_WR(ctx, 0x00e24/4, 0x01800000); + INSTANCE_WR(ctx, 0x00e28/4, 0x00160000); + INSTANCE_WR(ctx, 0x00e2c/4, 0x01800000); + INSTANCE_WR(ctx, 0x00e3c/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00e40/4, 0x00880000); + INSTANCE_WR(ctx, 0x00e64/4, 0x00010401); + INSTANCE_WR(ctx, 0x00e6c/4, 0x00000078); + INSTANCE_WR(ctx, 0x00e74/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00e7c/4, 0x00001210); + INSTANCE_WR(ctx, 0x00e80/4, 0x08000080); + INSTANCE_WR(ctx, 0x00ea4/4, 0x01800000); + INSTANCE_WR(ctx, 0x00ea8/4, 0x00160000); + INSTANCE_WR(ctx, 0x00eac/4, 0x01800000); + INSTANCE_WR(ctx, 0x00ebc/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00ec0/4, 0x00880000); + INSTANCE_WR(ctx, 0x00ee4/4, 0x00010401); + INSTANCE_WR(ctx, 0x00eec/4, 0x00000078); + INSTANCE_WR(ctx, 0x00ef4/4, 0x000000bf); + INSTANCE_WR(ctx, 0x00efc/4, 0x00001210); + INSTANCE_WR(ctx, 0x00f00/4, 0x08000080); + INSTANCE_WR(ctx, 0x00f28/4, 0x00027070); + INSTANCE_WR(ctx, 0x00f34/4, 0x03ffffff); + INSTANCE_WR(ctx, 0x00f4c/4, 0x00120407); + INSTANCE_WR(ctx, 0x00f50/4, 0x05091507); + INSTANCE_WR(ctx, 0x00f54/4, 0x05100202); + INSTANCE_WR(ctx, 0x00f58/4, 0x00030201); + INSTANCE_WR(ctx, 0x00f74/4, 0x00000040); + INSTANCE_WR(ctx, 0x00f78/4, 0x0d0c0b0a); + INSTANCE_WR(ctx, 0x00f7c/4, 0x00141210); + INSTANCE_WR(ctx, 0x00f80/4, 0x000001f0); + INSTANCE_WR(ctx, 0x00f84/4, 0x00000001); + INSTANCE_WR(ctx, 0x00f88/4, 0x00000003); + INSTANCE_WR(ctx, 0x00f94/4, 0x00039e00); + INSTANCE_WR(ctx, 0x00f98/4, 0x00000100); + INSTANCE_WR(ctx, 0x00f9c/4, 0x00003800); + INSTANCE_WR(ctx, 0x00fa0/4, 0x00404040); + INSTANCE_WR(ctx, 0x00fa4/4, 0x0000ff0a); + INSTANCE_WR(ctx, 0x00fac/4, 0x0077f005); + INSTANCE_WR(ctx, 0x00fb0/4, 0x003f7fff); + + INSTANCE_WR(ctx, 0x00fc0/4, 0x01800000); + INSTANCE_WR(ctx, 0x00fc4/4, 0x00160000); + INSTANCE_WR(ctx, 0x00fc8/4, 0x01800000); + INSTANCE_WR(ctx, 0x00fd8/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x00fdc/4, 0x00880000); + INSTANCE_WR(ctx, 0x01000/4, 0x00010401); + INSTANCE_WR(ctx, 0x01008/4, 0x00000078); + INSTANCE_WR(ctx, 0x01010/4, 0x000000bf); + INSTANCE_WR(ctx, 0x01018/4, 0x00001210); + INSTANCE_WR(ctx, 0x0101c/4, 0x08000080); + INSTANCE_WR(ctx, 0x01040/4, 0x01800000); + INSTANCE_WR(ctx, 0x01044/4, 0x00160000); + INSTANCE_WR(ctx, 0x01048/4, 0x01800000); + INSTANCE_WR(ctx, 0x01058/4, 0x0003ffff); + INSTANCE_WR(ctx, 0x0105c/4, 0x00880000); + INSTANCE_WR(ctx, 0x01080/4, 0x00010401); + INSTANCE_WR(ctx, 0x01088/4, 0x00000078); + INSTANCE_WR(ctx, 0x01090/4, 0x000000bf); + INSTANCE_WR(ctx, 0x01098/4, 0x00001210); + INSTANCE_WR(ctx, 0x0109c/4, 0x08000080); + INSTANCE_WR(ctx, 0x010c4/4, 0x00027070); + INSTANCE_WR(ctx, 0x010d0/4, 0x03ffffff); + INSTANCE_WR(ctx, 0x010e8/4, 0x00120407); + INSTANCE_WR(ctx, 0x010ec/4, 0x05091507); + INSTANCE_WR(ctx, 0x010f0/4, 0x05100202); + INSTANCE_WR(ctx, 0x010f4/4, 0x00030201); + INSTANCE_WR(ctx, 0x01110/4, 0x00000040); + INSTANCE_WR(ctx, 0x01114/4, 0x0d0c0b0a); + INSTANCE_WR(ctx, 0x01118/4, 0x00141210); + INSTANCE_WR(ctx, 0x0111c/4, 0x000001f0); + INSTANCE_WR(ctx, 0x01120/4, 0x00000001); + INSTANCE_WR(ctx, 0x01124/4, 0x00000003); + INSTANCE_WR(ctx, 0x01130/4, 0x00039e00); + INSTANCE_WR(ctx, 0x01134/4, 0x00000100); + INSTANCE_WR(ctx, 0x01138/4, 0x00003800); + INSTANCE_WR(ctx, 0x0113c/4, 0x00404040); + INSTANCE_WR(ctx, 0x01140/4, 0x0000ff0a); + INSTANCE_WR(ctx, 0x01148/4, 0x0077f005); + INSTANCE_WR(ctx, 0x0114c/4, 0x003f7fff); + + INSTANCE_WR(ctx, 0x01230/4, 0x00000004); + INSTANCE_WR(ctx, 0x01284/4, 0x0000000f); + INSTANCE_WR(ctx, 0x0130c/4, 0x00000002); + INSTANCE_WR(ctx, 0x01324/4, 0x00000020); + INSTANCE_WR(ctx, 0x0134c/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x014ec/4, 0x00000001); + INSTANCE_WR(ctx, 0x014f0/4, 0x00000004); + INSTANCE_WR(ctx, 0x01504/4, 0x0000001a); + INSTANCE_WR(ctx, 0x0150c/4, 0x00000010); + INSTANCE_WR(ctx, 0x01510/4, 0x00000004); + INSTANCE_WR(ctx, 0x01530/4, 0x00608080); + INSTANCE_WR(ctx, 0x0156c/4, 0x00000001); + INSTANCE_WR(ctx, 0x015d0/4, 0x00000004); + INSTANCE_WR(ctx, 0x01630/4, 0x00000004); + INSTANCE_WR(ctx, 0x0164c/4, 0x00000002); + INSTANCE_WR(ctx, 0x01650/4, 0x00000004); + INSTANCE_WR(ctx, 0x01670/4, 0x00000080); + INSTANCE_WR(ctx, 0x01690/4, 0x00000004); + INSTANCE_WR(ctx, 0x016c4/4, 0x00000004); + INSTANCE_WR(ctx, 0x016e4/4, 0x00000004); + INSTANCE_WR(ctx, 0x01724/4, 0x00000004); + INSTANCE_WR(ctx, 0x01744/4, 0x00000008); + INSTANCE_WR(ctx, 0x0176c/4, 0x00000001); + INSTANCE_WR(ctx, 0x01784/4, 0x000007ff); + INSTANCE_WR(ctx, 0x0178c/4, 0x00000010); + INSTANCE_WR(ctx, 0x017cc/4, 0x00000001); + INSTANCE_WR(ctx, 0x01924/4, 0x0000000f); + INSTANCE_WR(ctx, 0x01a4c/4, 0x00000010); + INSTANCE_WR(ctx, 0x01b30/4, 0x00000004); + INSTANCE_WR(ctx, 0x01b50/4, 0x00000080); + INSTANCE_WR(ctx, 0x01b70/4, 0x00000004); + INSTANCE_WR(ctx, 0x01b90/4, 0x03020100); + INSTANCE_WR(ctx, 0x01bb0/4, 0x00000003); + INSTANCE_WR(ctx, 0x01bd0/4, 0x00000004); + INSTANCE_WR(ctx, 0x01c6c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01c70/4, 0x00000004); + INSTANCE_WR(ctx, 0x01c8c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01c90/4, 0x00000003); + INSTANCE_WR(ctx, 0x01cac/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01ccc/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01cec/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01d0c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01d10/4, 0x00000004); + INSTANCE_WR(ctx, 0x01d2c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01d4c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01d6c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01d8c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01dac/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01dcc/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01dec/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01e0c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01e2c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x01e4c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0218c/4, 0x00000010); + INSTANCE_WR(ctx, 0x021cc/4, 0x0000003f); + INSTANCE_WR(ctx, 0x022ac/4, 0x00000001); + INSTANCE_WR(ctx, 0x022ec/4, 0x00000001); + INSTANCE_WR(ctx, 0x0232c/4, 0x00000001); + INSTANCE_WR(ctx, 0x024cc/4, 0x00000011); + INSTANCE_WR(ctx, 0x025cc/4, 0x0000000f); + INSTANCE_WR(ctx, 0x026cc/4, 0x00000011); + INSTANCE_WR(ctx, 0x027ac/4, 0x00000001); + INSTANCE_WR(ctx, 0x027cc/4, 0x00000001); + INSTANCE_WR(ctx, 0x027ec/4, 0x00000001); + INSTANCE_WR(ctx, 0x0280c/4, 0x00000002); + INSTANCE_WR(ctx, 0x0282c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0284c/4, 0x00000002); + INSTANCE_WR(ctx, 0x0286c/4, 0x00000001); + INSTANCE_WR(ctx, 0x028ac/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x028ec/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x02bac/4, 0x00000001); + INSTANCE_WR(ctx, 0x02bcc/4, 0x00000002); + INSTANCE_WR(ctx, 0x02bec/4, 0x00000001); + INSTANCE_WR(ctx, 0x02c0c/4, 0x00000001); + INSTANCE_WR(ctx, 0x02c2c/4, 0x00000002); + INSTANCE_WR(ctx, 0x02c4c/4, 0x00000001); + INSTANCE_WR(ctx, 0x02c6c/4, 0x00000001); + INSTANCE_WR(ctx, 0x02cec/4, 0x00000011); + INSTANCE_WR(ctx, 0x02d0c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0398c/4, 0x00000002); + INSTANCE_WR(ctx, 0x039cc/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x03b6c/4, 0x00000001); + INSTANCE_WR(ctx, 0x03b8c/4, 0x00000010); + INSTANCE_WR(ctx, 0x03bec/4, 0x00000001); + INSTANCE_WR(ctx, 0x03ccc/4, 0x00000002); + INSTANCE_WR(ctx, 0x03dec/4, 0x00000001); + INSTANCE_WR(ctx, 0x03e04/4, 0x0000000f); + INSTANCE_WR(ctx, 0x03e0c/4, 0x00000010); + INSTANCE_WR(ctx, 0x03e44/4, 0x00000001); + INSTANCE_WR(ctx, 0x03e4c/4, 0x00000001); + INSTANCE_WR(ctx, 0x040cc/4, 0x00000010); + INSTANCE_WR(ctx, 0x042ec/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0430c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0432c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0434c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0436c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0438c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x043ac/4, 0x3f800000); + INSTANCE_WR(ctx, 0x043cc/4, 0x3f800000); + INSTANCE_WR(ctx, 0x043ec/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0440c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0442c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0444c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0446c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0448c/4, 0x3f800000); + INSTANCE_WR(ctx, 0x044ac/4, 0x3f800000); + INSTANCE_WR(ctx, 0x044cc/4, 0x3f800000); + INSTANCE_WR(ctx, 0x0480c/4, 0x00000010); + INSTANCE_WR(ctx, 0x0484c/4, 0x0000003f); + INSTANCE_WR(ctx, 0x0492c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0496c/4, 0x00000001); + INSTANCE_WR(ctx, 0x049a4/4, 0x0000000f); + INSTANCE_WR(ctx, 0x049ac/4, 0x00000001); + INSTANCE_WR(ctx, 0x04b4c/4, 0x00000011); + INSTANCE_WR(ctx, 0x04c4c/4, 0x0000000f); + INSTANCE_WR(ctx, 0x04d4c/4, 0x00000011); + INSTANCE_WR(ctx, 0x04e2c/4, 0x00000001); + INSTANCE_WR(ctx, 0x04e4c/4, 0x00000001); + INSTANCE_WR(ctx, 0x04e6c/4, 0x00000001); + INSTANCE_WR(ctx, 0x04e8c/4, 0x00000002); + INSTANCE_WR(ctx, 0x04eac/4, 0x00000001); + INSTANCE_WR(ctx, 0x04ecc/4, 0x00000002); + INSTANCE_WR(ctx, 0x04eec/4, 0x00000001); + INSTANCE_WR(ctx, 0x04f2c/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x04f6c/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x0522c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0524c/4, 0x00000002); + INSTANCE_WR(ctx, 0x0526c/4, 0x00000001); + INSTANCE_WR(ctx, 0x0528c/4, 0x00000001); + INSTANCE_WR(ctx, 0x052ac/4, 0x00000002); + INSTANCE_WR(ctx, 0x052cc/4, 0x00000001); + INSTANCE_WR(ctx, 0x052ec/4, 0x00000001); + INSTANCE_WR(ctx, 0x0536c/4, 0x00000011); + INSTANCE_WR(ctx, 0x0538c/4, 0x00000001); + INSTANCE_WR(ctx, 0x083a0/4, 0x00000021); + INSTANCE_WR(ctx, 0x083c0/4, 0x00000001); + INSTANCE_WR(ctx, 0x083e0/4, 0x00000002); + INSTANCE_WR(ctx, 0x08400/4, 0x00000100); + INSTANCE_WR(ctx, 0x08420/4, 0x00000100); + INSTANCE_WR(ctx, 0x08440/4, 0x00000001); + INSTANCE_WR(ctx, 0x084a0/4, 0x00000001); + INSTANCE_WR(ctx, 0x084c0/4, 0x00000002); + INSTANCE_WR(ctx, 0x084e0/4, 0x00000100); + INSTANCE_WR(ctx, 0x08500/4, 0x00000100); + INSTANCE_WR(ctx, 0x08520/4, 0x00000001); + INSTANCE_WR(ctx, 0x11e40/4, 0x00000004); + INSTANCE_WR(ctx, 0x11e60/4, 0x00000004); + INSTANCE_WR(ctx, 0x15044/4, 0x0000000f); + INSTANCE_WR(ctx, 0x152e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x15304/4, 0x00000100); + INSTANCE_WR(ctx, 0x15324/4, 0x00000100); + INSTANCE_WR(ctx, 0x15344/4, 0x00000011); + INSTANCE_WR(ctx, 0x15384/4, 0x00000008); + INSTANCE_WR(ctx, 0x15444/4, 0x00000001); + INSTANCE_WR(ctx, 0x15484/4, 0x00000001); + INSTANCE_WR(ctx, 0x154a4/4, 0x00000001); + INSTANCE_WR(ctx, 0x154c4/4, 0x00000001); + INSTANCE_WR(ctx, 0x154e4/4, 0x000000cf); + INSTANCE_WR(ctx, 0x15504/4, 0x00000002); + INSTANCE_WR(ctx, 0x155e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x15624/4, 0x00000001); + INSTANCE_WR(ctx, 0x15644/4, 0x00000001); + INSTANCE_WR(ctx, 0x15664/4, 0x00000001); + INSTANCE_WR(ctx, 0x15704/4, 0x00000004); + INSTANCE_WR(ctx, 0x15744/4, 0x00000001); + INSTANCE_WR(ctx, 0x15764/4, 0x00000015); + INSTANCE_WR(ctx, 0x157e4/4, 0x04444480); + INSTANCE_WR(ctx, 0x15f64/4, 0x08100c12); + INSTANCE_WR(ctx, 0x16004/4, 0x00000100); + INSTANCE_WR(ctx, 0x16064/4, 0x00010001); + INSTANCE_WR(ctx, 0x160a4/4, 0x00010001); + INSTANCE_WR(ctx, 0x160c4/4, 0x00000001); + INSTANCE_WR(ctx, 0x160e4/4, 0x00010001); + INSTANCE_WR(ctx, 0x16104/4, 0x00000001); + INSTANCE_WR(ctx, 0x16124/4, 0x00000004); + INSTANCE_WR(ctx, 0x16144/4, 0x00000002); + INSTANCE_WR(ctx, 0x161b0/4, 0x00000004); + INSTANCE_WR(ctx, 0x161c8/4, 0x003fffff); + INSTANCE_WR(ctx, 0x161d0/4, 0x00000003); + INSTANCE_WR(ctx, 0x16228/4, 0x00001fff); + INSTANCE_WR(ctx, 0x16408/4, 0x3f800000); + INSTANCE_WR(ctx, 0x16410/4, 0x0000000f); + INSTANCE_WR(ctx, 0x164e8/4, 0x00000004); + INSTANCE_WR(ctx, 0x16508/4, 0x0000001a); + INSTANCE_WR(ctx, 0x16568/4, 0x00000001); + INSTANCE_WR(ctx, 0x16590/4, 0x00000004); + INSTANCE_WR(ctx, 0x165b0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x165d0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x165f0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x16610/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x16730/4, 0x00000001); + INSTANCE_WR(ctx, 0x167b0/4, 0x00000001); + INSTANCE_WR(ctx, 0x167c8/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x16870/4, 0x00000001); + INSTANCE_WR(ctx, 0x168a8/4, 0x0000000f); + INSTANCE_WR(ctx, 0x169a8/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x169c8/4, 0x00000011); + INSTANCE_WR(ctx, 0x16a10/4, 0x00000001); + INSTANCE_WR(ctx, 0x16a30/4, 0x00000001); + INSTANCE_WR(ctx, 0x16a50/4, 0x00000002); + INSTANCE_WR(ctx, 0x16a70/4, 0x00000001); + INSTANCE_WR(ctx, 0x16a90/4, 0x00000001); + INSTANCE_WR(ctx, 0x16ab0/4, 0x00000002); + INSTANCE_WR(ctx, 0x16ad0/4, 0x00000001); + INSTANCE_WR(ctx, 0x16b10/4, 0x00000011); + INSTANCE_WR(ctx, 0x16bc8/4, 0x00000004); + INSTANCE_WR(ctx, 0x16c10/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x16c68/4, 0x00000002); + INSTANCE_WR(ctx, 0x16c70/4, 0x00000004); + INSTANCE_WR(ctx, 0x16c88/4, 0x04000000); + INSTANCE_WR(ctx, 0x16ca8/4, 0x04000000); + INSTANCE_WR(ctx, 0x16cf0/4, 0x00000011); + INSTANCE_WR(ctx, 0x16d10/4, 0x00000001); + INSTANCE_WR(ctx, 0x16d28/4, 0x00000005); + INSTANCE_WR(ctx, 0x16d48/4, 0x00000052); + INSTANCE_WR(ctx, 0x16d50/4, 0x000000cf); + INSTANCE_WR(ctx, 0x16d70/4, 0x000000cf); + INSTANCE_WR(ctx, 0x16d90/4, 0x000000cf); + INSTANCE_WR(ctx, 0x16de8/4, 0x00000001); + INSTANCE_WR(ctx, 0x16ef0/4, 0x00000001); + INSTANCE_WR(ctx, 0x16f10/4, 0x00000001); + INSTANCE_WR(ctx, 0x16f30/4, 0x00000002); + INSTANCE_WR(ctx, 0x16f50/4, 0x00000001); + INSTANCE_WR(ctx, 0x16f70/4, 0x00000001); + INSTANCE_WR(ctx, 0x16f90/4, 0x00000002); + INSTANCE_WR(ctx, 0x16fb0/4, 0x00000001); + INSTANCE_WR(ctx, 0x16ff0/4, 0x00000001); + INSTANCE_WR(ctx, 0x17008/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17010/4, 0x00000001); + INSTANCE_WR(ctx, 0x17028/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17030/4, 0x00000001); + INSTANCE_WR(ctx, 0x17048/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17050/4, 0x00000001); + INSTANCE_WR(ctx, 0x17068/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17070/4, 0x00000001); + INSTANCE_WR(ctx, 0x17088/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17090/4, 0x00000001); + INSTANCE_WR(ctx, 0x170a8/4, 0x3f800000); + INSTANCE_WR(ctx, 0x170b0/4, 0x00000001); + INSTANCE_WR(ctx, 0x170c8/4, 0x3f800000); + INSTANCE_WR(ctx, 0x170d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x170e8/4, 0x3f800000); + INSTANCE_WR(ctx, 0x170f0/4, 0x00000011); + INSTANCE_WR(ctx, 0x17108/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17128/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17148/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17168/4, 0x3f800000); + INSTANCE_WR(ctx, 0x17188/4, 0x3f800000); + INSTANCE_WR(ctx, 0x171a8/4, 0x3f800000); + INSTANCE_WR(ctx, 0x171c8/4, 0x3f800000); + INSTANCE_WR(ctx, 0x171e8/4, 0x3f800000); + INSTANCE_WR(ctx, 0x171f0/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x17208/4, 0x00000010); + INSTANCE_WR(ctx, 0x17210/4, 0x0000000f); + INSTANCE_WR(ctx, 0x17310/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x17370/4, 0x00000011); + INSTANCE_WR(ctx, 0x17390/4, 0x00000001); + INSTANCE_WR(ctx, 0x17410/4, 0x00000004); + INSTANCE_WR(ctx, 0x174d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x17570/4, 0x00000011); + INSTANCE_WR(ctx, 0x17670/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x176e8/4, 0x08100c12); + INSTANCE_WR(ctx, 0x176f0/4, 0x00000011); + INSTANCE_WR(ctx, 0x17708/4, 0x00000005); + INSTANCE_WR(ctx, 0x17710/4, 0x00000001); + INSTANCE_WR(ctx, 0x17750/4, 0x00000001); + INSTANCE_WR(ctx, 0x17768/4, 0x00000001); + INSTANCE_WR(ctx, 0x17790/4, 0x00000001); + INSTANCE_WR(ctx, 0x177a8/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x177c8/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x177d0/4, 0x000007ff); + INSTANCE_WR(ctx, 0x177e8/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x17808/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x17810/4, 0x00000001); + INSTANCE_WR(ctx, 0x17828/4, 0x00000003); + INSTANCE_WR(ctx, 0x17850/4, 0x00000001); + INSTANCE_WR(ctx, 0x17bc4/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x17be4/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x17c28/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x17c48/4, 0x0000001a); + INSTANCE_WR(ctx, 0x17c84/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x17c88/4, 0x00000003); + INSTANCE_WR(ctx, 0x17db0/4, 0x00000008); + INSTANCE_WR(ctx, 0x17dd0/4, 0x00000008); + INSTANCE_WR(ctx, 0x17df0/4, 0x00000008); + INSTANCE_WR(ctx, 0x17e04/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x17e10/4, 0x00000008); + INSTANCE_WR(ctx, 0x17e24/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x17e30/4, 0x00000008); + INSTANCE_WR(ctx, 0x17e50/4, 0x00000008); + INSTANCE_WR(ctx, 0x17e70/4, 0x00000008); + INSTANCE_WR(ctx, 0x17e90/4, 0x00000008); + INSTANCE_WR(ctx, 0x17eb0/4, 0x00000011); + INSTANCE_WR(ctx, 0x17fb0/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x17fd0/4, 0x00000400); + INSTANCE_WR(ctx, 0x17ff0/4, 0x00000400); + INSTANCE_WR(ctx, 0x18010/4, 0x00000400); + INSTANCE_WR(ctx, 0x18030/4, 0x00000400); + INSTANCE_WR(ctx, 0x18050/4, 0x00000400); + INSTANCE_WR(ctx, 0x18070/4, 0x00000400); + INSTANCE_WR(ctx, 0x18090/4, 0x00000400); + INSTANCE_WR(ctx, 0x180b0/4, 0x00000400); + INSTANCE_WR(ctx, 0x180d0/4, 0x00000300); + INSTANCE_WR(ctx, 0x180f0/4, 0x00000300); + INSTANCE_WR(ctx, 0x18110/4, 0x00000300); + INSTANCE_WR(ctx, 0x18130/4, 0x00000300); + INSTANCE_WR(ctx, 0x18150/4, 0x00000300); + INSTANCE_WR(ctx, 0x18168/4, 0x00000102); + INSTANCE_WR(ctx, 0x18170/4, 0x00000300); + INSTANCE_WR(ctx, 0x18190/4, 0x00000300); + INSTANCE_WR(ctx, 0x181a8/4, 0x00000004); + INSTANCE_WR(ctx, 0x181b0/4, 0x00000300); + INSTANCE_WR(ctx, 0x181c8/4, 0x00000004); + INSTANCE_WR(ctx, 0x181d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x181e8/4, 0x00000004); + INSTANCE_WR(ctx, 0x181f0/4, 0x0000000f); + INSTANCE_WR(ctx, 0x18208/4, 0x00000004); + INSTANCE_WR(ctx, 0x18228/4, 0x00000004); + INSTANCE_WR(ctx, 0x18248/4, 0x00000004); + INSTANCE_WR(ctx, 0x18288/4, 0x000007ff); + INSTANCE_WR(ctx, 0x182c8/4, 0x00000102); + INSTANCE_WR(ctx, 0x182f0/4, 0x00000020); + INSTANCE_WR(ctx, 0x18310/4, 0x00000011); + INSTANCE_WR(ctx, 0x18330/4, 0x00000100); + INSTANCE_WR(ctx, 0x18370/4, 0x00000001); + INSTANCE_WR(ctx, 0x183d0/4, 0x00000040); + INSTANCE_WR(ctx, 0x183f0/4, 0x00000100); + INSTANCE_WR(ctx, 0x18408/4, 0x00000004); + INSTANCE_WR(ctx, 0x18428/4, 0x00000004); + INSTANCE_WR(ctx, 0x18430/4, 0x00000003); + INSTANCE_WR(ctx, 0x18448/4, 0x00000004); + INSTANCE_WR(ctx, 0x18468/4, 0x00000004); + INSTANCE_WR(ctx, 0x184d0/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x18550/4, 0x00000002); + INSTANCE_WR(ctx, 0x18570/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x186b0/4, 0x00000001); + INSTANCE_WR(ctx, 0x18750/4, 0x00000004); + INSTANCE_WR(ctx, 0x18790/4, 0x00000001); + INSTANCE_WR(ctx, 0x187b0/4, 0x00000400); + INSTANCE_WR(ctx, 0x187d0/4, 0x00000300); + INSTANCE_WR(ctx, 0x187f0/4, 0x00001001); + INSTANCE_WR(ctx, 0x18870/4, 0x00000011); + INSTANCE_WR(ctx, 0x18970/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x18990/4, 0x0000000f); + INSTANCE_WR(ctx, 0x18aa8/4, 0x00080c14); + INSTANCE_WR(ctx, 0x18b08/4, 0x00000804); + INSTANCE_WR(ctx, 0x18b48/4, 0x00000004); + INSTANCE_WR(ctx, 0x18b68/4, 0x00000004); + INSTANCE_WR(ctx, 0x18b88/4, 0x08100c12); + INSTANCE_WR(ctx, 0x18bc8/4, 0x00000004); + INSTANCE_WR(ctx, 0x18be8/4, 0x00000004); + INSTANCE_WR(ctx, 0x18c28/4, 0x00000010); + INSTANCE_WR(ctx, 0x18c90/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x18cc8/4, 0x00000804); + INSTANCE_WR(ctx, 0x18ce8/4, 0x00000001); + INSTANCE_WR(ctx, 0x18d08/4, 0x0000001a); + INSTANCE_WR(ctx, 0x18d10/4, 0x00000011); + INSTANCE_WR(ctx, 0x18d28/4, 0x0000007f); + INSTANCE_WR(ctx, 0x18d68/4, 0x00000001); + INSTANCE_WR(ctx, 0x18d70/4, 0x00000004); + INSTANCE_WR(ctx, 0x18d88/4, 0x00080c14); + INSTANCE_WR(ctx, 0x18db0/4, 0x00000001); + INSTANCE_WR(ctx, 0x18dc8/4, 0x08100c12); + INSTANCE_WR(ctx, 0x18dd0/4, 0x00000001); + INSTANCE_WR(ctx, 0x18de8/4, 0x00000004); + INSTANCE_WR(ctx, 0x18e08/4, 0x00000004); + INSTANCE_WR(ctx, 0x18e48/4, 0x00000010); + INSTANCE_WR(ctx, 0x18e50/4, 0x00000001); + INSTANCE_WR(ctx, 0x18ec8/4, 0x00000001); + INSTANCE_WR(ctx, 0x18ee8/4, 0x08100c12); + INSTANCE_WR(ctx, 0x18ef0/4, 0x00000001); + INSTANCE_WR(ctx, 0x18f30/4, 0x00000001); + INSTANCE_WR(ctx, 0x18fb0/4, 0x2a712488); + INSTANCE_WR(ctx, 0x18fc8/4, 0x000007ff); + INSTANCE_WR(ctx, 0x18fe8/4, 0x00080c14); + INSTANCE_WR(ctx, 0x18ff0/4, 0x4085c000); + INSTANCE_WR(ctx, 0x19010/4, 0x00000040); + INSTANCE_WR(ctx, 0x19030/4, 0x00000100); + INSTANCE_WR(ctx, 0x19050/4, 0x00010100); + INSTANCE_WR(ctx, 0x19070/4, 0x02800000); + INSTANCE_WR(ctx, 0x192d0/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x192f0/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x19310/4, 0x00000001); + INSTANCE_WR(ctx, 0x19350/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x19370/4, 0x00000001); + INSTANCE_WR(ctx, 0x193d0/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x194f0/4, 0x00000001); + INSTANCE_WR(ctx, 0x19530/4, 0x00000001); + INSTANCE_WR(ctx, 0x19550/4, 0x30201000); + INSTANCE_WR(ctx, 0x19570/4, 0x70605040); + INSTANCE_WR(ctx, 0x19590/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x195b0/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x195f0/4, 0x0000001a); + INSTANCE_WR(ctx, 0x19630/4, 0x00000004); + INSTANCE_WR(ctx, 0x19708/4, 0x00000001); + INSTANCE_WR(ctx, 0x19768/4, 0x00000010); + INSTANCE_WR(ctx, 0x198f0/4, 0x00000004); + INSTANCE_WR(ctx, 0x19910/4, 0x00000004); + INSTANCE_WR(ctx, 0x19930/4, 0x00608080); + INSTANCE_WR(ctx, 0x199d0/4, 0x00000004); + INSTANCE_WR(ctx, 0x19a30/4, 0x00000004); + INSTANCE_WR(ctx, 0x19a50/4, 0x00000004); + INSTANCE_WR(ctx, 0x19a70/4, 0x00000080); + INSTANCE_WR(ctx, 0x19a90/4, 0x00000004); + INSTANCE_WR(ctx, 0x19e88/4, 0x00000088); + INSTANCE_WR(ctx, 0x19ea8/4, 0x00000088); + INSTANCE_WR(ctx, 0x19f08/4, 0x00000004); + INSTANCE_WR(ctx, 0x19f30/4, 0x00000004); + INSTANCE_WR(ctx, 0x19f50/4, 0x00000080); + INSTANCE_WR(ctx, 0x19f70/4, 0x00000004); + INSTANCE_WR(ctx, 0x19f90/4, 0x03020100); + INSTANCE_WR(ctx, 0x19fb0/4, 0x00000003); + INSTANCE_WR(ctx, 0x19fd0/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a070/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a090/4, 0x00000003); + INSTANCE_WR(ctx, 0x1a110/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a1e8/4, 0x00000026); + INSTANCE_WR(ctx, 0x1a248/4, 0x3f800000); + INSTANCE_WR(ctx, 0x1a2c8/4, 0x0000001a); + INSTANCE_WR(ctx, 0x1a2e8/4, 0x00000010); + INSTANCE_WR(ctx, 0x1a808/4, 0x00000052); + INSTANCE_WR(ctx, 0x1a848/4, 0x00000026); + INSTANCE_WR(ctx, 0x1a888/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a8a8/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a8e8/4, 0x0000001a); + INSTANCE_WR(ctx, 0x1a948/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x1a988/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a9a8/4, 0x00000004); + INSTANCE_WR(ctx, 0x1a9e8/4, 0x00000080); + INSTANCE_WR(ctx, 0x1aa08/4, 0x00000004); + INSTANCE_WR(ctx, 0x1aa28/4, 0x00080c14); + INSTANCE_WR(ctx, 0x1aa68/4, 0x000007ff); + INSTANCE_WR(ctx, 0x2d2c8/4, 0x00000004); + INSTANCE_WR(ctx, 0x2d2e8/4, 0x00000004); + INSTANCE_WR(ctx, 0x2d328/4, 0x00000080); + INSTANCE_WR(ctx, 0x2d348/4, 0x00000004); + INSTANCE_WR(ctx, 0x2d368/4, 0x00000001); + INSTANCE_WR(ctx, 0x2d3a8/4, 0x00000027); + INSTANCE_WR(ctx, 0x2d3e8/4, 0x00000026); + INSTANCE_WR(ctx, 0x2d468/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d488/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d4a8/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d4c8/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d4e8/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d508/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d528/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d548/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d568/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d588/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d5a8/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d5c8/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d5e8/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d608/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d628/4, 0x04000000); + INSTANCE_WR(ctx, 0x2d648/4, 0x04000000); + INSTANCE_WR(ctx, 0x2dae8/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x2db08/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x2db68/4, 0x0001fe21); + INSTANCE_WR(ctx, 0x2e5b0/4, 0x00000004); + INSTANCE_WR(ctx, 0x2e5d0/4, 0x00000003); + INSTANCE_WR(ctx, 0x2e810/4, 0x0000000f); + INSTANCE_WR(ctx, 0x2e990/4, 0x00000004); + INSTANCE_WR(ctx, 0x2e9b0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x2e9d0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x2e9f0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x2ea10/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x2eb30/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ebb0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ec70/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ee10/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ee30/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ee50/4, 0x00000002); + INSTANCE_WR(ctx, 0x2ee70/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ee90/4, 0x00000001); + INSTANCE_WR(ctx, 0x2eeb0/4, 0x00000002); + INSTANCE_WR(ctx, 0x2eed0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2ef10/4, 0x00000011); + INSTANCE_WR(ctx, 0x2f010/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x2f070/4, 0x00000004); + INSTANCE_WR(ctx, 0x2f0f0/4, 0x00000011); + INSTANCE_WR(ctx, 0x2f110/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f150/4, 0x000000cf); + INSTANCE_WR(ctx, 0x2f170/4, 0x000000cf); + INSTANCE_WR(ctx, 0x2f190/4, 0x000000cf); + INSTANCE_WR(ctx, 0x2f2f0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f310/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f330/4, 0x00000002); + INSTANCE_WR(ctx, 0x2f350/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f370/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f390/4, 0x00000002); + INSTANCE_WR(ctx, 0x2f3b0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f3f0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f410/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f430/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f450/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f470/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f490/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f4b0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f4d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f4f0/4, 0x00000011); + INSTANCE_WR(ctx, 0x2f5f0/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x2f610/4, 0x0000000f); + INSTANCE_WR(ctx, 0x2f710/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x2f770/4, 0x00000011); + INSTANCE_WR(ctx, 0x2f790/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f810/4, 0x00000004); + INSTANCE_WR(ctx, 0x2f8d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x2f970/4, 0x00000011); + INSTANCE_WR(ctx, 0x2fa70/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x2faf0/4, 0x00000011); + INSTANCE_WR(ctx, 0x2fb10/4, 0x00000001); + INSTANCE_WR(ctx, 0x2fb50/4, 0x00000001); + INSTANCE_WR(ctx, 0x2fb90/4, 0x00000001); + INSTANCE_WR(ctx, 0x2fbd0/4, 0x000007ff); + INSTANCE_WR(ctx, 0x2fc10/4, 0x00000001); + INSTANCE_WR(ctx, 0x2fc50/4, 0x00000001); + INSTANCE_WR(ctx, 0x301b0/4, 0x00000008); + INSTANCE_WR(ctx, 0x301d0/4, 0x00000008); + INSTANCE_WR(ctx, 0x301f0/4, 0x00000008); + INSTANCE_WR(ctx, 0x30210/4, 0x00000008); + INSTANCE_WR(ctx, 0x30230/4, 0x00000008); + INSTANCE_WR(ctx, 0x30250/4, 0x00000008); + INSTANCE_WR(ctx, 0x30270/4, 0x00000008); + INSTANCE_WR(ctx, 0x30290/4, 0x00000008); + INSTANCE_WR(ctx, 0x302b0/4, 0x00000011); + INSTANCE_WR(ctx, 0x303b0/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x303d0/4, 0x00000400); + INSTANCE_WR(ctx, 0x303f0/4, 0x00000400); + INSTANCE_WR(ctx, 0x30410/4, 0x00000400); + INSTANCE_WR(ctx, 0x30430/4, 0x00000400); + INSTANCE_WR(ctx, 0x30450/4, 0x00000400); + INSTANCE_WR(ctx, 0x30470/4, 0x00000400); + INSTANCE_WR(ctx, 0x30490/4, 0x00000400); + INSTANCE_WR(ctx, 0x304b0/4, 0x00000400); + INSTANCE_WR(ctx, 0x304d0/4, 0x00000300); + INSTANCE_WR(ctx, 0x304f0/4, 0x00000300); + INSTANCE_WR(ctx, 0x30510/4, 0x00000300); + INSTANCE_WR(ctx, 0x30530/4, 0x00000300); + INSTANCE_WR(ctx, 0x30550/4, 0x00000300); + INSTANCE_WR(ctx, 0x30570/4, 0x00000300); + INSTANCE_WR(ctx, 0x30590/4, 0x00000300); + INSTANCE_WR(ctx, 0x305b0/4, 0x00000300); + INSTANCE_WR(ctx, 0x305d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x305f0/4, 0x0000000f); + INSTANCE_WR(ctx, 0x306f0/4, 0x00000020); + INSTANCE_WR(ctx, 0x30710/4, 0x00000011); + INSTANCE_WR(ctx, 0x30730/4, 0x00000100); + INSTANCE_WR(ctx, 0x30770/4, 0x00000001); + INSTANCE_WR(ctx, 0x307d0/4, 0x00000040); + INSTANCE_WR(ctx, 0x307f0/4, 0x00000100); + INSTANCE_WR(ctx, 0x30830/4, 0x00000003); + INSTANCE_WR(ctx, 0x308d0/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x30950/4, 0x00000002); + INSTANCE_WR(ctx, 0x30970/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x30ab0/4, 0x00000001); + INSTANCE_WR(ctx, 0x30b50/4, 0x00000004); + INSTANCE_WR(ctx, 0x30b90/4, 0x00000001); + INSTANCE_WR(ctx, 0x30bb0/4, 0x00000400); + INSTANCE_WR(ctx, 0x30bd0/4, 0x00000300); + INSTANCE_WR(ctx, 0x30bf0/4, 0x00001001); + INSTANCE_WR(ctx, 0x30c70/4, 0x00000011); + INSTANCE_WR(ctx, 0x30d70/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x30d90/4, 0x0000000f); + INSTANCE_WR(ctx, 0x31090/4, 0x001ffe67); + INSTANCE_WR(ctx, 0x31110/4, 0x00000011); + INSTANCE_WR(ctx, 0x31170/4, 0x00000004); + INSTANCE_WR(ctx, 0x311b0/4, 0x00000001); + INSTANCE_WR(ctx, 0x311d0/4, 0x00000001); + INSTANCE_WR(ctx, 0x31250/4, 0x00000001); + INSTANCE_WR(ctx, 0x312f0/4, 0x00000001); + INSTANCE_WR(ctx, 0x31330/4, 0x00000001); + INSTANCE_WR(ctx, 0x313b0/4, 0x2a712488); + INSTANCE_WR(ctx, 0x313f0/4, 0x4085c000); + INSTANCE_WR(ctx, 0x31410/4, 0x00000040); + INSTANCE_WR(ctx, 0x31430/4, 0x00000100); + INSTANCE_WR(ctx, 0x31450/4, 0x00010100); + INSTANCE_WR(ctx, 0x31470/4, 0x02800000); + INSTANCE_WR(ctx, 0x316d0/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x316f0/4, 0x04e3bfdf); + INSTANCE_WR(ctx, 0x31710/4, 0x00000001); + INSTANCE_WR(ctx, 0x31750/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x31770/4, 0x00000001); + INSTANCE_WR(ctx, 0x317d0/4, 0x00ffff00); + INSTANCE_WR(ctx, 0x318f0/4, 0x00000001); + INSTANCE_WR(ctx, 0x31930/4, 0x00000001); + INSTANCE_WR(ctx, 0x31950/4, 0x30201000); + INSTANCE_WR(ctx, 0x31970/4, 0x70605040); + INSTANCE_WR(ctx, 0x31990/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x319b0/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x319f0/4, 0x0000001a); + INSTANCE_WR(ctx, 0x4a7e0/4, 0x00000004); + INSTANCE_WR(ctx, 0x4a800/4, 0x00000004); + INSTANCE_WR(ctx, 0x4a820/4, 0x08100c12); + INSTANCE_WR(ctx, 0x4a840/4, 0x00000003); + INSTANCE_WR(ctx, 0x4a880/4, 0x08100c12); + INSTANCE_WR(ctx, 0x4a8c0/4, 0x00080c14); + INSTANCE_WR(ctx, 0x4a8e0/4, 0x00000001); + INSTANCE_WR(ctx, 0x4a900/4, 0x00080c14); + INSTANCE_WR(ctx, 0x4a960/4, 0x08100c12); + INSTANCE_WR(ctx, 0x4a980/4, 0x00000027); + INSTANCE_WR(ctx, 0x4a9e0/4, 0x00000001); + INSTANCE_WR(ctx, 0x52220/4, 0x00000001); + INSTANCE_WR(ctx, 0x52500/4, 0x08100c12); + INSTANCE_WR(ctx, 0x526a0/4, 0x04000000); + INSTANCE_WR(ctx, 0x526c0/4, 0x04000000); + INSTANCE_WR(ctx, 0x52700/4, 0x00000080); + INSTANCE_WR(ctx, 0x52780/4, 0x00000080); + INSTANCE_WR(ctx, 0x527c0/4, 0x0000003f); + INSTANCE_WR(ctx, 0x52920/4, 0x00000002); + INSTANCE_WR(ctx, 0x52940/4, 0x04000000); + INSTANCE_WR(ctx, 0x52960/4, 0x04000000); + INSTANCE_WR(ctx, 0x52a80/4, 0x00000004); + INSTANCE_WR(ctx, 0x52b00/4, 0x00000004); + INSTANCE_WR(ctx, 0x52d40/4, 0x00000001); + INSTANCE_WR(ctx, 0x52d60/4, 0x00001001); + INSTANCE_WR(ctx, 0x52d80/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x52da0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x52dc0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x52de0/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53200/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53220/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53240/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53260/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53280/4, 0x3f800000); + INSTANCE_WR(ctx, 0x532a0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x532c0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x532e0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53300/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53320/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53340/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53360/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53380/4, 0x3f800000); + INSTANCE_WR(ctx, 0x533a0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x533c0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x533e0/4, 0x3f800000); + INSTANCE_WR(ctx, 0x53400/4, 0x00000010); + INSTANCE_WR(ctx, 0x53460/4, 0x00000003); + INSTANCE_WR(ctx, 0x53500/4, 0x08100c12); + INSTANCE_WR(ctx, 0x53524/4, 0x00000080); + INSTANCE_WR(ctx, 0x53540/4, 0x00000080); + INSTANCE_WR(ctx, 0x53544/4, 0x80007004); + INSTANCE_WR(ctx, 0x53560/4, 0x80007004); + INSTANCE_WR(ctx, 0x53564/4, 0x04000400); + INSTANCE_WR(ctx, 0x53580/4, 0x04000400); + INSTANCE_WR(ctx, 0x53584/4, 0x00001000); + INSTANCE_WR(ctx, 0x535a0/4, 0x00001000); + INSTANCE_WR(ctx, 0x535e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x53600/4, 0x00000001); + INSTANCE_WR(ctx, 0x53644/4, 0x00000001); + INSTANCE_WR(ctx, 0x53660/4, 0x00000001); + INSTANCE_WR(ctx, 0x53684/4, 0x00000004); + INSTANCE_WR(ctx, 0x536a0/4, 0x00000004); + INSTANCE_WR(ctx, 0x536a4/4, 0x00000002); + INSTANCE_WR(ctx, 0x536c0/4, 0x00000002); + INSTANCE_WR(ctx, 0x53824/4, 0x00000080); + INSTANCE_WR(ctx, 0x53840/4, 0x00000080); + INSTANCE_WR(ctx, 0x53844/4, 0x80007004); + INSTANCE_WR(ctx, 0x53860/4, 0x80007004); + INSTANCE_WR(ctx, 0x53864/4, 0x04000400); + INSTANCE_WR(ctx, 0x53880/4, 0x04000400); + INSTANCE_WR(ctx, 0x53884/4, 0x00001000); + INSTANCE_WR(ctx, 0x538a0/4, 0x00001000); + INSTANCE_WR(ctx, 0x538e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x53900/4, 0x00000001); + INSTANCE_WR(ctx, 0x53944/4, 0x00000001); + INSTANCE_WR(ctx, 0x53960/4, 0x00000001); + INSTANCE_WR(ctx, 0x53984/4, 0x00000004); + INSTANCE_WR(ctx, 0x539a0/4, 0x00000004); + INSTANCE_WR(ctx, 0x539a4/4, 0x00000002); + INSTANCE_WR(ctx, 0x539c0/4, 0x00000002); + INSTANCE_WR(ctx, 0x53b04/4, 0x08100c12); + INSTANCE_WR(ctx, 0x53b20/4, 0x08100c12); + INSTANCE_WR(ctx, 0x53be4/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c00/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c04/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c20/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c24/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c40/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c44/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c60/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x53c64/4, 0x00000001); + INSTANCE_WR(ctx, 0x53c80/4, 0x00000001); + INSTANCE_WR(ctx, 0x53c84/4, 0x00010001); + INSTANCE_WR(ctx, 0x53ca0/4, 0x00010001); + INSTANCE_WR(ctx, 0x53ca4/4, 0x00010001); + INSTANCE_WR(ctx, 0x53cc0/4, 0x00010001); + INSTANCE_WR(ctx, 0x53cc4/4, 0x00000001); + INSTANCE_WR(ctx, 0x53ce0/4, 0x00000001); + INSTANCE_WR(ctx, 0x53d04/4, 0x0001fe21); + INSTANCE_WR(ctx, 0x53d20/4, 0x0001fe21); + INSTANCE_WR(ctx, 0x53dc4/4, 0x08100c12); + INSTANCE_WR(ctx, 0x53de0/4, 0x08100c12); + INSTANCE_WR(ctx, 0x53de4/4, 0x00000004); + INSTANCE_WR(ctx, 0x53e00/4, 0x00000004); + INSTANCE_WR(ctx, 0x53e24/4, 0x00000002); + INSTANCE_WR(ctx, 0x53e40/4, 0x00000002); + INSTANCE_WR(ctx, 0x53e44/4, 0x00000011); + INSTANCE_WR(ctx, 0x53e60/4, 0x00000011); + INSTANCE_WR(ctx, 0x53f64/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x53f80/4, 0x0fac6881); + INSTANCE_WR(ctx, 0x54004/4, 0x00000004); + INSTANCE_WR(ctx, 0x54020/4, 0x00000004); + INSTANCE_WR(ctx, 0x54144/4, 0x00000002); + INSTANCE_WR(ctx, 0x54160/4, 0x00000002); + INSTANCE_WR(ctx, 0x54164/4, 0x00000001); + INSTANCE_WR(ctx, 0x54180/4, 0x00000001); + INSTANCE_WR(ctx, 0x54184/4, 0x00000001); + INSTANCE_WR(ctx, 0x541a0/4, 0x00000001); + INSTANCE_WR(ctx, 0x541a4/4, 0x00000002); + INSTANCE_WR(ctx, 0x541c0/4, 0x00000002); + INSTANCE_WR(ctx, 0x541c4/4, 0x00000001); + INSTANCE_WR(ctx, 0x541e0/4, 0x00000001); + INSTANCE_WR(ctx, 0x541e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x54200/4, 0x00000001); + INSTANCE_WR(ctx, 0x54204/4, 0x00000001); + INSTANCE_WR(ctx, 0x54220/4, 0x00000001); + INSTANCE_WR(ctx, 0x54244/4, 0x00000004); + INSTANCE_WR(ctx, 0x54260/4, 0x00000004); + INSTANCE_WR(ctx, 0x5b6a4/4, 0x00000011); + INSTANCE_WR(ctx, 0x5b6c0/4, 0x00000011); + INSTANCE_WR(ctx, 0x5b6e4/4, 0x00000001); + INSTANCE_WR(ctx, 0x5b700/4, 0x00000001); +} + int nv50_graph_create_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - struct nouveau_engine *engine = &dev_priv->Engine; struct nouveau_gpuobj *ramin = chan->ramin->gpuobj; + struct nouveau_engine *engine = &dev_priv->Engine; int grctx_size = 0x60000, hdr; int ret; DRM_DEBUG("ch%d\n", chan->id); - if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, - grctx_size, 0x1000, - NVOBJ_FLAG_ZERO_ALLOC | - NVOBJ_FLAG_ZERO_FREE, - &chan->ramin_grctx))) + ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, grctx_size, 0x1000, + NVOBJ_FLAG_ZERO_ALLOC | + NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx); + if (ret) return ret; hdr = IS_G80 ? 0x200 : 0x20; @@ -225,9 +2086,29 @@ INSTANCE_WR(ramin, (hdr + 0x10)/4, 0); INSTANCE_WR(ramin, (hdr + 0x14)/4, 0x00010000); - if ((ret = engine->graph.load_context(chan))) { - DRM_ERROR("Error hacking up initial context: %d\n", ret); - return ret; + INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x00000/4, + chan->ramin->instance >> 12); + INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x0011c/4, 0x00000002); + + switch (dev_priv->chipset) { + case 0x84: + nv84_graph_init_ctxvals(dev, chan->ramin_grctx); + break; + case 0x86: + nv86_graph_init_ctxvals(dev, chan->ramin_grctx); + break; + default: + /* This is complete crack, it accidently used to make at + * least some G8x cards work partially somehow, though there's + * no good reason why - and it stopped working as the rest + * of the code got off the drugs.. + */ + ret = engine->graph.load_context(chan); + if (ret) { + DRM_ERROR("Error hacking up context: %d\n", ret); + return ret; + } + break; } return 0; @@ -259,10 +2140,10 @@ DRM_DEBUG("inst=0x%08x, save=%d\n", inst, save); old_cp = NV_READ(NV20_PGRAPH_CHANNEL_CTX_POINTER); - NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst | (1<<31)); + NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); NV_WRITE(0x400824, NV_READ(0x400824) | (save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE : - NV40_PGRAPH_CTXCTL_0310_XFER_LOAD)); + NV40_PGRAPH_CTXCTL_0310_XFER_LOAD)); NV_WRITE(NV40_PGRAPH_CTXCTL_0304, NV40_PGRAPH_CTXCTL_0304_XFER_CTX); for (i = 0; i < tv; i++) { @@ -286,7 +2167,7 @@ { struct drm_device *dev = chan->dev; struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t inst = ((chan->ramin->instance >> 12) | (1<<31)); + uint32_t inst = chan->ramin->instance >> 12; int ret; (void)ret; DRM_DEBUG("ch%d\n", chan->id); @@ -298,7 +2179,7 @@ NV_WRITE(NV20_PGRAPH_CHANNEL_CTX_POINTER, inst); NV_WRITE(0x400320, 4); - NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, inst); + NV_WRITE(NV40_PGRAPH_CTXCTL_CUR, inst | (1<<31)); return 0; } @@ -307,10 +2188,9 @@ nv50_graph_save_context(struct nouveau_channel *chan) { struct drm_device *dev = chan->dev; - uint32_t inst = ((chan->ramin->instance >> 12) | (1<<31)); + uint32_t inst = chan->ramin->instance >> 12; DRM_DEBUG("ch%d\n", chan->id); return nv50_graph_transfer_context(dev, inst, 1); } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/nv50_instmem.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/nv50_instmem.c --- libdrm-2.3.0.16/shared-core/nv50_instmem.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/nv50_instmem.c 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,324 @@ +/* + * Copyright (C) 2007 Ben Skeggs. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "drmP.h" +#include "drm.h" +#include "nouveau_drv.h" + +typedef struct { + uint32_t save1700[5]; /* 0x1700->0x1710 */ + + struct nouveau_gpuobj_ref *pramin_pt; + struct nouveau_gpuobj_ref *pramin_bar; +} nv50_instmem_priv; + +#define NV50_INSTMEM_PAGE_SHIFT 12 +#define NV50_INSTMEM_PAGE_SIZE (1 << NV50_INSTMEM_PAGE_SHIFT) +#define NV50_INSTMEM_PT_SIZE(a) (((a) >> 12) << 3) + +/*NOTE: - Assumes 0x1700 already covers the correct MiB of PRAMIN + */ +#define BAR0_WI32(g,o,v) do { \ + uint32_t offset; \ + if ((g)->im_backing) { \ + offset = (g)->im_backing->start; \ + } else { \ + offset = chan->ramin->gpuobj->im_backing->start; \ + offset += (g)->im_pramin->start; \ + } \ + offset += (o); \ + NV_WRITE(NV_RAMIN + (offset & 0xfffff), (v)); \ +} while(0) + +int +nv50_instmem_init(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nouveau_channel *chan; + uint32_t c_offset, c_size, c_ramfc, c_vmpd, c_base, pt_size; + nv50_instmem_priv *priv; + int ret, i; + uint32_t v; + + priv = drm_calloc(1, sizeof(*priv), DRM_MEM_DRIVER); + if (!priv) + return -ENOMEM; + dev_priv->Engine.instmem.priv = priv; + + /* Save state, will restore at takedown. */ + for (i = 0x1700; i <= 0x1710; i+=4) + priv->save1700[(i-0x1700)/4] = NV_READ(i); + + /* Reserve the last MiB of VRAM, we should probably try to avoid + * setting up the below tables over the top of the VBIOS image at + * some point. + */ + dev_priv->ramin_rsvd_vram = 1 << 20; + c_offset = nouveau_mem_fb_amount(dev) - dev_priv->ramin_rsvd_vram; + c_size = 128 << 10; + c_vmpd = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x1400 : 0x200; + c_ramfc = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x0 : 0x20; + c_base = c_vmpd + 0x4000; + pt_size = NV50_INSTMEM_PT_SIZE(dev_priv->ramin->size); + + DRM_DEBUG(" Rsvd VRAM base: 0x%08x\n", c_offset); + DRM_DEBUG(" VBIOS image: 0x%08x\n", (NV_READ(0x619f04)&~0xff)<<8); + DRM_DEBUG(" Aperture size: %d MiB\n", + (uint32_t)dev_priv->ramin->size >> 20); + DRM_DEBUG(" PT size: %d KiB\n", pt_size >> 10); + + NV_WRITE(NV50_PUNK_BAR0_PRAMIN, (c_offset >> 16)); + + /* Create a fake channel, and use it as our "dummy" channels 0/127. + * The main reason for creating a channel is so we can use the gpuobj + * code. However, it's probably worth noting that NVIDIA also setup + * their channels 0/127 with the same values they configure here. + * So, there may be some other reason for doing this. + * + * Have to create the entire channel manually, as the real channel + * creation code assumes we have PRAMIN access, and we don't until + * we're done here. + */ + chan = drm_calloc(1, sizeof(*chan), DRM_MEM_DRIVER); + if (!chan) + return -ENOMEM; + chan->id = 0; + chan->dev = dev; + chan->file_priv = (struct drm_file *)-2; + dev_priv->fifos[0] = dev_priv->fifos[127] = chan; + + /* Channel's PRAMIN object + heap */ + if ((ret = nouveau_gpuobj_new_fake(dev, 0, c_offset, 128<<10, 0, + NULL, &chan->ramin))) + return ret; + + if (nouveau_mem_init_heap(&chan->ramin_heap, c_base, c_size - c_base)) + return -ENOMEM; + + /* RAMFC + zero channel's PRAMIN up to start of VM pagedir */ + if ((ret = nouveau_gpuobj_new_fake(dev, c_ramfc, c_offset + c_ramfc, + 0x4000, 0, NULL, &chan->ramfc))) + return ret; + + for (i = 0; i < c_vmpd; i += 4) + BAR0_WI32(chan->ramin->gpuobj, i, 0); + + /* VM page directory */ + if ((ret = nouveau_gpuobj_new_fake(dev, c_vmpd, c_offset + c_vmpd, + 0x4000, 0, &chan->vm_pd, NULL))) + return ret; + for (i = 0; i < 0x4000; i += 8) { + BAR0_WI32(chan->vm_pd, i + 0x00, 0x00000000); + BAR0_WI32(chan->vm_pd, i + 0x04, 0x00000000); + } + + /* PRAMIN page table, cheat and map into VM at 0x0000000000. + * We map the entire fake channel into the start of the PRAMIN BAR + */ + if ((ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pt_size, 0x1000, + 0, &priv->pramin_pt))) + return ret; + + for (i = 0, v = c_offset; i < pt_size; i+=8, v+=0x1000) { + if (v < (c_offset + c_size)) + BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v | 1); + else + BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, 0x00000009); + BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000); + } + + BAR0_WI32(chan->vm_pd, 0x00, priv->pramin_pt->instance | 0x63); + BAR0_WI32(chan->vm_pd, 0x04, 0x00000000); + + /* DMA object for PRAMIN BAR */ + if ((ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0, 6*4, 16, 0, + &priv->pramin_bar))) + return ret; + BAR0_WI32(priv->pramin_bar->gpuobj, 0x00, 0x7fc00000); + BAR0_WI32(priv->pramin_bar->gpuobj, 0x04, dev_priv->ramin->size - 1); + BAR0_WI32(priv->pramin_bar->gpuobj, 0x08, 0x00000000); + BAR0_WI32(priv->pramin_bar->gpuobj, 0x0c, 0x00000000); + BAR0_WI32(priv->pramin_bar->gpuobj, 0x10, 0x00000000); + BAR0_WI32(priv->pramin_bar->gpuobj, 0x14, 0x00000000); + + /* Poke the relevant regs, and pray it works :) */ + NV_WRITE(NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12)); + NV_WRITE(NV50_PUNK_UNK1710, 0); + NV_WRITE(NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12) | + NV50_PUNK_BAR_CFG_BASE_VALID); + NV_WRITE(NV50_PUNK_BAR1_CTXDMA, 0); + NV_WRITE(NV50_PUNK_BAR3_CTXDMA, (priv->pramin_bar->instance >> 4) | + NV50_PUNK_BAR3_CTXDMA_VALID); + + /* Assume that praying isn't enough, check that we can re-read the + * entire fake channel back from the PRAMIN BAR */ + for (i = 0; i < c_size; i+=4) { + if (NV_READ(NV_RAMIN + i) != NV_RI32(i)) { + DRM_ERROR("Error reading back PRAMIN at 0x%08x\n", i); + return -EINVAL; + } + } + + /* Global PRAMIN heap */ + if (nouveau_mem_init_heap(&dev_priv->ramin_heap, + c_size, dev_priv->ramin->size - c_size)) { + dev_priv->ramin_heap = NULL; + DRM_ERROR("Failed to init RAMIN heap\n"); + } + + /*XXX: incorrect, but needed to make hash func "work" */ + dev_priv->ramht_offset = 0x10000; + dev_priv->ramht_bits = 9; + dev_priv->ramht_size = (1 << dev_priv->ramht_bits); + return 0; +} + +void +nv50_instmem_takedown(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv; + struct nouveau_channel *chan = dev_priv->fifos[0]; + int i; + + DRM_DEBUG("\n"); + + if (!priv) + return; + + /* Restore state from before init */ + for (i = 0x1700; i <= 0x1710; i+=4) + NV_WRITE(i, priv->save1700[(i-0x1700)/4]); + + nouveau_gpuobj_ref_del(dev, &priv->pramin_bar); + nouveau_gpuobj_ref_del(dev, &priv->pramin_pt); + + /* Destroy dummy channel */ + if (chan) { + nouveau_gpuobj_del(dev, &chan->vm_pd); + nouveau_gpuobj_ref_del(dev, &chan->ramfc); + nouveau_gpuobj_ref_del(dev, &chan->ramin); + nouveau_mem_takedown(&chan->ramin_heap); + + dev_priv->fifos[0] = dev_priv->fifos[127] = NULL; + drm_free(chan, sizeof(*chan), DRM_MEM_DRIVER); + } + + dev_priv->Engine.instmem.priv = NULL; + drm_free(priv, sizeof(*priv), DRM_MEM_DRIVER); +} + +int +nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz) +{ + if (gpuobj->im_backing) + return -EINVAL; + + *sz = (*sz + (NV50_INSTMEM_PAGE_SIZE-1)) & ~(NV50_INSTMEM_PAGE_SIZE-1); + if (*sz == 0) + return -EINVAL; + + gpuobj->im_backing = nouveau_mem_alloc(dev, NV50_INSTMEM_PAGE_SIZE, + *sz, NOUVEAU_MEM_FB | + NOUVEAU_MEM_NOVM, + (struct drm_file *)-2); + if (!gpuobj->im_backing) { + DRM_ERROR("Couldn't allocate vram to back PRAMIN pages\n"); + return -ENOMEM; + } + + return 0; +} + +void +nv50_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + if (gpuobj && gpuobj->im_backing) { + if (gpuobj->im_bound) + dev_priv->Engine.instmem.unbind(dev, gpuobj); + nouveau_mem_free(dev, gpuobj->im_backing); + gpuobj->im_backing = NULL; + } +} + +int +nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv; + uint32_t pte, pte_end, vram; + + if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound) + return -EINVAL; + + DRM_DEBUG("st=0x%0llx sz=0x%0llx\n", + gpuobj->im_pramin->start, gpuobj->im_pramin->size); + + pte = (gpuobj->im_pramin->start >> 12) << 3; + pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte; + vram = gpuobj->im_backing->start; + + DRM_DEBUG("pramin=0x%llx, pte=%d, pte_end=%d\n", + gpuobj->im_pramin->start, pte, pte_end); + DRM_DEBUG("first vram page: 0x%llx\n", + gpuobj->im_backing->start); + + while (pte < pte_end) { + INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 0)/4, vram | 1); + INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 4)/4, 0x00000000); + + pte += 8; + vram += NV50_INSTMEM_PAGE_SIZE; + } + + gpuobj->im_bound = 1; + return 0; +} + +int +nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + nv50_instmem_priv *priv = dev_priv->Engine.instmem.priv; + uint32_t pte, pte_end; + + if (gpuobj->im_bound == 0) + return -EINVAL; + + pte = (gpuobj->im_pramin->start >> 12) << 3; + pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte; + while (pte < pte_end) { + INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 0)/4, 0x00000009); + INSTANCE_WR(priv->pramin_pt->gpuobj, (pte + 4)/4, 0x00000000); + pte += 8; + } + + gpuobj->im_bound = 0; + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r128_cce.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r128_cce.c --- libdrm-2.3.0.16/shared-core/r128_cce.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/r128_cce.c 2009-04-20 07:00:29.000000000 +0100 @@ -324,7 +324,7 @@ ring_start = dev_priv->cce_ring->offset - dev->agp->base; else #endif - ring_start = dev_priv->cce_ring->offset - + ring_start = dev_priv->cce_ring->offset - (unsigned long)dev->sg->virtual; R128_WRITE(R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET); @@ -558,6 +558,7 @@ #if __OS_HAS_AGP if (dev_priv->is_pci) { #endif + dev_priv->gart_info.table_mask = DMA_BIT_MASK(32); dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN; dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE; dev_priv->gart_info.addr = NULL; @@ -649,7 +650,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) { - DRM_DEBUG("%s while CCE running\n", __FUNCTION__); + DRM_DEBUG("while CCE running\n"); return 0; } @@ -708,7 +709,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_DEBUG("%s called before init done\n", __FUNCTION__); + DRM_DEBUG("called before init done\n"); return -EINVAL; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r128_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r128_drv.h --- libdrm-2.3.0.16/shared-core/r128_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/r128_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -97,6 +97,8 @@ u32 crtc_offset; u32 crtc_offset_cntl; + atomic_t vbl_received; + u32 color_fmt; unsigned int front_offset; unsigned int front_pitch; @@ -118,7 +120,7 @@ drm_local_map_t *cce_ring; drm_local_map_t *ring_rptr; drm_local_map_t *agp_textures; - struct ati_pcigart_info gart_info; + struct drm_ati_pcigart_info gart_info; } drm_r128_private_t; typedef struct drm_r128_buf_priv { @@ -149,11 +151,12 @@ extern int r128_do_cce_idle(drm_r128_private_t * dev_priv); extern int r128_do_cleanup_cce(struct drm_device * dev); -extern int r128_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); - +extern int r128_enable_vblank(struct drm_device *dev, int crtc); +extern void r128_disable_vblank(struct drm_device *dev, int crtc); +extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc); extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS); extern void r128_driver_irq_preinstall(struct drm_device * dev); -extern void r128_driver_irq_postinstall(struct drm_device * dev); +extern int r128_driver_irq_postinstall(struct drm_device * dev); extern void r128_driver_irq_uninstall(struct drm_device * dev); extern void r128_driver_lastclose(struct drm_device * dev); extern void r128_driver_preclose(struct drm_device * dev, @@ -462,8 +465,7 @@ #define BEGIN_RING( n ) do { \ if ( R128_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - (n), __FUNCTION__ ); \ + DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ } \ if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ COMMIT_RING(); \ @@ -493,7 +495,7 @@ write * sizeof(u32) ); \ } \ if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \ - DRM_ERROR( \ + DRM_ERROR( \ "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ ((dev_priv->ring.tail + _nr) & tail_mask), \ write, __LINE__); \ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r128_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r128_irq.c --- libdrm-2.3.0.16/shared-core/r128_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/r128_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -35,6 +35,16 @@ #include "r128_drm.h" #include "r128_drv.h" +u32 r128_get_vblank_counter(struct drm_device *dev, int crtc) +{ + const drm_r128_private_t *dev_priv = dev->dev_private; + + if (crtc != 0) + return 0; + + return atomic_read(&dev_priv->vbl_received); +} + irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS) { struct drm_device *dev = (struct drm_device *) arg; @@ -46,30 +56,38 @@ /* VBLANK interrupt */ if (status & R128_CRTC_VBLANK_INT) { R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK); - atomic_inc(&dev->vbl_received); - DRM_WAKEUP(&dev->vbl_queue); - drm_vbl_send_signals(dev); + atomic_inc(&dev_priv->vbl_received); + drm_handle_vblank(dev, 0); return IRQ_HANDLED; } return IRQ_NONE; } -int r128_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence) +int r128_enable_vblank(struct drm_device *dev, int crtc) { - unsigned int cur_vblank; - int ret = 0; + drm_r128_private_t *dev_priv = dev->dev_private; - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(&dev->vbl_received)) - - *sequence) <= (1 << 23))); + if (crtc != 0) { + DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc); + return -EINVAL; + } - *sequence = cur_vblank; + R128_WRITE(R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN); + return 0; +} + +void r128_disable_vblank(struct drm_device *dev, int crtc) +{ + if (crtc != 0) + DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc); - return ret; + /* + * FIXME: implement proper interrupt disable by using the vblank + * counter register (if available) + * + * R128_WRITE(R128_GEN_INT_CNTL, + * R128_READ(R128_GEN_INT_CNTL) & ~R128_CRTC_VBLANK_INT_EN); + */ } void r128_driver_irq_preinstall(struct drm_device * dev) @@ -82,12 +100,9 @@ R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK); } -void r128_driver_irq_postinstall(struct drm_device * dev) +int r128_driver_irq_postinstall(struct drm_device * dev) { - drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; - - /* Turn on VBL interrupt */ - R128_WRITE(R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN); + return drm_vblank_init(dev, 1); } void r128_driver_irq_uninstall(struct drm_device * dev) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r128_state.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r128_state.c --- libdrm-2.3.0.16/shared-core/r128_state.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/r128_state.c 2009-04-20 07:00:29.000000000 +0100 @@ -42,7 +42,7 @@ { u32 aux_sc_cntl = 0x00000000; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING((count < 3 ? count : 3) * 5 + 2); @@ -85,7 +85,7 @@ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_r128_context_regs_t *ctx = &sarea_priv->context_state; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(2); @@ -100,7 +100,7 @@ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_r128_context_regs_t *ctx = &sarea_priv->context_state; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(13); @@ -126,7 +126,7 @@ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_r128_context_regs_t *ctx = &sarea_priv->context_state; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(3); @@ -142,7 +142,7 @@ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_r128_context_regs_t *ctx = &sarea_priv->context_state; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(5); @@ -161,7 +161,7 @@ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_r128_context_regs_t *ctx = &sarea_priv->context_state; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(2); @@ -178,7 +178,7 @@ drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0]; int i; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(7 + R128_MAX_TEXTURE_LEVELS); @@ -204,7 +204,7 @@ drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; int i; RING_LOCALS; - DRM_DEBUG(" %s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(5 + R128_MAX_TEXTURE_LEVELS); @@ -226,7 +226,7 @@ drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; unsigned int dirty = sarea_priv->dirty; - DRM_DEBUG("%s: dirty=0x%08x\n", __FUNCTION__, dirty); + DRM_DEBUG("dirty=0x%08x\n", dirty); if (dirty & R128_UPLOAD_CORE) { r128_emit_core(dev_priv); @@ -362,7 +362,7 @@ unsigned int flags = clear->flags; int i; RING_LOCALS; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); if (dev_priv->page_flipping && dev_priv->current_page == 1) { unsigned int tmp = flags; @@ -466,7 +466,7 @@ struct drm_clip_rect *pbox = sarea_priv->boxes; int i; RING_LOCALS; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); #if R128_PERFORMANCE_BOXES /* Do some trivial performance monitoring... @@ -528,8 +528,7 @@ { drm_r128_private_t *dev_priv = dev->dev_private; RING_LOCALS; - DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, + DRM_DEBUG("page=%d pfCurrentPage=%d\n", dev_priv->current_page, dev_priv->sarea_priv->pfCurrentPage); #if R128_PERFORMANCE_BOXES @@ -1156,7 +1155,7 @@ int count, *x, *y; int i, xbuf_size, ybuf_size; RING_LOCALS; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); count = depth->n; if (count > 4096 || count <= 0) @@ -1226,7 +1225,7 @@ drm_r128_private_t *dev_priv = dev->dev_private; int i; RING_LOCALS; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); BEGIN_RING(33); @@ -1309,7 +1308,7 @@ static int r128_cce_flip(struct drm_device *dev, void *data, struct drm_file *file_priv) { drm_r128_private_t *dev_priv = dev->dev_private; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1328,7 +1327,7 @@ { drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); @@ -1356,7 +1355,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -1412,7 +1411,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -1557,11 +1556,11 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } - DRM_DEBUG("indirect: idx=%d s=%d e=%d d=%d\n", + DRM_DEBUG("idx=%d s=%d e=%d d=%d\n", indirect->idx, indirect->start, indirect->end, indirect->discard); @@ -1622,7 +1621,7 @@ int value; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r300_cmdbuf.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r300_cmdbuf.c --- libdrm-2.3.0.16/shared-core/r300_cmdbuf.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/r300_cmdbuf.c 2009-04-20 07:00:29.000000000 +0100 @@ -77,23 +77,31 @@ return -EFAULT; } - box.x1 = - (box.x1 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; - box.y1 = - (box.y1 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; - box.x2 = - (box.x2 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; - box.y2 = - (box.y2 + - R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { + box.x1 = (box.x1) & + R300_CLIPRECT_MASK; + box.y1 = (box.y1) & + R300_CLIPRECT_MASK; + box.x2 = (box.x2) & + R300_CLIPRECT_MASK; + box.y2 = (box.y2) & + R300_CLIPRECT_MASK; + } else { + box.x1 = (box.x1 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + box.y1 = (box.y1 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + box.x2 = (box.x2 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + box.y2 = (box.y2 + R300_CLIPRECT_OFFSET) & + R300_CLIPRECT_MASK; + } OUT_RING((box.x1 << R300_CLIPRECT_X_SHIFT) | (box.y1 << R300_CLIPRECT_Y_SHIFT)); OUT_RING((box.x2 << R300_CLIPRECT_X_SHIFT) | (box.y2 << R300_CLIPRECT_Y_SHIFT)); + } OUT_RING_REG(R300_RE_CLIPRECT_CNTL, r300_cliprect_cntl[nr - 1]); @@ -133,9 +141,11 @@ static u8 r300_reg_flags[0x10000 >> 2]; -void r300_init_reg_flags(void) +void r300_init_reg_flags(struct drm_device *dev) { int i; + drm_radeon_private_t *dev_priv = dev->dev_private; + memset(r300_reg_flags, 0, 0x10000 >> 2); #define ADD_RANGE_MARK(reg, count,mark) \ for(i=((reg)>>2);i<((reg)>>2)+(count);i++)\ @@ -179,18 +189,12 @@ ADD_RANGE(R300_RE_CULL_CNTL, 1); ADD_RANGE(0x42C0, 2); ADD_RANGE(R300_RS_CNTL_0, 2); - ADD_RANGE(R300_RS_INTERP_0, 8); - ADD_RANGE(R300_RS_ROUTE_0, 8); + ADD_RANGE(0x43A4, 2); ADD_RANGE(0x43E8, 1); - ADD_RANGE(R300_PFS_CNTL_0, 3); - ADD_RANGE(R300_PFS_NODE_0, 4); - ADD_RANGE(R300_PFS_TEXI_0, 64); + ADD_RANGE(0x46A4, 5); - ADD_RANGE(R300_PFS_INSTR0_0, 64); - ADD_RANGE(R300_PFS_INSTR1_0, 64); - ADD_RANGE(R300_PFS_INSTR2_0, 64); - ADD_RANGE(R300_PFS_INSTR3_0, 64); + ADD_RANGE(R300_RE_FOG_STATE, 1); ADD_RANGE(R300_FOG_COLOR_R, 3); ADD_RANGE(R300_PP_ALPHA_TEST, 2); @@ -230,6 +234,27 @@ ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8); ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { + ADD_RANGE(R500_VAP_INDEX_OFFSET, 1); + ADD_RANGE(R500_US_CONFIG, 2); + ADD_RANGE(R500_US_CODE_ADDR, 3); + ADD_RANGE(R500_US_FC_CTRL, 1); + ADD_RANGE(R500_RS_IP_0, 16); + ADD_RANGE(R500_RS_INST_0, 16); + ADD_RANGE(R500_RB3D_COLOR_CLEAR_VALUE_AR, 2); + ADD_RANGE(R500_RB3D_CONSTANT_COLOR_AR, 2); + } else { + ADD_RANGE(R300_PFS_CNTL_0, 3); + ADD_RANGE(R300_PFS_NODE_0, 4); + ADD_RANGE(R300_PFS_TEXI_0, 64); + ADD_RANGE(R300_PFS_INSTR0_0, 64); + ADD_RANGE(R300_PFS_INSTR1_0, 64); + ADD_RANGE(R300_PFS_INSTR2_0, 64); + ADD_RANGE(R300_PFS_INSTR3_0, 64); + ADD_RANGE(R300_RS_INTERP_0, 8); + ADD_RANGE(R300_RS_ROUTE_0, 8); + + } } static __inline__ int r300_check_range(unsigned reg, int count) @@ -313,6 +338,7 @@ sz = header.packet0.count; reg = (header.packet0.reghi << 8) | header.packet0.reglo; + DRM_DEBUG("R300_CMD_PACKET0: reg %04x, sz %d\n", reg, sz); if (!sz) return 0; @@ -486,7 +512,7 @@ if (cmd[0] & 0x8000) { u32 offset; - if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL + if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL | RADEON_GMC_DST_PITCH_OFFSET_CNTL)) { offset = cmd[2] << 10; ret = !radeon_check_offset(dev_priv, offset); @@ -504,7 +530,7 @@ DRM_ERROR("Invalid bitblt second offset is %08X\n", offset); return -EINVAL; } - + } } @@ -716,6 +742,47 @@ buf->used = 0; } +static void r300_cmd_wait(drm_radeon_private_t * dev_priv, + drm_r300_cmd_header_t header) +{ + u32 wait_until; + RING_LOCALS; + + if (!header.wait.flags) + return; + + wait_until = 0; + + switch(header.wait.flags) { + case R300_WAIT_2D: + wait_until = RADEON_WAIT_2D_IDLE; + break; + case R300_WAIT_3D: + wait_until = RADEON_WAIT_3D_IDLE; + break; + case R300_NEW_WAIT_2D_3D: + wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_3D_IDLE; + break; + case R300_NEW_WAIT_2D_2D_CLEAN: + wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_2D_IDLECLEAN; + break; + case R300_NEW_WAIT_3D_3D_CLEAN: + wait_until = RADEON_WAIT_3D_IDLE|RADEON_WAIT_3D_IDLECLEAN; + break; + case R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN: + wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_2D_IDLECLEAN; + wait_until |= RADEON_WAIT_3D_IDLE|RADEON_WAIT_3D_IDLECLEAN; + break; + default: + return; + } + + BEGIN_RING(2); + OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0)); + OUT_RING(wait_until); + ADVANCE_RING(); +} + static int r300_scratch(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) @@ -723,56 +790,104 @@ u32 *ref_age_base; u32 i, buf_idx, h_pending; RING_LOCALS; - + if (cmdbuf->bufsz < sizeof(uint64_t) + header.scratch.n_bufs * sizeof(buf_idx) ) { return -EINVAL; } - + if (header.scratch.reg >= 5) { return -EINVAL; } - + dev_priv->scratch_ages[header.scratch.reg] ++; - + ref_age_base = (u32 *)(unsigned long)*((uint64_t *)cmdbuf->buf); - + cmdbuf->buf += sizeof(uint64_t); cmdbuf->bufsz -= sizeof(uint64_t); - + for (i=0; i < header.scratch.n_bufs; i++) { buf_idx = *(u32 *)cmdbuf->buf; buf_idx *= 2; /* 8 bytes per buf */ - + if (DRM_COPY_TO_USER(ref_age_base + buf_idx, &dev_priv->scratch_ages[header.scratch.reg], sizeof(u32))) { return -EINVAL; } - + if (DRM_COPY_FROM_USER(&h_pending, ref_age_base + buf_idx + 1, sizeof(u32))) { return -EINVAL; } - + if (h_pending == 0) { return -EINVAL; } - + h_pending--; - + if (DRM_COPY_TO_USER(ref_age_base + buf_idx + 1, &h_pending, sizeof(u32))) { return -EINVAL; } - + cmdbuf->buf += sizeof(buf_idx); cmdbuf->bufsz -= sizeof(buf_idx); } - + BEGIN_RING(2); OUT_RING( CP_PACKET0( RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0 ) ); OUT_RING( dev_priv->scratch_ages[header.scratch.reg] ); ADVANCE_RING(); - + + return 0; +} + +/** + * Uploads user-supplied vertex program instructions or parameters onto + * the graphics card. + * Called by r300_do_cp_cmdbuf. + */ +static __inline__ int r300_emit_r500fp(drm_radeon_private_t *dev_priv, + drm_radeon_kcmd_buffer_t *cmdbuf, + drm_r300_cmd_header_t header) +{ + int sz; + int addr; + int type; + int clamp; + int stride; + RING_LOCALS; + + sz = header.r500fp.count; + /* address is 9 bits 0 - 8, bit 1 of flags is part of address */ + addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo; + + type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE); + clamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP); + + addr |= (type << 16); + addr |= (clamp << 17); + + stride = type ? 4 : 6; + + DRM_DEBUG("r500fp %d %d type: %d\n", sz, addr, type); + if (!sz) + return 0; + if (sz * stride * 4 > cmdbuf->bufsz) + return -EINVAL; + + BEGIN_RING(3 + sz * stride); + OUT_RING_REG(R500_GA_US_VECTOR_INDEX, addr); + OUT_RING(CP_PACKET0_TABLE(R500_GA_US_VECTOR_DATA, sz * stride - 1)); + OUT_RING_TABLE((int *)cmdbuf->buf, sz * stride); + + ADVANCE_RING(); + + cmdbuf->buf += sz * stride * 4; + cmdbuf->bufsz -= sz * stride * 4; + return 0; } + /** * Parses and validates a user-supplied command buffer and emits appropriate * commands on the DMA ring buffer. @@ -811,7 +926,6 @@ switch (header.header.cmd_type) { case R300_CMD_PACKET0: - DRM_DEBUG("R300_CMD_PACKET0\n"); ret = r300_emit_packet0(dev_priv, cmdbuf, header); if (ret) { DRM_ERROR("r300_emit_packet0 failed\n"); @@ -895,19 +1009,8 @@ break; case R300_CMD_WAIT: - /* simple enough, we can do it here */ DRM_DEBUG("R300_CMD_WAIT\n"); - if (header.wait.flags == 0) - break; /* nothing to do */ - - { - RING_LOCALS; - - BEGIN_RING(2); - OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0)); - OUT_RING((header.wait.flags & 0xf) << 14); - ADVANCE_RING(); - } + r300_cmd_wait(dev_priv, header); break; case R300_CMD_SCRATCH: @@ -918,7 +1021,20 @@ goto cleanup; } break; - + + case R300_CMD_R500FP: + if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV515) { + DRM_ERROR("Calling r500 command on r300 card\n"); + ret = -EINVAL; + goto cleanup; + } + DRM_DEBUG("R300_CMD_R500FP\n"); + ret = r300_emit_r500fp(dev_priv, cmdbuf, header); + if (ret) { + DRM_ERROR("r300_emit_r500fp failed\n"); + goto cleanup; + } + break; default: DRM_ERROR("bad cmd_type %i at %p\n", header.header.cmd_type, diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r300_reg.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r300_reg.h --- libdrm-2.3.0.16/shared-core/r300_reg.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/r300_reg.h 2008-07-01 08:51:40.000000000 +0100 @@ -1349,7 +1349,7 @@ /* Guess by Vladimir. * Set to 0A before 3D operations, set to 02 afterwards. */ -#define R300_RB3D_DSTCACHE_CTLSTAT 0x4E4C +/*#define R300_RB3D_DSTCACHE_CTLSTAT 0x4E4C*/ # define R300_RB3D_DSTCACHE_UNKNOWN_02 0x00000002 # define R300_RB3D_DSTCACHE_UNKNOWN_0A 0x0000000A @@ -1626,6 +1626,22 @@ */ #define R300_CP_CMD_BITBLT_MULTI 0xC0009B00 +#define R500_VAP_INDEX_OFFSET 0x208c + +#define R500_GA_US_VECTOR_INDEX 0x4250 +#define R500_GA_US_VECTOR_DATA 0x4254 + +#define R500_RS_IP_0 0x4074 +#define R500_RS_INST_0 0x4320 + +#define R500_US_CONFIG 0x4600 + +#define R500_US_FC_CTRL 0x4624 +#define R500_US_CODE_ADDR 0x4630 + +#define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0 +#define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8 + #endif /* _R300_REG_H */ /* *INDENT-ON* */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/r600_microcode.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/r600_microcode.h --- libdrm-2.3.0.16/shared-core/r600_microcode.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/r600_microcode.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,14275 @@ +/* + * Copyright 2007 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/* this file is not used we just have it as a placeholder for future R600 + work */ +#if 0 +static const int ME_JUMP_TABLE_START = 1764; +static const int ME_JUMP_TABLE_END = 1792; + +static const u32 R600_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x614 }, + { 0x00000000, 0x00600000, 0x5b2 }, + { 0x00000000, 0x00600000, 0x5c5 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000020, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000021, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x0000001d, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x0000001d, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000030, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x00000010, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000030, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000032, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x0000002d, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x080 }, + { 0x0000002e, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x081 }, + { 0x00000000, 0x00400000, 0x087 }, + { 0x0000002d, 0x00203623, 0x000 }, + { 0x0000002e, 0x00203624, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x087 }, + { 0x00000000, 0x00600000, 0x5ed }, + { 0x00000000, 0x00600000, 0x5e1 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08a }, + { 0x00000018, 0xc0403620, 0x090 }, + { 0x00000000, 0x2ee00000, 0x08e }, + { 0x00000000, 0x2ce00000, 0x08d }, + { 0x00000002, 0x00400e2d, 0x08f }, + { 0x00000003, 0x00400e2d, 0x08f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000018, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x095 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x09d }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09b }, + { 0x00000000, 0x2ce00000, 0x09a }, + { 0x00000002, 0x00400e2d, 0x09c }, + { 0x00000003, 0x00400e2d, 0x09c }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a4 }, + { 0x0000001c, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x0000001b, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0db }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x28c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x128 }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0c5 }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0d6 }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0d4 }, + { 0x00000013, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0cf }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0ce }, + { 0x00003f00, 0x00400c11, 0x0d0 }, + { 0x00001f00, 0x00400c11, 0x0d0 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0d6 }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000a202, 0x00204411, 0x000 }, + { 0x00ff0000, 0x00284a22, 0x000 }, + { 0x00000030, 0x00200e2d, 0x000 }, + { 0x0000002e, 0x0020122d, 0x000 }, + { 0x00000000, 0x002f0083, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e3 }, + { 0x00000000, 0x00600000, 0x5e7 }, + { 0x00000000, 0x00400000, 0x0e4 }, + { 0x00000000, 0x00600000, 0x5ea }, + { 0x00000007, 0x0020222d, 0x000 }, + { 0x00000005, 0x00220e22, 0x000 }, + { 0x00100000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x000000ef, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x0000001d, 0x00200e2d, 0x000 }, + { 0x00000003, 0x00210223, 0x000 }, + { 0x00000000, 0x14e00000, 0x0f1 }, + { 0x0000000b, 0x00210228, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f1 }, + { 0x00000400, 0x00292228, 0x000 }, + { 0x0000001a, 0x00203628, 0x000 }, + { 0x0000001c, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f6 }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000001e, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x104 }, + { 0x0000a30f, 0x00204411, 0x000 }, + { 0x00000013, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0fd }, + { 0xffffffff, 0x00404811, 0x104 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x100 }, + { 0x0000ffff, 0x00404811, 0x104 }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x103 }, + { 0x000000ff, 0x00404811, 0x104 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0002c400, 0x00204411, 0x000 }, + { 0x0000001f, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x10b }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x00000019, 0x00203623, 0x000 }, + { 0x00000018, 0x40224a20, 0x000 }, + { 0x00000010, 0xc0424a20, 0x10d }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000019, 0x00203623, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000000a, 0x00201011, 0x000 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x114 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00531224, 0x110 }, + { 0xffbfffff, 0x00283a2e, 0x000 }, + { 0x0000001b, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x127 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0x00000018, 0x00220e30, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e00e, 0x00204411, 0x000 }, + { 0x07f8ff08, 0x00204811, 0x000 }, + { 0x00000000, 0x00294a23, 0x000 }, + { 0x00000024, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x00800000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204806, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x614 }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x00000004, 0x00404c11, 0x12e }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00000000, 0x00600000, 0x151 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2a4 }, + { 0x0001a1fd, 0x00604411, 0x2c9 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x138 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x151 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2a4 }, + { 0x0001a1fd, 0x00604411, 0x2c9 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x149 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x17c }, + { 0x00000000, 0x00600000, 0x18d }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x189 }, + { 0x00000000, 0x00600000, 0x2a4 }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x28c }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x173 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x16f }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x184 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000013, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2e4 }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x165 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x2fe }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x181 }, + { 0x0000001b, 0xc0203620, 0x000 }, + { 0x0000001c, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x19f }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x188 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000032, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x00000011, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x128 }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x0000001b, 0x00600e2d, 0x1aa }, + { 0x0000001c, 0x00600e2d, 0x1aa }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x0000001d, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1a6 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000020, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000019, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1cd }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1c9 }, + { 0x00000000, 0x00600000, 0x1d6 }, + { 0x00000001, 0x00531e27, 0x1c5 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1be }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1d6 }, + { 0x00000001, 0x00531e27, 0x1d2 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2a4 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e5 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x1f2 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x1f2 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00384a21, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000ffff, 0x40281220, 0x000 }, + { 0x00000010, 0xc0211a20, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211620, 0x000 }, + { 0x00000000, 0x00741465, 0x2a4 }, + { 0x0001a1fd, 0x00604411, 0x2c9 }, + { 0x00000001, 0x00330621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0cc00000, 0x206 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x1ff }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x5c5 }, + { 0x00000000, 0x0040040f, 0x200 }, + { 0x00000000, 0x00600000, 0x5b2 }, + { 0x00000000, 0x00600000, 0x5c5 }, + { 0x00000210, 0x00600411, 0x2fe }, + { 0x00000000, 0x00600000, 0x18d }, + { 0x00000000, 0x00600000, 0x189 }, + { 0x00000000, 0x00600000, 0x2a4 }, + { 0x00000000, 0x00600000, 0x28c }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x21f }, + { 0x00000000, 0xc0404800, 0x21c }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x00600411, 0x2e4 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x5b2 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000018, 0x40210a20, 0x000 }, + { 0x00000003, 0x002f0222, 0x000 }, + { 0x00000000, 0x0ae00000, 0x235 }, + { 0x0000001a, 0x0020222d, 0x000 }, + { 0x00080101, 0x00292228, 0x000 }, + { 0x0000001a, 0x00203628, 0x000 }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x23a }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000010, 0x00600411, 0x2fe }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00000000, 0x00600000, 0x265 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000001, 0x00211e27, 0x000 }, + { 0x00000000, 0x14e00000, 0x253 }, + { 0x00000018, 0x00201e2d, 0x000 }, + { 0x0000ffff, 0x00281e27, 0x000 }, + { 0x00000000, 0x00341c27, 0x000 }, + { 0x00000000, 0x12c00000, 0x248 }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f00e5, 0x000 }, + { 0x00000000, 0x08c00000, 0x24b }, + { 0x00000000, 0x00201407, 0x000 }, + { 0x00000018, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00211e27, 0x000 }, + { 0x00000000, 0x00341c47, 0x000 }, + { 0x00000000, 0x12c00000, 0x250 }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f00e6, 0x000 }, + { 0x00000000, 0x08c00000, 0x253 }, + { 0x00000000, 0x00201807, 0x000 }, + { 0x00000000, 0x00600000, 0x2aa }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000000, 0x00342023, 0x000 }, + { 0x00000000, 0x12c00000, 0x25b }, + { 0x00000000, 0x00342044, 0x000 }, + { 0x00000000, 0x12c00000, 0x25a }, + { 0x00000016, 0x00404811, 0x25f }, + { 0x00000018, 0x00404811, 0x25f }, + { 0x00000000, 0x00342044, 0x000 }, + { 0x00000000, 0x12c00000, 0x25e }, + { 0x00000017, 0x00404811, 0x25f }, + { 0x00000019, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00604411, 0x2d2 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x23f }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000010, 0x40210620, 0x000 }, + { 0x0000ffff, 0xc0280a20, 0x000 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0881a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x614 }, + { 0x00000000, 0x00600000, 0x5b2 }, + { 0x00000000, 0xc0600000, 0x28c }, + { 0x00000005, 0x00200a2d, 0x000 }, + { 0x00000008, 0x00220a22, 0x000 }, + { 0x00000034, 0x00201a2d, 0x000 }, + { 0x00000024, 0x00201e2d, 0x000 }, + { 0x00007000, 0x00281e27, 0x000 }, + { 0x00000000, 0x00311ce6, 0x000 }, + { 0x00000033, 0x00201a2d, 0x000 }, + { 0x0000000c, 0x00221a26, 0x000 }, + { 0x00000000, 0x002f00e6, 0x000 }, + { 0x00000000, 0x06e00000, 0x27b }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000034, 0x00203623, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00691ce2, 0x128 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x286 }, + { 0x00000001, 0x00333e2f, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000024, 0x00403627, 0x000 }, + { 0x0000000c, 0xc0220a20, 0x000 }, + { 0x00000032, 0x00203622, 0x000 }, + { 0x00000031, 0xc0403620, 0x000 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000009, 0x00204811, 0x000 }, + { 0xa1000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000029, 0x00201e2d, 0x000 }, + { 0x00000000, 0x002c1ce3, 0x000 }, + { 0x00000029, 0x00203627, 0x000 }, + { 0x0000002a, 0x00201e2d, 0x000 }, + { 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0x00000001, 0x00204811, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x0000217a, 0xc0204411, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x5e1 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000016, 0x00604811, 0x35e }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x614 }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x5dc }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x0000001d, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x0000001d, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000016, 0x00604811, 0x35e }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0x00ffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x614 }, + { 0x00000000, 0x00200010, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x00000010, 0x00404c11, 0x5f9 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x00000025, 0x00200a2d, 0x000 }, + { 0x00000026, 0x00200e2d, 0x000 }, + { 0x00000027, 0x0020122d, 0x000 }, + { 0x00000028, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x612 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x00000027, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x614 }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x617 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x2fe }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x19f }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000029, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x0000002c, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000002a, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000002b, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x013304ef, 0x059b0239, 0x000 }, + { 0x01b00159, 0x0425059b, 0x000 }, + { 0x021201f6, 0x02390142, 0x000 }, + { 0x0210022e, 0x0289022a, 0x000 }, + { 0x03c2059b, 0x059b059b, 0x000 }, + { 0x05cd05ce, 0x0308059b, 0x000 }, + { 0x059b05a0, 0x03090329, 0x000 }, + { 0x0313026b, 0x032b031d, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b052c, 0x059b059b, 0x000 }, + { 0x03a5059b, 0x04a2032d, 0x000 }, + { 0x04810433, 0x0423059b, 0x000 }, + { 0x04bb04ed, 0x042704c8, 0x000 }, + { 0x043304f4, 0x033a0365, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x05b905a2, 0x000 }, + { 0x059b059b, 0x0007059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x03e303d8, 0x03f303f1, 0x000 }, + { 0x03f903f5, 0x03f703fb, 0x000 }, + { 0x04070403, 0x040f040b, 0x000 }, + { 0x04170413, 0x041f041b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x059b059b, 0x059b059b, 0x000 }, + { 0x00020600, 0x06190006, 0x000 }, +}; + +static const u32 R600_pfp_microcode[]={ +0xd40071, +0xd40072, +0xca0400, +0xa00000, +0x7e828b, +0x800003, +0xca0400, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d4, +0xd5c01e, +0xca0800, +0x80001b, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000d, +0xc41838, +0xe4013e, +0xd4001e, +0x80000d, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800054, +0xd40073, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800002, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800002, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b9, +0xd4c01e, +0xc6083e, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800002, +0x062001, +0xc6083e, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x80007a, +0xd42013, +0xc6083e, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008e, +0x000000, +0xc41432, +0xc6183e, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800002, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xd40073, +0xe4015e, +0xd4001e, +0x8001b9, +0x062001, +0x0a2001, +0xd60074, +0xc40836, +0xc61040, +0x988007, +0xcc3835, +0x95010f, +0xd4001f, +0xd46062, +0x800002, +0xd42062, +0xcc1433, +0x8401bc, +0xd40070, +0xd5401e, +0x800002, +0xee001e, +0xca0c00, +0xca1000, +0xd4c01a, +0x8401bc, +0xd5001a, +0xcc0443, +0x35101f, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b9, +0xd4006d, +0x344401, +0xcc0c44, +0x98403a, +0xcc2c46, +0x958004, +0xcc0445, +0x8001b9, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f3, +0xcc1003, +0x98801b, +0x04380c, +0x8400f3, +0xcc1003, +0x988017, +0x043808, +0x8400f3, +0xcc1003, +0x988013, +0x043804, +0x8400f3, +0xcc1003, +0x988014, +0xcc1047, +0x9a8009, +0xcc1448, +0x9840da, +0xd4006d, +0xcc1844, +0xd5001a, +0xd5401a, +0x8000cc, +0xd5801a, +0x96c0d3, +0xd4006d, +0x8001b9, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800002, +0xec007f, +0x9ac0ca, +0xd4006d, +0x8001b9, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b9, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809c, +0xd4006d, +0x98409a, +0xd4006e, +0xcc0847, +0xcc0c48, +0xcc1044, +0xd4801a, +0xd4c01a, +0x800104, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d8, +0xca0c00, +0xd4401e, +0x800002, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800002, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bc, +0x000000, +0x8401bc, +0xd7806f, +0x800002, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902af, +0x7c738b, +0x8401bc, +0xd7806f, +0x800002, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984296, +0x000000, +0x800164, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800002, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc1049, +0x990004, +0xd40071, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800002, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x95001f, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x7d8380, +0xd5806f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0x8001b9, +0xd60074, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800002, +0xee001e, +0x800002, +0xee001f, +0xd4001f, +0x800002, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010174, +0x02017b, +0x030090, +0x040080, +0x050005, +0x060040, +0x070033, +0x08012f, +0x090047, +0x0a0037, +0x1001b7, +0x1700a4, +0x22013d, +0x23014c, +0x2000b5, +0x240128, +0x27004e, +0x28006b, +0x2a0061, +0x2b0053, +0x2f0066, +0x320088, +0x340182, +0x3c0159, +0x3f0073, +0x41018f, +0x440131, +0x550176, +0x56017d, +0x60000c, +0x610035, +0x620039, +0x630039, +0x640039, +0x650039, +0x660039, +0x670039, +0x68003b, +0x690042, +0x6a0049, +0x6b0049, +0x6c0049, +0x6d0049, +0x6e0049, +0x6f0049, +0x7301b7, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +0x000007, +}; + +static const u32 RV610_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x668 }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0cb }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0dc }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0da }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d5 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d4 }, + { 0x00003f00, 0x00400c11, 0x0d6 }, + { 0x00001f00, 0x00400c11, 0x0d6 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0dc }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000a202, 0x00204411, 0x000 }, + { 0x00ff0000, 0x00280e22, 0x000 }, + { 0x00000080, 0x00294a23, 0x000 }, + { 0x00000027, 0x00200e2d, 0x000 }, + { 0x00000026, 0x0020122d, 0x000 }, + { 0x00000000, 0x002f0083, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0ea }, + { 0x00000000, 0x00600000, 0x662 }, + { 0x00000000, 0x00400000, 0x0eb }, + { 0x00000000, 0x00600000, 0x665 }, + { 0x00000007, 0x0020222d, 0x000 }, + { 0x00000005, 0x00220e22, 0x000 }, + { 0x00100000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x000000ef, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000003, 0x00210223, 0x000 }, + { 0x00000000, 0x14e00000, 0x0f8 }, + { 0x0000000b, 0x00210228, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f8 }, + { 0x00000400, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000001c, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x0fd }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000001e, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x10b }, + { 0x0000a30f, 0x00204411, 0x000 }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x104 }, + { 0xffffffff, 0x00404811, 0x10b }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x107 }, + { 0x0000ffff, 0x00404811, 0x10b }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x10a }, + { 0x000000ff, 0x00404811, 0x10b }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0002c400, 0x00204411, 0x000 }, + { 0x0000001f, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x112 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000018, 0x40224a20, 0x000 }, + { 0x00000010, 0xc0424a20, 0x114 }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000000a, 0x00201011, 0x000 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x11b }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00531224, 0x117 }, + { 0xffbfffff, 0x00283a2e, 0x000 }, + { 0x0000001b, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x12e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0x00000018, 0x00220e30, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e00e, 0x00204411, 0x000 }, + { 0x07f8ff08, 0x00204811, 0x000 }, + { 0x00000000, 0x00294a23, 0x000 }, + { 0x0000001c, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x00800000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204806, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000004, 0x00404c11, 0x135 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x000021f8, 0x00204411, 0x000 }, + { 0x0000001c, 0x00204811, 0x000 }, + { 0x000421f9, 0x00604411, 0x68d }, + { 0x00000011, 0x00210230, 0x000 }, + { 0x00000000, 0x14e00000, 0x13c }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x147 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x158 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x18f }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ae00000, 0x181 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x186 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x186 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x182 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x197 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000011, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00384a21, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000ffff, 0x40281220, 0x000 }, + { 0x00000010, 0xc0211a20, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211620, 0x000 }, + { 0x00000000, 0x00741465, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00000001, 0x00330621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0cc00000, 0x219 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x212 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000000, 0x0040040f, 0x213 }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00000000, 0x00600000, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ae00000, 0x232 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x236 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x236 }, + { 0x00000000, 0xc0404800, 0x233 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x00600411, 0x2fb }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000018, 0x40210a20, 0x000 }, + { 0x00000003, 0x002f0222, 0x000 }, + { 0x00000000, 0x0ae00000, 0x24c }, + { 0x00000014, 0x0020222d, 0x000 }, + { 0x00080101, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x251 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000010, 0x00600411, 0x315 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00000000, 0x00600000, 0x27c }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000001, 0x00211e27, 0x000 }, + { 0x00000000, 0x14e00000, 0x26a }, + { 0x00000012, 0x00201e2d, 0x000 }, + { 0x0000ffff, 0x00281e27, 0x000 }, + { 0x00000000, 0x00341c27, 0x000 }, + { 0x00000000, 0x12c00000, 0x25f }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f00e5, 0x000 }, + { 0x00000000, 0x08c00000, 0x262 }, + { 0x00000000, 0x00201407, 0x000 }, + { 0x00000012, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00211e27, 0x000 }, + { 0x00000000, 0x00341c47, 0x000 }, + { 0x00000000, 0x12c00000, 0x267 }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f00e6, 0x000 }, + { 0x00000000, 0x08c00000, 0x26a }, + { 0x00000000, 0x00201807, 0x000 }, + { 0x00000000, 0x00600000, 0x2c1 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000000, 0x00342023, 0x000 }, + { 0x00000000, 0x12c00000, 0x272 }, + { 0x00000000, 0x00342044, 0x000 }, + { 0x00000000, 0x12c00000, 0x271 }, + { 0x00000016, 0x00404811, 0x276 }, + { 0x00000018, 0x00404811, 0x276 }, + { 0x00000000, 0x00342044, 0x000 }, + { 0x00000000, 0x12c00000, 0x275 }, + { 0x00000017, 0x00404811, 0x276 }, + { 0x00000019, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00604411, 0x2e9 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x256 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000010, 0x40210620, 0x000 }, + { 0x0000ffff, 0xc0280a20, 0x000 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0881a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0xc0600000, 0x2a3 }, + { 0x00000005, 0x00200a2d, 0x000 }, + { 0x00000008, 0x00220a22, 0x000 }, + { 0x0000002b, 0x00201a2d, 0x000 }, + { 0x0000001c, 0x00201e2d, 0x000 }, + { 0x00007000, 0x00281e27, 0x000 }, + { 0x00000000, 0x00311ce6, 0x000 }, + { 0x0000002a, 0x00201a2d, 0x000 }, + { 0x0000000c, 0x00221a26, 0x000 }, + { 0x00000000, 0x002f00e6, 0x000 }, + { 0x00000000, 0x06e00000, 0x292 }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x0000002b, 0x00203623, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00691ce2, 0x12f }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 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0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5af }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5be }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c4 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c9 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5d0 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e3 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e3 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68d }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68d }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68d }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x605 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60e }, + { 0x0004a003, 0x00604411, 0x68d }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x0004a010, 0x00604411, 0x68d }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x0004a011, 0x00604411, 0x68d }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68d }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68d }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68d }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68d }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68d }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68d }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63d }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x63b }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x641 }, + { 0x00000000, 0x00600000, 0x5c9 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x641 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62d }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62d }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x656 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000010, 0x00404c11, 0x672 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x68b }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68d }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x690 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x692 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x695 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x01420502, 0x05c00250, 0x000 }, + { 0x01c30168, 0x043f05c0, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705c0, 0x05c005c0, 0x000 }, + { 0x0649064a, 0x031f05c0, 0x000 }, + { 0x05c005c5, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c00551, 0x05c005c0, 0x000 }, + { 0x03ba05c0, 0x04bb0344, 0x000 }, + { 0x049a0450, 0x043d05c0, 0x000 }, + { 0x04d005c0, 0x044104dd, 0x000 }, + { 0x04500507, 0x03510375, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x063f05c7, 0x000 }, + { 0x05c005c0, 0x000705c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05c005c0, 0x043805c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x00020679, 0x06970006, 0x000 }, +}; + +static const u32 RV610_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV620_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x668 }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0cb }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0dc }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0da }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d5 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d4 }, + { 0x00003f00, 0x00400c11, 0x0d6 }, + { 0x00001f00, 0x00400c11, 0x0d6 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0dc }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000a202, 0x00204411, 0x000 }, + { 0x00ff0000, 0x00280e22, 0x000 }, + { 0x00000080, 0x00294a23, 0x000 }, + { 0x00000027, 0x00200e2d, 0x000 }, + { 0x00000026, 0x0020122d, 0x000 }, + { 0x00000000, 0x002f0083, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0ea }, + { 0x00000000, 0x00600000, 0x662 }, + { 0x00000000, 0x00400000, 0x0eb }, + { 0x00000000, 0x00600000, 0x665 }, + { 0x00000007, 0x0020222d, 0x000 }, + { 0x00000005, 0x00220e22, 0x000 }, + { 0x00100000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x000000ef, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000003, 0x00210223, 0x000 }, + { 0x00000000, 0x14e00000, 0x0f8 }, + { 0x0000000b, 0x00210228, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f8 }, + { 0x00000400, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000001c, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x0fd }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000001e, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x10b }, + { 0x0000a30f, 0x00204411, 0x000 }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x104 }, + { 0xffffffff, 0x00404811, 0x10b }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x107 }, + { 0x0000ffff, 0x00404811, 0x10b }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x10a }, + { 0x000000ff, 0x00404811, 0x10b }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0002c400, 0x00204411, 0x000 }, + { 0x0000001f, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x112 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000018, 0x40224a20, 0x000 }, + { 0x00000010, 0xc0424a20, 0x114 }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000000a, 0x00201011, 0x000 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x11b }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00531224, 0x117 }, + { 0xffbfffff, 0x00283a2e, 0x000 }, + { 0x0000001b, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x12e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0x00000018, 0x00220e30, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e00e, 0x00204411, 0x000 }, + { 0x07f8ff08, 0x00204811, 0x000 }, + { 0x00000000, 0x00294a23, 0x000 }, + { 0x0000001c, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x00800000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204806, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000004, 0x00404c11, 0x135 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x000021f8, 0x00204411, 0x000 }, + { 0x0000001c, 0x00204811, 0x000 }, + { 0x000421f9, 0x00604411, 0x68d }, + { 0x00000011, 0x00210230, 0x000 }, + { 0x00000000, 0x14e00000, 0x13c }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x147 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x158 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x18f }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ae00000, 0x181 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x186 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x186 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x182 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x197 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000011, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00384a21, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000ffff, 0x40281220, 0x000 }, + { 0x00000010, 0xc0211a20, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211620, 0x000 }, + { 0x00000000, 0x00741465, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00000001, 0x00330621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0cc00000, 0x219 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x212 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000000, 0x0040040f, 0x213 }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x00000000, 0x00600000, 0x645 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00000000, 0x00600000, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ae00000, 0x232 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x236 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x236 }, + { 0x00000000, 0xc0404800, 0x233 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x00600411, 0x2fb }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x631 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000018, 0x40210a20, 0x000 }, + { 0x00000003, 0x002f0222, 0x000 }, + { 0x00000000, 0x0ae00000, 0x24c }, + { 0x00000014, 0x0020222d, 0x000 }, + { 0x00080101, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x251 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000010, 0x00600411, 0x315 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00000000, 0x00600000, 0x27c }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000001, 0x00211e27, 0x000 }, + { 0x00000000, 0x14e00000, 0x26a }, + { 0x00000012, 0x00201e2d, 0x000 }, + { 0x0000ffff, 0x00281e27, 0x000 }, + { 0x00000000, 0x00341c27, 0x000 }, + { 0x00000000, 0x12c00000, 0x25f }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f00e5, 0x000 }, + { 0x00000000, 0x08c00000, 0x262 }, + { 0x00000000, 0x00201407, 0x000 }, + { 0x00000012, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00211e27, 0x000 }, + { 0x00000000, 0x00341c47, 0x000 }, + { 0x00000000, 0x12c00000, 0x267 }, + { 0x00000000, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f00e6, 0x000 }, + { 0x00000000, 0x08c00000, 0x26a }, + { 0x00000000, 0x00201807, 0x000 }, + { 0x00000000, 0x00600000, 0x2c1 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000000, 0x00342023, 0x000 }, + { 0x00000000, 0x12c00000, 0x272 }, + { 0x00000000, 0x00342044, 0x000 }, + { 0x00000000, 0x12c00000, 0x271 }, + { 0x00000016, 0x00404811, 0x276 }, + { 0x00000018, 0x00404811, 0x276 }, + { 0x00000000, 0x00342044, 0x000 }, + { 0x00000000, 0x12c00000, 0x275 }, + { 0x00000017, 0x00404811, 0x276 }, + { 0x00000019, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00604411, 0x2e9 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x256 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000010, 0x40210620, 0x000 }, + { 0x0000ffff, 0xc0280a20, 0x000 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0881a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 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0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59e }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5b1 }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5af }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5be }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c4 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c9 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5d0 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e3 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e3 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68d }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68d }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68d }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68d }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68d }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68d }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62c }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x605 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60e }, + { 0x0004a003, 0x00604411, 0x68d }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x613 }, + { 0x0004a010, 0x00604411, 0x68d }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62b }, + { 0x0004a011, 0x00604411, 0x68d }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68d }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68d }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68d }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68d }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68d }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68d }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63d }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x63b }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68d }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x641 }, + { 0x00000000, 0x00600000, 0x5c9 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x641 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62d }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62d }, + { 0x00000000, 0x00600000, 0x65c }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x656 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68d }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x68c }, + { 0x00000010, 0x00404c11, 0x672 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x68b }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68d }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x690 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x692 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x695 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x01420502, 0x05c00250, 0x000 }, + { 0x01c30168, 0x043f05c0, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705c0, 0x05c005c0, 0x000 }, + { 0x0649064a, 0x031f05c0, 0x000 }, + { 0x05c005c5, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c00551, 0x05c005c0, 0x000 }, + { 0x03ba05c0, 0x04bb0344, 0x000 }, + { 0x049a0450, 0x043d05c0, 0x000 }, + { 0x04d005c0, 0x044104dd, 0x000 }, + { 0x04500507, 0x03510375, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x063f05c7, 0x000 }, + { 0x05c005c0, 0x000705c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05c005c0, 0x043805c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x05c005c0, 0x05c005c0, 0x000 }, + { 0x00020679, 0x06970006, 0x000 }, +}; + +static const u32 RV620_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV630_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00000000, 0x00600000, 0x62e }, + { 0x00000000, 0x00600000, 0x642 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x665 }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0cb }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0dc }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0da }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d5 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d4 }, + { 0x00003f00, 0x00400c11, 0x0d6 }, + { 0x00001f00, 0x00400c11, 0x0d6 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0dc }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000a202, 0x00204411, 0x000 }, + { 0x00ff0000, 0x00280e22, 0x000 }, + { 0x00000080, 0x00294a23, 0x000 }, + { 0x00000027, 0x00200e2d, 0x000 }, + { 0x00000026, 0x0020122d, 0x000 }, + { 0x00000000, 0x002f0083, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0ea }, + { 0x00000000, 0x00600000, 0x65f }, + { 0x00000000, 0x00400000, 0x0eb }, + { 0x00000000, 0x00600000, 0x662 }, + { 0x00000007, 0x0020222d, 0x000 }, + { 0x00000005, 0x00220e22, 0x000 }, + { 0x00100000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x000000ef, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000003, 0x00210223, 0x000 }, + { 0x00000000, 0x14e00000, 0x0f8 }, + { 0x0000000b, 0x00210228, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f8 }, + { 0x00000400, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000001c, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x0fd }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000001e, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x10b }, + { 0x0000a30f, 0x00204411, 0x000 }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x104 }, + { 0xffffffff, 0x00404811, 0x10b }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x107 }, + { 0x0000ffff, 0x00404811, 0x10b }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x10a }, + { 0x000000ff, 0x00404811, 0x10b }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0002c400, 0x00204411, 0x000 }, + { 0x0000001f, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x112 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000018, 0x40224a20, 0x000 }, + { 0x00000010, 0xc0424a20, 0x114 }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000000a, 0x00201011, 0x000 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x11b }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00531224, 0x117 }, + { 0xffbfffff, 0x00283a2e, 0x000 }, + { 0x0000001b, 0x00210222, 0x000 }, + { 0x00000000, 0x14c00000, 0x12e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0x00000018, 0x00220e30, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e00e, 0x00204411, 0x000 }, + { 0x07f8ff08, 0x00204811, 0x000 }, + { 0x00000000, 0x00294a23, 0x000 }, + { 0x0000001c, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x00800000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204806, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x689 }, + { 0x00000004, 0x00404c11, 0x135 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x000021f8, 0x00204411, 0x000 }, + { 0x0000001c, 0x00204811, 0x000 }, + { 0x000421f9, 0x00604411, 0x68a }, + { 0x00000011, 0x00210230, 0x000 }, + { 0x00000000, 0x14e00000, 0x13c }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x147 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x158 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x18f }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ae00000, 0x181 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x186 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x186 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x182 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x197 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000011, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x689 }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00384a21, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000ffff, 0x40281220, 0x000 }, + { 0x00000010, 0xc0211a20, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211620, 0x000 }, + { 0x00000000, 0x00741465, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00000001, 0x00330621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0cc00000, 0x219 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x212 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x642 }, + { 0x00000000, 0x0040040f, 0x213 }, + { 0x00000000, 0x00600000, 0x62e }, + { 0x00000000, 0x00600000, 0x642 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00000000, 0x00600000, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ae00000, 0x232 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x236 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x236 }, + { 0x00000000, 0xc0404800, 0x233 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x00600411, 0x2fb }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x62e }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000018, 0x40210a20, 0x000 }, + { 0x00000003, 0x002f0222, 0x000 }, + { 0x00000000, 0x0ae00000, 0x24c }, + { 0x00000014, 0x0020222d, 0x000 }, + { 0x00080101, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x251 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000010, 0x00600411, 0x315 }, + { 0x3f800000, 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0x0cc00000, 0x58c }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58a }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x59d }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59b }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5ae }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5ac }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5bb }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c1 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c6 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5cd }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e0 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e0 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68a }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68a }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x602 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60b }, + { 0x0004a003, 0x00604411, 0x68a }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x610 }, + { 0x0004a010, 0x00604411, 0x68a }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x0004a011, 0x00604411, 0x68a }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68a }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68a }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68a }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68a }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68a }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68a }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63a }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x638 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x63e }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x63e }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62a }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62a }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x653 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x689 }, + { 0x00000010, 0x00404c11, 0x66f }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x688 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68a }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x68d }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68f }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x692 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x014204ff, 0x05bd0250, 0x000 }, + { 0x01c30168, 0x043f05bd, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705bd, 0x05bd05bd, 0x000 }, + { 0x06460647, 0x031f05bd, 0x000 }, + { 0x05bd05c2, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd054e, 0x05bd05bd, 0x000 }, + { 0x03ba05bd, 0x04b80344, 0x000 }, + { 0x0497044d, 0x043d05bd, 0x000 }, + { 0x04cd05bd, 0x044104da, 0x000 }, + { 0x044d0504, 0x03510375, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x063c05c4, 0x000 }, + { 0x05bd05bd, 0x000705bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05bd05bd, 0x043805bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x00020676, 0x06940006, 0x000 }, +}; + +static const u32 RV630_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV635_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00000000, 0x00600000, 0x62e }, + { 0x00000000, 0x00600000, 0x642 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x665 }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0cb }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0dc }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0da }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d5 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d4 }, + { 0x00003f00, 0x00400c11, 0x0d6 }, + { 0x00001f00, 0x00400c11, 0x0d6 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0dc }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 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0x000 }, + { 0x00002258, 0x00300a24, 0x000 }, + { 0x00040000, 0x00694622, 0x68a }, + { 0x00000000, 0xc0201c10, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x56f }, + { 0x00000000, 0xc0201c00, 0x000 }, + { 0x00000000, 0xc0400000, 0x579 }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x577 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000216d, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0604800, 0x68f }, + { 0x00000000, 0x00401c10, 0x579 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x57b }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x58c }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x58a }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x59d }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x59b }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5ae }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5ac }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5bb }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5c1 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5c6 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5cd }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5e0 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5e0 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x68a }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x68a }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x68a }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x68a }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x68a }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x68a }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x629 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x602 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x60b }, + { 0x0004a003, 0x00604411, 0x68a }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x610 }, + { 0x0004a010, 0x00604411, 0x68a }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x628 }, + { 0x0004a011, 0x00604411, 0x68a }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x68a }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x68a }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x68a }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x68a }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x68a }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x68a }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x63a }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x638 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x68a }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x63e }, + { 0x00000000, 0x00600000, 0x5c6 }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x63e }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x62a }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x62a }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x653 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00008000, 0x00204811, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36e }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x68a }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x689 }, + { 0x00000010, 0x00404c11, 0x66f }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x688 }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68a }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x68d }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x68f }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x692 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x014204ff, 0x05bd0250, 0x000 }, + { 0x01c30168, 0x043f05bd, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03d705bd, 0x05bd05bd, 0x000 }, + { 0x06460647, 0x031f05bd, 0x000 }, + { 0x05bd05c2, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd054e, 0x05bd05bd, 0x000 }, + { 0x03ba05bd, 0x04b80344, 0x000 }, + { 0x0497044d, 0x043d05bd, 0x000 }, + { 0x04cd05bd, 0x044104da, 0x000 }, + { 0x044d0504, 0x03510375, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x063c05c4, 0x000 }, + { 0x05bd05bd, 0x000705bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x03f803ed, 0x04080406, 0x000 }, + { 0x040e040a, 0x040c0410, 0x000 }, + { 0x041c0418, 0x04240420, 0x000 }, + { 0x042c0428, 0x04340430, 0x000 }, + { 0x05bd05bd, 0x043805bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x05bd05bd, 0x05bd05bd, 0x000 }, + { 0x00020676, 0x06940006, 0x000 }, +}; + +static const u32 RV635_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; + +static const u32 RV670_cp_microcode[][3]={ + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x0000ffff, 0x00284621, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x00000000, 0x00e00000, 0x000 }, + { 0x00010000, 0xc0294620, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x00a0000a, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x00000000, 0x00600000, 0x624 }, + { 0x00000000, 0x00600000, 0x638 }, + { 0x00000000, 0xc0200800, 0x000 }, + { 0x00000f00, 0x00281622, 0x000 }, + { 0x00000008, 0x00211625, 0x000 }, + { 0x00000018, 0x00203625, 0x000 }, + { 0x8d000000, 0x00204411, 0x000 }, + { 0x00000004, 0x002f0225, 0x000 }, + { 0x00000000, 0x0ce00000, 0x018 }, + { 0x00412000, 0x00404811, 0x019 }, + { 0x00422000, 0x00204811, 0x000 }, + { 0x8e000000, 0x00204411, 0x000 }, + { 0x00000028, 0x00204a2d, 0x000 }, + { 0x90000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x0000000c, 0x00211622, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000019, 0x00211a22, 0x000 }, + { 0x00000004, 0x00281a26, 0x000 }, + { 0x00000000, 0x002914c5, 0x000 }, + { 0x00000019, 0x00203625, 0x000 }, + { 0x00000000, 0x003a1402, 0x000 }, + { 0x00000016, 0x00211625, 0x000 }, + { 0x00000003, 0x00281625, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0xfffffffc, 0x00280e23, 0x000 }, + { 0x00000000, 0x002914a3, 0x000 }, + { 0x00000017, 0x00203625, 0x000 }, + { 0x00008000, 0x00280e22, 0x000 }, + { 0x00000007, 0x00220e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x20000000, 0x00280e22, 0x000 }, + { 0x00000006, 0x00210e23, 0x000 }, + { 0x00000000, 0x0029386e, 0x000 }, + { 0x00000000, 0x00220222, 0x000 }, + { 0x00000000, 0x14e00000, 0x038 }, + { 0x00000000, 0x2ee00000, 0x035 }, + { 0x00000000, 0x2ce00000, 0x037 }, + { 0x00000000, 0x00400e2d, 0x039 }, + { 0x00000008, 0x00200e2d, 0x000 }, + { 0x00000009, 0x0040122d, 0x046 }, + { 0x00000001, 0x00400e2d, 0x039 }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x03e }, + { 0x00000008, 0x00401c11, 0x041 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x0000000f, 0x00281e27, 0x000 }, + { 0x00000003, 0x00221e27, 0x000 }, + { 0x7fc00000, 0x00281a23, 0x000 }, + { 0x00000014, 0x00211a26, 0x000 }, + { 0x00000001, 0x00331a26, 0x000 }, + { 0x00000008, 0x00221a26, 0x000 }, + { 0x00000000, 0x00290cc7, 0x000 }, + { 0x00000027, 0x00203624, 0x000 }, + { 0x00007f00, 0x00281221, 0x000 }, + { 0x00001400, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x04b }, + { 0x00000001, 0x00290e23, 0x000 }, + { 0x0000000e, 0x00203623, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfff80000, 0x00294a23, 0x000 }, + { 0x00000000, 0x003a2c02, 0x000 }, + { 0x00000002, 0x00220e2b, 0x000 }, + { 0xfc000000, 0x00280e23, 0x000 }, + { 0x0000000f, 0x00203623, 0x000 }, + { 0x00001fff, 0x00294a23, 0x000 }, + { 0x00000027, 0x00204a2d, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000029, 0x00200e2d, 0x000 }, + { 0x060a0200, 0x00294a23, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00210222, 0x000 }, + { 0x00000000, 0x14e00000, 0x061 }, + { 0x00000000, 0x2ee00000, 0x05f }, + { 0x00000000, 0x2ce00000, 0x05e }, + { 0x00000000, 0x00400e2d, 0x062 }, + { 0x00000001, 0x00400e2d, 0x062 }, + { 0x0000000a, 0x00200e2d, 0x000 }, + { 0x0000000b, 0x0040122d, 0x06a }, + { 0x00000000, 0xc0200c00, 0x000 }, + { 0x003ffffc, 0x00281223, 0x000 }, + { 0x00000002, 0x00221224, 0x000 }, + { 0x7fc00000, 0x00281623, 0x000 }, + { 0x00000014, 0x00211625, 0x000 }, + { 0x00000001, 0x00331625, 0x000 }, + { 0x80000000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00290ca3, 0x000 }, + { 0x3ffffc00, 0x00290e23, 0x000 }, + { 0x0000001f, 0x00211e23, 0x000 }, + { 0x00000000, 0x14e00000, 0x06d }, + { 0x00000100, 0x00401c11, 0x070 }, + { 0x0000000d, 0x00201e2d, 0x000 }, + { 0x000000f0, 0x00281e27, 0x000 }, + { 0x00000004, 0x00221e27, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000d, 0x00204811, 0x000 }, + { 0xfffff0ff, 0x00281a30, 0x000 }, + { 0x0000a028, 0x00204411, 0x000 }, + { 0x00000000, 0x002948e6, 0x000 }, + { 0x0000a018, 0x00204411, 0x000 }, + { 0x3fffffff, 0x00284a23, 0x000 }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000030, 0x0020162d, 0x000 }, + { 0x00000002, 0x00291625, 0x000 }, + { 0x00000030, 0x00203625, 0x000 }, + { 0x00000025, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a3, 0x000 }, + { 0x00000000, 0x0cc00000, 0x083 }, + { 0x00000026, 0x0020162d, 0x000 }, + { 0x00000000, 0x002f00a4, 0x000 }, + { 0x00000000, 0x0cc00000, 0x084 }, + { 0x00000000, 0x00400000, 0x08a }, + { 0x00000025, 0x00203623, 0x000 }, + { 0x00000026, 0x00203624, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000002, 0x00210227, 0x000 }, + { 0x00000000, 0x14e00000, 0x08a }, + { 0x00000000, 0x00600000, 0x659 }, + { 0x00000000, 0x00600000, 0x64d }, + { 0x00000002, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x08d }, + { 0x00000012, 0xc0403620, 0x093 }, + { 0x00000000, 0x2ee00000, 0x091 }, + { 0x00000000, 0x2ce00000, 0x090 }, + { 0x00000002, 0x00400e2d, 0x092 }, + { 0x00000003, 0x00400e2d, 0x092 }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000012, 0x00203623, 0x000 }, + { 0x00000003, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x098 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000000, 0xc0404800, 0x0a0 }, + { 0x0000a00c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x2ee00000, 0x09e }, + { 0x00000000, 0x2ce00000, 0x09d }, + { 0x00000002, 0x00400e2d, 0x09f }, + { 0x00000003, 0x00400e2d, 0x09f }, + { 0x0000000c, 0x00200e2d, 0x000 }, + { 0x00000000, 0x00204803, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x003f0000, 0x00280e23, 0x000 }, + { 0x00000010, 0x00210e23, 0x000 }, + { 0x00000011, 0x00203623, 0x000 }, + { 0x0000001e, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0a7 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x0000001f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0aa }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000008, 0x00210e2b, 0x000 }, + { 0x0000007f, 0x00280e23, 0x000 }, + { 0x00000000, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0e1 }, + { 0x00000000, 0x27000000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ae00000, 0x0b3 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x0000000c, 0x00221e30, 0x000 }, + { 0x99800000, 0x00204411, 0x000 }, + { 0x00000004, 0x0020122d, 0x000 }, + { 0x00000008, 0x00221224, 0x000 }, + { 0x00000010, 0x00201811, 0x000 }, + { 0x00000000, 0x00291ce4, 0x000 }, + { 0x00000000, 0x00604807, 0x12f }, + { 0x9b000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x9c000000, 0x00204411, 0x000 }, + { 0x00000000, 0x0033146f, 0x000 }, + { 0x00000001, 0x00333e23, 0x000 }, + { 0x00000000, 0xd9004800, 0x000 }, + { 0x00000000, 0x00203c05, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x0000000e, 0x00204811, 0x000 }, + { 0x00000000, 0x00201010, 0x000 }, + { 0x0000e007, 0x00204411, 0x000 }, + { 0x0000000f, 0x0021022b, 0x000 }, + { 0x00000000, 0x14c00000, 0x0cb }, + { 0x00f8ff08, 0x00204811, 0x000 }, + { 0x98000000, 0x00404811, 0x0dc }, + { 0x000000f0, 0x00280e22, 0x000 }, + { 0x000000a0, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x0da }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d5 }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0d4 }, + { 0x00003f00, 0x00400c11, 0x0d6 }, + { 0x00001f00, 0x00400c11, 0x0d6 }, + { 0x00000f00, 0x00200c11, 0x000 }, + { 0x00380009, 0x00294a23, 0x000 }, + { 0x3f000000, 0x00280e2b, 0x000 }, + { 0x00000002, 0x00220e23, 0x000 }, + { 0x00000007, 0x00494a23, 0x0dc }, + { 0x00380f09, 0x00204811, 0x000 }, + { 0x68000007, 0x00204811, 0x000 }, + { 0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a24, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000a202, 0x00204411, 0x000 }, + { 0x00ff0000, 0x00280e22, 0x000 }, + { 0x00000080, 0x00294a23, 0x000 }, + { 0x00000027, 0x00200e2d, 0x000 }, + { 0x00000026, 0x0020122d, 0x000 }, + { 0x00000000, 0x002f0083, 0x000 }, + { 0x00000000, 0x0ce00000, 0x0ea }, + { 0x00000000, 0x00600000, 0x653 }, + { 0x00000000, 0x00400000, 0x0eb }, + { 0x00000000, 0x00600000, 0x656 }, + { 0x00000007, 0x0020222d, 0x000 }, + { 0x00000005, 0x00220e22, 0x000 }, + { 0x00100000, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000000, 0x003a0c02, 0x000 }, + { 0x000000ef, 0x00280e23, 0x000 }, + { 0x00000000, 0x00292068, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000003, 0x00210223, 0x000 }, + { 0x00000000, 0x14e00000, 0x0f8 }, + { 0x0000000b, 0x00210228, 0x000 }, + { 0x00000000, 0x14c00000, 0x0f8 }, + { 0x00000400, 0x00292228, 0x000 }, + { 0x00000014, 0x00203628, 0x000 }, + { 0x0000001c, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x0fd }, + { 0x0000a30c, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000001e, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x10b }, + { 0x0000a30f, 0x00204411, 0x000 }, + { 0x00000011, 0x00200e2d, 0x000 }, + { 0x00000001, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x104 }, + { 0xffffffff, 0x00404811, 0x10b }, + { 0x00000002, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x107 }, + { 0x0000ffff, 0x00404811, 0x10b }, + { 0x00000004, 0x002f0223, 0x000 }, + { 0x00000000, 0x0cc00000, 0x10a }, + { 0x000000ff, 0x00404811, 0x10b }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0002c400, 0x00204411, 0x000 }, + { 0x0000001f, 0x00210e22, 0x000 }, + { 0x00000000, 0x14c00000, 0x112 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000018, 0x40224a20, 0x000 }, + { 0x00000010, 0xc0424a20, 0x114 }, + { 0x00000000, 0x00200c11, 0x000 }, + { 0x00000013, 0x00203623, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x0000000a, 0x00201011, 0x000 }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0ce00000, 0x11b }, + { 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0x00000008, 0x00214a27, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x67c }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x67b }, + { 0x00000004, 0x00404c11, 0x135 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x000021f8, 0x00204411, 0x000 }, + { 0x0000001c, 0x00204811, 0x000 }, + { 0x000421f9, 0x00604411, 0x67c }, + { 0x00000011, 0x00210230, 0x000 }, + { 0x00000000, 0x14e00000, 0x13c }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40280620, 0x000 }, + { 0x00000010, 0xc0210a20, 0x000 }, + { 0x00000000, 0x00341461, 0x000 }, + { 0x00000000, 0x00741882, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x147 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x160 }, + { 0x00000010, 0x40210e20, 0x000 }, + { 0x0000ffff, 0xc0281220, 0x000 }, + { 0x00000010, 0x40211620, 0x000 }, + { 0x0000ffff, 0xc0681a20, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x158 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000001, 0x00300a2f, 0x000 }, + { 0x00000001, 0x00210a22, 0x000 }, + { 0x00000003, 0x00384a22, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600000, 0x18f }, + { 0x00000000, 0x00600000, 0x1a0 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00202c08, 0x000 }, + { 0x00000000, 0x00202411, 0x000 }, + { 0x00000000, 0x00202811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x00000016, 0x00204811, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x93800000, 0x00204411, 0x000 }, + { 0x00000002, 0x00221e29, 0x000 }, + { 0x00000000, 0x007048eb, 0x19c }, + { 0x00000000, 0x00600000, 0x2bb }, + { 0x00000001, 0x40330620, 0x000 }, + { 0x00000000, 0xc0302409, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x2a3 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ae00000, 0x181 }, + { 0x00000000, 0x00600000, 0x13a }, + { 0x00000000, 0x00400000, 0x186 }, + { 0x95000000, 0x00204411, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x186 }, + { 0x00000000, 0xc0204800, 0x000 }, + { 0x00000001, 0x00530621, 0x182 }, + { 0x92000000, 0x00204411, 0x000 }, + { 0x00000000, 0xc0604800, 0x197 }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000011, 0x0020062d, 0x000 }, + { 0x00000000, 0x0078042a, 0x2fb }, + { 0x00000000, 0x00202809, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x174 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000210, 0x00600411, 0x315 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x194 }, + { 0x00000015, 0xc0203620, 0x000 }, + { 0x00000016, 0xc0203620, 0x000 }, + { 0x3f800000, 0x00200411, 0x000 }, + { 0x46000000, 0x00600811, 0x1b2 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x19b }, + { 0x00000001, 0x00804811, 0x000 }, + { 0x00000021, 0x00804811, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000ffff, 0x40281620, 0x000 }, + { 0x00000010, 0xc0811a20, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000008, 0x00221e30, 0x000 }, + { 0x00000029, 0x00201a2d, 0x000 }, + { 0x0000e000, 0x00204411, 0x000 }, + { 0xfffbff09, 0x00204811, 0x000 }, + { 0x0000000f, 0x0020222d, 0x000 }, + { 0x00001fff, 0x00294a28, 0x000 }, + { 0x00000006, 0x0020222d, 0x000 }, + { 0x00000000, 0x002920e8, 0x000 }, + { 0x00000000, 0x00204808, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x060a0200, 0x00294a26, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000100, 0x00201811, 0x000 }, + { 0x00000008, 0x00621e28, 0x12f }, + { 0x00000008, 0x00822228, 0x000 }, + { 0x0002c000, 0x00204411, 0x000 }, + { 0x00000015, 0x00600e2d, 0x1bd }, + { 0x00000016, 0x00600e2d, 0x1bd }, + { 0x0000c008, 0x00204411, 0x000 }, + { 0x00000017, 0x00200e2d, 0x000 }, + { 0x00000000, 0x14c00000, 0x1b9 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x39000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00804802, 0x000 }, + { 0x00000018, 0x00202e2d, 0x000 }, + { 0x00000000, 0x003b0d63, 0x000 }, + { 0x00000008, 0x00224a23, 0x000 }, + { 0x00000010, 0x00224a23, 0x000 }, + { 0x00000018, 0x00224a23, 0x000 }, + { 0x00000000, 0x00804803, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00000007, 0x0021062f, 0x000 }, + { 0x00000013, 0x00200a2d, 0x000 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000ffff, 0x40282220, 0x000 }, + { 0x0000000f, 0x00262228, 0x000 }, + { 0x00000010, 0x40212620, 0x000 }, + { 0x0000000f, 0x00262629, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1e0 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000081, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000080, 0x00201c11, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1dc }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1d8 }, + { 0x00000001, 0x00202c11, 0x000 }, + { 0x0000001f, 0x00280a22, 0x000 }, + { 0x0000001f, 0x00282a2a, 0x000 }, + { 0x00000001, 0x00530621, 0x1d1 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000002, 0x00304a2f, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000001, 0x00301e2f, 0x000 }, + { 0x00000000, 0x002f0227, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0x00600000, 0x1e9 }, + { 0x00000001, 0x00531e27, 0x1e5 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x0000000f, 0x00260e23, 0x000 }, + { 0x00000010, 0xc0211220, 0x000 }, + { 0x0000000f, 0x00261224, 0x000 }, + { 0x00000000, 0x00201411, 0x000 }, + { 0x00000000, 0x00601811, 0x2bb }, + { 0x0001a1fd, 0x00204411, 0x000 }, + { 0x00000000, 0x002f022b, 0x000 }, + { 0x00000000, 0x0ce00000, 0x1f8 }, + { 0x00000010, 0x00221628, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a29, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x0020480a, 0x000 }, + { 0x00000000, 0x00202c11, 0x000 }, + { 0x00000010, 0x00221623, 0x000 }, + { 0xffff0000, 0x00281625, 0x000 }, + { 0x0000ffff, 0x00281a24, 0x000 }, + { 0x00000000, 0x002948c5, 0x000 }, + { 0x00000000, 0x00731503, 0x205 }, + { 0x00000000, 0x00201805, 0x000 }, + { 0x00000000, 0x00731524, 0x205 }, + { 0x00000000, 0x002d14c5, 0x000 }, + { 0x00000000, 0x003008a2, 0x000 }, + { 0x00000000, 0x00204802, 0x000 }, + { 0x00000000, 0x00202802, 0x000 }, + { 0x00000000, 0x00202003, 0x000 }, + { 0x00000000, 0x00802404, 0x000 }, + { 0x0000000f, 0x00210225, 0x000 }, + { 0x00000000, 0x14c00000, 0x67b }, + { 0x00000000, 0x002b1405, 0x000 }, + { 0x00000001, 0x00901625, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00000000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001a, 0x00294a22, 0x000 }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0ce00000, 0x000 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00384a21, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000ffff, 0x40281220, 0x000 }, + { 0x00000010, 0xc0211a20, 0x000 }, + { 0x0000ffff, 0x40280e20, 0x000 }, + { 0x00000010, 0xc0211620, 0x000 }, + { 0x00000000, 0x00741465, 0x2bb }, + { 0x0001a1fd, 0x00604411, 0x2e0 }, + { 0x00000001, 0x00330621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0cc00000, 0x219 }, + { 0x00003fff, 0x002f022f, 0x000 }, + { 0x00000000, 0x0cc00000, 0x212 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x00000000, 0x00600000, 0x638 }, + { 0x00000000, 0x0040040f, 0x213 }, + { 0x00000000, 0x00600000, 0x624 }, + { 0x00000000, 0x00600000, 0x638 }, + { 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0x00000000, 0x00401c10, 0x56f }, + { 0x00000000, 0xc0200000, 0x000 }, + { 0x00000000, 0xc0400000, 0x000 }, + { 0x00000000, 0x0ee00000, 0x571 }, + { 0x00000000, 0x00600000, 0x5bc }, + { 0x00000000, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x582 }, + { 0x0000a2b7, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c4, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x580 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d1, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000001, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x593 }, + { 0x0000a2bb, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c5, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x591 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d2, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x00000002, 0x002f0224, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5a4 }, + { 0x0000a2bf, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2be, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c6, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5a2 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d3, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x0000a2c3, 0x00204411, 0x000 }, + { 0x00000000, 0x00204807, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x67c }, + { 0x0000001a, 0x00212230, 0x000 }, + { 0x00000006, 0x00222630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000a2c7, 0x00204411, 0x000 }, + { 0x00000000, 0x003048e9, 0x000 }, + { 0x00000000, 0x00e00000, 0x5b1 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000000, 0x00404808, 0x000 }, + { 0x0000a2d4, 0x00204411, 0x000 }, + { 0x00000001, 0x00504a28, 0x000 }, + { 0x85000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0x0000304a, 0x00204411, 0x000 }, + { 0x01000000, 0x00204811, 0x000 }, + { 0x00000000, 0x00400000, 0x5b7 }, + { 0xa4000000, 0xc0204411, 0x000 }, + { 0x00000000, 0xc0404800, 0x000 }, + { 0x00000000, 0xc0600000, 0x5bc }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000002c, 0x00203621, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000000, 0x002f0230, 0x000 }, + { 0x00000000, 0x0cc00000, 0x5c3 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000030, 0x00403621, 0x5d6 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5d6 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004a092, 0x00604411, 0x67c }, + { 0x00000031, 0x00203630, 0x000 }, + { 0x0004a093, 0x00604411, 0x67c }, + { 0x00000032, 0x00203630, 0x000 }, + { 0x0004a2b6, 0x00604411, 0x67c }, + { 0x00000033, 0x00203630, 0x000 }, + { 0x0004a2ba, 0x00604411, 0x67c }, + { 0x00000034, 0x00203630, 0x000 }, + { 0x0004a2be, 0x00604411, 0x67c }, + { 0x00000035, 0x00203630, 0x000 }, + { 0x0004a2c2, 0x00604411, 0x67c }, + { 0x00000036, 0x00203630, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x0000003f, 0x00204811, 0x000 }, + { 0x00000005, 0x00204811, 0x000 }, + { 0x0000a1f4, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x88000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000006, 0x00204811, 0x000 }, + { 0x00000001, 0x002f0230, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61f }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61f }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00007e00, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x5f8 }, + { 0x0000a092, 0x00204411, 0x000 }, + { 0x00000031, 0x00204a2d, 0x000 }, + { 0x0000a093, 0x00204411, 0x000 }, + { 0x00000032, 0x00204a2d, 0x000 }, + { 0x0000a2b6, 0x00204411, 0x000 }, + { 0x00000033, 0x00204a2d, 0x000 }, + { 0x0000a2ba, 0x00204411, 0x000 }, + { 0x00000034, 0x00204a2d, 0x000 }, + { 0x0000a2be, 0x00204411, 0x000 }, + { 0x00000035, 0x00204a2d, 0x000 }, + { 0x0000a2c2, 0x00204411, 0x000 }, + { 0x00000036, 0x00204a2d, 0x000 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x000001ff, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61e }, + { 0x00000000, 0x00210221, 0x000 }, + { 0x00000000, 0x14c00000, 0x601 }, + { 0x0004a003, 0x00604411, 0x67c }, + { 0x0000a003, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x14c00000, 0x606 }, + { 0x0004a010, 0x00604411, 0x67c }, + { 0x0000a010, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00000001, 0x00210621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x61e }, + { 0x0004a011, 0x00604411, 0x67c }, + { 0x0000a011, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a012, 0x00604411, 0x67c }, + { 0x0000a012, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a013, 0x00604411, 0x67c }, + { 0x0000a013, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a014, 0x00604411, 0x67c }, + { 0x0000a014, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a015, 0x00604411, 0x67c }, + { 0x0000a015, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a016, 0x00604411, 0x67c }, + { 0x0000a016, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x0004a017, 0x00604411, 0x67c }, + { 0x0000a017, 0x00204411, 0x000 }, + { 0x00000000, 0x00204810, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x0000002c, 0x0080062d, 0x000 }, + { 0xff000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00000002, 0x00804811, 0x000 }, + { 0x00000000, 0x0ee00000, 0x630 }, + { 0x00000030, 0x0020062d, 0x000 }, + { 0x00000002, 0x00280621, 0x000 }, + { 0x00000000, 0x002f0221, 0x000 }, + { 0x00000000, 0x0ce00000, 0x62e }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x00042004, 0x00604411, 0x67c }, + { 0x00001000, 0x00200811, 0x000 }, + { 0x0000002b, 0x00203622, 0x000 }, + { 0x00000000, 0x00600000, 0x634 }, + { 0x00000000, 0x00600000, 0x5bc }, + { 0x98000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00804811, 0x000 }, + { 0x00000000, 0xc0600000, 0x634 }, + { 0x00000000, 0xc0400400, 0x001 }, + { 0x0000a2a4, 0x00204411, 0x000 }, + { 0x00000022, 0x00204811, 0x000 }, + { 0x89000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00404811, 0x620 }, + { 0x97000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x8a000000, 0x00204411, 0x000 }, + { 0x00000000, 0x00404811, 0x620 }, + { 0x00000000, 0x00600000, 0x64d }, + { 0x0001a2a4, 0xc0204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36a }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x09800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x0004217f, 0x00604411, 0x67c }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x000 }, + { 0x00000004, 0x00404c11, 0x647 }, + { 0x00000000, 0x00400000, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000004, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffffb, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0x00000008, 0x00291e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x00000017, 0x00201e2d, 0x000 }, + { 0xfffffff7, 0x00281e27, 0x000 }, + { 0x00000017, 0x00803627, 0x000 }, + { 0x0001a2a4, 0x00204411, 0x000 }, + { 0x00000016, 0x00604811, 0x36a }, + { 0x00002010, 0x00204411, 0x000 }, + { 0x00010000, 0x00204811, 0x000 }, + { 0x0000217c, 0x00204411, 0x000 }, + { 0x01800000, 0x00204811, 0x000 }, + { 0xffffffff, 0x00204811, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000000, 0x17000000, 0x000 }, + { 0x81000000, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0004217f, 0x00604411, 0x67c }, + { 0x0000001f, 0x00210230, 0x000 }, + { 0x00000000, 0x14c00000, 0x67b }, + { 0x00000010, 0x00404c11, 0x661 }, + { 0x00000000, 0xc0200400, 0x000 }, + { 0x00000000, 0x38c00000, 0x000 }, + { 0x0000001d, 0x00200a2d, 0x000 }, + { 0x0000001e, 0x00200e2d, 0x000 }, + { 0x0000001f, 0x0020122d, 0x000 }, + { 0x00000020, 0x0020162d, 0x000 }, + { 0x00002169, 0x00204411, 0x000 }, + { 0x00000000, 0x00204804, 0x000 }, + { 0x00000000, 0x00204805, 0x000 }, + { 0x00000000, 0x00204801, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000004, 0x00301224, 0x000 }, + { 0x00000000, 0x002f0064, 0x000 }, + { 0x00000000, 0x0cc00000, 0x67a }, + { 0x00000003, 0x00281a22, 0x000 }, + { 0x00000008, 0x00221222, 0x000 }, + { 0xfffff000, 0x00281224, 0x000 }, + { 0x00000000, 0x002910c4, 0x000 }, + { 0x0000001f, 0x00403624, 0x000 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x67c }, + { 0x9f000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x67f }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x1ac00000, 0x681 }, + { 0x9e000000, 0x00204411, 0x000 }, + { 0xcafebabe, 0x00204811, 0x000 }, + { 0x00000000, 0x1ae00000, 0x684 }, + { 0x00000000, 0x00800000, 0x000 }, + { 0x00000000, 0x00600000, 0x00b }, + { 0x00001000, 0x00600411, 0x315 }, + { 0x00000000, 0x00200411, 0x000 }, + { 0x00000000, 0x00600811, 0x1b2 }, + { 0x0000225c, 0x00204411, 0x000 }, + { 0x00000003, 0x00204811, 0x000 }, + { 0x00002256, 0x00204411, 0x000 }, + { 0x0000001b, 0x00204811, 0x000 }, + { 0x0000a1fc, 0x00204411, 0x000 }, + { 0x00000001, 0x00204811, 0x000 }, + { 0x0001a1fd, 0xc0204411, 0x000 }, + { 0x00000021, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000024, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000022, 0x0020222d, 0x000 }, + { 0x0000ffff, 0x00282228, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00204811, 0x000 }, + { 0x00000023, 0x00201e2d, 0x000 }, + { 0x00000010, 0x00221e27, 0x000 }, + { 0x00000000, 0x00294907, 0x000 }, + { 0x00000000, 0x00404811, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x00000000, 0x00000000, 0x000 }, + { 0x014204f5, 0x05b30250, 0x000 }, + { 0x01c30168, 0x043505b3, 0x000 }, + { 0x02250209, 0x02500151, 0x000 }, + { 0x02230245, 0x02a00241, 0x000 }, + { 0x03cd05b3, 0x05b305b3, 0x000 }, + { 0x063c063d, 0x031f05b3, 0x000 }, + { 0x05b305b8, 0x03200340, 0x000 }, + { 0x032a0282, 0x03420334, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b30544, 0x05b305b3, 0x000 }, + { 0x03b205b3, 0x04ae0344, 0x000 }, + { 0x048d0443, 0x043305b3, 0x000 }, + { 0x04c305b3, 0x043704d0, 0x000 }, + { 0x044304fa, 0x03510371, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x063205ba, 0x000 }, + { 0x05b305b3, 0x000705b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x03ee03e3, 0x03fe03fc, 0x000 }, + { 0x04040400, 0x04020406, 0x000 }, + { 0x0412040e, 0x041a0416, 0x000 }, + { 0x0422041e, 0x042a0426, 0x000 }, + { 0x05b305b3, 0x042e05b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x05b305b3, 0x05b305b3, 0x000 }, + { 0x00020668, 0x06860006, 0x000 }, +}; + +static const u32 RV670_pfp_microcode[]={ +0xca0400, +0xa00000, +0x7e828b, +0x7c038b, +0x8001b8, +0x7c038b, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xc41838, +0xca2400, +0xca2800, +0x9581a8, +0xc41c3a, +0xc3c000, +0xca0800, +0xca0c00, +0x7c744b, +0xc20005, +0x99c000, +0xc41c3a, +0x7c744c, +0xc0fff0, +0x042c04, +0x309002, +0x7d2500, +0x351402, +0x7d350b, +0x255403, +0x7cd580, +0x259c03, +0x95c004, +0xd5001b, +0x7eddc1, +0x7d9d80, +0xd6801b, +0xd5801b, +0xd4401e, +0xd5401e, +0xd6401e, +0xd6801e, +0xd4801e, +0xd4c01e, +0x9783d3, +0xd5c01e, +0xca0800, +0x80001a, +0xca0c00, +0xe4011e, +0xd4001e, +0x80000c, +0xc41838, +0xe4013e, +0xd4001e, +0x80000c, +0xc41838, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca1800, +0xd4401e, +0xd5801e, +0x800053, +0xd40075, +0xd4401e, +0xca0800, +0xca0c00, +0xca1000, +0xd48019, +0xd4c018, +0xd50017, +0xd4801e, +0xd4c01e, +0xd5001e, +0xe2001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0xd48060, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xd48061, +0xd4401e, +0x800000, +0xd4801e, +0xca0800, +0xca0c00, +0xd4401e, +0xd48016, +0xd4c016, +0xd4801e, +0x8001b8, +0xd4c01e, +0xc60843, +0xca0c00, +0xca1000, +0x948004, +0xca1400, +0xe420f3, +0xd42013, +0xd56065, +0xd4e01c, +0xd5201c, +0xd5601c, +0x800000, +0x062001, +0xc60843, +0xca0c00, +0xca1000, +0x9483f7, +0xca1400, +0xe420f3, +0x800079, +0xd42013, +0xc60843, +0xca0c00, +0xca1000, +0x9883ef, +0xca1400, +0xd40064, +0x80008d, +0x000000, +0xc41432, +0xc61843, +0xc4082f, +0x954005, +0xc40c30, +0xd4401e, +0x800000, +0xee001e, +0x9583f5, +0xc41031, +0xd44033, +0xd52065, +0xd4a01c, +0xd4e01c, +0xd5201c, +0xe4015e, +0xd4001e, +0x800000, +0x062001, +0xca1800, +0x0a2001, +0xd60076, +0xc40836, +0x988007, +0xc61045, +0x950110, +0xd4001f, +0xd46062, +0x800000, +0xd42062, +0xcc3835, +0xcc1433, +0x8401bb, +0xd40072, +0xd5401e, +0x800000, +0xee001e, +0xe2001a, +0x8401bb, +0xe2001a, +0xcc104b, +0xcc0447, +0x2c9401, +0x7d098b, +0x984005, +0x7d15cb, +0xd4001a, +0x8001b8, +0xd4006d, +0x344401, +0xcc0c48, +0x98403a, +0xcc2c4a, +0x958004, +0xcc0449, +0x8001b8, +0xd4001a, +0xd4c01a, +0x282801, +0x8400f0, +0xcc1003, +0x98801b, +0x04380c, +0x8400f0, +0xcc1003, +0x988017, +0x043808, +0x8400f0, +0xcc1003, +0x988013, +0x043804, +0x8400f0, +0xcc1003, +0x988014, +0xcc104c, +0x9a8009, +0xcc144d, +0x9840dc, +0xd4006d, +0xcc1848, +0xd5001a, +0xd5401a, +0x8000c9, +0xd5801a, +0x96c0d5, +0xd4006d, +0x8001b8, +0xd4006e, +0x9ac003, +0xd4006d, +0xd4006e, +0x800000, +0xec007f, +0x9ac0cc, +0xd4006d, +0x8001b8, +0xd4006e, +0xcc1403, +0xcc1803, +0xcc1c03, +0x7d9103, +0x7dd583, +0x7d190c, +0x35cc1f, +0x35701f, +0x7cf0cb, +0x7cd08b, +0x880000, +0x7e8e8b, +0x95c004, +0xd4006e, +0x8001b8, +0xd4001a, +0xd4c01a, +0xcc0803, +0xcc0c03, +0xcc1003, +0xcc1403, +0xcc1803, +0xcc1c03, +0xcc2403, +0xcc2803, +0x35c41f, +0x36b01f, +0x7c704b, +0x34f01f, +0x7c704b, +0x35701f, +0x7c704b, +0x7d8881, +0x7dccc1, +0x7e5101, +0x7e9541, +0x7c9082, +0x7cd4c2, +0x7c848b, +0x9ac003, +0x7c8c8b, +0x2c8801, +0x98809e, +0xd4006d, +0x98409c, +0xd4006e, +0xcc084c, +0xcc0c4d, +0xcc1048, +0xd4801a, +0xd4c01a, +0x800101, +0xd5001a, +0xcc0832, +0xd40032, +0x9482d9, +0xca0c00, +0xd4401e, +0x800000, +0xd4001e, +0xe4011e, +0xd4001e, +0xca0800, +0xca0c00, +0xca1000, +0xd4401e, +0xca1400, +0xd4801e, +0xd4c01e, +0xd5001e, +0xd5401e, +0xd54034, +0x800000, +0xee001e, +0x280404, +0xe2001a, +0xe2001a, +0xd4401a, +0xca3800, +0xcc0803, +0xcc0c03, +0xcc0c03, +0xcc0c03, +0x9882bd, +0x000000, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0400, +0xc2ff00, +0xcc0834, +0xc13fff, +0x7c74cb, +0x7cc90b, +0x7d010f, +0x9902b0, +0x7c738b, +0x8401bb, +0xd7a06f, +0x800000, +0xee001f, +0xca0800, +0x281900, +0x7d898b, +0x958014, +0x281404, +0xca0c00, +0xca1000, +0xca1c00, +0xca2400, +0xe2001f, +0xd4c01a, +0xd5001a, +0xd5401a, +0xcc1803, +0xcc2c03, +0xcc2c03, +0xcc2c03, +0x7da58b, +0x7d9c47, +0x984297, +0x000000, +0x800161, +0xd4c01a, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xe4011e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xe4013e, +0xd4001e, +0xd4401e, +0xee001e, +0xca0400, +0xa00000, +0x7e828b, +0xca0800, +0x248c06, +0x0ccc06, +0x98c006, +0xcc104e, +0x990004, +0xd40073, +0xe4011e, +0xd4001e, +0xd4401e, +0xd4801e, +0x800000, +0xee001e, +0xca0800, +0xca0c00, +0x34d018, +0x251001, +0x950021, +0xc17fff, +0xca1000, +0xca1400, +0xca1800, +0xd4801d, +0xd4c01d, +0x7db18b, +0xc14202, +0xc2c001, +0xd5801d, +0x34dc0e, +0x7d5d4c, +0x7f734c, +0xd7401e, +0xd5001e, +0xd5401e, +0xc14200, +0xc2c000, +0x099c01, +0x31dc10, +0x7f5f4c, +0x7f734c, +0x042802, +0x7d8380, +0xd5a86f, +0xd58066, +0xd7401e, +0xec005e, +0xc82402, +0xc82402, +0x8001b8, +0xd60076, +0xd4401e, +0xd4801e, +0xd4c01e, +0x800000, +0xee001e, +0x800000, +0xee001f, +0xd4001f, +0x800000, +0xd4001f, +0xd4001f, +0x880000, +0xd4001f, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x010171, +0x020178, +0x03008f, +0x04007f, +0x050003, +0x06003f, +0x070032, +0x08012c, +0x090046, +0x0a0036, +0x1001b6, +0x1700a2, +0x22013a, +0x230149, +0x2000b4, +0x240125, +0x27004d, +0x28006a, +0x2a0060, +0x2b0052, +0x2f0065, +0x320087, +0x34017f, +0x3c0156, +0x3f0072, +0x41018c, +0x44012e, +0x550173, +0x56017a, +0x60000b, +0x610034, +0x620038, +0x630038, +0x640038, +0x650038, +0x660038, +0x670038, +0x68003a, +0x690041, +0x6a0048, +0x6b0048, +0x6c0048, +0x6d0048, +0x6e0048, +0x6f0048, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +0x000006, +}; +#endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_cp.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_cp.c --- libdrm-2.3.0.16/shared-core/radeon_cp.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_cp.c 2009-04-20 07:00:29.000000000 +0100 @@ -2,6 +2,7 @@ /* * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * Copyright 2007 Advanced Micro Devices, Inc. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -34,787 +35,82 @@ #include "radeon_drv.h" #include "r300_reg.h" +#include "radeon_microcode.h" #define RADEON_FIFO_DEBUG 0 static int radeon_do_cleanup_cp(struct drm_device * dev); -/* CP microcode (from ATI) */ -static const u32 R200_cp_microcode[][2] = { - {0x21007000, 0000000000}, - {0x20007000, 0000000000}, - {0x000000ab, 0x00000004}, - {0x000000af, 0x00000004}, - {0x66544a49, 0000000000}, - {0x49494174, 0000000000}, - {0x54517d83, 0000000000}, - {0x498d8b64, 0000000000}, - {0x49494949, 0000000000}, - {0x49da493c, 0000000000}, - {0x49989898, 0000000000}, - {0xd34949d5, 0000000000}, - {0x9dc90e11, 0000000000}, - {0xce9b9b9b, 0000000000}, - {0x000f0000, 0x00000016}, - {0x352e232c, 0000000000}, - {0x00000013, 0x00000004}, - {0x000f0000, 0x00000016}, - {0x352e272c, 0000000000}, - {0x000f0001, 0x00000016}, - {0x3239362f, 0000000000}, - {0x000077ef, 0x00000002}, - {0x00061000, 0x00000002}, - {0x00000020, 0x0000001a}, - {0x00004000, 0x0000001e}, - {0x00061000, 0x00000002}, - {0x00000020, 0x0000001a}, - {0x00004000, 0x0000001e}, - {0x00061000, 0x00000002}, - {0x00000020, 0x0000001a}, - {0x00004000, 0x0000001e}, - {0x00000016, 0x00000004}, - {0x0003802a, 0x00000002}, - {0x040067e0, 0x00000002}, - {0x00000016, 0x00000004}, - {0x000077e0, 0x00000002}, - {0x00065000, 0x00000002}, - {0x000037e1, 0x00000002}, - {0x040067e1, 0x00000006}, - {0x000077e0, 0x00000002}, - {0x000077e1, 0x00000002}, - {0x000077e1, 0x00000006}, - {0xffffffff, 0000000000}, - {0x10000000, 0000000000}, - {0x0003802a, 0x00000002}, - {0x040067e0, 0x00000006}, - {0x00007675, 0x00000002}, - {0x00007676, 0x00000002}, - {0x00007677, 0x00000002}, - {0x00007678, 0x00000006}, - {0x0003802b, 0x00000002}, - {0x04002676, 0x00000002}, - {0x00007677, 0x00000002}, - {0x00007678, 0x00000006}, - {0x0000002e, 0x00000018}, - {0x0000002e, 0x00000018}, - {0000000000, 0x00000006}, - {0x0000002f, 0x00000018}, - {0x0000002f, 0x00000018}, - {0000000000, 0x00000006}, - {0x01605000, 0x00000002}, - {0x00065000, 0x00000002}, - {0x00098000, 0x00000002}, - {0x00061000, 0x00000002}, - {0x64c0603d, 0x00000004}, - {0x00080000, 0x00000016}, - {0000000000, 0000000000}, - {0x0400251d, 0x00000002}, - {0x00007580, 0x00000002}, - {0x00067581, 0x00000002}, - {0x04002580, 0x00000002}, - {0x00067581, 0x00000002}, - {0x00000046, 0x00000004}, - {0x00005000, 0000000000}, - {0x00061000, 0x00000002}, - {0x0000750e, 0x00000002}, - {0x00019000, 0x00000002}, - {0x00011055, 0x00000014}, - {0x00000055, 0x00000012}, - {0x0400250f, 0x00000002}, - {0x0000504a, 0x00000004}, - {0x00007565, 0x00000002}, - {0x00007566, 0x00000002}, - {0x00000051, 0x00000004}, - {0x01e655b4, 0x00000002}, - {0x4401b0dc, 0x00000002}, - {0x01c110dc, 0x00000002}, - {0x2666705d, 0x00000018}, - {0x040c2565, 0x00000002}, - {0x0000005d, 0x00000018}, - {0x04002564, 0x00000002}, - {0x00007566, 0x00000002}, - {0x00000054, 0x00000004}, - {0x00401060, 0x00000008}, - {0x00101000, 0x00000002}, - {0x000d80ff, 0x00000002}, - {0x00800063, 0x00000008}, - {0x000f9000, 0x00000002}, - {0x000e00ff, 0x00000002}, - {0000000000, 0x00000006}, - {0x00000080, 0x00000018}, - {0x00000054, 0x00000004}, - {0x00007576, 0x00000002}, - {0x00065000, 0x00000002}, - {0x00009000, 0x00000002}, - {0x00041000, 0x00000002}, - {0x0c00350e, 0x00000002}, - {0x00049000, 0x00000002}, - {0x00051000, 0x00000002}, - {0x01e785f8, 0x00000002}, - {0x00200000, 0x00000002}, - {0x00600073, 0x0000000c}, - {0x00007563, 0x00000002}, - {0x006075f0, 0x00000021}, - {0x20007068, 0x00000004}, - {0x00005068, 0x00000004}, - {0x00007576, 0x00000002}, - {0x00007577, 0x00000002}, - {0x0000750e, 0x00000002}, - {0x0000750f, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00600076, 0x0000000c}, - {0x006075f0, 0x00000021}, - {0x000075f8, 0x00000002}, - {0x00000076, 0x00000004}, - {0x000a750e, 0x00000002}, - {0x0020750f, 0x00000002}, - {0x00600079, 0x00000004}, - {0x00007570, 0x00000002}, - {0x00007571, 0x00000002}, - {0x00007572, 0x00000006}, - {0x00005000, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00007568, 0x00000002}, - {0x00061000, 0x00000002}, - {0x00000084, 0x0000000c}, - {0x00058000, 0x00000002}, - {0x0c607562, 0x00000002}, - {0x00000086, 0x00000004}, - {0x00600085, 0x00000004}, - {0x400070dd, 0000000000}, - {0x000380dd, 0x00000002}, - {0x00000093, 0x0000001c}, - {0x00065095, 0x00000018}, - {0x040025bb, 0x00000002}, - {0x00061096, 0x00000018}, - {0x040075bc, 0000000000}, - {0x000075bb, 0x00000002}, - {0x000075bc, 0000000000}, - {0x00090000, 0x00000006}, - {0x00090000, 0x00000002}, - {0x000d8002, 0x00000006}, - {0x00005000, 0x00000002}, - {0x00007821, 0x00000002}, - {0x00007800, 0000000000}, - {0x00007821, 0x00000002}, - {0x00007800, 0000000000}, - {0x01665000, 0x00000002}, - {0x000a0000, 0x00000002}, - {0x000671cc, 0x00000002}, - {0x0286f1cd, 0x00000002}, - {0x000000a3, 0x00000010}, - {0x21007000, 0000000000}, - {0x000000aa, 0x0000001c}, - {0x00065000, 0x00000002}, - {0x000a0000, 0x00000002}, - {0x00061000, 0x00000002}, - {0x000b0000, 0x00000002}, - {0x38067000, 0x00000002}, - {0x000a00a6, 0x00000004}, - {0x20007000, 0000000000}, - {0x01200000, 0x00000002}, - {0x20077000, 0x00000002}, - {0x01200000, 0x00000002}, - {0x20007000, 0000000000}, - {0x00061000, 0x00000002}, - {0x0120751b, 0x00000002}, - {0x8040750a, 0x00000002}, - {0x8040750b, 0x00000002}, - {0x00110000, 0x00000002}, - {0x000380dd, 0x00000002}, - {0x000000bd, 0x0000001c}, - {0x00061096, 0x00000018}, - {0x844075bd, 0x00000002}, - {0x00061095, 0x00000018}, - {0x840075bb, 0x00000002}, - {0x00061096, 0x00000018}, - {0x844075bc, 0x00000002}, - {0x000000c0, 0x00000004}, - {0x804075bd, 0x00000002}, - {0x800075bb, 0x00000002}, - {0x804075bc, 0x00000002}, - {0x00108000, 0x00000002}, - {0x01400000, 0x00000002}, - {0x006000c4, 0x0000000c}, - {0x20c07000, 0x00000020}, - {0x000000c6, 0x00000012}, - {0x00800000, 0x00000006}, - {0x0080751d, 0x00000006}, - {0x000025bb, 0x00000002}, - {0x000040c0, 0x00000004}, - {0x0000775c, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00661000, 0x00000002}, - {0x0460275d, 0x00000020}, - {0x00004000, 0000000000}, - {0x00007999, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00661000, 0x00000002}, - {0x0460299b, 0x00000020}, - {0x00004000, 0000000000}, - {0x01e00830, 0x00000002}, - {0x21007000, 0000000000}, - {0x00005000, 0x00000002}, - {0x00038042, 0x00000002}, - {0x040025e0, 0x00000002}, - {0x000075e1, 0000000000}, - {0x00000001, 0000000000}, - {0x000380d9, 0x00000002}, - {0x04007394, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, -}; - -static const u32 radeon_cp_microcode[][2] = { - {0x21007000, 0000000000}, - {0x20007000, 0000000000}, - {0x000000b4, 0x00000004}, - {0x000000b8, 0x00000004}, - {0x6f5b4d4c, 0000000000}, - {0x4c4c427f, 0000000000}, - {0x5b568a92, 0000000000}, - {0x4ca09c6d, 0000000000}, - {0xad4c4c4c, 0000000000}, - {0x4ce1af3d, 0000000000}, - {0xd8afafaf, 0000000000}, - {0xd64c4cdc, 0000000000}, - {0x4cd10d10, 0000000000}, - {0x000f0000, 0x00000016}, - {0x362f242d, 0000000000}, - {0x00000012, 0x00000004}, - {0x000f0000, 0x00000016}, - {0x362f282d, 0000000000}, - {0x000380e7, 0x00000002}, - {0x04002c97, 0x00000002}, - {0x000f0001, 0x00000016}, - {0x333a3730, 0000000000}, - {0x000077ef, 0x00000002}, - {0x00061000, 0x00000002}, - {0x00000021, 0x0000001a}, - {0x00004000, 0x0000001e}, - {0x00061000, 0x00000002}, - {0x00000021, 0x0000001a}, - {0x00004000, 0x0000001e}, - {0x00061000, 0x00000002}, - {0x00000021, 0x0000001a}, - {0x00004000, 0x0000001e}, - {0x00000017, 0x00000004}, - {0x0003802b, 0x00000002}, - {0x040067e0, 0x00000002}, - {0x00000017, 0x00000004}, - {0x000077e0, 0x00000002}, - {0x00065000, 0x00000002}, - {0x000037e1, 0x00000002}, - {0x040067e1, 0x00000006}, - {0x000077e0, 0x00000002}, - {0x000077e1, 0x00000002}, - {0x000077e1, 0x00000006}, - {0xffffffff, 0000000000}, - {0x10000000, 0000000000}, - {0x0003802b, 0x00000002}, - {0x040067e0, 0x00000006}, - {0x00007675, 0x00000002}, - {0x00007676, 0x00000002}, - {0x00007677, 0x00000002}, - {0x00007678, 0x00000006}, - {0x0003802c, 0x00000002}, - {0x04002676, 0x00000002}, - {0x00007677, 0x00000002}, - {0x00007678, 0x00000006}, - {0x0000002f, 0x00000018}, - {0x0000002f, 0x00000018}, - {0000000000, 0x00000006}, - {0x00000030, 0x00000018}, - {0x00000030, 0x00000018}, - {0000000000, 0x00000006}, - {0x01605000, 0x00000002}, - {0x00065000, 0x00000002}, - {0x00098000, 0x00000002}, - {0x00061000, 0x00000002}, - {0x64c0603e, 0x00000004}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00080000, 0x00000016}, - {0000000000, 0000000000}, - {0x0400251d, 0x00000002}, - {0x00007580, 0x00000002}, - {0x00067581, 0x00000002}, - {0x04002580, 0x00000002}, - {0x00067581, 0x00000002}, - {0x00000049, 0x00000004}, - {0x00005000, 0000000000}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00061000, 0x00000002}, - {0x0000750e, 0x00000002}, - {0x00019000, 0x00000002}, - {0x00011055, 0x00000014}, - {0x00000055, 0x00000012}, - {0x0400250f, 0x00000002}, - {0x0000504f, 0x00000004}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00007565, 0x00000002}, - {0x00007566, 0x00000002}, - {0x00000058, 0x00000004}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x01e655b4, 0x00000002}, - {0x4401b0e4, 0x00000002}, - {0x01c110e4, 0x00000002}, - {0x26667066, 0x00000018}, - {0x040c2565, 0x00000002}, - {0x00000066, 0x00000018}, - {0x04002564, 0x00000002}, - {0x00007566, 0x00000002}, - {0x0000005d, 0x00000004}, - {0x00401069, 0x00000008}, - {0x00101000, 0x00000002}, - {0x000d80ff, 0x00000002}, - {0x0080006c, 0x00000008}, - {0x000f9000, 0x00000002}, - {0x000e00ff, 0x00000002}, - {0000000000, 0x00000006}, - {0x0000008f, 0x00000018}, - {0x0000005b, 0x00000004}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00007576, 0x00000002}, - {0x00065000, 0x00000002}, - {0x00009000, 0x00000002}, - {0x00041000, 0x00000002}, - {0x0c00350e, 0x00000002}, - {0x00049000, 0x00000002}, - {0x00051000, 0x00000002}, - {0x01e785f8, 0x00000002}, - {0x00200000, 0x00000002}, - {0x0060007e, 0x0000000c}, - {0x00007563, 0x00000002}, - {0x006075f0, 0x00000021}, - {0x20007073, 0x00000004}, - {0x00005073, 0x00000004}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00007576, 0x00000002}, - {0x00007577, 0x00000002}, - {0x0000750e, 0x00000002}, - {0x0000750f, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00600083, 0x0000000c}, - {0x006075f0, 0x00000021}, - {0x000075f8, 0x00000002}, - {0x00000083, 0x00000004}, - {0x000a750e, 0x00000002}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x0020750f, 0x00000002}, - {0x00600086, 0x00000004}, - {0x00007570, 0x00000002}, - {0x00007571, 0x00000002}, - {0x00007572, 0x00000006}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00005000, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00007568, 0x00000002}, - {0x00061000, 0x00000002}, - {0x00000095, 0x0000000c}, - {0x00058000, 0x00000002}, - {0x0c607562, 0x00000002}, - {0x00000097, 0x00000004}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x00600096, 0x00000004}, - {0x400070e5, 0000000000}, - {0x000380e6, 0x00000002}, - {0x040025c5, 0x00000002}, - {0x000380e5, 0x00000002}, - {0x000000a8, 0x0000001c}, - {0x000650aa, 0x00000018}, - {0x040025bb, 0x00000002}, - {0x000610ab, 0x00000018}, - {0x040075bc, 0000000000}, - {0x000075bb, 0x00000002}, - {0x000075bc, 0000000000}, - {0x00090000, 0x00000006}, - {0x00090000, 0x00000002}, - {0x000d8002, 0x00000006}, - {0x00007832, 0x00000002}, - {0x00005000, 0x00000002}, - {0x000380e7, 0x00000002}, - {0x04002c97, 0x00000002}, - {0x00007820, 0x00000002}, - {0x00007821, 0x00000002}, - {0x00007800, 0000000000}, - {0x01200000, 0x00000002}, - {0x20077000, 0x00000002}, - {0x01200000, 0x00000002}, - {0x20007000, 0x00000002}, - {0x00061000, 0x00000002}, - {0x0120751b, 0x00000002}, - {0x8040750a, 0x00000002}, - {0x8040750b, 0x00000002}, - {0x00110000, 0x00000002}, - {0x000380e5, 0x00000002}, - {0x000000c6, 0x0000001c}, - {0x000610ab, 0x00000018}, - {0x844075bd, 0x00000002}, - {0x000610aa, 0x00000018}, - {0x840075bb, 0x00000002}, - {0x000610ab, 0x00000018}, - {0x844075bc, 0x00000002}, - {0x000000c9, 0x00000004}, - {0x804075bd, 0x00000002}, - {0x800075bb, 0x00000002}, - {0x804075bc, 0x00000002}, - {0x00108000, 0x00000002}, - {0x01400000, 0x00000002}, - {0x006000cd, 0x0000000c}, - {0x20c07000, 0x00000020}, - {0x000000cf, 0x00000012}, - {0x00800000, 0x00000006}, - {0x0080751d, 0x00000006}, - {0000000000, 0000000000}, - {0x0000775c, 0x00000002}, - {0x00a05000, 0x00000002}, - {0x00661000, 0x00000002}, - {0x0460275d, 0x00000020}, - {0x00004000, 0000000000}, - {0x01e00830, 0x00000002}, - {0x21007000, 0000000000}, - {0x6464614d, 0000000000}, - {0x69687420, 0000000000}, - {0x00000073, 0000000000}, - {0000000000, 0000000000}, - {0x00005000, 0x00000002}, - {0x000380d0, 0x00000002}, - {0x040025e0, 0x00000002}, - {0x000075e1, 0000000000}, - {0x00000001, 0000000000}, - {0x000380e0, 0x00000002}, - {0x04002394, 0x00000002}, - {0x00005000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0x00000008, 0000000000}, - {0x00000004, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, - {0000000000, 0000000000}, -}; - -static const u32 R300_cp_microcode[][2] = { - { 0x4200e000, 0000000000 }, - { 0x4000e000, 0000000000 }, - { 0x000000af, 0x00000008 }, - { 0x000000b3, 0x00000008 }, - { 0x6c5a504f, 0000000000 }, - { 0x4f4f497a, 0000000000 }, - { 0x5a578288, 0000000000 }, - { 0x4f91906a, 0000000000 }, - { 0x4f4f4f4f, 0000000000 }, - { 0x4fe24f44, 0000000000 }, - { 0x4f9c9c9c, 0000000000 }, - { 0xdc4f4fde, 0000000000 }, - { 0xa1cd4f4f, 0000000000 }, - { 0xd29d9d9d, 0000000000 }, - { 0x4f0f9fd7, 0000000000 }, - { 0x000ca000, 0x00000004 }, - { 0x000d0012, 0x00000038 }, - { 0x0000e8b4, 0x00000004 }, - { 0x000d0014, 0x00000038 }, - { 0x0000e8b6, 0x00000004 }, - { 0x000d0016, 0x00000038 }, - { 0x0000e854, 0x00000004 }, - { 0x000d0018, 0x00000038 }, - { 0x0000e855, 0x00000004 }, - { 0x000d001a, 0x00000038 }, - { 0x0000e856, 0x00000004 }, - { 0x000d001c, 0x00000038 }, - { 0x0000e857, 0x00000004 }, - { 0x000d001e, 0x00000038 }, - { 0x0000e824, 0x00000004 }, - { 0x000d0020, 0x00000038 }, - { 0x0000e825, 0x00000004 }, - { 0x000d0022, 0x00000038 }, - { 0x0000e830, 0x00000004 }, - { 0x000d0024, 0x00000038 }, - { 0x0000f0c0, 0x00000004 }, - { 0x000d0026, 0x00000038 }, - { 0x0000f0c1, 0x00000004 }, - { 0x000d0028, 0x00000038 }, - { 0x0000f041, 0x00000004 }, - { 0x000d002a, 0x00000038 }, - { 0x0000f184, 0x00000004 }, - { 0x000d002c, 0x00000038 }, - { 0x0000f185, 0x00000004 }, - { 0x000d002e, 0x00000038 }, - { 0x0000f186, 0x00000004 }, - { 0x000d0030, 0x00000038 }, - { 0x0000f187, 0x00000004 }, - { 0x000d0032, 0x00000038 }, - { 0x0000f180, 0x00000004 }, - { 0x000d0034, 0x00000038 }, - { 0x0000f393, 0x00000004 }, - { 0x000d0036, 0x00000038 }, - { 0x0000f38a, 0x00000004 }, - { 0x000d0038, 0x00000038 }, - { 0x0000f38e, 0x00000004 }, - { 0x0000e821, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00000043, 0x00000018 }, - { 0x00cce800, 0x00000004 }, - { 0x001b0001, 0x00000004 }, - { 0x08004800, 0x00000004 }, - { 0x001b0001, 0x00000004 }, - { 0x08004800, 0x00000004 }, - { 0x001b0001, 0x00000004 }, - { 0x08004800, 0x00000004 }, - { 0x0000003a, 0x00000008 }, - { 0x0000a000, 0000000000 }, - { 0x02c0a000, 0x00000004 }, - { 0x000ca000, 0x00000004 }, - { 0x00130000, 0x00000004 }, - { 0x000c2000, 0x00000004 }, - { 0xc980c045, 0x00000008 }, - { 0x2000451d, 0x00000004 }, - { 0x0000e580, 0x00000004 }, - { 0x000ce581, 0x00000004 }, - { 0x08004580, 0x00000004 }, - { 0x000ce581, 0x00000004 }, - { 0x0000004c, 0x00000008 }, - { 0x0000a000, 0000000000 }, - { 0x000c2000, 0x00000004 }, - { 0x0000e50e, 0x00000004 }, - { 0x00032000, 0x00000004 }, - { 0x00022056, 0x00000028 }, - { 0x00000056, 0x00000024 }, - { 0x0800450f, 0x00000004 }, - { 0x0000a050, 0x00000008 }, - { 0x0000e565, 0x00000004 }, - { 0x0000e566, 0x00000004 }, - { 0x00000057, 0x00000008 }, - { 0x03cca5b4, 0x00000004 }, - { 0x05432000, 0x00000004 }, - { 0x00022000, 0x00000004 }, - { 0x4ccce063, 0x00000030 }, - { 0x08274565, 0x00000004 }, - { 0x00000063, 0x00000030 }, - { 0x08004564, 0x00000004 }, - { 0x0000e566, 0x00000004 }, - { 0x0000005a, 0x00000008 }, - { 0x00802066, 0x00000010 }, - { 0x00202000, 0x00000004 }, - { 0x001b00ff, 0x00000004 }, - { 0x01000069, 0x00000010 }, - { 0x001f2000, 0x00000004 }, - { 0x001c00ff, 0x00000004 }, - { 0000000000, 0x0000000c }, - { 0x00000085, 0x00000030 }, - { 0x0000005a, 0x00000008 }, - { 0x0000e576, 0x00000004 }, - { 0x000ca000, 0x00000004 }, - { 0x00012000, 0x00000004 }, - { 0x00082000, 0x00000004 }, - { 0x1800650e, 0x00000004 }, - { 0x00092000, 0x00000004 }, - { 0x000a2000, 0x00000004 }, - { 0x000f0000, 0x00000004 }, - { 0x00400000, 0x00000004 }, - { 0x00000079, 0x00000018 }, - { 0x0000e563, 0x00000004 }, - { 0x00c0e5f9, 0x000000c2 }, - { 0x0000006e, 0x00000008 }, - { 0x0000a06e, 0x00000008 }, - { 0x0000e576, 0x00000004 }, - { 0x0000e577, 0x00000004 }, - { 0x0000e50e, 0x00000004 }, - { 0x0000e50f, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x0000007c, 0x00000018 }, - { 0x00c0e5f9, 0x000000c2 }, - { 0x0000007c, 0x00000008 }, - { 0x0014e50e, 0x00000004 }, - { 0x0040e50f, 0x00000004 }, - { 0x00c0007f, 0x00000008 }, - { 0x0000e570, 0x00000004 }, - { 0x0000e571, 0x00000004 }, - { 0x0000e572, 0x0000000c }, - { 0x0000a000, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x0000e568, 0x00000004 }, - { 0x000c2000, 0x00000004 }, - { 0x00000089, 0x00000018 }, - { 0x000b0000, 0x00000004 }, - { 0x18c0e562, 0x00000004 }, - { 0x0000008b, 0x00000008 }, - { 0x00c0008a, 0x00000008 }, - { 0x000700e4, 0x00000004 }, - { 0x00000097, 0x00000038 }, - { 0x000ca099, 0x00000030 }, - { 0x080045bb, 0x00000004 }, - { 0x000c209a, 0x00000030 }, - { 0x0800e5bc, 0000000000 }, - { 0x0000e5bb, 0x00000004 }, - { 0x0000e5bc, 0000000000 }, - { 0x00120000, 0x0000000c }, - { 0x00120000, 0x00000004 }, - { 0x001b0002, 0x0000000c }, - { 0x0000a000, 0x00000004 }, - { 0x0000e821, 0x00000004 }, - { 0x0000e800, 0000000000 }, - { 0x0000e821, 0x00000004 }, - { 0x0000e82e, 0000000000 }, - { 0x02cca000, 0x00000004 }, - { 0x00140000, 0x00000004 }, - { 0x000ce1cc, 0x00000004 }, - { 0x050de1cd, 0x00000004 }, - { 0x000000a7, 0x00000020 }, - { 0x4200e000, 0000000000 }, - { 0x000000ae, 0x00000038 }, - { 0x000ca000, 0x00000004 }, - { 0x00140000, 0x00000004 }, - { 0x000c2000, 0x00000004 }, - { 0x00160000, 0x00000004 }, - { 0x700ce000, 0x00000004 }, - { 0x001400aa, 0x00000008 }, - { 0x4000e000, 0000000000 }, - { 0x02400000, 0x00000004 }, - { 0x400ee000, 0x00000004 }, - { 0x02400000, 0x00000004 }, - { 0x4000e000, 0000000000 }, - { 0x000c2000, 0x00000004 }, - { 0x0240e51b, 0x00000004 }, - { 0x0080e50a, 0x00000005 }, - { 0x0080e50b, 0x00000005 }, - { 0x00220000, 0x00000004 }, - { 0x000700e4, 0x00000004 }, - { 0x000000c1, 0x00000038 }, - { 0x000c209a, 0x00000030 }, - { 0x0880e5bd, 0x00000005 }, - { 0x000c2099, 0x00000030 }, - { 0x0800e5bb, 0x00000005 }, - { 0x000c209a, 0x00000030 }, - { 0x0880e5bc, 0x00000005 }, - { 0x000000c4, 0x00000008 }, - { 0x0080e5bd, 0x00000005 }, - { 0x0000e5bb, 0x00000005 }, - { 0x0080e5bc, 0x00000005 }, - { 0x00210000, 0x00000004 }, - { 0x02800000, 0x00000004 }, - { 0x00c000c8, 0x00000018 }, - { 0x4180e000, 0x00000040 }, - { 0x000000ca, 0x00000024 }, - { 0x01000000, 0x0000000c }, - { 0x0100e51d, 0x0000000c }, - { 0x000045bb, 0x00000004 }, - { 0x000080c4, 0x00000008 }, - { 0x0000f3ce, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00cc2000, 0x00000004 }, - { 0x08c053cf, 0x00000040 }, - { 0x00008000, 0000000000 }, - { 0x0000f3d2, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00cc2000, 0x00000004 }, - { 0x08c053d3, 0x00000040 }, - { 0x00008000, 0000000000 }, - { 0x0000f39d, 0x00000004 }, - { 0x0140a000, 0x00000004 }, - { 0x00cc2000, 0x00000004 }, - { 0x08c0539e, 0x00000040 }, - { 0x00008000, 0000000000 }, - { 0x03c00830, 0x00000004 }, - { 0x4200e000, 0000000000 }, - { 0x0000a000, 0x00000004 }, - { 0x200045e0, 0x00000004 }, - { 0x0000e5e1, 0000000000 }, - { 0x00000001, 0000000000 }, - { 0x000700e1, 0x00000004 }, - { 0x0800e394, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, - { 0000000000, 0000000000 }, -}; +static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) +{ + u32 ret; + RADEON_WRITE(R520_MC_IND_INDEX, 0x7f0000 | (addr & 0xff)); + ret = RADEON_READ(R520_MC_IND_DATA); + RADEON_WRITE(R520_MC_IND_INDEX, 0); + return ret; +} + +static u32 RS480_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) +{ + u32 ret; + RADEON_WRITE(RS480_NB_MC_INDEX, addr & 0xff); + ret = RADEON_READ(RS480_NB_MC_DATA); + RADEON_WRITE(RS480_NB_MC_INDEX, 0xff); + return ret; +} + +static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) +{ + u32 ret; + RADEON_WRITE(RS690_MC_INDEX, (addr & RS690_MC_INDEX_MASK)); + ret = RADEON_READ(RS690_MC_DATA); + RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_MASK); + return ret; +} + +static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) +{ + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + return RS690_READ_MCIND(dev_priv, addr); + else + return RS480_READ_MCIND(dev_priv, addr); +} + +u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv) +{ + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) + return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) + return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION); + else + return RADEON_READ(RADEON_MC_FB_LOCATION); +} + +static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) +{ + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) + R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) + R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc); + else + RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc); +} + +static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc) +{ + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) + R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc); + else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) + R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc); + else + RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc); +} static int RADEON_READ_PLL(struct drm_device * dev, int addr) { @@ -830,15 +126,6 @@ return RADEON_READ(RADEON_PCIE_DATA); } -static u32 RADEON_READ_IGPGART(drm_radeon_private_t *dev_priv, int addr) -{ - u32 ret; - RADEON_WRITE(RADEON_IGPGART_INDEX, addr & 0x7f); - ret = RADEON_READ(RADEON_IGPGART_DATA); - RADEON_WRITE(RADEON_IGPGART_INDEX, 0x7f); - return ret; -} - #if RADEON_FIFO_DEBUG static void radeon_status(drm_radeon_private_t * dev_priv) { @@ -873,16 +160,36 @@ dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT); - tmp |= RADEON_RB3D_DC_FLUSH_ALL; - RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp); - - for (i = 0; i < dev_priv->usec_timeout; i++) { - if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT) - & RADEON_RB3D_DC_BUSY)) { - return 0; + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { + tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT); + tmp |= RADEON_RB3D_DC_FLUSH_ALL; + RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp); + + for (i = 0; i < dev_priv->usec_timeout; i++) { + if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT) + & RADEON_RB3D_DC_BUSY)) { + return 0; + } + DRM_UDELAY(1); + } + } else { + /* 3D */ + tmp = RADEON_READ(R300_RB3D_DSTCACHE_CTLSTAT); + tmp |= RADEON_RB3D_DC_FLUSH_ALL; + RADEON_WRITE(R300_RB3D_DSTCACHE_CTLSTAT, tmp); + + /* 2D */ + tmp = RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT); + tmp |= RADEON_RB3D_DC_FLUSH_ALL; + RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp); + + for (i = 0; i < dev_priv->usec_timeout; i++) { + if (!(RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT) + & RADEON_RB3D_DC_BUSY)) { + return 0; + } + DRM_UDELAY(1); } - DRM_UDELAY(1); } #if RADEON_FIFO_DEBUG @@ -939,6 +246,50 @@ return -EBUSY; } +static void radeon_init_pipes(drm_radeon_private_t * dev_priv) +{ + uint32_t gb_tile_config, gb_pipe_sel = 0; + + /* RS4xx/RS6xx/R4xx/R5xx */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) { + gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT); + dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; + } else { + /* R3xx */ + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { + dev_priv->num_gb_pipes = 2; + } else { + /* R3Vxx */ + dev_priv->num_gb_pipes = 1; + } + } + DRM_INFO("Num pipes: %d\n", dev_priv->num_gb_pipes); + + gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 /*| R300_SUBPIXEL_1_16*/); + + switch(dev_priv->num_gb_pipes) { + case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break; + case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break; + case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break; + default: + case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break; + } + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { + RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); + RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1)); + } + RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config); + radeon_do_wait_for_idle(dev_priv); + RADEON_WRITE(R300_DST_PIPE_CONFIG, RADEON_READ(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG); + RADEON_WRITE(R300_RB2D_DSTCACHE_MODE, (RADEON_READ(R300_RB2D_DSTCACHE_MODE) | + R300_DC_AUTOFLUSH_ENABLE | + R300_DC_DC_DISABLE_IGNORE_PE)); + + +} + /* ================================================================ * CP control, initialization */ @@ -953,7 +304,22 @@ RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0); - if (dev_priv->microcode_version == UCODE_R200) { + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) { + DRM_INFO("Loading R100 Microcode\n"); + for (i = 0; i < 256; i++) { + RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, + R100_cp_microcode[i][1]); + RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, + R100_cp_microcode[i][0]); + } + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) { DRM_INFO("Loading R200 Microcode\n"); for (i = 0; i < 256; i++) { RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, @@ -961,7 +327,11 @@ RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, R200_cp_microcode[i][0]); } - } else if (dev_priv->microcode_version == UCODE_R300) { + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) { DRM_INFO("Loading R300 Microcode\n"); for (i = 0; i < 256; i++) { RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, @@ -969,12 +339,35 @@ RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, R300_cp_microcode[i][0]); } - } else { + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) { + DRM_INFO("Loading R400 Microcode\n"); for (i = 0; i < 256; i++) { RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, - radeon_cp_microcode[i][1]); + R420_cp_microcode[i][1]); RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, - radeon_cp_microcode[i][0]); + R420_cp_microcode[i][0]); + } + } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) { + DRM_INFO("Loading RS690 Microcode\n"); + for (i = 0; i < 256; i++) { + RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, + RS690_cp_microcode[i][1]); + RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, + RS690_cp_microcode[i][0]); + } + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R580) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) { + DRM_INFO("Loading R500 Microcode\n"); + for (i = 0; i < 256; i++) { + RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, + R520_cp_microcode[i][1]); + RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, + R520_cp_microcode[i][0]); } } } @@ -1069,21 +462,24 @@ static int radeon_do_engine_reset(struct drm_device * dev) { drm_radeon_private_t *dev_priv = dev->dev_private; - u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset; + u32 clock_cntl_index = 0, mclk_cntl = 0, rbbm_soft_reset; DRM_DEBUG("\n"); radeon_do_pixcache_flush(dev_priv); - clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX); - mclk_cntl = RADEON_READ_PLL(dev, RADEON_MCLK_CNTL); - - RADEON_WRITE_PLL(RADEON_MCLK_CNTL, (mclk_cntl | - RADEON_FORCEON_MCLKA | - RADEON_FORCEON_MCLKB | - RADEON_FORCEON_YCLKA | - RADEON_FORCEON_YCLKB | - RADEON_FORCEON_MC | - RADEON_FORCEON_AIC)); + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) { + /* may need something similar for newer chips */ + clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX); + mclk_cntl = RADEON_READ_PLL(dev, RADEON_MCLK_CNTL); + + RADEON_WRITE_PLL(RADEON_MCLK_CNTL, (mclk_cntl | + RADEON_FORCEON_MCLKA | + RADEON_FORCEON_MCLKB | + RADEON_FORCEON_YCLKA | + RADEON_FORCEON_YCLKB | + RADEON_FORCEON_MC | + RADEON_FORCEON_AIC)); + } rbbm_soft_reset = RADEON_READ(RADEON_RBBM_SOFT_RESET); @@ -1106,9 +502,15 @@ RADEON_SOFT_RESET_RB))); RADEON_READ(RADEON_RBBM_SOFT_RESET); - RADEON_WRITE_PLL(RADEON_MCLK_CNTL, mclk_cntl); - RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index); - RADEON_WRITE(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset); + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) { + RADEON_WRITE_PLL(RADEON_MCLK_CNTL, mclk_cntl); + RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index); + RADEON_WRITE(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset); + } + + /* setup the raster pipes */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) + radeon_init_pipes(dev_priv); /* Reset the CP ring */ radeon_do_cp_reset(dev_priv); @@ -1127,21 +529,23 @@ { u32 ring_start, cur_read_ptr; u32 tmp; - + /* Initialize the memory controller. With new memory map, the fb location * is not changed, it should have been properly initialized already. Part * of the problem is that the code below is bogus, assuming the GART is * always appended to the fb which is not necessarily the case */ if (!dev_priv->new_memmap) - RADEON_WRITE(RADEON_MC_FB_LOCATION, + radeon_write_fb_location(dev_priv, ((dev_priv->gart_vm_start - 1) & 0xffff0000) | (dev_priv->fb_location >> 16)); #if __OS_HAS_AGP if (dev_priv->flags & RADEON_IS_AGP) { RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base); - RADEON_WRITE(RADEON_MC_AGP_LOCATION, + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R200) + RADEON_WRITE(RADEON_AGP_BASE_2, 0); + radeon_write_agp_location(dev_priv, (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) & 0xffff0000) | (dev_priv->gart_vm_start >> 16))); @@ -1284,40 +688,79 @@ /* Enable or disable IGP GART on the chip */ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on) { - u32 temp, tmp; + u32 temp; - tmp = RADEON_READ(RADEON_AIC_CNTL); - DRM_DEBUG("setting igpgart AIC CNTL is %08X\n", tmp); if (on) { - DRM_DEBUG("programming igpgart %08X %08lX %08X\n", + DRM_DEBUG("programming igp gart %08X %08lX %08X\n", dev_priv->gart_vm_start, (long)dev_priv->gart_info.bus_addr, dev_priv->gart_size); - RADEON_WRITE_IGPGART(RADEON_IGPGART_UNK_18, 0x1000); - RADEON_WRITE_IGPGART(RADEON_IGPGART_ENABLE, 0x1); - RADEON_WRITE_IGPGART(RADEON_IGPGART_CTRL, 0x42040800); - RADEON_WRITE_IGPGART(RADEON_IGPGART_BASE_ADDR, - dev_priv->gart_info.bus_addr); + temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL); - temp = RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_UNK_39); - RADEON_WRITE_IGPGART(RADEON_IGPGART_UNK_39, temp); + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN | + RS690_BLOCK_GFX_D3_EN)); + else + IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN); + + IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | + RS480_VA_SIZE_32MB)); + + temp = IGP_READ_MCIND(dev_priv, RS480_GART_FEATURE_ID); + IGP_WRITE_MCIND(RS480_GART_FEATURE_ID, (RS480_HANG_EN | + RS480_TLB_ENABLE | + RS480_GTW_LAC_EN | + RS480_1LEVEL_GART)); + + temp = dev_priv->gart_info.bus_addr & 0xfffff000; + temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4; + IGP_WRITE_MCIND(RS480_GART_BASE, temp); + + temp = IGP_READ_MCIND(dev_priv, RS480_AGP_MODE_CNTL); + IGP_WRITE_MCIND(RS480_AGP_MODE_CNTL, ((1 << RS480_REQ_TYPE_SNOOP_SHIFT) | + RS480_REQ_TYPE_SNOOP_DIS)); + + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) { + IGP_WRITE_MCIND(RS690_MC_AGP_BASE, + (unsigned int)dev_priv->gart_vm_start); + IGP_WRITE_MCIND(RS690_MC_AGP_BASE_2, 0); + } else { + RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev_priv->gart_vm_start); + RADEON_WRITE(RS480_AGP_BASE_2, 0); + } - RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev_priv->gart_vm_start); dev_priv->gart_size = 32*1024*1024; - RADEON_WRITE(RADEON_MC_AGP_LOCATION, - (((dev_priv->gart_vm_start - 1 + - dev_priv->gart_size) & 0xffff0000) | - (dev_priv->gart_vm_start >> 16))); + temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) & + 0xffff0000) | (dev_priv->gart_vm_start >> 16)); + + radeon_write_agp_location(dev_priv, temp); - temp = RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_ENABLE); - RADEON_WRITE_IGPGART(RADEON_IGPGART_ENABLE, temp); + temp = IGP_READ_MCIND(dev_priv, RS480_AGP_ADDRESS_SPACE_SIZE); + IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | + RS480_VA_SIZE_32MB)); + + do { + temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL); + if ((temp & RS480_GART_CACHE_INVALIDATE) == 0) + break; + DRM_UDELAY(1); + } while(1); + + IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, + RS480_GART_CACHE_INVALIDATE); - RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH); - RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x1); - RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH); - RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0); - } + do { + temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL); + if ((temp & RS480_GART_CACHE_INVALIDATE) == 0) + break; + DRM_UDELAY(1); + } while(1); + + IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, 0); + } else { + IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, 0); + } } static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on) @@ -1339,7 +782,7 @@ dev_priv->gart_vm_start + dev_priv->gart_size - 1); - RADEON_WRITE(RADEON_MC_AGP_LOCATION, 0xffffffc0); /* ?? */ + radeon_write_agp_location(dev_priv, 0xffffffc0); /* ?? */ RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, RADEON_PCIE_TX_GART_EN); @@ -1354,7 +797,8 @@ { u32 tmp; - if (dev_priv->flags & RADEON_IS_IGPGART) { + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + (dev_priv->flags & RADEON_IS_IGPGART)) { radeon_set_igpgart(dev_priv, on); return; } @@ -1364,7 +808,7 @@ return; } - tmp = RADEON_READ(RADEON_AIC_CNTL); + tmp = RADEON_READ(RADEON_AIC_CNTL); if (on) { RADEON_WRITE(RADEON_AIC_CNTL, @@ -1382,7 +826,7 @@ /* Turn off AGP aperture -- is this required for PCI GART? */ - RADEON_WRITE(RADEON_MC_AGP_LOCATION, 0xffffffc0); /* ?? */ + radeon_write_agp_location(dev_priv, 0xffffffc0); RADEON_WRITE(RADEON_AGP_COMMAND, 0); /* clear AGP_COMMAND */ } else { RADEON_WRITE(RADEON_AIC_CNTL, @@ -1590,10 +1034,9 @@ dev->agp_buffer_map->handle); } - dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION) - & 0xffff) << 16; - dev_priv->fb_size = - ((RADEON_READ(RADEON_MC_FB_LOCATION) & 0xffff0000u) + 0x10000) + dev_priv->fb_location = (radeon_read_fb_location(dev_priv) & 0xffff) << 16; + dev_priv->fb_size = + ((radeon_read_fb_location(dev_priv) & 0xffff0000u) + 0x10000) - dev_priv->fb_location; dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) | @@ -1639,7 +1082,7 @@ ((base + dev_priv->gart_size) & 0xfffffffful) < base) base = dev_priv->fb_location - dev_priv->gart_size; - } + } dev_priv->gart_vm_start = base & 0xffc00000u; if (dev_priv->gart_vm_start != base) DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n", @@ -1689,12 +1132,13 @@ } else #endif { + dev_priv->gart_info.table_mask = DMA_BIT_MASK(32); /* if we have an offset set from userspace */ if (dev_priv->pcigart_offset_set) { dev_priv->gart_info.bus_addr = dev_priv->pcigart_offset + dev_priv->fb_location; dev_priv->gart_info.mapping.offset = - dev_priv->gart_info.bus_addr; + dev_priv->pcigart_offset + dev_priv->fb_aper_offset; dev_priv->gart_info.mapping.size = dev_priv->gart_info.table_size; @@ -1845,7 +1289,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (init->func == RADEON_INIT_R300_CP) - r300_init_reg_flags(); + r300_init_reg_flags(dev); switch (init->func) { case RADEON_INIT_CP: @@ -1867,12 +1311,12 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (dev_priv->cp_running) { - DRM_DEBUG("%s while CP running\n", __FUNCTION__); + DRM_DEBUG("while CP running\n"); return 0; } if (dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS) { - DRM_DEBUG("%s called with bogus CP mode (%d)\n", - __FUNCTION__, dev_priv->cp_mode); + DRM_DEBUG("called with bogus CP mode (%d)\n", + dev_priv->cp_mode); return 0; } @@ -1938,7 +1382,7 @@ schedule(); #else #if defined(__FreeBSD__) && __FreeBSD_version > 500000 - msleep(&ret, &dev->dev_lock, PZERO, "rdnrel", + mtx_sleep(&ret, &dev->dev_lock, PZERO, "rdnrel", 1); #else tsleep(&ret, PZERO, "rdnrel", 1); @@ -1982,7 +1426,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_DEBUG("%s called before init done\n", __FUNCTION__); + DRM_DEBUG("called before init done\n"); return -EINVAL; } @@ -2259,6 +1703,10 @@ case CHIP_R350: case CHIP_R420: case CHIP_RV410: + case CHIP_RV515: + case CHIP_R520: + case CHIP_RV570: + case CHIP_R580: dev_priv->flags |= RADEON_HAS_HIERZ; break; default: @@ -2295,7 +1743,8 @@ if (ret != 0) return ret; - ret = drm_addmap(dev, drm_get_resource_start(dev, 0), + dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0); + ret = drm_addmap(dev, dev_priv->fb_aper_offset, drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, &map); if (ret != 0) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_drm.h --- libdrm-2.3.0.16/shared-core/radeon_drm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_drm.h 2008-07-01 08:50:43.000000000 +0100 @@ -225,9 +225,22 @@ #define R300_CMD_WAIT 7 # define R300_WAIT_2D 0x1 # define R300_WAIT_3D 0x2 +/* these two defines are DOING IT WRONG - however + * we have userspace which relies on using these. + * The wait interface is backwards compat new + * code should use the NEW_WAIT defines below + * THESE ARE NOT BIT FIELDS + */ # define R300_WAIT_2D_CLEAN 0x3 # define R300_WAIT_3D_CLEAN 0x4 + +# define R300_NEW_WAIT_2D_3D 0x3 +# define R300_NEW_WAIT_2D_2D_CLEAN 0x4 +# define R300_NEW_WAIT_3D_3D_CLEAN 0x6 +# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8 + #define R300_CMD_SCRATCH 8 +#define R300_CMD_R500FP 9 typedef union { unsigned int u; @@ -256,6 +269,9 @@ struct { unsigned char cmd_type, reg, n_bufs, flags; } scratch; + struct { + unsigned char cmd_type, count, adrlo, adrhi_flags; + } r500fp; } drm_r300_cmd_header_t; #define RADEON_FRONT 0x1 @@ -266,6 +282,9 @@ #define RADEON_USE_HIERZ 0x40000000 #define RADEON_USE_COMP_ZBUF 0x20000000 +#define R500FP_CONSTANT_TYPE (1 << 1) +#define R500FP_CONSTANT_CLAMP (1 << 2) + /* Primitive types */ #define RADEON_POINTS 0x1 @@ -434,17 +453,8 @@ int pfCurrentPage; /* which buffer is being displayed? */ int crtc2_base; /* CRTC2 frame offset */ int tiling_enabled; /* set by drm, read by 2d + 3d clients */ - - unsigned int last_fence; } drm_radeon_sarea_t; -/* The only fence class we support */ -#define DRM_RADEON_FENCE_CLASS_ACCEL 0 -/* Fence type that guarantees read-write flush */ -#define DRM_RADEON_FENCE_TYPE_RW 2 -/* cache flushes programmed just before the fence */ -#define DRM_RADEON_FENCE_FLAG_FLUSHED 0x01000000 - /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmRadeon.h) * @@ -665,6 +675,8 @@ #define RADEON_PARAM_SCRATCH_OFFSET 11 #define RADEON_PARAM_CARD_TYPE 12 #define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */ +#define RADEON_PARAM_FB_LOCATION 14 /* FB location */ +#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ typedef struct drm_radeon_getparam { int param; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_drv.h --- libdrm-2.3.0.16/shared-core/radeon_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -38,7 +38,7 @@ #define DRIVER_NAME "radeon" #define DRIVER_DESC "ATI Radeon" -#define DRIVER_DATE "20060524" +#define DRIVER_DATE "20080528" /* Interface history: * @@ -98,10 +98,11 @@ * 1.26- Add support for variable size PCI(E) gart aperture * 1.27- Add support for IGP GART * 1.28- Add support for VBL on CRTC2 + * 1.29- R500 3D cmd buffer support */ #define DRIVER_MAJOR 1 -#define DRIVER_MINOR 28 +#define DRIVER_MINOR 29 #define DRIVER_PATCHLEVEL 0 /* @@ -123,7 +124,14 @@ CHIP_RV380, CHIP_R420, CHIP_RV410, - CHIP_RS400, + CHIP_RS480, + CHIP_RS690, + CHIP_RV515, + CHIP_R520, + CHIP_RV530, + CHIP_RV560, + CHIP_RV570, + CHIP_R580, CHIP_LAST, }; @@ -289,19 +297,25 @@ int vblank_crtc; uint32_t irq_enable_reg; int irq_enabled; + uint32_t r500_disp_irq_reg; struct radeon_surface surfaces[RADEON_MAX_SURFACES]; - struct radeon_virt_surface virt_surfaces[2*RADEON_MAX_SURFACES]; + struct radeon_virt_surface virt_surfaces[2 * RADEON_MAX_SURFACES]; unsigned long pcigart_offset; unsigned int pcigart_offset_set; - struct ati_pcigart_info gart_info; + struct drm_ati_pcigart_info gart_info; u32 scratch_ages[5]; + unsigned int crtc_last_cnt; + unsigned int crtc2_last_cnt; + /* starting from here on, data is preserved accross an open */ uint32_t flags; /* see radeon_chip_flags */ + unsigned long fb_aper_offset; + int num_gb_pipes; } drm_radeon_private_t; typedef struct drm_radeon_buf_priv { @@ -344,6 +358,7 @@ extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); +extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv); extern void radeon_freelist_reset(struct drm_device * dev); extern struct drm_buf *radeon_freelist_get(struct drm_device * dev); @@ -364,13 +379,12 @@ extern int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_priv); extern void radeon_do_release(struct drm_device * dev); -extern int radeon_driver_vblank_wait(struct drm_device * dev, - unsigned int *sequence); -extern int radeon_driver_vblank_wait2(struct drm_device * dev, - unsigned int *sequence); +extern u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc); +extern int radeon_enable_vblank(struct drm_device *dev, int crtc); +extern void radeon_disable_vblank(struct drm_device *dev, int crtc); extern irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS); extern void radeon_driver_irq_preinstall(struct drm_device * dev); -extern void radeon_driver_irq_postinstall(struct drm_device * dev); +extern int radeon_driver_irq_postinstall(struct drm_device * dev); extern void radeon_driver_irq_uninstall(struct drm_device * dev); extern int radeon_vblank_crtc_get(struct drm_device *dev); extern int radeon_vblank_crtc_set(struct drm_device *dev, int64_t value); @@ -389,11 +403,11 @@ unsigned long arg); /* r300_cmdbuf.c */ -extern void r300_init_reg_flags(void); +extern void r300_init_reg_flags(struct drm_device *dev); extern int r300_do_cp_cmdbuf(struct drm_device *dev, struct drm_file *file_priv, - drm_radeon_kcmd_buffer_t* cmdbuf); + drm_radeon_kcmd_buffer_t *cmdbuf); /* Flags for stats.boxes */ @@ -435,37 +449,113 @@ #define RADEON_PCIE_INDEX 0x0030 #define RADEON_PCIE_DATA 0x0034 #define RADEON_PCIE_TX_GART_CNTL 0x10 -# define RADEON_PCIE_TX_GART_EN (1 << 0) -# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_PASS_THRU (0<<1) -# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_CLAMP_LO (1<<1) -# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD (3<<1) -# define RADEON_PCIE_TX_GART_MODE_32_128_CACHE (0<<3) -# define RADEON_PCIE_TX_GART_MODE_8_4_128_CACHE (1<<3) -# define RADEON_PCIE_TX_GART_CHK_RW_VALID_EN (1<<5) -# define RADEON_PCIE_TX_GART_INVALIDATE_TLB (1<<8) +# define RADEON_PCIE_TX_GART_EN (1 << 0) +# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_PASS_THRU (0 << 1) +# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_CLAMP_LO (1 << 1) +# define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD (3 << 1) +# define RADEON_PCIE_TX_GART_MODE_32_128_CACHE (0 << 3) +# define RADEON_PCIE_TX_GART_MODE_8_4_128_CACHE (1 << 3) +# define RADEON_PCIE_TX_GART_CHK_RW_VALID_EN (1 << 5) +# define RADEON_PCIE_TX_GART_INVALIDATE_TLB (1 << 8) #define RADEON_PCIE_TX_DISCARD_RD_ADDR_LO 0x11 #define RADEON_PCIE_TX_DISCARD_RD_ADDR_HI 0x12 -#define RADEON_PCIE_TX_GART_BASE 0x13 +#define RADEON_PCIE_TX_GART_BASE 0x13 #define RADEON_PCIE_TX_GART_START_LO 0x14 #define RADEON_PCIE_TX_GART_START_HI 0x15 #define RADEON_PCIE_TX_GART_END_LO 0x16 #define RADEON_PCIE_TX_GART_END_HI 0x17 -#define RADEON_IGPGART_INDEX 0x168 -#define RADEON_IGPGART_DATA 0x16c -#define RADEON_IGPGART_UNK_18 0x18 -#define RADEON_IGPGART_CTRL 0x2b -#define RADEON_IGPGART_BASE_ADDR 0x2c -#define RADEON_IGPGART_FLUSH 0x2e -#define RADEON_IGPGART_ENABLE 0x38 -#define RADEON_IGPGART_UNK_39 0x39 +#define RS480_NB_MC_INDEX 0x168 +# define RS480_NB_MC_IND_WR_EN (1 << 8) +#define RS480_NB_MC_DATA 0x16c + +#define RS690_MC_INDEX 0x78 +# define RS690_MC_INDEX_MASK 0x1ff +# define RS690_MC_INDEX_WR_EN (1 << 9) +# define RS690_MC_INDEX_WR_ACK 0x7f +#define RS690_MC_DATA 0x7c + +/* MC indirect registers */ +#define RS480_MC_MISC_CNTL 0x18 +# define RS480_DISABLE_GTW (1 << 1) +/* switch between MCIND GART and MM GART registers. 0 = mmgart, 1 = mcind gart */ +# define RS480_GART_INDEX_REG_EN (1 << 12) +# define RS690_BLOCK_GFX_D3_EN (1 << 14) +#define RS480_K8_FB_LOCATION 0x1e +#define RS480_GART_FEATURE_ID 0x2b +# define RS480_HANG_EN (1 << 11) +# define RS480_TLB_ENABLE (1 << 18) +# define RS480_P2P_ENABLE (1 << 19) +# define RS480_GTW_LAC_EN (1 << 25) +# define RS480_2LEVEL_GART (0 << 30) +# define RS480_1LEVEL_GART (1 << 30) +# define RS480_PDC_EN (1 << 31) +#define RS480_GART_BASE 0x2c +#define RS480_GART_CACHE_CNTRL 0x2e +# define RS480_GART_CACHE_INVALIDATE (1 << 0) /* wait for it to clear */ +#define RS480_AGP_ADDRESS_SPACE_SIZE 0x38 +# define RS480_GART_EN (1 << 0) +# define RS480_VA_SIZE_32MB (0 << 1) +# define RS480_VA_SIZE_64MB (1 << 1) +# define RS480_VA_SIZE_128MB (2 << 1) +# define RS480_VA_SIZE_256MB (3 << 1) +# define RS480_VA_SIZE_512MB (4 << 1) +# define RS480_VA_SIZE_1GB (5 << 1) +# define RS480_VA_SIZE_2GB (6 << 1) +#define RS480_AGP_MODE_CNTL 0x39 +# define RS480_POST_GART_Q_SIZE (1 << 18) +# define RS480_NONGART_SNOOP (1 << 19) +# define RS480_AGP_RD_BUF_SIZE (1 << 20) +# define RS480_REQ_TYPE_SNOOP_SHIFT 22 +# define RS480_REQ_TYPE_SNOOP_MASK 0x3 +# define RS480_REQ_TYPE_SNOOP_DIS (1 << 24) +#define RS480_MC_MISC_UMA_CNTL 0x5f +#define RS480_MC_MCLK_CNTL 0x7a +#define RS480_MC_UMA_DUALCH_CNTL 0x86 + +#define RS690_MC_FB_LOCATION 0x100 +#define RS690_MC_AGP_LOCATION 0x101 +#define RS690_MC_AGP_BASE 0x102 +#define RS690_MC_AGP_BASE_2 0x103 + +#define R520_MC_IND_INDEX 0x70 +#define R520_MC_IND_WR_EN (1 << 24) +#define R520_MC_IND_DATA 0x74 + +#define RV515_MC_FB_LOCATION 0x01 +#define RV515_MC_AGP_LOCATION 0x02 +#define R520_MC_FB_LOCATION 0x04 +#define R520_MC_AGP_LOCATION 0x05 #define RADEON_MPP_TB_CONFIG 0x01c0 #define RADEON_MEM_CNTL 0x0140 #define RADEON_MEM_SDRAM_MODE_REG 0x0158 +#define RADEON_AGP_BASE_2 0x015c /* r200+ only */ +#define RS480_AGP_BASE_2 0x0164 #define RADEON_AGP_BASE 0x0170 +/* pipe config regs */ +#define R400_GB_PIPE_SELECT 0x402c +#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ +#define R500_SU_REG_DEST 0x42c8 +#define R300_GB_TILE_CONFIG 0x4018 +# define R300_ENABLE_TILING (1 << 0) +# define R300_PIPE_COUNT_RV350 (0 << 1) +# define R300_PIPE_COUNT_R300 (3 << 1) +# define R300_PIPE_COUNT_R420_3P (6 << 1) +# define R300_PIPE_COUNT_R420 (7 << 1) +# define R300_TILE_SIZE_8 (0 << 4) +# define R300_TILE_SIZE_16 (1 << 4) +# define R300_TILE_SIZE_32 (2 << 4) +# define R300_SUBPIXEL_1_12 (0 << 16) +# define R300_SUBPIXEL_1_16 (1 << 16) +#define R300_DST_PIPE_CONFIG 0x170c +# define R300_PIPE_AUTO_CONFIG (1 << 31) +#define R300_RB2D_DSTCACHE_MODE 0x3428 +# define R300_DC_AUTOFLUSH_ENABLE (1 << 8) +# define R300_DC_DC_DISABLE_IGNORE_PE (1 << 17) + #define RADEON_RB3D_COLOROFFSET 0x1c40 #define RADEON_RB3D_COLORPITCH 0x1c48 @@ -511,6 +601,12 @@ ? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \ : RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) ) +#define RADEON_CRTC_CRNT_FRAME 0x0214 +#define RADEON_CRTC2_CRNT_FRAME 0x0314 + +#define RADEON_CRTC_STATUS 0x005c +#define RADEON_CRTC2_STATUS 0x03fc + #define RADEON_GEN_INT_CNTL 0x0040 # define RADEON_CRTC_VBLANK_MASK (1 << 0) # define RADEON_CRTC2_VBLANK_MASK (1 << 9) @@ -519,13 +615,15 @@ #define RADEON_GEN_INT_STATUS 0x0044 # define RADEON_CRTC_VBLANK_STAT (1 << 0) -# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) +# define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) # define RADEON_CRTC2_VBLANK_STAT (1 << 9) -# define RADEON_CRTC2_VBLANK_STAT_ACK (1 << 9) +# define RADEON_CRTC2_VBLANK_STAT_ACK (1 << 9) # define RADEON_GUI_IDLE_INT_TEST_ACK (1 << 19) # define RADEON_SW_INT_TEST (1 << 25) -# define RADEON_SW_INT_TEST_ACK (1 << 25) +# define RADEON_SW_INT_TEST_ACK (1 << 25) # define RADEON_SW_INT_FIRE (1 << 26) +# define R500_DISPLAY_INT_STATUS (1 << 0) + #define RADEON_HOST_PATH_CNTL 0x0130 # define RADEON_HDP_SOFT_RESET (1 << 26) @@ -596,11 +694,18 @@ # define RADEON_RB3D_ZC_FREE (1 << 2) # define RADEON_RB3D_ZC_FLUSH_ALL 0x5 # define RADEON_RB3D_ZC_BUSY (1 << 31) +#define R300_ZB_ZCACHE_CTLSTAT 0x4f18 +# define R300_ZC_FLUSH (1 << 0) +# define R300_ZC_FREE (1 << 1) +# define R300_ZC_FLUSH_ALL 0x3 +# define R300_ZC_BUSY (1 << 31) #define RADEON_RB3D_DSTCACHE_CTLSTAT 0x325c # define RADEON_RB3D_DC_FLUSH (3 << 0) # define RADEON_RB3D_DC_FREE (3 << 2) # define RADEON_RB3D_DC_FLUSH_ALL 0xf # define RADEON_RB3D_DC_BUSY (1 << 31) +#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c +# define R300_RB3D_DC_FINISH (1 << 4) #define RADEON_RB3D_ZSTENCILCNTL 0x1c2c # define RADEON_Z_TEST_MASK (7 << 4) # define RADEON_Z_TEST_ALWAYS (7 << 4) @@ -643,30 +748,30 @@ */ #define RADEON_RBBM_STATUS 0x0e40 /* Same as the previous RADEON_RBBM_STATUS; this is a mirror of that register. */ -/* #define RADEON_RBBM_STATUS 0x1740 */ +/* #define RADEON_RBBM_STATUS 0x1740 */ /* bits 6:0 are dword slots available in the cmd fifo */ # define RADEON_RBBM_FIFOCNT_MASK 0x007f -# define RADEON_HIRQ_ON_RBB (1 << 8) -# define RADEON_CPRQ_ON_RBB (1 << 9) -# define RADEON_CFRQ_ON_RBB (1 << 10) -# define RADEON_HIRQ_IN_RTBUF (1 << 11) -# define RADEON_CPRQ_IN_RTBUF (1 << 12) -# define RADEON_CFRQ_IN_RTBUF (1 << 13) -# define RADEON_PIPE_BUSY (1 << 14) -# define RADEON_ENG_EV_BUSY (1 << 15) -# define RADEON_CP_CMDSTRM_BUSY (1 << 16) -# define RADEON_E2_BUSY (1 << 17) -# define RADEON_RB2D_BUSY (1 << 18) -# define RADEON_RB3D_BUSY (1 << 19) /* not used on r300 */ -# define RADEON_VAP_BUSY (1 << 20) -# define RADEON_RE_BUSY (1 << 21) /* not used on r300 */ -# define RADEON_TAM_BUSY (1 << 22) /* not used on r300 */ -# define RADEON_TDM_BUSY (1 << 23) /* not used on r300 */ -# define RADEON_PB_BUSY (1 << 24) /* not used on r300 */ -# define RADEON_TIM_BUSY (1 << 25) /* not used on r300 */ -# define RADEON_GA_BUSY (1 << 26) -# define RADEON_CBA2D_BUSY (1 << 27) -# define RADEON_RBBM_ACTIVE (1 << 31) +# define RADEON_HIRQ_ON_RBB (1 << 8) +# define RADEON_CPRQ_ON_RBB (1 << 9) +# define RADEON_CFRQ_ON_RBB (1 << 10) +# define RADEON_HIRQ_IN_RTBUF (1 << 11) +# define RADEON_CPRQ_IN_RTBUF (1 << 12) +# define RADEON_CFRQ_IN_RTBUF (1 << 13) +# define RADEON_PIPE_BUSY (1 << 14) +# define RADEON_ENG_EV_BUSY (1 << 15) +# define RADEON_CP_CMDSTRM_BUSY (1 << 16) +# define RADEON_E2_BUSY (1 << 17) +# define RADEON_RB2D_BUSY (1 << 18) +# define RADEON_RB3D_BUSY (1 << 19) /* not used on r300 */ +# define RADEON_VAP_BUSY (1 << 20) +# define RADEON_RE_BUSY (1 << 21) /* not used on r300 */ +# define RADEON_TAM_BUSY (1 << 22) /* not used on r300 */ +# define RADEON_TDM_BUSY (1 << 23) /* not used on r300 */ +# define RADEON_PB_BUSY (1 << 24) /* not used on r300 */ +# define RADEON_TIM_BUSY (1 << 25) /* not used on r300 */ +# define RADEON_GA_BUSY (1 << 26) +# define RADEON_CBA2D_BUSY (1 << 27) +# define RADEON_RBBM_ACTIVE (1 << 31) #define RADEON_RE_LINE_PATTERN 0x1cd0 #define RADEON_RE_MISC 0x26c4 #define RADEON_RE_TOP_LEFT 0x26c0 @@ -1038,7 +1143,30 @@ #define RADEON_VHA_BACKFRAME0_OFF_V_2 0x1894 #define RADEON_VHA_BACKFRAME1_OFF_PITCH_V_2 0x1898 - +#define R500_D1CRTC_STATUS 0x609c +#define R500_D2CRTC_STATUS 0x689c +#define R500_CRTC_V_BLANK (1<<0) + +#define R500_D1CRTC_FRAME_COUNT 0x60a4 +#define R500_D2CRTC_FRAME_COUNT 0x68a4 + +#define R500_D1MODE_V_COUNTER 0x6530 +#define R500_D2MODE_V_COUNTER 0x6d30 + +#define R500_D1MODE_VBLANK_STATUS 0x6534 +#define R500_D2MODE_VBLANK_STATUS 0x6d34 +#define R500_VBLANK_OCCURED (1<<0) +#define R500_VBLANK_ACK (1<<4) +#define R500_VBLANK_STAT (1<<12) +#define R500_VBLANK_INT (1<<16) + +#define R500_DxMODE_INT_MASK 0x6540 +#define R500_D1MODE_INT_MASK (1<<0) +#define R500_D2MODE_INT_MASK (1<<8) + +#define R500_DISP_INTERRUPT_STATUS 0x7edc +#define R500_D1_VBLANK_INTERRUPT (1 << 4) +#define R500_D2_VBLANK_INTERRUPT (1 << 5) /* Constants */ #define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ @@ -1056,8 +1184,8 @@ #define RADEON_PCIGART_TABLE_SIZE (32*1024) -#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) -#define RADEON_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) +#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) +#define RADEON_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) #define RADEON_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) #define RADEON_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) @@ -1068,14 +1196,6 @@ RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \ } while (0) -#define RADEON_WRITE_IGPGART( addr, val ) \ -do { \ - RADEON_WRITE( RADEON_IGPGART_INDEX, \ - ((addr) & 0x7f) | (1 << 8)); \ - RADEON_WRITE( RADEON_IGPGART_DATA, (val) ); \ - RADEON_WRITE( RADEON_IGPGART_INDEX, 0x7f ); \ -} while (0) - #define RADEON_WRITE_PCIE( addr, val ) \ do { \ RADEON_WRITE8( RADEON_PCIE_INDEX, \ @@ -1083,6 +1203,36 @@ RADEON_WRITE( RADEON_PCIE_DATA, (val) ); \ } while (0) +#define R500_WRITE_MCIND( addr, val ) \ +do { \ + RADEON_WRITE(R520_MC_IND_INDEX, 0xff0000 | ((addr) & 0xff)); \ + RADEON_WRITE(R520_MC_IND_DATA, (val)); \ + RADEON_WRITE(R520_MC_IND_INDEX, 0); \ +} while (0) + +#define RS480_WRITE_MCIND( addr, val ) \ +do { \ + RADEON_WRITE( RS480_NB_MC_INDEX, \ + ((addr) & 0xff) | RS480_NB_MC_IND_WR_EN); \ + RADEON_WRITE( RS480_NB_MC_DATA, (val) ); \ + RADEON_WRITE( RS480_NB_MC_INDEX, 0xff ); \ +} while (0) + +#define RS690_WRITE_MCIND( addr, val ) \ +do { \ + RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_EN | ((addr) & RS690_MC_INDEX_MASK)); \ + RADEON_WRITE(RS690_MC_DATA, val); \ + RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); \ +} while (0) + +#define IGP_WRITE_MCIND( addr, val ) \ +do { \ + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) \ + RS690_WRITE_MCIND( addr, val ); \ + else \ + RS480_WRITE_MCIND( addr, val ); \ +} while (0) + #define CP_PACKET0( reg, n ) \ (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2)) #define CP_PACKET0_TABLE( reg, n ) \ @@ -1123,23 +1273,43 @@ } while (0) #define RADEON_FLUSH_CACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_DC_FLUSH ); \ + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ + OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( RADEON_RB3D_DC_FLUSH ); \ + } else { \ + OUT_RING( CP_PACKET0( R300_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( RADEON_RB3D_DC_FLUSH ); \ + } \ } while (0) #define RADEON_PURGE_CACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_DC_FLUSH_ALL ); \ + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ + OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( RADEON_RB3D_DC_FLUSH_ALL ); \ + } else { \ + OUT_RING( CP_PACKET0( R300_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( RADEON_RB3D_DC_FLUSH_ALL ); \ + } \ } while (0) #define RADEON_FLUSH_ZCACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH ); \ + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ + OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( RADEON_RB3D_ZC_FLUSH ); \ + } else { \ + OUT_RING( CP_PACKET0( R300_ZB_ZCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( R300_ZC_FLUSH ); \ + } \ } while (0) #define RADEON_PURGE_ZCACHE() do { \ - OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ - OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL ); \ + if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) { \ + OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL ); \ + } else { \ + OUT_RING( CP_PACKET0( R300_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ + OUT_RING( R300_ZC_FLUSH_ALL ); \ + } \ } while (0) /* ================================================================ @@ -1193,8 +1363,7 @@ #define BEGIN_RING( n ) do { \ if ( RADEON_VERBOSE ) { \ - DRM_INFO( "BEGIN_RING( %d ) in %s\n", \ - n, __FUNCTION__ ); \ + DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ } \ if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \ COMMIT_RING(); \ @@ -1212,7 +1381,7 @@ write, dev_priv->ring.tail ); \ } \ if (((dev_priv->ring.tail + _nr) & mask) != write) { \ - DRM_ERROR( \ + DRM_ERROR( \ "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ ((dev_priv->ring.tail + _nr) & mask), \ write, __LINE__); \ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_irq.c --- libdrm-2.3.0.16/shared-core/radeon_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -35,12 +35,130 @@ #include "radeon_drm.h" #include "radeon_drv.h" -static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv, - u32 mask) +static void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state) { - u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS) & mask; + drm_radeon_private_t *dev_priv = dev->dev_private; + + if (state) + dev_priv->irq_enable_reg |= mask; + else + dev_priv->irq_enable_reg &= ~mask; + + RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); +} + +static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + if (state) + dev_priv->r500_disp_irq_reg |= mask; + else + dev_priv->r500_disp_irq_reg &= ~mask; + + RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); +} + +int radeon_enable_vblank(struct drm_device *dev, int crtc) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + switch (crtc) { + case 0: + r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1); + break; + case 1: + r500_vbl_irq_set_state(dev, R500_D2MODE_INT_MASK, 1); + break; + default: + DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", + crtc); + return EINVAL; + } + } else { + switch (crtc) { + case 0: + radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 1); + break; + case 1: + radeon_irq_set_state(dev, RADEON_CRTC2_VBLANK_MASK, 1); + break; + default: + DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", + crtc); + return EINVAL; + } + } + + return 0; +} + +void radeon_disable_vblank(struct drm_device *dev, int crtc) +{ + drm_radeon_private_t *dev_priv = dev->dev_private; + + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + switch (crtc) { + case 0: + r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0); + break; + case 1: + r500_vbl_irq_set_state(dev, R500_D2MODE_INT_MASK, 0); + break; + default: + DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", + crtc); + break; + } + } else { + switch (crtc) { + case 0: + radeon_irq_set_state(dev, RADEON_CRTC_VBLANK_MASK, 0); + break; + case 1: + radeon_irq_set_state(dev, RADEON_CRTC2_VBLANK_MASK, 0); + break; + default: + DRM_ERROR("tried to enable vblank on non-existent crtc %d\n", + crtc); + break; + } + } +} + +static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv, u32 *r500_disp_int) +{ + u32 irqs = RADEON_READ(RADEON_GEN_INT_STATUS); + u32 irq_mask = RADEON_SW_INT_TEST; + + *r500_disp_int = 0; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + /* vbl interrupts in a different place */ + + if (irqs & R500_DISPLAY_INT_STATUS) { + /* if a display interrupt */ + u32 disp_irq; + + disp_irq = RADEON_READ(R500_DISP_INTERRUPT_STATUS); + + *r500_disp_int = disp_irq; + if (disp_irq & R500_D1_VBLANK_INTERRUPT) { + RADEON_WRITE(R500_D1MODE_VBLANK_STATUS, R500_VBLANK_ACK); + } + if (disp_irq & R500_D2_VBLANK_INTERRUPT) { + RADEON_WRITE(R500_D2MODE_VBLANK_STATUS, R500_VBLANK_ACK); + } + } + irq_mask |= R500_DISPLAY_INT_STATUS; + } else + irq_mask |= RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT; + + irqs &= irq_mask; + if (irqs) RADEON_WRITE(RADEON_GEN_INT_STATUS, irqs); + return irqs; } @@ -68,44 +186,33 @@ drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; u32 stat; + u32 r500_disp_int; /* Only consider the bits we're interested in - others could be used * outside the DRM */ - stat = radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK | - RADEON_CRTC_VBLANK_STAT | - RADEON_CRTC2_VBLANK_STAT)); + stat = radeon_acknowledge_irqs(dev_priv, &r500_disp_int); if (!stat) return IRQ_NONE; stat &= dev_priv->irq_enable_reg; /* SW interrupt */ - if (stat & RADEON_SW_INT_TEST) { + if (stat & RADEON_SW_INT_TEST) DRM_WAKEUP(&dev_priv->swi_queue); - } /* VBLANK interrupt */ - if (stat & (RADEON_CRTC_VBLANK_STAT|RADEON_CRTC2_VBLANK_STAT)) { - int vblank_crtc = dev_priv->vblank_crtc; - - if ((vblank_crtc & - (DRM_RADEON_VBLANK_CRTC1 | DRM_RADEON_VBLANK_CRTC2)) == - (DRM_RADEON_VBLANK_CRTC1 | DRM_RADEON_VBLANK_CRTC2)) { - if (stat & RADEON_CRTC_VBLANK_STAT) - atomic_inc(&dev->vbl_received); - if (stat & RADEON_CRTC2_VBLANK_STAT) - atomic_inc(&dev->vbl_received2); - } else if (((stat & RADEON_CRTC_VBLANK_STAT) && - (vblank_crtc & DRM_RADEON_VBLANK_CRTC1)) || - ((stat & RADEON_CRTC2_VBLANK_STAT) && - (vblank_crtc & DRM_RADEON_VBLANK_CRTC2))) - atomic_inc(&dev->vbl_received); - - DRM_WAKEUP(&dev->vbl_queue); - drm_vbl_send_signals(dev); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if (r500_disp_int & R500_D1_VBLANK_INTERRUPT) + drm_handle_vblank(dev, 0); + if (r500_disp_int & R500_D2_VBLANK_INTERRUPT) + drm_handle_vblank(dev, 1); + } else { + if (stat & RADEON_CRTC_VBLANK_STAT) + drm_handle_vblank(dev, 0); + if (stat & RADEON_CRTC2_VBLANK_STAT) + drm_handle_vblank(dev, 1); } - return IRQ_HANDLED; } @@ -144,55 +251,39 @@ return ret; } -static int radeon_driver_vblank_do_wait(struct drm_device * dev, - unsigned int *sequence, - int crtc) +u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc) { - drm_radeon_private_t *dev_priv = - (drm_radeon_private_t *) dev->dev_private; - unsigned int cur_vblank; - int ret = 0; - int ack = 0; - atomic_t *counter; + drm_radeon_private_t *dev_priv = dev->dev_private; + u32 crtc_cnt_reg, crtc_status_reg; + if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } - if (crtc == DRM_RADEON_VBLANK_CRTC1) { - counter = &dev->vbl_received; - ack |= RADEON_CRTC_VBLANK_STAT; - } else if (crtc == DRM_RADEON_VBLANK_CRTC2) { - counter = &dev->vbl_received2; - ack |= RADEON_CRTC2_VBLANK_STAT; - } else - return -EINVAL; - - radeon_acknowledge_irqs(dev_priv, ack); - - dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; - - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(counter)) - - *sequence) <= (1 << 23))); - - *sequence = cur_vblank; - - return ret; -} - -int radeon_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence) -{ - return radeon_driver_vblank_do_wait(dev, sequence, DRM_RADEON_VBLANK_CRTC1); -} - -int radeon_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence) -{ - return radeon_driver_vblank_do_wait(dev, sequence, DRM_RADEON_VBLANK_CRTC2); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + if (crtc == 0) { + crtc_cnt_reg = R500_D1CRTC_FRAME_COUNT; + crtc_status_reg = R500_D1CRTC_STATUS; + } else if (crtc == 1) { + crtc_cnt_reg = R500_D2CRTC_FRAME_COUNT; + crtc_status_reg = R500_D2CRTC_STATUS; + } else + return -EINVAL; + return RADEON_READ(crtc_cnt_reg) + (RADEON_READ(crtc_status_reg) & 1); + + } else { + if (crtc == 0) { + crtc_cnt_reg = RADEON_CRTC_CRNT_FRAME; + crtc_status_reg = RADEON_CRTC_STATUS; + } else if (crtc == 1) { + crtc_cnt_reg = RADEON_CRTC2_CRNT_FRAME; + crtc_status_reg = RADEON_CRTC2_STATUS; + } else { + return -EINVAL; + } + return RADEON_READ(crtc_cnt_reg) + (RADEON_READ(crtc_status_reg) & 1); + } } /* Needs the lock as it touches the ring. @@ -206,7 +297,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -228,53 +319,48 @@ drm_radeon_irq_wait_t *irqwait = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } return radeon_wait_irq(dev, irqwait->irq_seq); } -static void radeon_enable_interrupt(struct drm_device *dev) -{ - drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; - - dev_priv->irq_enable_reg = RADEON_SW_INT_ENABLE; - if (dev_priv->vblank_crtc & DRM_RADEON_VBLANK_CRTC1) - dev_priv->irq_enable_reg |= RADEON_CRTC_VBLANK_MASK; - - if (dev_priv->vblank_crtc & DRM_RADEON_VBLANK_CRTC2) - dev_priv->irq_enable_reg |= RADEON_CRTC2_VBLANK_MASK; - - RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); - dev_priv->irq_enabled = 1; -} - /* drm_dma.h hooks */ void radeon_driver_irq_preinstall(struct drm_device * dev) { drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; + u32 dummy; /* Disable *all* interrupts */ + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) + RADEON_WRITE(R500_DxMODE_INT_MASK, 0); RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); /* Clear bits if they're already high */ - radeon_acknowledge_irqs(dev_priv, (RADEON_SW_INT_TEST_ACK | - RADEON_CRTC_VBLANK_STAT | - RADEON_CRTC2_VBLANK_STAT)); + radeon_acknowledge_irqs(dev_priv, &dummy); } -void radeon_driver_irq_postinstall(struct drm_device * dev) +int radeon_driver_irq_postinstall(struct drm_device * dev) { drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; + int ret; atomic_set(&dev_priv->swi_emitted, 0); DRM_INIT_WAITQUEUE(&dev_priv->swi_queue); - radeon_enable_interrupt(dev); + ret = drm_vblank_init(dev, 2); + if (ret) + return ret; + + dev->max_vblank_count = 0x001fffff; + + radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1); + + return 0; } void radeon_driver_irq_uninstall(struct drm_device * dev) @@ -286,6 +372,8 @@ dev_priv->irq_enabled = 0; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) + RADEON_WRITE(R500_DxMODE_INT_MASK, 0); /* Disable *all* interrupts */ RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); } @@ -297,14 +385,23 @@ u32 flag; u32 value; - flag = RADEON_READ(RADEON_GEN_INT_CNTL); - value = 0; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) { + flag = RADEON_READ(R500_DxMODE_INT_MASK); + value = 0; + if (flag & R500_D1MODE_INT_MASK) + value |= DRM_RADEON_VBLANK_CRTC1; + + if (flag & R500_D2MODE_INT_MASK) + value |= DRM_RADEON_VBLANK_CRTC2; + } else { + flag = RADEON_READ(RADEON_GEN_INT_CNTL); + value = 0; + if (flag & RADEON_CRTC_VBLANK_MASK) + value |= DRM_RADEON_VBLANK_CRTC1; - if (flag & RADEON_CRTC_VBLANK_MASK) - value |= DRM_RADEON_VBLANK_CRTC1; - - if (flag & RADEON_CRTC2_VBLANK_MASK) - value |= DRM_RADEON_VBLANK_CRTC2; + if (flag & RADEON_CRTC2_VBLANK_MASK) + value |= DRM_RADEON_VBLANK_CRTC2; + } return value; } @@ -316,6 +413,5 @@ return -EINVAL; } dev_priv->vblank_crtc = (unsigned int)value; - radeon_enable_interrupt(dev); return 0; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_mem.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_mem.c --- libdrm-2.3.0.16/shared-core/radeon_mem.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_mem.c 2009-04-20 07:00:29.000000000 +0100 @@ -224,7 +224,7 @@ struct mem_block *block, **heap; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -259,7 +259,7 @@ struct mem_block *block, **heap; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -285,7 +285,7 @@ struct mem_block **heap; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_microcode.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_microcode.h --- libdrm-2.3.0.16/shared-core/radeon_microcode.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_microcode.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,1844 @@ +/* + * Copyright 2007 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef RADEON_MICROCODE_H +#define RADEON_MICROCODE_H + +/* production radeon ucode r1xx-r6xx */ +static const u32 R100_cp_microcode[][2]={ + { 0x21007000, 0000000000 }, + { 0x20007000, 0000000000 }, + { 0x000000b4, 0x00000004 }, + { 0x000000b8, 0x00000004 }, + { 0x6f5b4d4c, 0000000000 }, + { 0x4c4c427f, 0000000000 }, + { 0x5b568a92, 0000000000 }, + { 0x4ca09c6d, 0000000000 }, + { 0xad4c4c4c, 0000000000 }, + { 0x4ce1af3d, 0000000000 }, + { 0xd8afafaf, 0000000000 }, + { 0xd64c4cdc, 0000000000 }, + { 0x4cd10d10, 0000000000 }, + { 0x000f0000, 0x00000016 }, + { 0x362f242d, 0000000000 }, + { 0x00000012, 0x00000004 }, + { 0x000f0000, 0x00000016 }, + { 0x362f282d, 0000000000 }, + { 0x000380e7, 0x00000002 }, + { 0x04002c97, 0x00000002 }, + { 0x000f0001, 0x00000016 }, + { 0x333a3730, 0000000000 }, + { 0x000077ef, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x00000021, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00061000, 0x00000002 }, + { 0x00000021, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00061000, 0x00000002 }, + { 0x00000021, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00000017, 0x00000004 }, + { 0x0003802b, 0x00000002 }, + { 0x040067e0, 0x00000002 }, + { 0x00000017, 0x00000004 }, + { 0x000077e0, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x000037e1, 0x00000002 }, + { 0x040067e1, 0x00000006 }, + { 0x000077e0, 0x00000002 }, + { 0x000077e1, 0x00000002 }, + { 0x000077e1, 0x00000006 }, + { 0xffffffff, 0000000000 }, + { 0x10000000, 0000000000 }, + { 0x0003802b, 0x00000002 }, + { 0x040067e0, 0x00000006 }, + { 0x00007675, 0x00000002 }, + { 0x00007676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0003802c, 0x00000002 }, + { 0x04002676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0000002f, 0x00000018 }, + { 0x0000002f, 0x00000018 }, + { 0000000000, 0x00000006 }, + { 0x00000030, 0x00000018 }, + { 0x00000030, 0x00000018 }, + { 0000000000, 0x00000006 }, + { 0x01605000, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x00098000, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x64c0603e, 0x00000004 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00080000, 0x00000016 }, + { 0000000000, 0000000000 }, + { 0x0400251d, 0x00000002 }, + { 0x00007580, 0x00000002 }, + { 0x00067581, 0x00000002 }, + { 0x04002580, 0x00000002 }, + { 0x00067581, 0x00000002 }, + { 0x00000049, 0x00000004 }, + { 0x00005000, 0000000000 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x0000750e, 0x00000002 }, + { 0x00019000, 0x00000002 }, + { 0x00011055, 0x00000014 }, + { 0x00000055, 0x00000012 }, + { 0x0400250f, 0x00000002 }, + { 0x0000504f, 0x00000004 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00007565, 0x00000002 }, + { 0x00007566, 0x00000002 }, + { 0x00000058, 0x00000004 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x01e655b4, 0x00000002 }, + { 0x4401b0e4, 0x00000002 }, + { 0x01c110e4, 0x00000002 }, + { 0x26667066, 0x00000018 }, + { 0x040c2565, 0x00000002 }, + { 0x00000066, 0x00000018 }, + { 0x04002564, 0x00000002 }, + { 0x00007566, 0x00000002 }, + { 0x0000005d, 0x00000004 }, + { 0x00401069, 0x00000008 }, + { 0x00101000, 0x00000002 }, + { 0x000d80ff, 0x00000002 }, + { 0x0080006c, 0x00000008 }, + { 0x000f9000, 0x00000002 }, + { 0x000e00ff, 0x00000002 }, + { 0000000000, 0x00000006 }, + { 0x0000008f, 0x00000018 }, + { 0x0000005b, 0x00000004 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00007576, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x00009000, 0x00000002 }, + { 0x00041000, 0x00000002 }, + { 0x0c00350e, 0x00000002 }, + { 0x00049000, 0x00000002 }, + { 0x00051000, 0x00000002 }, + { 0x01e785f8, 0x00000002 }, + { 0x00200000, 0x00000002 }, + { 0x0060007e, 0x0000000c }, + { 0x00007563, 0x00000002 }, + { 0x006075f0, 0x00000021 }, + { 0x20007073, 0x00000004 }, + { 0x00005073, 0x00000004 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00007576, 0x00000002 }, + { 0x00007577, 0x00000002 }, + { 0x0000750e, 0x00000002 }, + { 0x0000750f, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00600083, 0x0000000c }, + { 0x006075f0, 0x00000021 }, + { 0x000075f8, 0x00000002 }, + { 0x00000083, 0x00000004 }, + { 0x000a750e, 0x00000002 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x0020750f, 0x00000002 }, + { 0x00600086, 0x00000004 }, + { 0x00007570, 0x00000002 }, + { 0x00007571, 0x00000002 }, + { 0x00007572, 0x00000006 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00005000, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00007568, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x00000095, 0x0000000c }, + { 0x00058000, 0x00000002 }, + { 0x0c607562, 0x00000002 }, + { 0x00000097, 0x00000004 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x00600096, 0x00000004 }, + { 0x400070e5, 0000000000 }, + { 0x000380e6, 0x00000002 }, + { 0x040025c5, 0x00000002 }, + { 0x000380e5, 0x00000002 }, + { 0x000000a8, 0x0000001c }, + { 0x000650aa, 0x00000018 }, + { 0x040025bb, 0x00000002 }, + { 0x000610ab, 0x00000018 }, + { 0x040075bc, 0000000000 }, + { 0x000075bb, 0x00000002 }, + { 0x000075bc, 0000000000 }, + { 0x00090000, 0x00000006 }, + { 0x00090000, 0x00000002 }, + { 0x000d8002, 0x00000006 }, + { 0x00007832, 0x00000002 }, + { 0x00005000, 0x00000002 }, + { 0x000380e7, 0x00000002 }, + { 0x04002c97, 0x00000002 }, + { 0x00007820, 0x00000002 }, + { 0x00007821, 0x00000002 }, + { 0x00007800, 0000000000 }, + { 0x01200000, 0x00000002 }, + { 0x20077000, 0x00000002 }, + { 0x01200000, 0x00000002 }, + { 0x20007000, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x0120751b, 0x00000002 }, + { 0x8040750a, 0x00000002 }, + { 0x8040750b, 0x00000002 }, + { 0x00110000, 0x00000002 }, + { 0x000380e5, 0x00000002 }, + { 0x000000c6, 0x0000001c }, + { 0x000610ab, 0x00000018 }, + { 0x844075bd, 0x00000002 }, + { 0x000610aa, 0x00000018 }, + { 0x840075bb, 0x00000002 }, + { 0x000610ab, 0x00000018 }, + { 0x844075bc, 0x00000002 }, + { 0x000000c9, 0x00000004 }, + { 0x804075bd, 0x00000002 }, + { 0x800075bb, 0x00000002 }, + { 0x804075bc, 0x00000002 }, + { 0x00108000, 0x00000002 }, + { 0x01400000, 0x00000002 }, + { 0x006000cd, 0x0000000c }, + { 0x20c07000, 0x00000020 }, + { 0x000000cf, 0x00000012 }, + { 0x00800000, 0x00000006 }, + { 0x0080751d, 0x00000006 }, + { 0000000000, 0000000000 }, + { 0x0000775c, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00661000, 0x00000002 }, + { 0x0460275d, 0x00000020 }, + { 0x00004000, 0000000000 }, + { 0x01e00830, 0x00000002 }, + { 0x21007000, 0000000000 }, + { 0x6464614d, 0000000000 }, + { 0x69687420, 0000000000 }, + { 0x00000073, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x00005000, 0x00000002 }, + { 0x000380d0, 0x00000002 }, + { 0x040025e0, 0x00000002 }, + { 0x000075e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000380e0, 0x00000002 }, + { 0x04002394, 0x00000002 }, + { 0x00005000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x00000008, 0000000000 }, + { 0x00000004, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + +static const u32 R200_cp_microcode[][2]={ + { 0x21007000, 0000000000 }, + { 0x20007000, 0000000000 }, + { 0x000000bf, 0x00000004 }, + { 0x000000c3, 0x00000004 }, + { 0x7a685e5d, 0000000000 }, + { 0x5d5d5588, 0000000000 }, + { 0x68659197, 0000000000 }, + { 0x5da19f78, 0000000000 }, + { 0x5d5d5d5d, 0000000000 }, + { 0x5dee5d50, 0000000000 }, + { 0xf2acacac, 0000000000 }, + { 0xe75df9e9, 0000000000 }, + { 0xb1dd0e11, 0000000000 }, + { 0xe2afafaf, 0000000000 }, + { 0x000f0000, 0x00000016 }, + { 0x452f232d, 0000000000 }, + { 0x00000013, 0x00000004 }, + { 0x000f0000, 0x00000016 }, + { 0x452f272d, 0000000000 }, + { 0x000f0001, 0x00000016 }, + { 0x3e4d4a37, 0000000000 }, + { 0x000077ef, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x00000020, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00061000, 0x00000002 }, + { 0x00000020, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00061000, 0x00000002 }, + { 0x00000020, 0x0000001a }, + { 0x00004000, 0x0000001e }, + { 0x00000016, 0x00000004 }, + { 0x0003802a, 0x00000002 }, + { 0x040067e0, 0x00000002 }, + { 0x00000016, 0x00000004 }, + { 0x000077e0, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x000037e1, 0x00000002 }, + { 0x040067e1, 0x00000006 }, + { 0x000077e0, 0x00000002 }, + { 0x000077e1, 0x00000002 }, + { 0x000077e1, 0x00000006 }, + { 0xffffffff, 0000000000 }, + { 0x10000000, 0000000000 }, + { 0x07f007f0, 0000000000 }, + { 0x0003802a, 0x00000002 }, + { 0x040067e0, 0x00000006 }, + { 0x0003802c, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002743, 0x00000002 }, + { 0x00007675, 0x00000002 }, + { 0x00007676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0003802c, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002743, 0x00000002 }, + { 0x00007676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0003802b, 0x00000002 }, + { 0x04002676, 0x00000002 }, + { 0x00007677, 0x00000002 }, + { 0x0003802c, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002743, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0003802c, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002741, 0x00000002 }, + { 0x04002743, 0x00000002 }, + { 0x00007678, 0x00000006 }, + { 0x0000002f, 0x00000018 }, + { 0x0000002f, 0x00000018 }, + { 0000000000, 0x00000006 }, + { 0x00000037, 0x00000018 }, + { 0x00000037, 0x00000018 }, + { 0000000000, 0x00000006 }, + { 0x01605000, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x00098000, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x64c06051, 0x00000004 }, + { 0x00080000, 0x00000016 }, + { 0000000000, 0000000000 }, + { 0x0400251d, 0x00000002 }, + { 0x00007580, 0x00000002 }, + { 0x00067581, 0x00000002 }, + { 0x04002580, 0x00000002 }, + { 0x00067581, 0x00000002 }, + { 0x0000005a, 0x00000004 }, + { 0x00005000, 0000000000 }, + { 0x00061000, 0x00000002 }, + { 0x0000750e, 0x00000002 }, + { 0x00019000, 0x00000002 }, + { 0x00011064, 0x00000014 }, + { 0x00000064, 0x00000012 }, + { 0x0400250f, 0x00000002 }, + { 0x0000505e, 0x00000004 }, + { 0x00007565, 0x00000002 }, + { 0x00007566, 0x00000002 }, + { 0x00000065, 0x00000004 }, + { 0x01e655b4, 0x00000002 }, + { 0x4401b0f0, 0x00000002 }, + { 0x01c110f0, 0x00000002 }, + { 0x26667071, 0x00000018 }, + { 0x040c2565, 0x00000002 }, + { 0x00000071, 0x00000018 }, + { 0x04002564, 0x00000002 }, + { 0x00007566, 0x00000002 }, + { 0x00000068, 0x00000004 }, + { 0x00401074, 0x00000008 }, + { 0x00101000, 0x00000002 }, + { 0x000d80ff, 0x00000002 }, + { 0x00800077, 0x00000008 }, + { 0x000f9000, 0x00000002 }, + { 0x000e00ff, 0x00000002 }, + { 0000000000, 0x00000006 }, + { 0x00000094, 0x00000018 }, + { 0x00000068, 0x00000004 }, + { 0x00007576, 0x00000002 }, + { 0x00065000, 0x00000002 }, + { 0x00009000, 0x00000002 }, + { 0x00041000, 0x00000002 }, + { 0x0c00350e, 0x00000002 }, + { 0x00049000, 0x00000002 }, + { 0x00051000, 0x00000002 }, + { 0x01e785f8, 0x00000002 }, + { 0x00200000, 0x00000002 }, + { 0x00600087, 0x0000000c }, + { 0x00007563, 0x00000002 }, + { 0x006075f0, 0x00000021 }, + { 0x2000707c, 0x00000004 }, + { 0x0000507c, 0x00000004 }, + { 0x00007576, 0x00000002 }, + { 0x00007577, 0x00000002 }, + { 0x0000750e, 0x00000002 }, + { 0x0000750f, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x0060008a, 0x0000000c }, + { 0x006075f0, 0x00000021 }, + { 0x000075f8, 0x00000002 }, + { 0x0000008a, 0x00000004 }, + { 0x000a750e, 0x00000002 }, + { 0x0020750f, 0x00000002 }, + { 0x0060008d, 0x00000004 }, + { 0x00007570, 0x00000002 }, + { 0x00007571, 0x00000002 }, + { 0x00007572, 0x00000006 }, + { 0x00005000, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00007568, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x00000098, 0x0000000c }, + { 0x00058000, 0x00000002 }, + { 0x0c607562, 0x00000002 }, + { 0x0000009a, 0x00000004 }, + { 0x00600099, 0x00000004 }, + { 0x400070f1, 0000000000 }, + { 0x000380f1, 0x00000002 }, + { 0x000000a7, 0x0000001c }, + { 0x000650a9, 0x00000018 }, + { 0x040025bb, 0x00000002 }, + { 0x000610aa, 0x00000018 }, + { 0x040075bc, 0000000000 }, + { 0x000075bb, 0x00000002 }, + { 0x000075bc, 0000000000 }, + { 0x00090000, 0x00000006 }, + { 0x00090000, 0x00000002 }, + { 0x000d8002, 0x00000006 }, + { 0x00005000, 0x00000002 }, + { 0x00007821, 0x00000002 }, + { 0x00007800, 0000000000 }, + { 0x00007821, 0x00000002 }, + { 0x00007800, 0000000000 }, + { 0x01665000, 0x00000002 }, + { 0x000a0000, 0x00000002 }, + { 0x000671cc, 0x00000002 }, + { 0x0286f1cd, 0x00000002 }, + { 0x000000b7, 0x00000010 }, + { 0x21007000, 0000000000 }, + { 0x000000be, 0x0000001c }, + { 0x00065000, 0x00000002 }, + { 0x000a0000, 0x00000002 }, + { 0x00061000, 0x00000002 }, + { 0x000b0000, 0x00000002 }, + { 0x38067000, 0x00000002 }, + { 0x000a00ba, 0x00000004 }, + { 0x20007000, 0000000000 }, + { 0x01200000, 0x00000002 }, + { 0x20077000, 0x00000002 }, + { 0x01200000, 0x00000002 }, + { 0x20007000, 0000000000 }, + { 0x00061000, 0x00000002 }, + { 0x0120751b, 0x00000002 }, + { 0x8040750a, 0x00000002 }, + { 0x8040750b, 0x00000002 }, + { 0x00110000, 0x00000002 }, + { 0x000380f1, 0x00000002 }, + { 0x000000d1, 0x0000001c }, + { 0x000610aa, 0x00000018 }, + { 0x844075bd, 0x00000002 }, + { 0x000610a9, 0x00000018 }, + { 0x840075bb, 0x00000002 }, + { 0x000610aa, 0x00000018 }, + { 0x844075bc, 0x00000002 }, + { 0x000000d4, 0x00000004 }, + { 0x804075bd, 0x00000002 }, + { 0x800075bb, 0x00000002 }, + { 0x804075bc, 0x00000002 }, + { 0x00108000, 0x00000002 }, + { 0x01400000, 0x00000002 }, + { 0x006000d8, 0x0000000c }, + { 0x20c07000, 0x00000020 }, + { 0x000000da, 0x00000012 }, + { 0x00800000, 0x00000006 }, + { 0x0080751d, 0x00000006 }, + { 0x000025bb, 0x00000002 }, + { 0x000040d4, 0x00000004 }, + { 0x0000775c, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00661000, 0x00000002 }, + { 0x0460275d, 0x00000020 }, + { 0x00004000, 0000000000 }, + { 0x00007999, 0x00000002 }, + { 0x00a05000, 0x00000002 }, + { 0x00661000, 0x00000002 }, + { 0x0460299b, 0x00000020 }, + { 0x00004000, 0000000000 }, + { 0x01e00830, 0x00000002 }, + { 0x21007000, 0000000000 }, + { 0x00005000, 0x00000002 }, + { 0x00038056, 0x00000002 }, + { 0x040025e0, 0x00000002 }, + { 0x000075e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000380ed, 0x00000002 }, + { 0x04007394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x000078c4, 0x00000002 }, + { 0x000078c5, 0x00000002 }, + { 0x000078c6, 0x00000002 }, + { 0x00007924, 0x00000002 }, + { 0x00007925, 0x00000002 }, + { 0x00007926, 0x00000002 }, + { 0x000000f2, 0x00000004 }, + { 0x00007924, 0x00000002 }, + { 0x00007925, 0x00000002 }, + { 0x00007926, 0x00000002 }, + { 0x000000f9, 0x00000004 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + +static const u32 R300_cp_microcode[][2]={ + { 0x4200e000, 0000000000 }, + { 0x4000e000, 0000000000 }, + { 0x000000ae, 0x00000008 }, + { 0x000000b2, 0x00000008 }, + { 0x67554b4a, 0000000000 }, + { 0x4a4a4475, 0000000000 }, + { 0x55527d83, 0000000000 }, + { 0x4a8c8b65, 0000000000 }, + { 0x4aef4af6, 0000000000 }, + { 0x4ae14a4a, 0000000000 }, + { 0xe4979797, 0000000000 }, + { 0xdb4aebdd, 0000000000 }, + { 0x9ccc4a4a, 0000000000 }, + { 0xd1989898, 0000000000 }, + { 0x4a0f9ad6, 0000000000 }, + { 0x000ca000, 0x00000004 }, + { 0x000d0012, 0x00000038 }, + { 0x0000e8b4, 0x00000004 }, + { 0x000d0014, 0x00000038 }, + { 0x0000e8b6, 0x00000004 }, + { 0x000d0016, 0x00000038 }, + { 0x0000e854, 0x00000004 }, + { 0x000d0018, 0x00000038 }, + { 0x0000e855, 0x00000004 }, + { 0x000d001a, 0x00000038 }, + { 0x0000e856, 0x00000004 }, + { 0x000d001c, 0x00000038 }, + { 0x0000e857, 0x00000004 }, + { 0x000d001e, 0x00000038 }, + { 0x0000e824, 0x00000004 }, + { 0x000d0020, 0x00000038 }, + { 0x0000e825, 0x00000004 }, + { 0x000d0022, 0x00000038 }, + { 0x0000e830, 0x00000004 }, + { 0x000d0024, 0x00000038 }, + { 0x0000f0c0, 0x00000004 }, + { 0x000d0026, 0x00000038 }, + { 0x0000f0c1, 0x00000004 }, + { 0x000d0028, 0x00000038 }, + { 0x0000f041, 0x00000004 }, + { 0x000d002a, 0x00000038 }, + { 0x0000f184, 0x00000004 }, + { 0x000d002c, 0x00000038 }, + { 0x0000f185, 0x00000004 }, + { 0x000d002e, 0x00000038 }, + { 0x0000f186, 0x00000004 }, + { 0x000d0030, 0x00000038 }, + { 0x0000f187, 0x00000004 }, + { 0x000d0032, 0x00000038 }, + { 0x0000f180, 0x00000004 }, + { 0x000d0034, 0x00000038 }, + { 0x0000f393, 0x00000004 }, + { 0x000d0036, 0x00000038 }, + { 0x0000f38a, 0x00000004 }, + { 0x000d0038, 0x00000038 }, + { 0x0000f38e, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000043, 0x00000018 }, + { 0x00cce800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x0000003a, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x2000451d, 0x00000004 }, + { 0x0000e580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x08004580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x00000047, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x00032000, 0x00000004 }, + { 0x00022051, 0x00000028 }, + { 0x00000051, 0x00000024 }, + { 0x0800450f, 0x00000004 }, + { 0x0000a04b, 0x00000008 }, + { 0x0000e565, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000052, 0x00000008 }, + { 0x03cca5b4, 0x00000004 }, + { 0x05432000, 0x00000004 }, + { 0x00022000, 0x00000004 }, + { 0x4ccce05e, 0x00000030 }, + { 0x08274565, 0x00000004 }, + { 0x0000005e, 0x00000030 }, + { 0x08004564, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000055, 0x00000008 }, + { 0x00802061, 0x00000010 }, + { 0x00202000, 0x00000004 }, + { 0x001b00ff, 0x00000004 }, + { 0x01000064, 0x00000010 }, + { 0x001f2000, 0x00000004 }, + { 0x001c00ff, 0x00000004 }, + { 0000000000, 0x0000000c }, + { 0x00000080, 0x00000030 }, + { 0x00000055, 0x00000008 }, + { 0x0000e576, 0x00000004 }, + { 0x000ca000, 0x00000004 }, + { 0x00012000, 0x00000004 }, + { 0x00082000, 0x00000004 }, + { 0x1800650e, 0x00000004 }, + { 0x00092000, 0x00000004 }, + { 0x000a2000, 0x00000004 }, + { 0x000f0000, 0x00000004 }, + { 0x00400000, 0x00000004 }, + { 0x00000074, 0x00000018 }, + { 0x0000e563, 0x00000004 }, + { 0x00c0e5f9, 0x000000c2 }, + { 0x00000069, 0x00000008 }, + { 0x0000a069, 0x00000008 }, + { 0x0000e576, 0x00000004 }, + { 0x0000e577, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x0000e50f, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000077, 0x00000018 }, + { 0x00c0e5f9, 0x000000c2 }, + { 0x00000077, 0x00000008 }, + { 0x0014e50e, 0x00000004 }, + { 0x0040e50f, 0x00000004 }, + { 0x00c0007a, 0x00000008 }, + { 0x0000e570, 0x00000004 }, + { 0x0000e571, 0x00000004 }, + { 0x0000e572, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x0000e568, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00000084, 0x00000018 }, + { 0x000b0000, 0x00000004 }, + { 0x18c0e562, 0x00000004 }, + { 0x00000086, 0x00000008 }, + { 0x00c00085, 0x00000008 }, + { 0x000700e3, 0x00000004 }, + { 0x00000092, 0x00000038 }, + { 0x000ca094, 0x00000030 }, + { 0x080045bb, 0x00000004 }, + { 0x000c2095, 0x00000030 }, + { 0x0800e5bc, 0000000000 }, + { 0x0000e5bb, 0x00000004 }, + { 0x0000e5bc, 0000000000 }, + { 0x00120000, 0x0000000c }, + { 0x00120000, 0x00000004 }, + { 0x001b0002, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e800, 0000000000 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e82e, 0000000000 }, + { 0x02cca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000ce1cc, 0x00000004 }, + { 0x050de1cd, 0x00000004 }, + { 0x00400000, 0x00000004 }, + { 0x000000a4, 0x00000018 }, + { 0x00c0a000, 0x00000004 }, + { 0x000000a1, 0x00000008 }, + { 0x000000a6, 0x00000020 }, + { 0x4200e000, 0000000000 }, + { 0x000000ad, 0x00000038 }, + { 0x000ca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00160000, 0x00000004 }, + { 0x700ce000, 0x00000004 }, + { 0x001400a9, 0x00000008 }, + { 0x4000e000, 0000000000 }, + { 0x02400000, 0x00000004 }, + { 0x400ee000, 0x00000004 }, + { 0x02400000, 0x00000004 }, + { 0x4000e000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0240e51b, 0x00000004 }, + { 0x0080e50a, 0x00000005 }, + { 0x0080e50b, 0x00000005 }, + { 0x00220000, 0x00000004 }, + { 0x000700e3, 0x00000004 }, + { 0x000000c0, 0x00000038 }, + { 0x000c2095, 0x00000030 }, + { 0x0880e5bd, 0x00000005 }, + { 0x000c2094, 0x00000030 }, + { 0x0800e5bb, 0x00000005 }, + { 0x000c2095, 0x00000030 }, + { 0x0880e5bc, 0x00000005 }, + { 0x000000c3, 0x00000008 }, + { 0x0080e5bd, 0x00000005 }, + { 0x0000e5bb, 0x00000005 }, + { 0x0080e5bc, 0x00000005 }, + { 0x00210000, 0x00000004 }, + { 0x02800000, 0x00000004 }, + { 0x00c000c7, 0x00000018 }, + { 0x4180e000, 0x00000040 }, + { 0x000000c9, 0x00000024 }, + { 0x01000000, 0x0000000c }, + { 0x0100e51d, 0x0000000c }, + { 0x000045bb, 0x00000004 }, + { 0x000080c3, 0x00000008 }, + { 0x0000f3ce, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053cf, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f3d2, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053d3, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f39d, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c0539e, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x03c00830, 0x00000004 }, + { 0x4200e000, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x200045e0, 0x00000004 }, + { 0x0000e5e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000700e0, 0x00000004 }, + { 0x0800e394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x0000e8c4, 0x00000004 }, + { 0x0000e8c5, 0x00000004 }, + { 0x0000e8c6, 0x00000004 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000e4, 0x00000008 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000eb, 0x00000008 }, + { 0x02c02000, 0x00000004 }, + { 0x00060000, 0x00000004 }, + { 0x000000f3, 0x00000034 }, + { 0x000000f0, 0x00000008 }, + { 0x00008000, 0x00000004 }, + { 0xc000e000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x001d0018, 0x00000004 }, + { 0x001a0001, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0x0500a04a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + +static const u32 R420_cp_microcode[][2]={ + { 0x4200e000, 0000000000 }, + { 0x4000e000, 0000000000 }, + { 0x00000099, 0x00000008 }, + { 0x0000009d, 0x00000008 }, + { 0x4a554b4a, 0000000000 }, + { 0x4a4a4467, 0000000000 }, + { 0x55526f75, 0000000000 }, + { 0x4a7e7d65, 0000000000 }, + { 0xd9d3dff6, 0000000000 }, + { 0x4ac54a4a, 0000000000 }, + { 0xc8828282, 0000000000 }, + { 0xbf4acfc1, 0000000000 }, + { 0x87b04a4a, 0000000000 }, + { 0xb5838383, 0000000000 }, + { 0x4a0f85ba, 0000000000 }, + { 0x000ca000, 0x00000004 }, + { 0x000d0012, 0x00000038 }, + { 0x0000e8b4, 0x00000004 }, + { 0x000d0014, 0x00000038 }, + { 0x0000e8b6, 0x00000004 }, + { 0x000d0016, 0x00000038 }, + { 0x0000e854, 0x00000004 }, + { 0x000d0018, 0x00000038 }, + { 0x0000e855, 0x00000004 }, + { 0x000d001a, 0x00000038 }, + { 0x0000e856, 0x00000004 }, + { 0x000d001c, 0x00000038 }, + { 0x0000e857, 0x00000004 }, + { 0x000d001e, 0x00000038 }, + { 0x0000e824, 0x00000004 }, + { 0x000d0020, 0x00000038 }, + { 0x0000e825, 0x00000004 }, + { 0x000d0022, 0x00000038 }, + { 0x0000e830, 0x00000004 }, + { 0x000d0024, 0x00000038 }, + { 0x0000f0c0, 0x00000004 }, + { 0x000d0026, 0x00000038 }, + { 0x0000f0c1, 0x00000004 }, + { 0x000d0028, 0x00000038 }, + { 0x0000f041, 0x00000004 }, + { 0x000d002a, 0x00000038 }, + { 0x0000f184, 0x00000004 }, + { 0x000d002c, 0x00000038 }, + { 0x0000f185, 0x00000004 }, + { 0x000d002e, 0x00000038 }, + { 0x0000f186, 0x00000004 }, + { 0x000d0030, 0x00000038 }, + { 0x0000f187, 0x00000004 }, + { 0x000d0032, 0x00000038 }, + { 0x0000f180, 0x00000004 }, + { 0x000d0034, 0x00000038 }, + { 0x0000f393, 0x00000004 }, + { 0x000d0036, 0x00000038 }, + { 0x0000f38a, 0x00000004 }, + { 0x000d0038, 0x00000038 }, + { 0x0000f38e, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000043, 0x00000018 }, + { 0x00cce800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x0000003a, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x2000451d, 0x00000004 }, + { 0x0000e580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x08004580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x00000047, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x00032000, 0x00000004 }, + { 0x00022051, 0x00000028 }, + { 0x00000051, 0x00000024 }, + { 0x0800450f, 0x00000004 }, + { 0x0000a04b, 0x00000008 }, + { 0x0000e565, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000052, 0x00000008 }, + { 0x03cca5b4, 0x00000004 }, + { 0x05432000, 0x00000004 }, + { 0x00022000, 0x00000004 }, + { 0x4ccce05e, 0x00000030 }, + { 0x08274565, 0x00000004 }, + { 0x0000005e, 0x00000030 }, + { 0x08004564, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000055, 0x00000008 }, + { 0x00802061, 0x00000010 }, + { 0x00202000, 0x00000004 }, + { 0x001b00ff, 0x00000004 }, + { 0x01000064, 0x00000010 }, + { 0x001f2000, 0x00000004 }, + { 0x001c00ff, 0x00000004 }, + { 0000000000, 0x0000000c }, + { 0x00000072, 0x00000030 }, + { 0x00000055, 0x00000008 }, + { 0x0000e576, 0x00000004 }, + { 0x0000e577, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x0000e50f, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000069, 0x00000018 }, + { 0x00c0e5f9, 0x000000c2 }, + { 0x00000069, 0x00000008 }, + { 0x0014e50e, 0x00000004 }, + { 0x0040e50f, 0x00000004 }, + { 0x00c0006c, 0x00000008 }, + { 0x0000e570, 0x00000004 }, + { 0x0000e571, 0x00000004 }, + { 0x0000e572, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x0000e568, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00000076, 0x00000018 }, + { 0x000b0000, 0x00000004 }, + { 0x18c0e562, 0x00000004 }, + { 0x00000078, 0x00000008 }, + { 0x00c00077, 0x00000008 }, + { 0x000700c7, 0x00000004 }, + { 0x00000080, 0x00000038 }, + { 0x0000e5bb, 0x00000004 }, + { 0x0000e5bc, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e800, 0000000000 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e82e, 0000000000 }, + { 0x02cca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000ce1cc, 0x00000004 }, + { 0x050de1cd, 0x00000004 }, + { 0x00400000, 0x00000004 }, + { 0x0000008f, 0x00000018 }, + { 0x00c0a000, 0x00000004 }, + { 0x0000008c, 0x00000008 }, + { 0x00000091, 0x00000020 }, + { 0x4200e000, 0000000000 }, + { 0x00000098, 0x00000038 }, + { 0x000ca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00160000, 0x00000004 }, + { 0x700ce000, 0x00000004 }, + { 0x00140094, 0x00000008 }, + { 0x4000e000, 0000000000 }, + { 0x02400000, 0x00000004 }, + { 0x400ee000, 0x00000004 }, + { 0x02400000, 0x00000004 }, + { 0x4000e000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0240e51b, 0x00000004 }, + { 0x0080e50a, 0x00000005 }, + { 0x0080e50b, 0x00000005 }, + { 0x00220000, 0x00000004 }, + { 0x000700c7, 0x00000004 }, + { 0x000000a4, 0x00000038 }, + { 0x0080e5bd, 0x00000005 }, + { 0x0000e5bb, 0x00000005 }, + { 0x0080e5bc, 0x00000005 }, + { 0x00210000, 0x00000004 }, + { 0x02800000, 0x00000004 }, + { 0x00c000ab, 0x00000018 }, + { 0x4180e000, 0x00000040 }, + { 0x000000ad, 0x00000024 }, + { 0x01000000, 0x0000000c }, + { 0x0100e51d, 0x0000000c }, + { 0x000045bb, 0x00000004 }, + { 0x000080a7, 0x00000008 }, + { 0x0000f3ce, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053cf, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f3d2, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053d3, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f39d, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c0539e, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x03c00830, 0x00000004 }, + { 0x4200e000, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x200045e0, 0x00000004 }, + { 0x0000e5e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000700c4, 0x00000004 }, + { 0x0800e394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x0000e8c4, 0x00000004 }, + { 0x0000e8c5, 0x00000004 }, + { 0x0000e8c6, 0x00000004 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000c8, 0x00000008 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000cf, 0x00000008 }, + { 0x02c02000, 0x00000004 }, + { 0x00060000, 0x00000004 }, + { 0x000000d7, 0x00000034 }, + { 0x000000d4, 0x00000008 }, + { 0x00008000, 0x00000004 }, + { 0xc000e000, 0000000000 }, + { 0x0000e1cc, 0x00000004 }, + { 0x0500e1cd, 0x00000004 }, + { 0x000ca000, 0x00000004 }, + { 0x000000de, 0x00000034 }, + { 0x000000da, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x0019e1cc, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x0500a000, 0x00000004 }, + { 0x080041cd, 0x00000004 }, + { 0x000ca000, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x001d0018, 0x00000004 }, + { 0x001a0001, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0x0500a04a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + +static const u32 RS600_cp_microcode[][2]={ + { 0x4200e000, 0000000000 }, + { 0x4000e000, 0000000000 }, + { 0x000000a0, 0x00000008 }, + { 0x000000a4, 0x00000008 }, + { 0x4a554b4a, 0000000000 }, + { 0x4a4a4467, 0000000000 }, + { 0x55526f75, 0000000000 }, + { 0x4a7e7d65, 0000000000 }, + { 0x4ae74af6, 0000000000 }, + { 0x4ad34a4a, 0000000000 }, + { 0xd6898989, 0000000000 }, + { 0xcd4addcf, 0000000000 }, + { 0x8ebe4ae2, 0000000000 }, + { 0xc38a8a8a, 0000000000 }, + { 0x4a0f8cc8, 0000000000 }, + { 0x000ca000, 0x00000004 }, + { 0x000d0012, 0x00000038 }, + { 0x0000e8b4, 0x00000004 }, + { 0x000d0014, 0x00000038 }, + { 0x0000e8b6, 0x00000004 }, + { 0x000d0016, 0x00000038 }, + { 0x0000e854, 0x00000004 }, + { 0x000d0018, 0x00000038 }, + { 0x0000e855, 0x00000004 }, + { 0x000d001a, 0x00000038 }, + { 0x0000e856, 0x00000004 }, + { 0x000d001c, 0x00000038 }, + { 0x0000e857, 0x00000004 }, + { 0x000d001e, 0x00000038 }, + { 0x0000e824, 0x00000004 }, + { 0x000d0020, 0x00000038 }, + { 0x0000e825, 0x00000004 }, + { 0x000d0022, 0x00000038 }, + { 0x0000e830, 0x00000004 }, + { 0x000d0024, 0x00000038 }, + { 0x0000f0c0, 0x00000004 }, + { 0x000d0026, 0x00000038 }, + { 0x0000f0c1, 0x00000004 }, + { 0x000d0028, 0x00000038 }, + { 0x0000f041, 0x00000004 }, + { 0x000d002a, 0x00000038 }, + { 0x0000f184, 0x00000004 }, + { 0x000d002c, 0x00000038 }, + { 0x0000f185, 0x00000004 }, + { 0x000d002e, 0x00000038 }, + { 0x0000f186, 0x00000004 }, + { 0x000d0030, 0x00000038 }, + { 0x0000f187, 0x00000004 }, + { 0x000d0032, 0x00000038 }, + { 0x0000f180, 0x00000004 }, + { 0x000d0034, 0x00000038 }, + { 0x0000f393, 0x00000004 }, + { 0x000d0036, 0x00000038 }, + { 0x0000f38a, 0x00000004 }, + { 0x000d0038, 0x00000038 }, + { 0x0000f38e, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000043, 0x00000018 }, + { 0x00cce800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x0000003a, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x2000451d, 0x00000004 }, + { 0x0000e580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x08004580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x00000047, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x00032000, 0x00000004 }, + { 0x00022051, 0x00000028 }, + { 0x00000051, 0x00000024 }, + { 0x0800450f, 0x00000004 }, + { 0x0000a04b, 0x00000008 }, + { 0x0000e565, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000052, 0x00000008 }, + { 0x03cca5b4, 0x00000004 }, + { 0x05432000, 0x00000004 }, + { 0x00022000, 0x00000004 }, + { 0x4ccce05e, 0x00000030 }, + { 0x08274565, 0x00000004 }, + { 0x0000005e, 0x00000030 }, + { 0x08004564, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000055, 0x00000008 }, + { 0x00802061, 0x00000010 }, + { 0x00202000, 0x00000004 }, + { 0x001b00ff, 0x00000004 }, + { 0x01000064, 0x00000010 }, + { 0x001f2000, 0x00000004 }, + { 0x001c00ff, 0x00000004 }, + { 0000000000, 0x0000000c }, + { 0x00000072, 0x00000030 }, + { 0x00000055, 0x00000008 }, + { 0x0000e576, 0x00000004 }, + { 0x0000e577, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x0000e50f, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000069, 0x00000018 }, + { 0x00c0e5f9, 0x000000c2 }, + { 0x00000069, 0x00000008 }, + { 0x0014e50e, 0x00000004 }, + { 0x0040e50f, 0x00000004 }, + { 0x00c0006c, 0x00000008 }, + { 0x0000e570, 0x00000004 }, + { 0x0000e571, 0x00000004 }, + { 0x0000e572, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x0000e568, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00000076, 0x00000018 }, + { 0x000b0000, 0x00000004 }, + { 0x18c0e562, 0x00000004 }, + { 0x00000078, 0x00000008 }, + { 0x00c00077, 0x00000008 }, + { 0x000700d5, 0x00000004 }, + { 0x00000084, 0x00000038 }, + { 0x000ca086, 0x00000030 }, + { 0x080045bb, 0x00000004 }, + { 0x000c2087, 0x00000030 }, + { 0x0800e5bc, 0000000000 }, + { 0x0000e5bb, 0x00000004 }, + { 0x0000e5bc, 0000000000 }, + { 0x00120000, 0x0000000c }, + { 0x00120000, 0x00000004 }, + { 0x001b0002, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e800, 0000000000 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e82e, 0000000000 }, + { 0x02cca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000ce1cc, 0x00000004 }, + { 0x050de1cd, 0x00000004 }, + { 0x00400000, 0x00000004 }, + { 0x00000096, 0x00000018 }, + { 0x00c0a000, 0x00000004 }, + { 0x00000093, 0x00000008 }, + { 0x00000098, 0x00000020 }, + { 0x4200e000, 0000000000 }, + { 0x0000009f, 0x00000038 }, + { 0x000ca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00160000, 0x00000004 }, + { 0x700ce000, 0x00000004 }, + { 0x0014009b, 0x00000008 }, + { 0x4000e000, 0000000000 }, + { 0x02400000, 0x00000004 }, + { 0x400ee000, 0x00000004 }, + { 0x02400000, 0x00000004 }, + { 0x4000e000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0240e51b, 0x00000004 }, + { 0x0080e50a, 0x00000005 }, + { 0x0080e50b, 0x00000005 }, + { 0x00220000, 0x00000004 }, + { 0x000700d5, 0x00000004 }, + { 0x000000b2, 0x00000038 }, + { 0x000c2087, 0x00000030 }, + { 0x0880e5bd, 0x00000005 }, + { 0x000c2086, 0x00000030 }, + { 0x0800e5bb, 0x00000005 }, + { 0x000c2087, 0x00000030 }, + { 0x0880e5bc, 0x00000005 }, + { 0x000000b5, 0x00000008 }, + { 0x0080e5bd, 0x00000005 }, + { 0x0000e5bb, 0x00000005 }, + { 0x0080e5bc, 0x00000005 }, + { 0x00210000, 0x00000004 }, + { 0x02800000, 0x00000004 }, + { 0x00c000b9, 0x00000018 }, + { 0x4180e000, 0x00000040 }, + { 0x000000bb, 0x00000024 }, + { 0x01000000, 0x0000000c }, + { 0x0100e51d, 0x0000000c }, + { 0x000045bb, 0x00000004 }, + { 0x000080b5, 0x00000008 }, + { 0x0000f3ce, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053cf, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f3d2, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053d3, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f39d, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c0539e, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x03c00830, 0x00000004 }, + { 0x4200e000, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x200045e0, 0x00000004 }, + { 0x0000e5e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000700d2, 0x00000004 }, + { 0x0800e394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x0000e8c4, 0x00000004 }, + { 0x0000e8c5, 0x00000004 }, + { 0x0000e8c6, 0x00000004 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000d6, 0x00000008 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000dd, 0x00000008 }, + { 0x00e00116, 0000000000 }, + { 0x000700e1, 0x00000004 }, + { 0x0800401c, 0x00000004 }, + { 0x200050e7, 0x00000004 }, + { 0x0000e01d, 0x00000004 }, + { 0x000000e4, 0x00000008 }, + { 0x02c02000, 0x00000004 }, + { 0x00060000, 0x00000004 }, + { 0x000000eb, 0x00000034 }, + { 0x000000e8, 0x00000008 }, + { 0x00008000, 0x00000004 }, + { 0xc000e000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x001d0018, 0x00000004 }, + { 0x001a0001, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0x0500a04a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + +static const u32 RS690_cp_microcode[][2]={ + { 0x000000dd, 0x00000008 }, + { 0x000000df, 0x00000008 }, + { 0x000000a0, 0x00000008 }, + { 0x000000a4, 0x00000008 }, + { 0x4a554b4a, 0000000000 }, + { 0x4a4a4467, 0000000000 }, + { 0x55526f75, 0000000000 }, + { 0x4a7e7d65, 0000000000 }, + { 0x4ad74af6, 0000000000 }, + { 0x4ac94a4a, 0000000000 }, + { 0xcc898989, 0000000000 }, + { 0xc34ad3c5, 0000000000 }, + { 0x8e4a4a4a, 0000000000 }, + { 0x4a8a8a8a, 0000000000 }, + { 0x4a0f8c4a, 0000000000 }, + { 0x000ca000, 0x00000004 }, + { 0x000d0012, 0x00000038 }, + { 0x0000e8b4, 0x00000004 }, + { 0x000d0014, 0x00000038 }, + { 0x0000e8b6, 0x00000004 }, + { 0x000d0016, 0x00000038 }, + { 0x0000e854, 0x00000004 }, + { 0x000d0018, 0x00000038 }, + { 0x0000e855, 0x00000004 }, + { 0x000d001a, 0x00000038 }, + { 0x0000e856, 0x00000004 }, + { 0x000d001c, 0x00000038 }, + { 0x0000e857, 0x00000004 }, + { 0x000d001e, 0x00000038 }, + { 0x0000e824, 0x00000004 }, + { 0x000d0020, 0x00000038 }, + { 0x0000e825, 0x00000004 }, + { 0x000d0022, 0x00000038 }, + { 0x0000e830, 0x00000004 }, + { 0x000d0024, 0x00000038 }, + { 0x0000f0c0, 0x00000004 }, + { 0x000d0026, 0x00000038 }, + { 0x0000f0c1, 0x00000004 }, + { 0x000d0028, 0x00000038 }, + { 0x0000f041, 0x00000004 }, + { 0x000d002a, 0x00000038 }, + { 0x0000f184, 0x00000004 }, + { 0x000d002c, 0x00000038 }, + { 0x0000f185, 0x00000004 }, + { 0x000d002e, 0x00000038 }, + { 0x0000f186, 0x00000004 }, + { 0x000d0030, 0x00000038 }, + { 0x0000f187, 0x00000004 }, + { 0x000d0032, 0x00000038 }, + { 0x0000f180, 0x00000004 }, + { 0x000d0034, 0x00000038 }, + { 0x0000f393, 0x00000004 }, + { 0x000d0036, 0x00000038 }, + { 0x0000f38a, 0x00000004 }, + { 0x000d0038, 0x00000038 }, + { 0x0000f38e, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000043, 0x00000018 }, + { 0x00cce800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x0000003a, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x2000451d, 0x00000004 }, + { 0x0000e580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x08004580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x00000047, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x00032000, 0x00000004 }, + { 0x00022051, 0x00000028 }, + { 0x00000051, 0x00000024 }, + { 0x0800450f, 0x00000004 }, + { 0x0000a04b, 0x00000008 }, + { 0x0000e565, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000052, 0x00000008 }, + { 0x03cca5b4, 0x00000004 }, + { 0x05432000, 0x00000004 }, + { 0x00022000, 0x00000004 }, + { 0x4ccce05e, 0x00000030 }, + { 0x08274565, 0x00000004 }, + { 0x0000005e, 0x00000030 }, + { 0x08004564, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000055, 0x00000008 }, + { 0x00802061, 0x00000010 }, + { 0x00202000, 0x00000004 }, + { 0x001b00ff, 0x00000004 }, + { 0x01000064, 0x00000010 }, + { 0x001f2000, 0x00000004 }, + { 0x001c00ff, 0x00000004 }, + { 0000000000, 0x0000000c }, + { 0x00000072, 0x00000030 }, + { 0x00000055, 0x00000008 }, + { 0x0000e576, 0x00000004 }, + { 0x0000e577, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x0000e50f, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000069, 0x00000018 }, + { 0x00c0e5f9, 0x000000c2 }, + { 0x00000069, 0x00000008 }, + { 0x0014e50e, 0x00000004 }, + { 0x0040e50f, 0x00000004 }, + { 0x00c0006c, 0x00000008 }, + { 0x0000e570, 0x00000004 }, + { 0x0000e571, 0x00000004 }, + { 0x0000e572, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x0000e568, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00000076, 0x00000018 }, + { 0x000b0000, 0x00000004 }, + { 0x18c0e562, 0x00000004 }, + { 0x00000078, 0x00000008 }, + { 0x00c00077, 0x00000008 }, + { 0x000700cb, 0x00000004 }, + { 0x00000084, 0x00000038 }, + { 0x000ca086, 0x00000030 }, + { 0x080045bb, 0x00000004 }, + { 0x000c2087, 0x00000030 }, + { 0x0800e5bc, 0000000000 }, + { 0x0000e5bb, 0x00000004 }, + { 0x0000e5bc, 0000000000 }, + { 0x00120000, 0x0000000c }, + { 0x00120000, 0x00000004 }, + { 0x001b0002, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e800, 0000000000 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e82e, 0000000000 }, + { 0x02cca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000ce1cc, 0x00000004 }, + { 0x050de1cd, 0x00000004 }, + { 0x00400000, 0x00000004 }, + { 0x00000096, 0x00000018 }, + { 0x00c0a000, 0x00000004 }, + { 0x00000093, 0x00000008 }, + { 0x00000098, 0x00000020 }, + { 0x4200e000, 0000000000 }, + { 0x0000009f, 0x00000038 }, + { 0x000ca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00160000, 0x00000004 }, + { 0x700ce000, 0x00000004 }, + { 0x0014009b, 0x00000008 }, + { 0x4000e000, 0000000000 }, + { 0x02400000, 0x00000004 }, + { 0x400ee000, 0x00000004 }, + { 0x02400000, 0x00000004 }, + { 0x4000e000, 0000000000 }, + { 0x00100000, 0x0000002c }, + { 0x00004000, 0000000000 }, + { 0x080045c8, 0x00000004 }, + { 0x00240005, 0x00000004 }, + { 0x08004d0b, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x0240e51b, 0x00000004 }, + { 0x0080e50a, 0x00000005 }, + { 0x0080e50b, 0x00000005 }, + { 0x00220000, 0x00000004 }, + { 0x000700cb, 0x00000004 }, + { 0x000000b7, 0x00000038 }, + { 0x000c2087, 0x00000030 }, + { 0x0880e5bd, 0x00000005 }, + { 0x000c2086, 0x00000030 }, + { 0x0800e5bb, 0x00000005 }, + { 0x000c2087, 0x00000030 }, + { 0x0880e5bc, 0x00000005 }, + { 0x000000ba, 0x00000008 }, + { 0x0080e5bd, 0x00000005 }, + { 0x0000e5bb, 0x00000005 }, + { 0x0080e5bc, 0x00000005 }, + { 0x00210000, 0x00000004 }, + { 0x02800000, 0x00000004 }, + { 0x00c000be, 0x00000018 }, + { 0x4180e000, 0x00000040 }, + { 0x000000c0, 0x00000024 }, + { 0x01000000, 0x0000000c }, + { 0x0100e51d, 0x0000000c }, + { 0x000045bb, 0x00000004 }, + { 0x000080ba, 0x00000008 }, + { 0x03c00830, 0x00000004 }, + { 0x4200e000, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x200045e0, 0x00000004 }, + { 0x0000e5e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000700c8, 0x00000004 }, + { 0x0800e394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x0000e8c4, 0x00000004 }, + { 0x0000e8c5, 0x00000004 }, + { 0x0000e8c6, 0x00000004 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000cc, 0x00000008 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000d3, 0x00000008 }, + { 0x02c02000, 0x00000004 }, + { 0x00060000, 0x00000004 }, + { 0x000000db, 0x00000034 }, + { 0x000000d8, 0x00000008 }, + { 0x00008000, 0x00000004 }, + { 0xc000e000, 0000000000 }, + { 0x000000e1, 0x00000030 }, + { 0x4200e000, 0000000000 }, + { 0x000000e1, 0x00000030 }, + { 0x4000e000, 0000000000 }, + { 0x0025001b, 0x00000004 }, + { 0x00230000, 0x00000004 }, + { 0x00250005, 0x00000004 }, + { 0x000000e6, 0x00000034 }, + { 0000000000, 0x0000000c }, + { 0x00244000, 0x00000004 }, + { 0x080045c8, 0x00000004 }, + { 0x00240005, 0x00000004 }, + { 0x08004d0b, 0x0000000c }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x001d0018, 0x00000004 }, + { 0x001a0001, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0x0500a04a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + +static const u32 R520_cp_microcode[][2]={ + { 0x4200e000, 0000000000 }, + { 0x4000e000, 0000000000 }, + { 0x00000099, 0x00000008 }, + { 0x0000009d, 0x00000008 }, + { 0x4a554b4a, 0000000000 }, + { 0x4a4a4467, 0000000000 }, + { 0x55526f75, 0000000000 }, + { 0x4a7e7d65, 0000000000 }, + { 0xe0dae6f6, 0000000000 }, + { 0x4ac54a4a, 0000000000 }, + { 0xc8828282, 0000000000 }, + { 0xbf4acfc1, 0000000000 }, + { 0x87b04ad5, 0000000000 }, + { 0xb5838383, 0000000000 }, + { 0x4a0f85ba, 0000000000 }, + { 0x000ca000, 0x00000004 }, + { 0x000d0012, 0x00000038 }, + { 0x0000e8b4, 0x00000004 }, + { 0x000d0014, 0x00000038 }, + { 0x0000e8b6, 0x00000004 }, + { 0x000d0016, 0x00000038 }, + { 0x0000e854, 0x00000004 }, + { 0x000d0018, 0x00000038 }, + { 0x0000e855, 0x00000004 }, + { 0x000d001a, 0x00000038 }, + { 0x0000e856, 0x00000004 }, + { 0x000d001c, 0x00000038 }, + { 0x0000e857, 0x00000004 }, + { 0x000d001e, 0x00000038 }, + { 0x0000e824, 0x00000004 }, + { 0x000d0020, 0x00000038 }, + { 0x0000e825, 0x00000004 }, + { 0x000d0022, 0x00000038 }, + { 0x0000e830, 0x00000004 }, + { 0x000d0024, 0x00000038 }, + { 0x0000f0c0, 0x00000004 }, + { 0x000d0026, 0x00000038 }, + { 0x0000f0c1, 0x00000004 }, + { 0x000d0028, 0x00000038 }, + { 0x0000e000, 0x00000004 }, + { 0x000d002a, 0x00000038 }, + { 0x0000e000, 0x00000004 }, + { 0x000d002c, 0x00000038 }, + { 0x0000e000, 0x00000004 }, + { 0x000d002e, 0x00000038 }, + { 0x0000e000, 0x00000004 }, + { 0x000d0030, 0x00000038 }, + { 0x0000e000, 0x00000004 }, + { 0x000d0032, 0x00000038 }, + { 0x0000f180, 0x00000004 }, + { 0x000d0034, 0x00000038 }, + { 0x0000f393, 0x00000004 }, + { 0x000d0036, 0x00000038 }, + { 0x0000f38a, 0x00000004 }, + { 0x000d0038, 0x00000038 }, + { 0x0000f38e, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000043, 0x00000018 }, + { 0x00cce800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x08004800, 0x00000004 }, + { 0x0000003a, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x2000451d, 0x00000004 }, + { 0x0000e580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x08004580, 0x00000004 }, + { 0x000ce581, 0x00000004 }, + { 0x00000047, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x00032000, 0x00000004 }, + { 0x00022051, 0x00000028 }, + { 0x00000051, 0x00000024 }, + { 0x0800450f, 0x00000004 }, + { 0x0000a04b, 0x00000008 }, + { 0x0000e565, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000052, 0x00000008 }, + { 0x03cca5b4, 0x00000004 }, + { 0x05432000, 0x00000004 }, + { 0x00022000, 0x00000004 }, + { 0x4ccce05e, 0x00000030 }, + { 0x08274565, 0x00000004 }, + { 0x0000005e, 0x00000030 }, + { 0x08004564, 0x00000004 }, + { 0x0000e566, 0x00000004 }, + { 0x00000055, 0x00000008 }, + { 0x00802061, 0x00000010 }, + { 0x00202000, 0x00000004 }, + { 0x001b00ff, 0x00000004 }, + { 0x01000064, 0x00000010 }, + { 0x001f2000, 0x00000004 }, + { 0x001c00ff, 0x00000004 }, + { 0000000000, 0x0000000c }, + { 0x00000072, 0x00000030 }, + { 0x00000055, 0x00000008 }, + { 0x0000e576, 0x00000004 }, + { 0x0000e577, 0x00000004 }, + { 0x0000e50e, 0x00000004 }, + { 0x0000e50f, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00000069, 0x00000018 }, + { 0x00c0e5f9, 0x000000c2 }, + { 0x00000069, 0x00000008 }, + { 0x0014e50e, 0x00000004 }, + { 0x0040e50f, 0x00000004 }, + { 0x00c0006c, 0x00000008 }, + { 0x0000e570, 0x00000004 }, + { 0x0000e571, 0x00000004 }, + { 0x0000e572, 0x0000000c }, + { 0x0000a000, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x0000e568, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00000076, 0x00000018 }, + { 0x000b0000, 0x00000004 }, + { 0x18c0e562, 0x00000004 }, + { 0x00000078, 0x00000008 }, + { 0x00c00077, 0x00000008 }, + { 0x000700c7, 0x00000004 }, + { 0x00000080, 0x00000038 }, + { 0x0000e5bb, 0x00000004 }, + { 0x0000e5bc, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e800, 0000000000 }, + { 0x0000e821, 0x00000004 }, + { 0x0000e82e, 0000000000 }, + { 0x02cca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000ce1cc, 0x00000004 }, + { 0x050de1cd, 0x00000004 }, + { 0x00400000, 0x00000004 }, + { 0x0000008f, 0x00000018 }, + { 0x00c0a000, 0x00000004 }, + { 0x0000008c, 0x00000008 }, + { 0x00000091, 0x00000020 }, + { 0x4200e000, 0000000000 }, + { 0x00000098, 0x00000038 }, + { 0x000ca000, 0x00000004 }, + { 0x00140000, 0x00000004 }, + { 0x000c2000, 0x00000004 }, + { 0x00160000, 0x00000004 }, + { 0x700ce000, 0x00000004 }, + { 0x00140094, 0x00000008 }, + { 0x4000e000, 0000000000 }, + { 0x02400000, 0x00000004 }, + { 0x400ee000, 0x00000004 }, + { 0x02400000, 0x00000004 }, + { 0x4000e000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x0240e51b, 0x00000004 }, + { 0x0080e50a, 0x00000005 }, + { 0x0080e50b, 0x00000005 }, + { 0x00220000, 0x00000004 }, + { 0x000700c7, 0x00000004 }, + { 0x000000a4, 0x00000038 }, + { 0x0080e5bd, 0x00000005 }, + { 0x0000e5bb, 0x00000005 }, + { 0x0080e5bc, 0x00000005 }, + { 0x00210000, 0x00000004 }, + { 0x02800000, 0x00000004 }, + { 0x00c000ab, 0x00000018 }, + { 0x4180e000, 0x00000040 }, + { 0x000000ad, 0x00000024 }, + { 0x01000000, 0x0000000c }, + { 0x0100e51d, 0x0000000c }, + { 0x000045bb, 0x00000004 }, + { 0x000080a7, 0x00000008 }, + { 0x0000f3ce, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053cf, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f3d2, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c053d3, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x0000f39d, 0x00000004 }, + { 0x0140a000, 0x00000004 }, + { 0x00cc2000, 0x00000004 }, + { 0x08c0539e, 0x00000040 }, + { 0x00008000, 0000000000 }, + { 0x03c00830, 0x00000004 }, + { 0x4200e000, 0000000000 }, + { 0x0000a000, 0x00000004 }, + { 0x200045e0, 0x00000004 }, + { 0x0000e5e1, 0000000000 }, + { 0x00000001, 0000000000 }, + { 0x000700c4, 0x00000004 }, + { 0x0800e394, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x0000e8c4, 0x00000004 }, + { 0x0000e8c5, 0x00000004 }, + { 0x0000e8c6, 0x00000004 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000c8, 0x00000008 }, + { 0x0000e928, 0x00000004 }, + { 0x0000e929, 0x00000004 }, + { 0x0000e92a, 0x00000004 }, + { 0x000000cf, 0x00000008 }, + { 0xdeadbeef, 0000000000 }, + { 0x00000116, 0000000000 }, + { 0x000700d3, 0x00000004 }, + { 0x080050e7, 0x00000004 }, + { 0x000700d4, 0x00000004 }, + { 0x0800401c, 0x00000004 }, + { 0x0000e01d, 0000000000 }, + { 0x02c02000, 0x00000004 }, + { 0x00060000, 0x00000004 }, + { 0x000000de, 0x00000034 }, + { 0x000000db, 0x00000008 }, + { 0x00008000, 0x00000004 }, + { 0xc000e000, 0000000000 }, + { 0x0000e1cc, 0x00000004 }, + { 0x0500e1cd, 0x00000004 }, + { 0x000ca000, 0x00000004 }, + { 0x000000e5, 0x00000034 }, + { 0x000000e1, 0x00000008 }, + { 0x0000a000, 0000000000 }, + { 0x0019e1cc, 0x00000004 }, + { 0x001b0001, 0x00000004 }, + { 0x0500a000, 0x00000004 }, + { 0x080041cd, 0x00000004 }, + { 0x000ca000, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0x000c2000, 0x00000004 }, + { 0x001d0018, 0x00000004 }, + { 0x001a0001, 0x00000004 }, + { 0x000000fb, 0x00000034 }, + { 0x0000004a, 0x00000008 }, + { 0x0500a04a, 0x00000008 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, + { 0000000000, 0000000000 }, +}; + + +#endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/radeon_state.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/radeon_state.c --- libdrm-2.3.0.16/shared-core/radeon_state.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/radeon_state.c 2009-04-20 07:00:29.000000000 +0100 @@ -898,7 +898,7 @@ int w = pbox[i].x2 - x; int h = pbox[i].y2 - y; - DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n", + DRM_DEBUG("%d,%d-%d,%d flags 0x%x\n", x, y, w, h, flags); if (flags & RADEON_FRONT) { @@ -1368,7 +1368,7 @@ int w = pbox[i].x2 - x; int h = pbox[i].y2 - y; - DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", x, y, w, h); + DRM_DEBUG("%d,%d-%d,%d\n", x, y, w, h); BEGIN_RING(9); @@ -1422,8 +1422,7 @@ int offset = (dev_priv->sarea_priv->pfCurrentPage == 1) ? dev_priv->front_offset : dev_priv->back_offset; RING_LOCALS; - DRM_DEBUG("%s: pfCurrentPage=%d\n", - __FUNCTION__, + DRM_DEBUG("pfCurrentPage=%d\n", dev_priv->sarea_priv->pfCurrentPage); /* Do some trivial performance monitoring... @@ -1562,7 +1561,7 @@ { drm_radeon_private_t *dev_priv = dev->dev_private; RING_LOCALS; - DRM_DEBUG("indirect: buf=%d s=0x%x e=0x%x\n", buf->idx, start, end); + DRM_DEBUG("buf=%d s=0x%x e=0x%x\n", buf->idx, start, end); if (start != end) { int offset = (dev_priv->gart_buffers_offset @@ -1663,7 +1662,7 @@ u32 height; int i; u32 texpitch, microtile; - u32 offset; + u32 offset, byte_offset; RING_LOCALS; if (radeon_check_and_fixup_offset(dev_priv, file_priv, &tex->offset)) { @@ -1728,6 +1727,13 @@ } else microtile = 0; + /* this might fail for zero-sized uploads - are those illegal? */ + if (!radeon_check_offset(dev_priv, tex->offset + image->height * + blit_width - 1)) { + DRM_ERROR("Invalid final destination offset\n"); + return -EINVAL; + } + DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width); do { @@ -1758,7 +1764,7 @@ buf = radeon_freelist_get(dev); } if (!buf) { - DRM_DEBUG("radeon_cp_dispatch_texture: EAGAIN\n"); + DRM_DEBUG("EAGAIN\n"); if (DRM_COPY_TO_USER(tex->image, image, sizeof(*image))) return -EFAULT; return -EAGAIN; @@ -1841,6 +1847,7 @@ } #undef RADEON_COPY_MT + byte_offset = (image->y & ~2047) * blit_width; buf->file_priv = file_priv; buf->used = size; offset = dev_priv->gart_buffers_offset + buf->offset; @@ -1855,12 +1862,13 @@ RADEON_DP_SRC_SOURCE_MEMORY | RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS); OUT_RING((spitch << 22) | (offset >> 10)); - OUT_RING((texpitch << 22) | (tex->offset >> 10)); + OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset >> 10))); OUT_RING(0); - OUT_RING((image->x << 16) | image->y); + OUT_RING((image->x << 16) | (image->y % 2048)); OUT_RING((image->width << 16) | height); RADEON_WAIT_UNTIL_2D_IDLE(); ADVANCE_RING(); + COMMIT_RING(); radeon_cp_discard_buffer(dev, buf); @@ -1878,6 +1886,8 @@ RADEON_FLUSH_CACHE(); RADEON_WAIT_UNTIL_2D_IDLE(); ADVANCE_RING(); + COMMIT_RING(); + return 0; } @@ -2081,7 +2091,7 @@ drm_radeon_surface_alloc_t *alloc = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -2097,7 +2107,7 @@ drm_radeon_surface_free_t *memfree = data; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -2212,7 +2222,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -2296,7 +2306,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } sarea_priv = dev_priv->sarea_priv; @@ -2401,7 +2411,6 @@ ret = radeon_cp_dispatch_texture(dev, file_priv, tex, &image); - COMMIT_RING(); return ret; } @@ -2435,11 +2444,11 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } - DRM_DEBUG("indirect: idx=%d s=%d e=%d d=%d\n", + DRM_DEBUG("idx=%d s=%d e=%d d=%d\n", indirect->idx, indirect->start, indirect->end, indirect->discard); @@ -2507,7 +2516,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -2812,7 +2821,7 @@ drm_radeon_private_t *dev_priv = dev->dev_private; RING_LOCALS; - DRM_DEBUG("%s: %x\n", __FUNCTION__, flags); + DRM_DEBUG("%x\n", flags); switch (flags) { case RADEON_WAIT_2D: BEGIN_RING(2); @@ -2850,7 +2859,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -3011,7 +3020,7 @@ int value; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -3067,7 +3076,7 @@ return -EINVAL; value = RADEON_SCRATCH_REG_OFFSET; break; - + case RADEON_PARAM_CARD_TYPE: if (dev_priv->flags & RADEON_IS_PCIE) value = RADEON_CARD_PCIE; @@ -3079,6 +3088,12 @@ case RADEON_PARAM_VBLANK_CRTC: value = radeon_vblank_crtc_get(dev); break; + case RADEON_PARAM_FB_LOCATION: + value = radeon_read_fb_location(dev_priv); + break; + case RADEON_PARAM_NUM_GB_PIPES: + value = dev_priv->num_gb_pipes; + break; default: DRM_DEBUG( "Invalid parameter %d\n", param->param ); return -EINVAL; @@ -3099,7 +3114,7 @@ struct drm_radeon_driver_file_fields *radeon_priv; if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } @@ -3114,12 +3129,14 @@ DRM_DEBUG("color tiling disabled\n"); dev_priv->front_pitch_offset &= ~RADEON_DST_TILE_MACRO; dev_priv->back_pitch_offset &= ~RADEON_DST_TILE_MACRO; - dev_priv->sarea_priv->tiling_enabled = 0; + if (dev_priv->sarea_priv) + dev_priv->sarea_priv->tiling_enabled = 0; } else if (sp->value == 1) { DRM_DEBUG("color tiling enabled\n"); dev_priv->front_pitch_offset |= RADEON_DST_TILE_MACRO; dev_priv->back_pitch_offset |= RADEON_DST_TILE_MACRO; - dev_priv->sarea_priv->tiling_enabled = 1; + if (dev_priv->sarea_priv) + dev_priv->sarea_priv->tiling_enabled = 1; } break; case RADEON_SETPARAM_PCIGART_LOCATION: @@ -3152,7 +3169,7 @@ * * DRM infrastructure takes care of reclaiming dma buffers. */ -void radeon_driver_preclose(struct drm_device * dev, +void radeon_driver_preclose(struct drm_device *dev, struct drm_file *file_priv) { if (dev->dev_private) { @@ -3164,7 +3181,7 @@ } } -void radeon_driver_lastclose(struct drm_device * dev) +void radeon_driver_lastclose(struct drm_device *dev) { if (dev->dev_private) { drm_radeon_private_t *dev_priv = dev->dev_private; @@ -3177,7 +3194,7 @@ radeon_do_release(dev); } -int radeon_driver_open(struct drm_device * dev, struct drm_file *file_priv) +int radeon_driver_open(struct drm_device *dev, struct drm_file *file_priv) { drm_radeon_private_t *dev_priv = dev->dev_private; struct drm_radeon_driver_file_fields *radeon_priv; @@ -3199,7 +3216,7 @@ return 0; } -void radeon_driver_postclose(struct drm_device * dev, struct drm_file *file_priv) +void radeon_driver_postclose(struct drm_device *dev, struct drm_file *file_priv) { struct drm_radeon_driver_file_fields *radeon_priv = file_priv->driver_priv; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/savage_bci.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/savage_bci.c --- libdrm-2.3.0.16/shared-core/savage_bci.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/savage_bci.c 2009-04-20 07:00:29.000000000 +0100 @@ -364,7 +364,7 @@ unsigned int cur = dev_priv->current_dma_page; unsigned int rest = SAVAGE_DMA_PAGE_SIZE - dev_priv->dma_pages[cur].used; - unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE-1) / + unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE - 1) / SAVAGE_DMA_PAGE_SIZE; uint32_t *dma_ptr; unsigned int i; @@ -374,7 +374,7 @@ if (cur + nr_pages < dev_priv->nr_dma_pages) { dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle + - cur*SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; + cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; if (n < rest) rest = n; dev_priv->dma_pages[cur].used += rest; @@ -383,7 +383,7 @@ } else { dev_priv->dma_flush(dev_priv); nr_pages = - (n + SAVAGE_DMA_PAGE_SIZE-1) / SAVAGE_DMA_PAGE_SIZE; + (n + SAVAGE_DMA_PAGE_SIZE - 1) / SAVAGE_DMA_PAGE_SIZE; for (i = cur; i < dev_priv->nr_dma_pages; ++i) { dev_priv->dma_pages[i].age = dev_priv->last_dma_age; dev_priv->dma_pages[i].used = 0; @@ -443,7 +443,7 @@ uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle + cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used; dev_priv->dma_pages[cur].used += pad; - while(pad != 0) { + while (pad != 0) { *dma_ptr++ = BCI_CMD_WAIT; pad--; } @@ -584,18 +584,18 @@ * MTRRs. */ dev_priv->mtrr[0].base = fb_base; dev_priv->mtrr[0].size = 0x01000000; - dev_priv->mtrr[0].handle = + dev_priv->mtrr[0].handle = drm_mtrr_add(dev_priv->mtrr[0].base, dev_priv->mtrr[0].size, DRM_MTRR_WC); - dev_priv->mtrr[1].base = fb_base+0x02000000; + dev_priv->mtrr[1].base = fb_base + 0x02000000; dev_priv->mtrr[1].size = 0x02000000; dev_priv->mtrr[1].handle = drm_mtrr_add(dev_priv->mtrr[1].base, dev_priv->mtrr[1].size, DRM_MTRR_WC); - dev_priv->mtrr[2].base = fb_base+0x04000000; + dev_priv->mtrr[2].base = fb_base + 0x04000000; dev_priv->mtrr[2].size = 0x04000000; dev_priv->mtrr[2].handle = - drm_mtrr_add(dev_priv->mtrr[2].base, + drm_mtrr_add(dev_priv->mtrr[2].base, dev_priv->mtrr[2].size, DRM_MTRR_WC); } else { DRM_ERROR("strange pci_resource_len %08lx\n", @@ -615,7 +615,7 @@ * aperture. */ dev_priv->mtrr[0].base = fb_base; dev_priv->mtrr[0].size = 0x08000000; - dev_priv->mtrr[0].handle = + dev_priv->mtrr[0].handle = drm_mtrr_add(dev_priv->mtrr[0].base, dev_priv->mtrr[0].size, DRM_MTRR_WC); } else { @@ -833,8 +833,8 @@ depth_tile_format = SAVAGE_BD_TILE_DEST; } front_stride = dev_priv->front_pitch / (dev_priv->fb_bpp / 8); - back_stride = dev_priv->back_pitch / (dev_priv->fb_bpp / 8); - depth_stride = + back_stride = dev_priv->back_pitch / (dev_priv->fb_bpp / 8); + depth_stride = dev_priv->depth_pitch / (dev_priv->depth_bpp / 8); dev_priv->front_bd = front_stride | SAVAGE_BD_BW_DISABLE | @@ -888,7 +888,7 @@ return -ENOMEM; } - if (savage_dma_init(dev_priv) < 0) { + if (savage_dma_init(dev_priv) < 0) { DRM_ERROR("could not initialize command DMA\n"); savage_do_cleanup_bci(dev); return -ENOMEM; @@ -983,7 +983,7 @@ * - event counter wrapped since the event was emitted or * - the hardware has advanced up to or over the event to wait for. */ - if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e) ) + if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e)) return 0; else return dev_priv->wait_evnt(dev_priv, event_e); @@ -1065,8 +1065,6 @@ if (!dma->buflist) return; - /*i830_flush_queue(dev);*/ - for (i = 0; i < dma->buf_count; i++) { struct drm_buf *buf = dma->buflist[i]; drm_savage_buf_priv_t *buf_priv = buf->dev_private; @@ -1092,4 +1090,3 @@ }; int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/savage_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/savage_drv.h --- libdrm-2.3.0.16/shared-core/savage_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/savage_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -237,7 +237,7 @@ */ #define SAVAGE_STATUS_WORD0 0x48C00 #define SAVAGE_STATUS_WORD1 0x48C04 -#define SAVAGE_ALT_STATUS_WORD0 0x48C60 +#define SAVAGE_ALT_STATUS_WORD0 0x48C60 #define SAVAGE_FIFO_USED_MASK_S3D 0x0001ffff #define SAVAGE_FIFO_USED_MASK_S4 0x001fffff @@ -310,7 +310,7 @@ #define SAVAGE_DESTCTRL_S3D 0x34 #define SAVAGE_SCSTART_S3D 0x35 #define SAVAGE_SCEND_S3D 0x36 -#define SAVAGE_ZWATERMARK_S3D 0x37 +#define SAVAGE_ZWATERMARK_S3D 0x37 #define SAVAGE_DESTTEXRWWATERMARK_S3D 0x38 /* common stuff */ #define SAVAGE_VERTBUFADDR 0x3e diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/savage_state.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/savage_state.c --- libdrm-2.3.0.16/shared-core/savage_state.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/savage_state.c 2009-04-20 07:00:29.000000000 +0100 @@ -30,23 +30,23 @@ const struct drm_clip_rect *pbox) { uint32_t scstart = dev_priv->state.s3d.new_scstart; - uint32_t scend = dev_priv->state.s3d.new_scend; + uint32_t scend = dev_priv->state.s3d.new_scend; scstart = (scstart & ~SAVAGE_SCISSOR_MASK_S3D) | - ((uint32_t)pbox->x1 & 0x000007ff) | + ((uint32_t)pbox->x1 & 0x000007ff) | (((uint32_t)pbox->y1 << 16) & 0x07ff0000); - scend = (scend & ~SAVAGE_SCISSOR_MASK_S3D) | - (((uint32_t)pbox->x2-1) & 0x000007ff) | - ((((uint32_t)pbox->y2-1) << 16) & 0x07ff0000); + scend = (scend & ~SAVAGE_SCISSOR_MASK_S3D) | + (((uint32_t)pbox->x2 - 1) & 0x000007ff) | + ((((uint32_t)pbox->y2 - 1) << 16) & 0x07ff0000); if (scstart != dev_priv->state.s3d.scstart || scend != dev_priv->state.s3d.scend) { DMA_LOCALS; BEGIN_DMA(4); - DMA_WRITE(BCI_CMD_WAIT|BCI_CMD_WAIT_3D); + DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); DMA_SET_REGISTERS(SAVAGE_SCSTART_S3D, 2); DMA_WRITE(scstart); DMA_WRITE(scend); dev_priv->state.s3d.scstart = scstart; - dev_priv->state.s3d.scend = scend; + dev_priv->state.s3d.scend = scend; dev_priv->waiting = 1; DMA_COMMIT(); } @@ -61,13 +61,13 @@ ((uint32_t)pbox->x1 & 0x000007ff) | (((uint32_t)pbox->y1 << 12) & 0x00fff000); drawctrl1 = (drawctrl1 & ~SAVAGE_SCISSOR_MASK_S4) | - (((uint32_t)pbox->x2-1) & 0x000007ff) | - ((((uint32_t)pbox->y2-1) << 12) & 0x00fff000); + (((uint32_t)pbox->x2 - 1) & 0x000007ff) | + ((((uint32_t)pbox->y2 - 1) << 12) & 0x00fff000); if (drawctrl0 != dev_priv->state.s4.drawctrl0 || drawctrl1 != dev_priv->state.s4.drawctrl1) { DMA_LOCALS; BEGIN_DMA(4); - DMA_WRITE(BCI_CMD_WAIT|BCI_CMD_WAIT_3D); + DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); DMA_SET_REGISTERS(SAVAGE_DRAWCTRL0_S4, 2); DMA_WRITE(drawctrl0); DMA_WRITE(drawctrl1); @@ -87,8 +87,8 @@ } if (!(addr & 1)) { /* local */ addr &= ~7; - if (addr < dev_priv->texture_offset || - addr >= dev_priv->texture_offset+dev_priv->texture_size) { + if (addr < dev_priv->texture_offset || + addr >= dev_priv->texture_offset + dev_priv->texture_size) { DRM_ERROR ("bad texAddr%d %08x (local addr out of range)\n", unit, addr); @@ -114,10 +114,10 @@ } #define SAVE_STATE(reg,where) \ - if(start <= reg && start+count > reg) \ + if(start <= reg && start + count > reg) \ dev_priv->state.where = regs[reg - start] #define SAVE_STATE_MASK(reg,where,mask) do { \ - if(start <= reg && start+count > reg) { \ + if(start <= reg && start + count > reg) { \ uint32_t tmp; \ tmp = regs[reg - start]; \ dev_priv->state.where = (tmp & (mask)) | \ @@ -129,9 +129,9 @@ const uint32_t *regs) { if (start < SAVAGE_TEXPALADDR_S3D || - start+count-1 > SAVAGE_DESTTEXRWWATERMARK_S3D) { + start + count - 1 > SAVAGE_DESTTEXRWWATERMARK_S3D) { DRM_ERROR("invalid register range (0x%04x-0x%04x)\n", - start, start+count-1); + start, start + count - 1); return -EINVAL; } @@ -142,7 +142,7 @@ /* if any texture regs were changed ... */ if (start <= SAVAGE_TEXCTRL_S3D && - start+count > SAVAGE_TEXPALADDR_S3D) { + start + count > SAVAGE_TEXPALADDR_S3D) { /* ... check texture state */ SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl); SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr); @@ -161,9 +161,9 @@ int ret = 0; if (start < SAVAGE_DRAWLOCALCTRL_S4 || - start+count-1 > SAVAGE_TEXBLENDCOLOR_S4) { + start + count - 1 > SAVAGE_TEXBLENDCOLOR_S4) { DRM_ERROR("invalid register range (0x%04x-0x%04x)\n", - start, start+count-1); + start, start + count - 1); return -EINVAL; } @@ -212,14 +212,14 @@ return ret; /* scissor regs are emitted in savage_dispatch_draw */ if (start < SAVAGE_SCSTART_S3D) { - if (start+count > SAVAGE_SCEND_S3D+1) - count2 = count - (SAVAGE_SCEND_S3D+1 - start); - if (start+count > SAVAGE_SCSTART_S3D) + if (start + count > SAVAGE_SCEND_S3D + 1) + count2 = count - (SAVAGE_SCEND_S3D + 1 - start); + if (start + count > SAVAGE_SCSTART_S3D) count = SAVAGE_SCSTART_S3D - start; } else if (start <= SAVAGE_SCEND_S3D) { - if (start+count > SAVAGE_SCEND_S3D+1) { - count -= SAVAGE_SCEND_S3D+1 - start; - start = SAVAGE_SCEND_S3D+1; + if (start + count > SAVAGE_SCEND_S3D + 1) { + count -= SAVAGE_SCEND_S3D + 1 - start; + start = SAVAGE_SCEND_S3D + 1; } else return 0; } @@ -229,24 +229,24 @@ return ret; /* scissor regs are emitted in savage_dispatch_draw */ if (start < SAVAGE_DRAWCTRL0_S4) { - if (start+count > SAVAGE_DRAWCTRL1_S4+1) + if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) count2 = count - (SAVAGE_DRAWCTRL1_S4 + 1 - start); - if (start+count > SAVAGE_DRAWCTRL0_S4) + if (start + count > SAVAGE_DRAWCTRL0_S4) count = SAVAGE_DRAWCTRL0_S4 - start; } else if (start <= SAVAGE_DRAWCTRL1_S4) { - if (start+count > SAVAGE_DRAWCTRL1_S4+1) { - count -= SAVAGE_DRAWCTRL1_S4+1 - start; - start = SAVAGE_DRAWCTRL1_S4+1; + if (start + count > SAVAGE_DRAWCTRL1_S4 + 1) { + count -= SAVAGE_DRAWCTRL1_S4 + 1 - start; + start = SAVAGE_DRAWCTRL1_S4 + 1; } else return 0; } } - bci_size = count + (count+254)/255 + count2 + (count2+254)/255; + bci_size = count + (count + 254) / 255 + count2 + (count2 + 254) / 255; if (cmd_header->state.global) { - BEGIN_DMA(bci_size+1); + BEGIN_DMA(bci_size + 1); DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D); dev_priv->waiting = 1; } else { @@ -286,8 +286,8 @@ BCI_LOCALS; if (!dmabuf) { - DRM_ERROR("called without dma buffers!\n"); - return -EINVAL; + DRM_ERROR("called without dma buffers!\n"); + return -EINVAL; } if (!n) @@ -337,9 +337,9 @@ } } - if (start + n > dmabuf->total/32) { + if (start + n > dmabuf->total / 32) { DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n", - start, start + n - 1, dmabuf->total/32); + start, start + n - 1, dmabuf->total / 32); return -EINVAL; } @@ -374,33 +374,33 @@ /* Need to reorder indices for correct flat * shading while preserving the clock sense * for correct culling. Only on Savage3D. */ - int reorder[3] = {-1, -1, -1}; - reorder[start%3] = 2; + int reorder[3] = { -1, -1, -1 }; + reorder[start % 3] = 2; - BEGIN_BCI((count+1+1)/2); - BCI_DRAW_INDICES_S3D(count, prim, start+2); + BEGIN_BCI((count + 1 + 1) / 2); + BCI_DRAW_INDICES_S3D(count, prim, start + 2); - for (i = start+1; i+1 < start+count; i += 2) + for (i = start + 1; i + 1 < start + count; i += 2) BCI_WRITE((i + reorder[i % 3]) | ((i + 1 + reorder[(i + 1) % 3]) << 16)); - if (i < start+count) - BCI_WRITE(i + reorder[i%3]); + if (i < start + count) + BCI_WRITE(i + reorder[i % 3]); } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - BEGIN_BCI((count+1+1)/2); + BEGIN_BCI((count + 1 + 1) / 2); BCI_DRAW_INDICES_S3D(count, prim, start); - for (i = start+1; i+1 < start+count; i += 2) - BCI_WRITE(i | ((i+1) << 16)); - if (i < start+count) + for (i = start + 1; i + 1 < start + count; i += 2) + BCI_WRITE(i | ((i + 1) << 16)); + if (i < start + count) BCI_WRITE(i); } else { - BEGIN_BCI((count+2+1)/2); + BEGIN_BCI((count + 2 + 1) / 2); BCI_DRAW_INDICES_S4(count, prim, skip); - for (i = start; i+1 < start+count; i += 2) - BCI_WRITE(i | ((i+1) << 16)); - if (i < start+count) + for (i = start; i + 1 < start + count; i += 2) + BCI_WRITE(i | ((i + 1) << 16)); + if (i < start + count) BCI_WRITE(i); } @@ -479,9 +479,9 @@ return -EINVAL; } - if (start + n > vb_size / (vb_stride*4)) { + if (start + n > vb_size / (vb_stride * 4)) { DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n", - start, start + n - 1, vb_size / (vb_stride*4)); + start, start + n - 1, vb_size / (vb_stride * 4)); return -EINVAL; } @@ -493,28 +493,28 @@ /* Need to reorder vertices for correct flat * shading while preserving the clock sense * for correct culling. Only on Savage3D. */ - int reorder[3] = {-1, -1, -1}; - reorder[start%3] = 2; + int reorder[3] = { -1, -1, -1 }; + reorder[start % 3] = 2; - BEGIN_DMA(count*vtx_size+1); + BEGIN_DMA(count * vtx_size + 1); DMA_DRAW_PRIMITIVE(count, prim, skip); - for (i = start; i < start+count; ++i) { + for (i = start; i < start + count; ++i) { unsigned int j = i + reorder[i % 3]; - DMA_COPY(&vtxbuf[vb_stride*j], vtx_size); + DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); } DMA_COMMIT(); } else { - BEGIN_DMA(count*vtx_size+1); + BEGIN_DMA(count * vtx_size + 1); DMA_DRAW_PRIMITIVE(count, prim, skip); if (vb_stride == vtx_size) { - DMA_COPY(&vtxbuf[vb_stride*start], - vtx_size*count); + DMA_COPY(&vtxbuf[vb_stride * start], + vtx_size * count); } else { - for (i = start; i < start+count; ++i) { - DMA_COPY(&vtxbuf[vb_stride*i], + for (i = start; i < start + count; ++i) { + DMA_COPY(&vtxbuf[vb_stride * i], vtx_size); } } @@ -544,8 +544,8 @@ BCI_LOCALS; if (!dmabuf) { - DRM_ERROR("called without dma buffers!\n"); - return -EINVAL; + DRM_ERROR("called without dma buffers!\n"); + return -EINVAL; } if (!n) @@ -623,9 +623,9 @@ /* check indices */ for (i = 0; i < count; ++i) { - if (idx[i] > dmabuf->total/32) { + if (idx[i] > dmabuf->total / 32) { DRM_ERROR("idx[%u]=%u out of range (0-%u)\n", - i, idx[i], dmabuf->total/32); + i, idx[i], dmabuf->total / 32); return -EINVAL; } } @@ -634,31 +634,31 @@ /* Need to reorder indices for correct flat * shading while preserving the clock sense * for correct culling. Only on Savage3D. */ - int reorder[3] = {2, -1, -1}; + int reorder[3] = { 2, -1, -1 }; - BEGIN_BCI((count+1+1)/2); + BEGIN_BCI((count + 1 + 1) / 2); BCI_DRAW_INDICES_S3D(count, prim, idx[2]); - for (i = 1; i+1 < count; i += 2) + for (i = 1; i + 1 < count; i += 2) BCI_WRITE(idx[i + reorder[i % 3]] | (idx[i + 1 + reorder[(i + 1) % 3]] << 16)); if (i < count) - BCI_WRITE(idx[i + reorder[i%3]]); + BCI_WRITE(idx[i + reorder[i % 3]]); } else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { - BEGIN_BCI((count+1+1)/2); + BEGIN_BCI((count + 1 + 1) / 2); BCI_DRAW_INDICES_S3D(count, prim, idx[0]); - for (i = 1; i+1 < count; i += 2) - BCI_WRITE(idx[i] | (idx[i+1] << 16)); + for (i = 1; i + 1 < count; i += 2) + BCI_WRITE(idx[i] | (idx[i + 1] << 16)); if (i < count) BCI_WRITE(idx[i]); } else { - BEGIN_BCI((count+2+1)/2); + BEGIN_BCI((count + 2 + 1) / 2); BCI_DRAW_INDICES_S4(count, prim, skip); - for (i = 0; i+1 < count; i += 2) - BCI_WRITE(idx[i] | (idx[i+1] << 16)); + for (i = 0; i + 1 < count; i += 2) + BCI_WRITE(idx[i] | (idx[i + 1] << 16)); if (i < count) BCI_WRITE(idx[i]); } @@ -743,9 +743,9 @@ /* Check indices */ for (i = 0; i < count; ++i) { - if (idx[i] > vb_size / (vb_stride*4)) { + if (idx[i] > vb_size / (vb_stride * 4)) { DRM_ERROR("idx[%u]=%u out of range (0-%u)\n", - i, idx[i], vb_size / (vb_stride*4)); + i, idx[i], vb_size / (vb_stride * 4)); return -EINVAL; } } @@ -754,24 +754,24 @@ /* Need to reorder vertices for correct flat * shading while preserving the clock sense * for correct culling. Only on Savage3D. */ - int reorder[3] = {2, -1, -1}; + int reorder[3] = { 2, -1, -1 }; - BEGIN_DMA(count*vtx_size+1); + BEGIN_DMA(count * vtx_size + 1); DMA_DRAW_PRIMITIVE(count, prim, skip); for (i = 0; i < count; ++i) { unsigned int j = idx[i + reorder[i % 3]]; - DMA_COPY(&vtxbuf[vb_stride*j], vtx_size); + DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); } DMA_COMMIT(); } else { - BEGIN_DMA(count*vtx_size+1); + BEGIN_DMA(count * vtx_size + 1); DMA_DRAW_PRIMITIVE(count, prim, skip); for (i = 0; i < count; ++i) { unsigned int j = idx[i]; - DMA_COPY(&vtxbuf[vb_stride*j], vtx_size); + DMA_COPY(&vtxbuf[vb_stride * j], vtx_size); } DMA_COMMIT(); @@ -823,12 +823,12 @@ x = boxes[i].x1, y = boxes[i].y1; w = boxes[i].x2 - boxes[i].x1; h = boxes[i].y2 - boxes[i].y1; - BEGIN_DMA(nbufs*6); + BEGIN_DMA(nbufs * 6); for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) { if (!(flags & buf)) continue; DMA_WRITE(clear_cmd); - switch(buf) { + switch (buf) { case SAVAGE_FRONT: DMA_WRITE(dev_priv->front_offset); DMA_WRITE(dev_priv->front_bd); @@ -880,8 +880,8 @@ DMA_WRITE(dev_priv->back_bd); DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1)); DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1)); - DMA_WRITE(BCI_W_H(boxes[i].x2-boxes[i].x1, - boxes[i].y2-boxes[i].y1)); + DMA_WRITE(BCI_W_H(boxes[i].x2 - boxes[i].x1, + boxes[i].y2 - boxes[i].y1)); DMA_COMMIT(); } @@ -966,14 +966,14 @@ int ret = 0; DRM_DEBUG("\n"); - + LOCK_TEST_WITH_RETURN(dev, file_priv); if (dma && dma->buflist) { if (cmdbuf->dma_idx > dma->buf_count) { DRM_ERROR ("vertex buffer index %u out of range (0-%u)\n", - cmdbuf->dma_idx, dma->buf_count-1); + cmdbuf->dma_idx, dma->buf_count - 1); return -EINVAL; } dmabuf = dma->buflist[cmdbuf->dma_idx]; @@ -1064,15 +1064,15 @@ case SAVAGE_CMD_DMA_PRIM: case SAVAGE_CMD_VB_PRIM: if (!first_draw_cmd) - first_draw_cmd = cmdbuf->cmd_addr-1; + first_draw_cmd = cmdbuf->cmd_addr - 1; cmdbuf->cmd_addr += j; i += j; break; default: if (first_draw_cmd) { - ret = savage_dispatch_draw ( + ret = savage_dispatch_draw( dev_priv, first_draw_cmd, - cmdbuf->cmd_addr-1, + cmdbuf->cmd_addr - 1, dmabuf, cmdbuf->vb_addr, cmdbuf->vb_size, cmdbuf->vb_stride, @@ -1134,7 +1134,7 @@ } if (first_draw_cmd) { - ret = savage_dispatch_draw ( + ret = savage_dispatch_draw( dev_priv, first_draw_cmd, cmdbuf->cmd_addr, dmabuf, cmdbuf->vb_addr, cmdbuf->vb_size, cmdbuf->vb_stride, cmdbuf->nbox, cmdbuf->box_addr); diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/sis_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/sis_drv.h --- libdrm-2.3.0.16/shared-core/sis_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/sis_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -84,8 +84,6 @@ #endif - - extern struct drm_ioctl_desc sis_ioctls[]; extern int sis_max_ioctl; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_3d_reg.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_3d_reg.h --- libdrm-2.3.0.16/shared-core/via_3d_reg.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_3d_reg.h 2008-07-01 08:50:43.000000000 +0100 @@ -1643,7 +1643,6 @@ #define HC_HAGPBpID_STOP 0x00000002 #define HC_HAGPBpH_MASK 0x00ffffff - #define VIA_VIDEO_HEADER5 0xFE040000 #define VIA_VIDEO_HEADER6 0xFE050000 #define VIA_VIDEO_HEADER7 0xFE060000 diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_dma.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_dma.c --- libdrm-2.3.0.16/shared-core/via_dma.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_dma.c 2009-04-20 07:00:29.000000000 +0100 @@ -1,11 +1,11 @@ /* via_dma.c -- DMA support for the VIA Unichrome/Pro - * + * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. * All Rights Reserved. - * + * * Copyright 2004 The Unichrome project. * All Rights Reserved. * @@ -23,14 +23,14 @@ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * - * Authors: - * Tungsten Graphics, - * Erdi Chen, + * Authors: + * Tungsten Graphics, + * Erdi Chen, * Thomas Hellstrom. */ @@ -47,18 +47,18 @@ dev_priv->dma_low +=8; \ } -#define via_flush_write_combine() DRM_MEMORYBARRIER() +#define via_flush_write_combine() DRM_MEMORYBARRIER() #define VIA_OUT_RING_QW(w1,w2) \ *vb++ = (w1); \ *vb++ = (w2); \ - dev_priv->dma_low += 8; + dev_priv->dma_low += 8; -static void via_cmdbuf_start(drm_via_private_t * dev_priv); -static void via_cmdbuf_pause(drm_via_private_t * dev_priv); -static void via_cmdbuf_reset(drm_via_private_t * dev_priv); -static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); -static int via_wait_idle(drm_via_private_t * dev_priv); +static void via_cmdbuf_start(drm_via_private_t *dev_priv); +static void via_cmdbuf_pause(drm_via_private_t *dev_priv); +static void via_cmdbuf_reset(drm_via_private_t *dev_priv); +static void via_cmdbuf_rewind(drm_via_private_t *dev_priv); +static int via_wait_idle(drm_via_private_t *dev_priv); static void via_pad_cache(drm_via_private_t *dev_priv, int qwords); @@ -70,9 +70,9 @@ { uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; - - return ((hw_addr <= dev_priv->dma_low) ? - (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : + + return ((hw_addr <= dev_priv->dma_low) ? + (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : (hw_addr - dev_priv->dma_low)); } @@ -110,9 +110,11 @@ if (count-- == 0) { DRM_ERROR ("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n", - hw_addr, cur_addr, next_addr); + hw_addr, cur_addr, next_addr); return -1; } + if ((cur_addr < hw_addr) && (next_addr >= hw_addr)) + msleep(1); } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); return 0; } @@ -167,14 +169,12 @@ } if (dev_priv->ring.virtual_start != NULL) { - DRM_ERROR("%s called again without calling cleanup\n", - __FUNCTION__); + DRM_ERROR("called again without calling cleanup\n"); return -EFAULT; } if (!dev->agp || !dev->agp->base) { - DRM_ERROR("%s called with no agp memory available\n", - __FUNCTION__); + DRM_ERROR("called with no agp memory available\n"); return -EFAULT; } @@ -257,8 +257,7 @@ dev_priv = (drm_via_private_t *) dev->dev_private; if (dev_priv->ring.virtual_start == NULL) { - DRM_ERROR("%s called without initializing AGP ring buffer.\n", - __FUNCTION__); + DRM_ERROR("called without initializing AGP ring buffer.\n"); return -EFAULT; } @@ -327,8 +326,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); - DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf->buf, - cmdbuf->size); + DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); ret = via_dispatch_cmdbuffer(dev, cmdbuf); if (ret) { @@ -369,8 +367,7 @@ LOCK_TEST_WITH_RETURN(dev, file_priv); - DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf->buf, - cmdbuf->size); + DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf); if (ret) { @@ -411,27 +408,50 @@ int paused, count; volatile uint32_t *paused_at = dev_priv->last_pause_ptr; uint32_t reader,ptr; + uint32_t diff; paused = 0; via_flush_write_combine(); (void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1); + *paused_at = pause_addr_lo; via_flush_write_combine(); (void) *paused_at; + reader = *(dev_priv->hw_addr_ptr); ptr = ((volatile char *)paused_at - dev_priv->dma_ptr) + dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; + dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; - if ((ptr - reader) <= dev_priv->dma_diff ) { - count = 10000000; - while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--); + /* + * If there is a possibility that the command reader will + * miss the new pause address and pause on the old one, + * In that case we need to program the new start address + * using PCI. + */ + + diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; + count = 10000000; + while(diff == 0 && count--) { + paused = (VIA_READ(0x41c) & 0x80000000); + if (paused) + break; + reader = *(dev_priv->hw_addr_ptr); + diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; } + paused = VIA_READ(0x41c) & 0x80000000; + if (paused && !no_pci_fire) { reader = *(dev_priv->hw_addr_ptr); - if ((ptr - reader) == dev_priv->dma_diff) { - + diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; + diff &= (dev_priv->dma_high - 1); + if (diff != 0 && diff < (dev_priv->dma_high >> 1)) { + DRM_ERROR("Paused at incorrect address. " + "0x%08x, 0x%08x 0x%08x\n", + ptr, reader, dev_priv->dma_diff); + } else if (diff == 0) { /* * There is a concern that these writes may stall the PCI bus * if the GPU is not idle. However, idling the GPU first @@ -450,7 +470,7 @@ -static int via_wait_idle(drm_via_private_t * dev_priv) +static int via_wait_idle(drm_via_private_t *dev_priv) { int count = 10000000; @@ -462,7 +482,7 @@ return count; } -static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, +static uint32_t *via_align_cmd(drm_via_private_t *dev_priv, uint32_t cmd_type, uint32_t addr, uint32_t *cmd_addr_hi, uint32_t *cmd_addr_lo, int skip_wait) { @@ -472,16 +492,17 @@ uint32_t qw_pad_count; if (!skip_wait) - via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE); + via_cmdbuf_wait(dev_priv, 2 * CMDBUF_ALIGNMENT_SIZE); vb = via_get_dma(dev_priv); - VIA_OUT_RING_QW( HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | - (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); + VIA_OUT_RING_QW(HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | + (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); + agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); - cmd_addr = (addr) ? addr : + cmd_addr = (addr) ? addr : agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | (cmd_addr & HC_HAGPBpL_MASK)); @@ -514,8 +535,8 @@ command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | ((end_addr & 0xff000000) >> 16)); - dev_priv->last_pause_ptr = - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, + dev_priv->last_pause_ptr = + via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, & pause_addr_lo, 1) - 1; via_flush_write_combine(); @@ -557,8 +578,8 @@ via_cmdbuf_wait(dev_priv, qwords + 2); vb = via_get_dma(dev_priv); - VIA_OUT_RING_QW( HC_HEADER2, HC_ParaType_NotTex << 16); - via_align_buffer(dev_priv,vb,qwords); + VIA_OUT_RING_QW(HC_HEADER2, HC_ParaType_NotTex << 16); + via_align_buffer(dev_priv, vb, qwords); } static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) @@ -575,13 +596,13 @@ uint32_t pause_addr_lo, pause_addr_hi; uint32_t jump_addr_lo, jump_addr_hi; volatile uint32_t *last_pause_ptr; - + uint32_t dma_low_save1, dma_low_save2; + agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; - via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, + via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, &jump_addr_lo, 0); - - dev_priv->dma_wrap = dev_priv->dma_low; + dev_priv->dma_wrap = dev_priv->dma_low; /* * Wrap command buffer to the beginning. @@ -594,19 +615,43 @@ via_dummy_bitblt(dev_priv); via_dummy_bitblt(dev_priv); - last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, - &pause_addr_lo, 0) -1; - via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, + + last_pause_ptr = + via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, + &pause_addr_lo, 0) - 1; + via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, &pause_addr_lo, 0); + *last_pause_ptr = pause_addr_lo; + dma_low_save1 = dev_priv->dma_low; + + /* + * Now, set a trap that will pause the regulator if it tries to rerun the old + * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause + * and reissues the jump command over PCI, while the regulator has already taken the jump + * and actually paused at the current buffer end). + * There appears to be no other way to detect this condition, since the hw_addr_pointer + * does not seem to get updated immediately when a jump occurs. + */ - via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0); + last_pause_ptr = + via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, + &pause_addr_lo, 0) - 1; + via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, + &pause_addr_lo, 0); + *last_pause_ptr = pause_addr_lo; + + dma_low_save2 = dev_priv->dma_low; + dev_priv->dma_low = dma_low_save1; + via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0); + dev_priv->dma_low = dma_low_save2; + via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); } static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) { - via_cmdbuf_jump(dev_priv); + via_cmdbuf_jump(dev_priv); } static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) @@ -614,7 +659,7 @@ uint32_t pause_addr_lo, pause_addr_hi; via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0); - via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); + via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); } @@ -640,20 +685,19 @@ uint32_t tmp_size, count; drm_via_private_t *dev_priv; - DRM_DEBUG("via cmdbuf_size\n"); + DRM_DEBUG("\n"); LOCK_TEST_WITH_RETURN(dev, file_priv); dev_priv = (drm_via_private_t *) dev->dev_private; if (dev_priv->ring.virtual_start == NULL) { - DRM_ERROR("%s called without initializing AGP ring buffer.\n", - __FUNCTION__); + DRM_ERROR("called without initializing AGP ring buffer.\n"); return -EFAULT; } count = 1000000; tmp_size = d_siz->size; - switch(d_siz->func) { + switch (d_siz->func) { case VIA_CMDBUF_SPACE: while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size) && count--) { @@ -687,12 +731,12 @@ } #ifndef VIA_HAVE_DMABLIT -int +int via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ) { DRM_ERROR("PCI DMA BitBlt is not implemented for this system.\n"); return -EINVAL; } -int +int via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ) { DRM_ERROR("PCI DMA BitBlt is not implemented for this system.\n"); return -EINVAL; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_drm.h --- libdrm-2.3.0.16/shared-core/via_drm.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_drm.h 2008-07-01 08:50:43.000000000 +0100 @@ -228,7 +228,7 @@ #define VIA_IRQ_FLAGS_MASK 0xF0000000 -enum drm_via_irqs{ +enum drm_via_irqs { drm_via_irq_hqv0 = 0, drm_via_irq_hqv1, drm_via_irq_dma0_dd, @@ -238,7 +238,7 @@ drm_via_irq_num }; -struct drm_via_wait_irq_request{ +struct drm_via_wait_irq_request { unsigned irq; via_irq_seq_type_t type; uint32_t sequence; @@ -270,9 +270,9 @@ uint32_t fb_stride; unsigned char *mem_addr; - uint32_t mem_stride; + uint32_t mem_stride; - uint32_t flags; + uint32_t flags; int to_fb; drm_via_blitsync_t sync; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_drv.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_drv.c --- libdrm-2.3.0.16/shared-core/via_drv.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_drv.c 2009-04-20 07:00:29.000000000 +0100 @@ -40,17 +40,9 @@ #ifdef VIA_HAVE_FENCE -static struct drm_fence_driver via_fence_driver = { - .num_classes = 1, - .wrap_diff = (1 << 30), - .flush_diff = (1 << 20), - .sequence_mask = 0xffffffffU, - .lazy_capable = 1, - .emit = via_fence_emit_sequence, - .poke_flush = via_poke_flush, - .has_irq = via_fence_has_irq, -}; +extern struct drm_fence_driver via_fence_driver; #endif + #ifdef VIA_HAVE_BUFFER /** @@ -74,8 +66,10 @@ .fence_type = via_fence_types, .invalidate_caches = via_invalidate_caches, .init_mem_type = via_init_mem_type, - .evict_mask = via_evict_mask, + .evict_flags = via_evict_flags, .move = NULL, + .ttm_cache_flush = NULL, + .command_stream_barrier = NULL }; #endif @@ -83,14 +77,16 @@ static struct drm_driver driver = { .driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ | - DRIVER_IRQ_SHARED | DRIVER_IRQ_VBL, + DRIVER_IRQ_SHARED, .load = via_driver_load, .unload = via_driver_unload, #ifndef VIA_HAVE_CORE_MM .context_ctor = via_init_context, #endif .context_dtor = via_final_context, - .vblank_wait = via_driver_vblank_wait, + .get_vblank_counter = via_get_vblank_counter, + .enable_vblank = via_enable_vblank, + .disable_vblank = via_disable_vblank, .irq_preinstall = via_driver_irq_preinstall, .irq_postinstall = via_driver_irq_postinstall, .irq_uninstall = via_driver_irq_uninstall, diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_drv.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_drv.h --- libdrm-2.3.0.16/shared-core/via_drv.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_drv.h 2009-04-20 07:00:29.000000000 +0100 @@ -83,7 +83,7 @@ uint32_t enable_mask; wait_queue_head_t irq_queue; } drm_via_irq_t; - + typedef struct drm_via_private { drm_via_sarea_t *sarea_priv; drm_local_map_t *sarea; @@ -102,6 +102,7 @@ struct timeval last_vblank; int last_vblank_valid; unsigned usec_per_vblank; + atomic_t vbl_received; drm_via_state_t hc_state; char pci_buf[VIA_PCI_BUF_SIZE]; const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE]; @@ -110,8 +111,8 @@ drm_via_irq_t via_irqs[VIA_NUM_IRQS]; unsigned num_irqs; maskarray_t *irq_masks; - uint32_t irq_enable_mask; - uint32_t irq_pending_mask; + uint32_t irq_enable_mask; + uint32_t irq_pending_mask; int *irq_map; /* Memory manager stuff */ #ifdef VIA_HAVE_CORE_MM @@ -166,11 +167,13 @@ extern int via_final_context(struct drm_device * dev, int context); extern int via_do_cleanup_map(struct drm_device * dev); -extern int via_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); +extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc); +extern int via_enable_vblank(struct drm_device *dev, int crtc); +extern void via_disable_vblank(struct drm_device *dev, int crtc); extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); extern void via_driver_irq_preinstall(struct drm_device * dev); -extern void via_driver_irq_postinstall(struct drm_device * dev); +extern int via_driver_irq_postinstall(struct drm_device * dev); extern void via_driver_irq_uninstall(struct drm_device * dev); extern int via_dma_cleanup(struct drm_device * dev); @@ -193,27 +196,16 @@ extern void via_init_dmablit(struct drm_device *dev); #endif -#ifdef VIA_HAVE_FENCE -extern void via_fence_timer(unsigned long data); -extern void via_poke_flush(struct drm_device * dev, uint32_t class); -extern int via_fence_emit_sequence(struct drm_device * dev, uint32_t class, - uint32_t flags, - uint32_t * sequence, - uint32_t * native_type); -extern int via_fence_has_irq(struct drm_device * dev, uint32_t class, - uint32_t flags); -#endif - #ifdef VIA_HAVE_BUFFER extern struct drm_ttm_backend *via_create_ttm_backend_entry(struct drm_device *dev); -extern int via_fence_types(struct drm_buffer_object *bo, uint32_t *fclass, +extern int via_fence_types(struct drm_buffer_object *bo, uint32_t *fclass, uint32_t *type); extern int via_invalidate_caches(struct drm_device *dev, uint64_t buffer_flags); extern int via_init_mem_type(struct drm_device *dev, uint32_t type, struct drm_mem_type_manager *man); -extern uint32_t via_evict_mask(struct drm_buffer_object *bo); +extern uint64_t via_evict_flags(struct drm_buffer_object *bo); extern int via_move(struct drm_buffer_object *bo, int evict, - int no_wait, struct drm_bo_mem_reg *new_mem); + int no_wait, struct drm_bo_mem_reg *new_mem); #endif #endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_irq.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_irq.c --- libdrm-2.3.0.16/shared-core/via_irq.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_irq.c 2009-04-20 07:00:29.000000000 +0100 @@ -63,7 +63,7 @@ /* * Device-specific IRQs go here. This type might need to be extended with * the register if there are multiple IRQ control registers. - * Currently we activate the HQV interrupts of Unichrome Pro group A. + * Currently we activate the HQV interrupts of Unichrome Pro group A. */ static maskarray_t via_pro_group_a_irqs[] = { @@ -71,30 +71,38 @@ 0x00000000 }, {VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010, 0x00000000 }, - {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, + {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, }; -static int via_num_pro_group_a = - sizeof(via_pro_group_a_irqs)/sizeof(maskarray_t); +static int via_num_pro_group_a = ARRAY_SIZE(via_pro_group_a_irqs); static int via_irqmap_pro_group_a[] = {0, 1, -1, 2, -1, 3}; static maskarray_t via_unichrome_irqs[] = { - {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, + {VIA_IRQ_DMA0_TD_ENABLE, VIA_IRQ_DMA0_TD_PENDING, VIA_PCI_DMA_CSR0, VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008}, {VIA_IRQ_DMA1_TD_ENABLE, VIA_IRQ_DMA1_TD_PENDING, VIA_PCI_DMA_CSR1, VIA_DMA_CSR_TA | VIA_DMA_CSR_TD, 0x00000008} }; -static int via_num_unichrome = sizeof(via_unichrome_irqs)/sizeof(maskarray_t); +static int via_num_unichrome = ARRAY_SIZE(via_unichrome_irqs); static int via_irqmap_unichrome[] = {-1, -1, -1, 0, -1, 1}; -static unsigned time_diff(struct timeval *now,struct timeval *then) +static unsigned time_diff(struct timeval *now,struct timeval *then) { - return (now->tv_usec >= then->tv_usec) ? - now->tv_usec - then->tv_usec : - 1000000 - (then->tv_usec - now->tv_usec); + return (now->tv_usec >= then->tv_usec) ? + now->tv_usec - then->tv_usec : + 1000000 - (then->tv_usec - now->tv_usec); +} + +u32 via_get_vblank_counter(struct drm_device *dev, int crtc) +{ + drm_via_private_t *dev_priv = dev->dev_private; + if (crtc != 0) + return 0; + + return atomic_read(&dev_priv->vbl_received); } irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS) @@ -109,34 +117,33 @@ status = VIA_READ(VIA_REG_INTERRUPT); if (status & VIA_IRQ_VBLANK_PENDING) { - atomic_inc(&dev->vbl_received); - if (!(atomic_read(&dev->vbl_received) & 0x0F)) { + atomic_inc(&dev_priv->vbl_received); + if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) { #ifdef __linux__ do_gettimeofday(&cur_vblank); #else microtime(&cur_vblank); #endif if (dev_priv->last_vblank_valid) { - dev_priv->usec_per_vblank = + dev_priv->usec_per_vblank = time_diff(&cur_vblank, &dev_priv->last_vblank) >> 4; } dev_priv->last_vblank = cur_vblank; dev_priv->last_vblank_valid = 1; } - if (!(atomic_read(&dev->vbl_received) & 0xFF)) { + if (!(atomic_read(&dev_priv->vbl_received) & 0xFF)) { DRM_DEBUG("US per vblank is: %u\n", - dev_priv->usec_per_vblank); + dev_priv->usec_per_vblank); } - DRM_WAKEUP(&dev->vbl_queue); - drm_vbl_send_signals(dev); + drm_handle_vblank(dev, 0); handled = 1; } - - for (i=0; inum_irqs; ++i) { + + for (i = 0; i < dev_priv->num_irqs; ++i) { if (status & cur_irq->pending_mask) { - atomic_inc( &cur_irq->irq_received ); - DRM_WAKEUP( &cur_irq->irq_queue ); + atomic_inc(&cur_irq->irq_received); + DRM_WAKEUP(&cur_irq->irq_queue); handled = 1; #ifdef VIA_HAVE_DMABLIT if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { @@ -148,7 +155,7 @@ } cur_irq++; } - + /* Acknowlege interrupts */ VIA_WRITE(VIA_REG_INTERRUPT, status); @@ -166,36 +173,39 @@ if (dev_priv) { /* Acknowlege interrupts */ status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | + VIA_WRITE(VIA_REG_INTERRUPT, status | dev_priv->irq_pending_mask); } } -int via_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence) +int via_enable_vblank(struct drm_device *dev, int crtc) { - drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; - unsigned int cur_vblank; - int ret = 0; + drm_via_private_t *dev_priv = dev->dev_private; + u32 status; - DRM_DEBUG("viadrv_vblank_wait\n"); - if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + if (crtc != 0) { + DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc); return -EINVAL; } - viadrv_acknowledge_irqs(dev_priv); + status = VIA_READ(VIA_REG_INTERRUPT); + VIA_WRITE(VIA_REG_INTERRUPT, status & VIA_IRQ_VBLANK_ENABLE); - /* Assume that the user has missed the current sequence number - * by about a day rather than she wants to wait for years - * using vertical blanks... - */ - - DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, - (((cur_vblank = atomic_read(&dev->vbl_received)) - - *sequence) <= (1 << 23))); - - *sequence = cur_vblank; - return ret; + VIA_WRITE8(0x83d4, 0x11); + VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); + + return 0; +} + +void via_disable_vblank(struct drm_device *dev, int crtc) +{ + drm_via_private_t *dev_priv = dev->dev_private; + + VIA_WRITE8(0x83d4, 0x11); + VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); + + if (crtc != 0) + DRM_ERROR("%s: bad crtc %d\n", __FUNCTION__, crtc); } static int @@ -209,24 +219,23 @@ maskarray_t *masks; int real_irq; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); if (!dev_priv) { - DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + DRM_ERROR("called with no initialization\n"); return -EINVAL; } - if (irq >= drm_via_irq_num ) { - DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, - irq); + if (irq >= drm_via_irq_num) { + DRM_ERROR("Trying to wait on unknown irq %d\n", irq); return -EINVAL; } - + real_irq = dev_priv->irq_map[irq]; if (real_irq < 0) { - DRM_ERROR("%s Video IRQ %d not available on this hardware.\n", - __FUNCTION__, irq); + DRM_ERROR("Video IRQ %d not available on this hardware.\n", + irq); return -EINVAL; } @@ -235,14 +244,14 @@ if (masks[real_irq][2] && !force_sequence) { DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, - ((VIA_READ(masks[irq][2]) & masks[irq][3]) == + ((VIA_READ(masks[irq][2]) & masks[irq][3]) == masks[irq][4])); cur_irq_sequence = atomic_read(&cur_irq->irq_received); } else { DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, (((cur_irq_sequence = atomic_read(&cur_irq->irq_received)) - - *sequence) <= (1 << 23))); + *sequence) <= (1 << 23))); } *sequence = cur_irq_sequence; return ret; @@ -260,7 +269,7 @@ drm_via_irq_t *cur_irq; int i; - DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv); + DRM_DEBUG("dev_priv: %p\n", dev_priv); if (dev_priv) { cur_irq = dev_priv->via_irqs; @@ -278,47 +287,49 @@ dev_priv->irq_map = via_irqmap_unichrome; } - for(i=0; i < dev_priv->num_irqs; ++i) { + for (i = 0; i < dev_priv->num_irqs; ++i) { atomic_set(&cur_irq->irq_received, 0); - cur_irq->enable_mask = dev_priv->irq_masks[i][0]; + cur_irq->enable_mask = dev_priv->irq_masks[i][0]; cur_irq->pending_mask = dev_priv->irq_masks[i][1]; - DRM_INIT_WAITQUEUE( &cur_irq->irq_queue ); + DRM_INIT_WAITQUEUE(&cur_irq->irq_queue); dev_priv->irq_enable_mask |= cur_irq->enable_mask; dev_priv->irq_pending_mask |= cur_irq->pending_mask; cur_irq++; - + DRM_DEBUG("Initializing IRQ %d\n", i); } - + dev_priv->last_vblank_valid = 0; /* Clear VSync interrupt regs */ status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & + VIA_WRITE(VIA_REG_INTERRUPT, status & ~(dev_priv->irq_enable_mask)); - + /* Clear bits if they're already high */ viadrv_acknowledge_irqs(dev_priv); } } -void via_driver_irq_postinstall(struct drm_device * dev) +int via_driver_irq_postinstall(struct drm_device * dev) { drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; u32 status; DRM_DEBUG("via_driver_irq_postinstall\n"); - if (dev_priv) { - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL - | dev_priv->irq_enable_mask); + if (!dev_priv) + return -EINVAL; - /* Some magic, oh for some data sheets ! */ + drm_vblank_init(dev, 1); + status = VIA_READ(VIA_REG_INTERRUPT); + VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL + | dev_priv->irq_enable_mask); - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); - - } + /* Some magic, oh for some data sheets ! */ + VIA_WRITE8(0x83d4, 0x11); + VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); + + return 0; } void via_driver_irq_uninstall(struct drm_device * dev) @@ -326,7 +337,7 @@ drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; u32 status; - DRM_DEBUG("driver_irq_uninstall)\n"); + DRM_DEBUG("\n"); if (dev_priv) { /* Some more magic, oh for some data sheets ! */ @@ -335,7 +346,7 @@ VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & + VIA_WRITE(VIA_REG_INTERRUPT, status & ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); } } @@ -353,7 +364,7 @@ return -EINVAL; if (irqwait->request.irq >= dev_priv->num_irqs) { - DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__, + DRM_ERROR("Trying to wait on unknown irq %d\n", irqwait->request.irq); return -EINVAL; } @@ -372,8 +383,7 @@ } if (irqwait->request.type & VIA_IRQ_SIGNAL) { - DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n", - __FUNCTION__); + DRM_ERROR("Signals on Via IRQs not implemented yet.\n"); return -EINVAL; } diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_map.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_map.c --- libdrm-2.3.0.16/shared-core/via_map.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_map.c 2009-04-20 07:00:29.000000000 +0100 @@ -30,7 +30,7 @@ drm_via_private_t *dev_priv = dev->dev_private; int ret = 0; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); dev_priv->sarea = drm_getsarea(dev); if (!dev_priv->sarea) { @@ -69,9 +69,6 @@ dev_priv->emit_0_sequence = 0; dev_priv->have_idlelock = 0; spin_lock_init(&dev_priv->fence_lock); - init_timer(&dev_priv->fence_timer); - dev_priv->fence_timer.function = &via_fence_timer; - dev_priv->fence_timer.data = (unsigned long) dev; #endif /* VIA_HAVE_FENCE */ dev->dev_private = (void *)dev_priv; #ifdef VIA_HAVE_BUFFER @@ -95,7 +92,7 @@ { drm_via_init_t *init = data; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); switch (init->func) { case VIA_INIT_MAP: @@ -140,4 +137,3 @@ return 0; } - diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_verifier.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_verifier.c --- libdrm-2.3.0.16/shared-core/via_verifier.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_verifier.c 2009-04-20 07:00:29.000000000 +0100 @@ -77,7 +77,7 @@ /* * Associates each hazard above with a possible multi-command * sequence. For example an address that is split over multiple - * commands and that needs to be checked at the first command + * commands and that needs to be checked at the first command * that does not include any part of the address. */ @@ -249,10 +249,10 @@ * Partially stolen from drm_memory.h */ -static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t * seq, +static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq, unsigned long offset, unsigned long size, - struct drm_device * dev) + struct drm_device *dev) { #ifdef __linux__ struct drm_map_list *r_list; @@ -283,10 +283,10 @@ } /* - * Require that all AGP texture levels reside in the same AGP map which should + * Require that all AGP texture levels reside in the same AGP map which should * be mappable by the client. This is not a big restriction. - * FIXME: To actually enforce this security policy strictly, drm_rmmap - * would have to wait for dma quiescent before removing an AGP map. + * FIXME: To actually enforce this security policy strictly, drm_rmmap + * would have to wait for dma quiescent before removing an AGP map. * The via_drm_lookup_agp_map call in reality seems to take * very little CPU time. */ @@ -451,15 +451,15 @@ case check_texture_addr3: cur_seq->unfinished = tex_address; tmp = ((cmd >> 24) - HC_SubA_HTXnL0Pit); - if (tmp == 0 && + if (tmp == 0 && (cmd & HC_HTXnEnPit_MASK)) { - cur_seq->pitch[cur_seq->texture][tmp] = + cur_seq->pitch[cur_seq->texture][tmp] = (cmd & HC_HTXnLnPit_MASK); cur_seq->tex_npot[cur_seq->texture] = 1; } else { cur_seq->pitch[cur_seq->texture][tmp] = (cmd & HC_HTXnLnPitE_MASK) >> HC_HTXnLnPitE_SHIFT; - cur_seq->tex_npot[cur_seq->texture] = 0; + cur_seq->tex_npot[cur_seq->texture] = 0; if (cmd & 0x000FFFFF) { DRM_ERROR ("Unimplemented texture level 0 pitch mode.\n"); @@ -1007,7 +1007,7 @@ state = via_check_vheader6(&buf, buf_end); break; case state_command: - if ((HALCYON_HEADER2 == (cmd = *buf)) && + if ((HALCYON_HEADER2 == (cmd = *buf)) && supported_3d) state = state_header2; else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_verifier.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_verifier.h --- libdrm-2.3.0.16/shared-core/via_verifier.h 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_verifier.h 2009-04-20 07:00:29.000000000 +0100 @@ -27,25 +27,23 @@ #define _VIA_VERIFIER_H_ typedef enum { - no_sequence = 0, + no_sequence = 0, z_address, dest_address, tex_address } drm_via_sequence_t; - - typedef struct { unsigned texture; - uint32_t z_addr; - uint32_t d_addr; + uint32_t z_addr; + uint32_t d_addr; uint32_t t_addr[2][10]; uint32_t pitch[2][10]; uint32_t height[2][10]; - uint32_t tex_level_lo[2]; + uint32_t tex_level_lo[2]; uint32_t tex_level_hi[2]; uint32_t tex_palette_size[2]; - uint32_t tex_npot[2]; + uint32_t tex_npot[2]; drm_via_sequence_t unfinished; int agp_texture; int multitex; @@ -56,9 +54,9 @@ const uint32_t *buf_start; } drm_via_state_t; -extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, +extern int via_verify_command_stream(const uint32_t *buf, unsigned int size, struct drm_device *dev, int agp); -extern int via_parse_command_stream(struct drm_device *dev, const uint32_t * buf, +extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf, unsigned int size); #endif diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/via_video.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/via_video.c --- libdrm-2.3.0.16/shared-core/via_video.c 2008-05-15 22:47:05.000000000 +0100 +++ libdrm-2.3.1/shared-core/via_video.c 2009-04-20 07:00:29.000000000 +0100 @@ -33,7 +33,7 @@ { unsigned int i; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) { DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i])); @@ -73,7 +73,7 @@ drm_via_sarea_t *sAPriv = dev_priv->sarea_priv; int ret = 0; - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("\n"); if (fx->lock > VIA_NR_XVMC_LOCKS) return -EFAULT; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/shared-core/xgi_drm.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/shared-core/xgi_drm.h --- libdrm-2.3.0.16/shared-core/xgi_drm.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/shared-core/xgi_drm.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,133 @@ +/**************************************************************************** + * Copyright (C) 2003-2006 by XGI Technology, Taiwan. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation on the rights to use, copy, modify, merge, + * publish, distribute, sublicense, and/or sell copies of the Software, + * and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL XGI AND/OR + * ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + ***************************************************************************/ + +#ifndef _XGI_DRM_H_ +#define _XGI_DRM_H_ + +#include +#include + +struct drm_xgi_sarea { + __u16 device_id; + __u16 vendor_id; + + char device_name[32]; + + unsigned int scrn_start; + unsigned int scrn_xres; + unsigned int scrn_yres; + unsigned int scrn_bpp; + unsigned int scrn_pitch; +}; + + +struct xgi_bootstrap { + /** + * Size of PCI-e GART range in megabytes. + */ + struct drm_map gart; +}; + + +enum xgi_mem_location { + XGI_MEMLOC_NON_LOCAL = 0, + XGI_MEMLOC_LOCAL = 1, + XGI_MEMLOC_INVALID = 0x7fffffff +}; + +struct xgi_mem_alloc { + /** + * Memory region to be used for allocation. + * + * Must be one of XGI_MEMLOC_NON_LOCAL or XGI_MEMLOC_LOCAL. + */ + unsigned int location; + + /** + * Number of bytes request. + * + * On successful allocation, set to the actual number of bytes + * allocated. + */ + unsigned int size; + + /** + * Address of the memory from the graphics hardware's point of view. + */ + __u32 hw_addr; + + /** + * Offset of the allocation in the mapping. + */ + __u32 offset; + + /** + * Magic handle used to release memory. + * + * See also DRM_XGI_FREE ioctl. + */ + __u32 index; +}; + +enum xgi_batch_type { + BTYPE_2D = 0, + BTYPE_3D = 1, + BTYPE_FLIP = 2, + BTYPE_CTRL = 3, + BTYPE_NONE = 0x7fffffff +}; + +struct xgi_cmd_info { + __u32 type; + __u32 hw_addr; + __u32 size; + __u32 id; +}; + +struct xgi_state_info { + unsigned int _fromState; + unsigned int _toState; +}; + + +/* + * Ioctl definitions + */ + +#define DRM_XGI_BOOTSTRAP 0 +#define DRM_XGI_ALLOC 1 +#define DRM_XGI_FREE 2 +#define DRM_XGI_SUBMIT_CMDLIST 3 +#define DRM_XGI_STATE_CHANGE 4 + +#define XGI_IOCTL_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_BOOTSTRAP, struct xgi_bootstrap) +#define XGI_IOCTL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_XGI_ALLOC, struct xgi_mem_alloc) +#define XGI_IOCTL_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_FREE, __u32) +#define XGI_IOCTL_SUBMIT_CMDLIST DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_SUBMIT_CMDLIST, struct xgi_cmd_info) +#define XGI_IOCTL_STATE_CHANGE DRM_IOW(DRM_COMMAND_BASE + DRM_XGI_STATE_CHANGE, struct xgi_state_info) + +#endif /* _XGI_DRM_H_ */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/auth.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/auth.c --- libdrm-2.3.0.16/tests/auth.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/auth.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,137 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include +#include "drmtest.h" + +enum auth_event { + SERVER_READY, + CLIENT_MAGIC, + CLIENT_DONE, +}; + +int commfd[2]; + +static void wait_event(int pipe, enum auth_event expected_event) +{ + int ret; + enum auth_event event; + unsigned char in; + + ret = read(commfd[pipe], &in, 1); + if (ret == -1) + err(1, "read error"); + event = in; + + if (event != expected_event) + errx(1, "unexpected event: %d\n", event); +} + +static void +send_event(int pipe, enum auth_event send_event) +{ + int ret; + unsigned char event; + + event = send_event; + ret = write(commfd[pipe], &event, 1); + if (ret == -1) + err(1, "failed to send event %d", event); +} + +static void client() +{ + struct drm_auth auth; + int drmfd, ret; + + /* XXX: Should make sure we open the same DRM as the master */ + wait_event(0, SERVER_READY); + + drmfd = drm_open_any(); + + /* Get a client magic number and pass it to the master for auth. */ + auth.magic = 0; /* Quiet valgrind */ + ret = ioctl(drmfd, DRM_IOCTL_GET_MAGIC, &auth); + if (ret == -1) + err(1, "Couldn't get client magic"); + send_event(0, CLIENT_MAGIC); + ret = write(commfd[0], &auth.magic, sizeof(auth.magic)); + if (ret == -1) + err(1, "Couldn't write auth data"); + + /* Signal that the client is completely done. */ + send_event(0, CLIENT_DONE); +} + +static void server() +{ + int drmfd, ret; + struct drm_auth auth; + + drmfd = drm_open_any_master(); + + auth.magic = 0xd0d0d0d0; + ret = ioctl(drmfd, DRM_IOCTL_AUTH_MAGIC, &auth); + if (ret != -1 || errno != EINVAL) + errx(1, "Authenticating bad magic succeeded\n"); + + send_event(1, SERVER_READY); + + wait_event(1, CLIENT_MAGIC); + ret = read(commfd[1], &auth.magic, sizeof(auth.magic)); + if (ret == -1) + err(1, "Failure to read client magic"); + + ret = ioctl(drmfd, DRM_IOCTL_AUTH_MAGIC, &auth); + if (ret == -1) + err(1, "Failure to authenticate client magic\n"); + + wait_event(1, CLIENT_DONE); +} + +/** + * Checks DRM authentication mechanisms. + */ +int main(int argc, char **argv) +{ + int ret; + + ret = pipe(commfd); + if (ret == -1) + err(1, "Couldn't create pipe"); + + ret = fork(); + if (ret == -1) + err(1, "failure to fork client"); + if (ret == 0) + client(); + else + server(); + + return 0; +} + diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/dristat.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/dristat.c --- libdrm-2.3.0.16/tests/dristat.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/dristat.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,279 @@ +/* dristat.c -- + * Created: Mon Jan 15 05:05:07 2001 by faith@acm.org + * + * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Rickard E. (Rik) Faith + * + */ + +#include +#include +#include +#include "xf86drm.h" +#include "xf86drmRandom.c" +#include "xf86drmHash.c" +#include "xf86drm.c" + +#define DRM_VERSION 0x00000001 +#define DRM_MEMORY 0x00000002 +#define DRM_CLIENTS 0x00000004 +#define DRM_STATS 0x00000008 +#define DRM_BUSID 0x00000010 + +static void getversion(int fd) +{ + drmVersionPtr version; + + version = drmGetVersion(fd); + if (version) { + printf(" Version information:\n"); + printf(" Name: %s\n", version->name ? version->name : "?"); + printf(" Version: %d.%d.%d\n", + version->version_major, + version->version_minor, + version->version_patchlevel); + printf(" Date: %s\n", version->date ? version->date : "?"); + printf(" Desc: %s\n", version->desc ? version->desc : "?"); + drmFreeVersion(version); + } else { + printf(" No version information available\n"); + } +} + +static void getbusid(int fd) +{ + const char *busid = drmGetBusid(fd); + + printf(" Busid: %s\n", *busid ? busid : "(not set)"); + drmFreeBusid(busid); +} + + +static void getvm(int fd) +{ + int i; + const char *typename; + char flagname[33]; + drm_handle_t offset; + drmSize size; + drmMapType type; + drmMapFlags flags; + drm_handle_t handle; + int mtrr; + + printf(" VM map information:\n"); + printf(" flags: (R)estricted (r)ead/(w)rite (l)ocked (k)ernel (W)rite-combine (L)ock:\n"); + printf(" slot offset size type flags address mtrr\n"); + + for (i = 0; + !drmGetMap(fd, i, &offset, &size, &type, &flags, &handle, &mtrr); + i++) { + + switch (type) { + case DRM_FRAME_BUFFER: typename = "FB"; break; + case DRM_REGISTERS: typename = "REG"; break; + case DRM_SHM: typename = "SHM"; break; + case DRM_AGP: typename = "AGP"; break; + case DRM_SCATTER_GATHER: typename = "SG"; break; + default: typename = "???"; break; + } + + flagname[0] = (flags & DRM_RESTRICTED) ? 'R' : ' '; + flagname[1] = (flags & DRM_READ_ONLY) ? 'r' : 'w'; + flagname[2] = (flags & DRM_LOCKED) ? 'l' : ' '; + flagname[3] = (flags & DRM_KERNEL) ? 'k' : ' '; + flagname[4] = (flags & DRM_WRITE_COMBINING) ? 'W' : ' '; + flagname[5] = (flags & DRM_CONTAINS_LOCK) ? 'L' : ' '; + flagname[6] = '\0'; + + printf(" %4d 0x%08lx 0x%08lx %3.3s %6.6s 0x%08lx ", + i, offset, (unsigned long)size, typename, flagname, handle); + if (mtrr < 0) printf("none\n"); + else printf("%4d\n", mtrr); + } +} + +static void getclients(int fd) +{ + int i; + int auth; + int pid; + int uid; + unsigned long magic; + unsigned long iocs; + char buf[64]; + char cmd[40]; + int procfd; + + printf(" DRI client information:\n"); + printf(" a pid uid magic ioctls prog\n"); + + for (i = 0; !drmGetClient(fd, i, &auth, &pid, &uid, &magic, &iocs); i++) { + sprintf(buf, "/proc/%d/cmdline", pid); + memset(cmd, 0, sizeof(cmd)); + if ((procfd = open(buf, O_RDONLY, 0)) >= 0) { + read(procfd, cmd, sizeof(cmd)-1); + close(procfd); + } + if (*cmd) { + char *pt; + + for (pt = cmd; *pt; pt++) if (!isprint(*pt)) *pt = ' '; + printf(" %c %5d %5d %10lu %10lu %s\n", + auth ? 'y' : 'n', pid, uid, magic, iocs, cmd); + } else { + printf(" %c %5d %5d %10lu %10lu\n", + auth ? 'y' : 'n', pid, uid, magic, iocs); + } + } +} + +static void printhuman(unsigned long value, const char *name, int mult) +{ + const char *p; + double f; + /* Print width 5 number in width 6 space */ + if (value < 100000) { + printf(" %5lu", value); + return; + } + + p = name; + f = (double)value / (double)mult; + if (f < 10.0) { + printf(" %4.2f%c", f, *p); + return; + } + + p++; + f = (double)value / (double)mult; + if (f < 10.0) { + printf(" %4.2f%c", f, *p); + return; + } + + p++; + f = (double)value / (double)mult; + if (f < 10.0) { + printf(" %4.2f%c", f, *p); + return; + } +} + +static void getstats(int fd, int i) +{ + drmStatsT prev, curr; + int j; + double rate; + + printf(" System statistics:\n"); + + if (drmGetStats(fd, &prev)) return; + if (!i) { + for (j = 0; j < prev.count; j++) { + printf(" "); + printf(prev.data[j].long_format, prev.data[j].long_name); + if (prev.data[j].isvalue) printf(" 0x%08lx\n", prev.data[j].value); + else printf(" %10lu\n", prev.data[j].value); + } + return; + } + + printf(" "); + for (j = 0; j < prev.count; j++) + if (!prev.data[j].verbose) { + printf(" "); + printf(prev.data[j].rate_format, prev.data[j].rate_name); + } + printf("\n"); + + for (;;) { + sleep(i); + if (drmGetStats(fd, &curr)) return; + printf(" "); + for (j = 0; j < curr.count; j++) { + if (curr.data[j].verbose) continue; + if (curr.data[j].isvalue) { + printf(" %08lx", curr.data[j].value); + } else { + rate = (curr.data[j].value - prev.data[j].value) / (double)i; + printhuman(rate, curr.data[j].mult_names, curr.data[j].mult); + } + } + printf("\n"); + memcpy(&prev, &curr, sizeof(prev)); + } + +} + +int main(int argc, char **argv) +{ + int c; + int mask = 0; + int minor = 0; + int interval = 0; + int fd; + char buf[64]; + int i; + + while ((c = getopt(argc, argv, "avmcsbM:i:")) != EOF) + switch (c) { + case 'a': mask = ~0; break; + case 'v': mask |= DRM_VERSION; break; + case 'm': mask |= DRM_MEMORY; break; + case 'c': mask |= DRM_CLIENTS; break; + case 's': mask |= DRM_STATS; break; + case 'b': mask |= DRM_BUSID; break; + case 'i': interval = strtol(optarg, NULL, 0); break; + case 'M': minor = strtol(optarg, NULL, 0); break; + default: + fprintf( stderr, "Usage: dristat [options]\n\n" ); + fprintf( stderr, "Displays DRM information. Use with no arguments to display available cards.\n\n" ); + fprintf( stderr, " -a Show all available information\n" ); + fprintf( stderr, " -b Show DRM bus ID's\n" ); + fprintf( stderr, " -c Display information about DRM clients\n" ); + fprintf( stderr, " -i [interval] Continuously display statistics every [interval] seconds\n" ); + fprintf( stderr, " -v Display DRM module and card version information\n" ); + fprintf( stderr, " -m Display memory use information\n" ); + fprintf( stderr, " -s Display DRM statistics\n" ); + fprintf( stderr, " -M [minor] Select card by minor number\n" ); + return 1; + } + + for (i = 0; i < 16; i++) if (!minor || i == minor) { + sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, i); + fd = drmOpenMinor(i, 1); + if (fd >= 0) { + printf("%s\n", buf); + if (mask & DRM_BUSID) getbusid(fd); + if (mask & DRM_VERSION) getversion(fd); + if (mask & DRM_MEMORY) getvm(fd); + if (mask & DRM_CLIENTS) getclients(fd); + if (mask & DRM_STATS) getstats(fd, interval); + close(fd); + } + } + + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/drmstat.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/drmstat.c --- libdrm-2.3.0.16/tests/drmstat.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/drmstat.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,425 @@ +/* drmstat.c -- DRM device status and testing program + * Created: Tue Jan 5 08:19:24 1999 by faith@precisioninsight.com + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Rickard E. (Rik) Faith + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xf86drm.h" + +int sigio_fd; + +static double usec(struct timeval *end, struct timeval *start) +{ + double e = end->tv_sec * 1000000 + end->tv_usec; + double s = start->tv_sec * 1000000 + start->tv_usec; + + return e - s; +} + +static void getversion(int fd) +{ + drmVersionPtr version; + + version = drmGetVersion(fd); + if (version) { + printf( "Name: %s\n", version->name ? version->name : "?" ); + printf( " Version: %d.%d.%d\n", + version->version_major, + version->version_minor, + version->version_patchlevel ); + printf( " Date: %s\n", version->date ? version->date : "?" ); + printf( " Desc: %s\n", version->desc ? version->desc : "?" ); + drmFreeVersion(version); + } else { + printf( "No driver available\n" ); + } +} + +void handler(int fd, void *oldctx, void *newctx) +{ + printf("Got fd %d\n", fd); +} + +void process_sigio(char *device) +{ + int fd; + + if ((fd = open(device, 0)) < 0) { + drmError(-errno, __FUNCTION__); + exit(1); + } + + sigio_fd = fd; + /* drmInstallSIGIOHandler(fd, handler); */ + for (;;) sleep(60); +} + +int main(int argc, char **argv) +{ + int c; + int r = 0; + int fd = -1; + drm_handle_t handle; + void *address; + char *pt; + unsigned long count; + unsigned long offset; + unsigned long size; + drm_context_t context; + int loops; + char buf[1024]; + int i; + drmBufInfoPtr info; + drmBufMapPtr bufs; + drmLockPtr lock; + int secs; + + while ((c = getopt(argc, argv, + "lc:vo:O:f:s:w:W:b:r:R:P:L:C:XS:B:F:")) != EOF) + switch (c) { + case 'F': + count = strtoul(optarg, NULL, 0); + if (!fork()) { + dup(fd); + sleep(count); + } + close(fd); + break; + case 'v': getversion(fd); break; + case 'X': + if ((r = drmCreateContext(fd, &context))) { + drmError(r, argv[0]); + return 1; + } + printf( "Got %d\n", context); + break; + case 'S': + process_sigio(optarg); + break; + case 'C': + if ((r = drmSwitchToContext(fd, strtoul(optarg, NULL, 0)))) { + drmError(r, argv[0]); + return 1; + } + break; + case 'c': + if ((r = drmSetBusid(fd,optarg))) { + drmError(r, argv[0]); + return 1; + } + break; + case 'o': + if ((fd = drmOpen(optarg, NULL)) < 0) { + drmError(fd, argv[0]); + return 1; + } + break; + case 'O': + if ((fd = drmOpen(NULL, optarg)) < 0) { + drmError(fd, argv[0]); + return 1; + } + break; + case 'B': /* Test buffer allocation */ + count = strtoul(optarg, &pt, 0); + size = strtoul(pt+1, &pt, 0); + secs = strtoul(pt+1, NULL, 0); + { + drmDMAReq dma; + int *indices, *sizes; + + indices = alloca(sizeof(*indices) * count); + sizes = alloca(sizeof(*sizes) * count); + dma.context = context; + dma.send_count = 0; + dma.request_count = count; + dma.request_size = size; + dma.request_list = indices; + dma.request_sizes = sizes; + dma.flags = DRM_DMA_WAIT; + if ((r = drmDMA(fd, &dma))) { + drmError(r, argv[0]); + return 1; + } + for (i = 0; i < dma.granted_count; i++) { + printf("%5d: index = %d, size = %d\n", + i, dma.request_list[i], dma.request_sizes[i]); + } + sleep(secs); + drmFreeBufs(fd, dma.granted_count, indices); + } + break; + case 'b': + count = strtoul(optarg, &pt, 0); + size = strtoul(pt+1, NULL, 0); + if ((r = drmAddBufs(fd, count, size, 0, 65536)) < 0) { + drmError(r, argv[0]); + return 1; + } + if (!(info = drmGetBufInfo(fd))) { + drmError(0, argv[0]); + return 1; + } + for (i = 0; i < info->count; i++) { + printf("%5d buffers of size %6d (low = %d, high = %d)\n", + info->list[i].count, + info->list[i].size, + info->list[i].low_mark, + info->list[i].high_mark); + } + if ((r = drmMarkBufs(fd, 0.50, 0.80))) { + drmError(r, argv[0]); + return 1; + } + if (!(info = drmGetBufInfo(fd))) { + drmError(0, argv[0]); + return 1; + } + for (i = 0; i < info->count; i++) { + printf("%5d buffers of size %6d (low = %d, high = %d)\n", + info->list[i].count, + info->list[i].size, + info->list[i].low_mark, + info->list[i].high_mark); + } + printf("===== /proc/dri/0/mem =====\n"); + sprintf(buf, "cat /proc/dri/0/mem"); + system(buf); +#if 1 + if (!(bufs = drmMapBufs(fd))) { + drmError(0, argv[0]); + return 1; + } + printf("===============================\n"); + printf( "%d bufs\n", bufs->count); + for (i = 0; i < bufs->count; i++) { + printf( " %4d: %8d bytes at %p\n", + i, + bufs->list[i].total, + bufs->list[i].address); + } + printf("===== /proc/dri/0/vma =====\n"); + sprintf(buf, "cat /proc/dri/0/vma"); + system(buf); +#endif + break; + case 'f': + offset = strtoul(optarg, &pt, 0); + size = strtoul(pt+1, NULL, 0); + handle = 0; + if ((r = drmAddMap(fd, offset, size, + DRM_FRAME_BUFFER, 0, &handle))) { + drmError(r, argv[0]); + return 1; + } + printf("0x%08lx:0x%04lx added\n", offset, size); + printf("===== /proc/dri/0/mem =====\n"); + sprintf(buf, "cat /proc/dri/0/mem"); + system(buf); + break; + case 'r': + case 'R': + offset = strtoul(optarg, &pt, 0); + size = strtoul(pt+1, NULL, 0); + handle = 0; + if ((r = drmAddMap(fd, offset, size, + DRM_REGISTERS, + c == 'R' ? DRM_READ_ONLY : 0, + &handle))) { + drmError(r, argv[0]); + return 1; + } + printf("0x%08lx:0x%04lx added\n", offset, size); + printf("===== /proc/dri/0/mem =====\n"); + sprintf(buf, "cat /proc/dri/0/mem"); + system(buf); + break; + case 's': + size = strtoul(optarg, &pt, 0); + handle = 0; + if ((r = drmAddMap(fd, 0, size, + DRM_SHM, DRM_CONTAINS_LOCK, + &handle))) { + drmError(r, argv[0]); + return 1; + } + printf("0x%04lx byte shm added at 0x%08lx\n", size, handle); + sprintf(buf, "cat /proc/dri/0/vm"); + system(buf); + break; + case 'P': + offset = strtoul(optarg, &pt, 0); + size = strtoul(pt+1, NULL, 0); + address = NULL; + if ((r = drmMap(fd, offset, size, &address))) { + drmError(r, argv[0]); + return 1; + } + printf("0x%08lx:0x%04lx mapped at %p for pid %d\n", + offset, size, address, getpid()); + printf("===== /proc/dri/0/vma =====\n"); + sprintf(buf, "cat /proc/dri/0/vma"); + system(buf); + mprotect((void *)offset, size, PROT_READ); + printf("===== /proc/dri/0/vma =====\n"); + sprintf(buf, "cat /proc/dri/0/vma"); + system(buf); + break; + case 'w': + case 'W': + offset = strtoul(optarg, &pt, 0); + size = strtoul(pt+1, NULL, 0); + address = NULL; + if ((r = drmMap(fd, offset, size, &address))) { + drmError(r, argv[0]); + return 1; + } + printf("0x%08lx:0x%04lx mapped at %p for pid %d\n", + offset, size, address, getpid()); + printf("===== /proc/%d/maps =====\n", getpid()); + sprintf(buf, "cat /proc/%d/maps", getpid()); + system(buf); + printf("===== /proc/dri/0/mem =====\n"); + sprintf(buf, "cat /proc/dri/0/mem"); + system(buf); + printf("===== /proc/dri/0/vma =====\n"); + sprintf(buf, "cat /proc/dri/0/vma"); + system(buf); + printf("===== READING =====\n"); + for (i = 0; i < 0x10; i++) + printf("%02x ", (unsigned int)((unsigned char *)address)[i]); + printf("\n"); + if (c == 'w') { + printf("===== WRITING =====\n"); + for (i = 0; i < size; i+=2) { + ((char *)address)[i] = i & 0xff; + ((char *)address)[i+1] = i & 0xff; + } + } + printf("===== READING =====\n"); + for (i = 0; i < 0x10; i++) + printf("%02x ", (unsigned int)((unsigned char *)address)[i]); + printf("\n"); + printf("===== /proc/dri/0/vma =====\n"); + sprintf(buf, "cat /proc/dri/0/vma"); + system(buf); + break; + case 'L': + context = strtoul(optarg, &pt, 0); + offset = strtoul(pt+1, &pt, 0); + size = strtoul(pt+1, &pt, 0); + loops = strtoul(pt+1, NULL, 0); + address = NULL; + if ((r = drmMap(fd, offset, size, &address))) { + drmError(r, argv[0]); + return 1; + } + lock = address; +#if 1 + { + int counter = 0; + struct timeval loop_start, loop_end; + struct timeval lock_start, lock_end; + double wt; +#define HISTOSIZE 9 + int histo[HISTOSIZE]; + int output = 0; + int fast = 0; + + if (loops < 0) { + loops = -loops; + ++output; + } + + for (i = 0; i < HISTOSIZE; i++) histo[i] = 0; + + gettimeofday(&loop_start, NULL); + for (i = 0; i < loops; i++) { + gettimeofday(&lock_start, NULL); + DRM_LIGHT_LOCK_COUNT(fd,lock,context,fast); + gettimeofday(&lock_end, NULL); + DRM_UNLOCK(fd,lock,context); + ++counter; + wt = usec(&lock_end, &lock_start); + if (wt <= 2.5) ++histo[8]; + if (wt < 5.0) ++histo[0]; + else if (wt < 50.0) ++histo[1]; + else if (wt < 500.0) ++histo[2]; + else if (wt < 5000.0) ++histo[3]; + else if (wt < 50000.0) ++histo[4]; + else if (wt < 500000.0) ++histo[5]; + else if (wt < 5000000.0) ++histo[6]; + else ++histo[7]; + if (output) printf( "%.2f uSec, %d fast\n", wt, fast); + } + gettimeofday(&loop_end, NULL); + printf( "Average wait time = %.2f usec, %d fast\n", + usec(&loop_end, &loop_start) / counter, fast); + printf( "%9d <= 2.5 uS\n", histo[8]); + printf( "%9d < 5 uS\n", histo[0]); + printf( "%9d < 50 uS\n", histo[1]); + printf( "%9d < 500 uS\n", histo[2]); + printf( "%9d < 5000 uS\n", histo[3]); + printf( "%9d < 50000 uS\n", histo[4]); + printf( "%9d < 500000 uS\n", histo[5]); + printf( "%9d < 5000000 uS\n", histo[6]); + printf( "%9d >= 5000000 uS\n", histo[7]); + } +#else + printf( "before lock: 0x%08x\n", lock->lock); + printf( "lock: 0x%08x\n", lock->lock); + sleep(5); + printf( "unlock: 0x%08x\n", lock->lock); +#endif + break; + default: + fprintf( stderr, "Usage: drmstat [options]\n" ); + return 1; + } + + return r; +} + +void +xf86VDrvMsgVerb(int scrnIndex, int type, int verb, const char *format, + va_list args) +{ + vfprintf(stderr, format, args); +} + +int xf86ConfigDRI[10]; diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/drmtest.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/drmtest.c --- libdrm-2.3.0.16/tests/drmtest.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/drmtest.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,83 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include +#include "drmtest.h" + +/** Open the first DRM device we can find, searching up to 16 device nodes */ +int drm_open_any(void) +{ + char name[20]; + int i, fd; + + for (i = 0; i < 16; i++) { + sprintf(name, "/dev/dri/card%d", i); + fd = open(name, O_RDWR); + if (fd != -1) + return fd; + } + abort(); +} + + +/** + * Open the first DRM device we can find where we end up being the master. + */ +int drm_open_any_master(void) +{ + char name[20]; + int i, fd; + + for (i = 0; i < 16; i++) { + drm_client_t client; + int ret; + + sprintf(name, "/dev/dri/card%d", i); + fd = open(name, O_RDWR); + if (fd == -1) + continue; + + /* Check that we're the only opener and authed. */ + client.idx = 0; + ret = ioctl(fd, DRM_IOCTL_GET_CLIENT, &client); + assert (ret == 0); + if (!client.auth) { + close(fd); + continue; + } + client.idx = 1; + ret = ioctl(fd, DRM_IOCTL_GET_CLIENT, &client); + if (ret != -1 || errno != EINVAL) { + close(fd); + continue; + } + return fd; + } + fprintf(stderr, "Couldn't find an un-controlled DRM device\n"); + abort(); +} + diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/drmtest.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/drmtest.h --- libdrm-2.3.0.16/tests/drmtest.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/drmtest.h 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,37 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include +#include +#include +#include +#include + +#include "xf86drm.h" + +int drm_open_any(void); +int drm_open_any_master(void); diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/getclient.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/getclient.c --- libdrm-2.3.0.16/tests/getclient.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/getclient.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,60 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include +#include "drmtest.h" + +/** + * Checks DRM_IOCTL_GET_CLIENT. + */ +int main(int argc, char **argv) +{ + int fd, ret; + drm_client_t client; + + fd = drm_open_any(); + + /* Look for client index 0. This should exist whether we're operating + * on an otherwise unused drm device, or the X Server is running on + * the device. + */ + client.idx = 0; + ret = ioctl(fd, DRM_IOCTL_GET_CLIENT, &client); + assert(ret == 0); + + /* Look for some absurd client index and make sure it's invalid. + * The DRM drivers currently always return data, so the user has + * no real way to detect when the list has terminated. That's bad, + * and this test is XFAIL as a result. + */ + client.idx = 0x7fffffff; + ret = ioctl(fd, DRM_IOCTL_GET_CLIENT, &client); + assert(ret == -1 && errno == EINVAL); + + close(fd); + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/getstats.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/getstats.c --- libdrm-2.3.0.16/tests/getstats.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/getstats.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,51 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include +#include "drmtest.h" + +/** + * Checks DRM_IOCTL_GET_STATS. + * + * I don't care too much about the actual contents, just that the kernel + * doesn't crash. + */ +int main(int argc, char **argv) +{ + int fd, ret; + drm_stats_t stats; + + fd = drm_open_any(); + + ret = ioctl(fd, DRM_IOCTL_GET_STATS, &stats); + assert(ret == 0); + + assert(stats.count >= 0); + + close(fd); + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/getversion.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/getversion.c --- libdrm-2.3.0.16/tests/getversion.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/getversion.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,47 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include "drmtest.h" + +/** + * Checks DRM_IOCTL_GET_VERSION and libdrm's drmGetVersion() interface to it. + */ +int main(int argc, char **argv) +{ + int fd; + drmVersionPtr v; + + fd = drm_open_any(); + v = drmGetVersion(fd); + assert(strlen(v->name) != 0); + assert(strlen(v->date) != 0); + assert(strlen(v->desc) != 0); + assert(v->version_major >= 1); + drmFree(v); + close(fd); + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/lock.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/lock.c --- libdrm-2.3.0.16/tests/lock.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/lock.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,263 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +/** @file lock.c + * Tests various potential failures of the DRM locking mechanisms + */ + +#include +#include "drmtest.h" + +enum auth_event { + SERVER_READY, + CLIENT_MAGIC, + SERVER_LOCKED, + CLIENT_LOCKED, +}; + +int commfd[2]; +unsigned int lock1 = 0x00001111; +unsigned int lock2 = 0x00002222; + +/* return time in milliseconds */ +static unsigned int +get_millis() +{ + struct timeval tv; + + gettimeofday(&tv, NULL); + return tv.tv_sec * 1000 + tv.tv_usec / 1000; +} + +static void +wait_event(int pipe, enum auth_event expected_event) +{ + int ret; + enum auth_event event; + unsigned char in; + + ret = read(commfd[pipe], &in, 1); + if (ret == -1) + err(1, "read error"); + event = in; + + if (event != expected_event) + errx(1, "unexpected event: %d\n", event); +} + +static void +send_event(int pipe, enum auth_event send_event) +{ + int ret; + unsigned char event; + + event = send_event; + ret = write(commfd[pipe], &event, 1); + if (ret == -1) + err(1, "failed to send event %d", event); +} + +static void +client_auth(int drmfd) +{ + struct drm_auth auth; + int ret; + + /* Get a client magic number and pass it to the master for auth. */ + ret = ioctl(drmfd, DRM_IOCTL_GET_MAGIC, &auth); + if (ret == -1) + err(1, "Couldn't get client magic"); + send_event(0, CLIENT_MAGIC); + ret = write(commfd[0], &auth.magic, sizeof(auth.magic)); + if (ret == -1) + err(1, "Couldn't write auth data"); +} + +static void +server_auth(int drmfd) +{ + struct drm_auth auth; + int ret; + + send_event(1, SERVER_READY); + wait_event(1, CLIENT_MAGIC); + ret = read(commfd[1], &auth.magic, sizeof(auth.magic)); + if (ret == -1) + err(1, "Failure to read client magic"); + + ret = ioctl(drmfd, DRM_IOCTL_AUTH_MAGIC, &auth); + if (ret == -1) + err(1, "Failure to authenticate client magic\n"); +} + +/** Tests that locking is successful in normal conditions */ +static void +test_lock_unlock(int drmfd) +{ + int ret; + + ret = drmGetLock(drmfd, lock1, 0); + if (ret != 0) + err(1, "Locking failed"); + ret = drmUnlock(drmfd, lock1); + if (ret != 0) + err(1, "Unlocking failed"); +} + +/** Tests that unlocking the lock while it's not held works correctly */ +static void +test_unlock_unlocked(int drmfd) +{ + int ret; + + ret = drmUnlock(drmfd, lock1); + if (ret == 0) + err(1, "Unlocking unlocked lock succeeded"); +} + +/** Tests that unlocking a lock held by another context fails appropriately */ +static void +test_unlock_unowned(int drmfd) +{ + int ret; + + ret = drmGetLock(drmfd, lock1, 0); + assert(ret == 0); + ret = drmUnlock(drmfd, lock2); + if (ret == 0) + errx(1, "Unlocking other context's lock succeeded"); + ret = drmUnlock(drmfd, lock1); + assert(ret == 0); +} + +/** + * Tests that an open/close by the same process doesn't result in the lock + * being dropped. + */ +static void test_open_close_locked(drmfd) +{ + int ret, tempfd; + + ret = drmGetLock(drmfd, lock1, 0); + assert(ret == 0); + /* XXX: Need to make sure that this is the same device as drmfd */ + tempfd = drm_open_any(); + close(tempfd); + ret = drmUnlock(drmfd, lock1); + if (ret != 0) + errx(1, "lock lost during open/close by same pid"); +} + +static void client() +{ + int drmfd, ret; + unsigned int time; + + wait_event(0, SERVER_READY); + + /* XXX: Should make sure we open the same DRM as the master */ + drmfd = drm_open_any(); + + client_auth(drmfd); + + /* Wait for the server to grab the lock, then grab it ourselves (to + * contest it). Hopefully we hit it within the window of when the + * server locks. + */ + wait_event(0, SERVER_LOCKED); + ret = drmGetLock(drmfd, lock2, 0); + time = get_millis(); + if (ret != 0) + err(1, "Failed to get lock on client\n"); + drmUnlock(drmfd, lock2); + + /* Tell the server that our locking completed, and when it did */ + send_event(0, CLIENT_LOCKED); + ret = write(commfd[0], &time, sizeof(time)); + + close(drmfd); + exit(0); +} + +static void server() +{ + int drmfd, tempfd, ret; + unsigned int client_time, unlock_time; + + drmfd = drm_open_any_master(); + + test_lock_unlock(drmfd); + test_unlock_unlocked(drmfd); + test_unlock_unowned(drmfd); + test_open_close_locked(drmfd); + + /* Perform the authentication sequence with the client. */ + server_auth(drmfd); + + /* Now, test that the client attempting to lock while the server + * holds the lock works correctly. + */ + ret = drmGetLock(drmfd, lock1, 0); + assert(ret == 0); + send_event(1, SERVER_LOCKED); + /* Wait a while for the client to do its thing */ + sleep(1); + ret = drmUnlock(drmfd, lock1); + assert(ret == 0); + unlock_time = get_millis(); + + wait_event(1, CLIENT_LOCKED); + ret = read(commfd[1], &client_time, sizeof(client_time)); + if (ret == -1) + err(1, "Failure to read client magic"); + + if (client_time < unlock_time) + errx(1, "Client took lock before server released it"); + + close(drmfd); +} + +int main(int argc, char **argv) +{ + int ret; + + + ret = pipe(commfd); + if (ret == -1) + err(1, "Couldn't create pipe"); + + ret = fork(); + if (ret == -1) + err(1, "failure to fork client"); + if (ret == 0) + client(); + else + server(); + + return 0; +} + diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/Makefile.am /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/Makefile.am --- libdrm-2.3.0.16/tests/Makefile.am 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/Makefile.am 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,29 @@ +AM_CFLAGS = \ + -I $(top_srcdir)/shared-core \ + -I $(top_srcdir)/libdrm + +noinst_PROGRAMS = \ + dristat \ + drmstat + +EXTRA_LTLIBRARIES = libdrmtest.la +libdrmtest_la_SOURCES = \ + drmtest.c \ + drmtest.h +libdrmtest_la_LIBADD = \ + $(top_builddir)/libdrm/libdrm.la + +LDADD = libdrmtest.la + +TESTS = auth \ + openclose \ + getversion \ + getclient \ + getstats \ + lock \ + setversion \ + updatedraw + +EXTRA_PROGRAMS = $(TESTS) +CLEANFILES = $(EXTRA_PROGRAMS) $(EXTRA_LTLIBRARIES) + diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/Makefile.in /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/Makefile.in --- libdrm-2.3.0.16/tests/Makefile.in 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/Makefile.in 2008-07-01 08:55:48.000000000 +0100 @@ -0,0 +1,609 @@ +# Makefile.in generated by automake 1.10.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +VPATH = @srcdir@ +pkgdatadir = $(datadir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_triplet = @build@ +host_triplet = @host@ +noinst_PROGRAMS = dristat$(EXEEXT) drmstat$(EXEEXT) +TESTS = auth$(EXEEXT) openclose$(EXEEXT) getversion$(EXEEXT) \ + getclient$(EXEEXT) getstats$(EXEEXT) lock$(EXEEXT) \ + setversion$(EXEEXT) updatedraw$(EXEEXT) +EXTRA_PROGRAMS = $(am__EXEEXT_1) +subdir = tests +DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/configure.ac +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +mkinstalldirs = $(install_sh) -d +CONFIG_HEADER = $(top_builddir)/libdrm/config.h +CONFIG_CLEAN_FILES = +libdrmtest_la_DEPENDENCIES = $(top_builddir)/libdrm/libdrm.la +am_libdrmtest_la_OBJECTS = drmtest.lo +libdrmtest_la_OBJECTS = $(am_libdrmtest_la_OBJECTS) +am__EXEEXT_1 = auth$(EXEEXT) openclose$(EXEEXT) getversion$(EXEEXT) \ + getclient$(EXEEXT) getstats$(EXEEXT) lock$(EXEEXT) \ + setversion$(EXEEXT) updatedraw$(EXEEXT) +PROGRAMS = $(noinst_PROGRAMS) +auth_SOURCES = auth.c +auth_OBJECTS = auth.$(OBJEXT) +auth_LDADD = $(LDADD) +auth_DEPENDENCIES = libdrmtest.la +dristat_SOURCES = dristat.c +dristat_OBJECTS = dristat.$(OBJEXT) +dristat_LDADD = $(LDADD) +dristat_DEPENDENCIES = libdrmtest.la +drmstat_SOURCES = drmstat.c +drmstat_OBJECTS = drmstat.$(OBJEXT) +drmstat_LDADD = $(LDADD) +drmstat_DEPENDENCIES = libdrmtest.la +getclient_SOURCES = getclient.c +getclient_OBJECTS = getclient.$(OBJEXT) +getclient_LDADD = $(LDADD) +getclient_DEPENDENCIES = libdrmtest.la +getstats_SOURCES = getstats.c +getstats_OBJECTS = getstats.$(OBJEXT) +getstats_LDADD = $(LDADD) +getstats_DEPENDENCIES = libdrmtest.la +getversion_SOURCES = getversion.c +getversion_OBJECTS = getversion.$(OBJEXT) +getversion_LDADD = $(LDADD) +getversion_DEPENDENCIES = libdrmtest.la +lock_SOURCES = lock.c +lock_OBJECTS = lock.$(OBJEXT) +lock_LDADD = $(LDADD) +lock_DEPENDENCIES = libdrmtest.la +openclose_SOURCES = openclose.c +openclose_OBJECTS = openclose.$(OBJEXT) +openclose_LDADD = $(LDADD) +openclose_DEPENDENCIES = libdrmtest.la +setversion_SOURCES = setversion.c +setversion_OBJECTS = setversion.$(OBJEXT) +setversion_LDADD = $(LDADD) +setversion_DEPENDENCIES = libdrmtest.la +updatedraw_SOURCES = updatedraw.c +updatedraw_OBJECTS = updatedraw.$(OBJEXT) +updatedraw_LDADD = $(LDADD) +updatedraw_DEPENDENCIES = libdrmtest.la +DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir)/libdrm +depcomp = $(SHELL) $(top_srcdir)/depcomp +am__depfiles_maybe = depfiles +COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ + $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) +LTCOMPILE = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ + --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ + $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) +CCLD = $(CC) +LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ + --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ + $(LDFLAGS) -o $@ +SOURCES = $(libdrmtest_la_SOURCES) auth.c dristat.c drmstat.c \ + getclient.c getstats.c getversion.c lock.c openclose.c \ + setversion.c updatedraw.c +DIST_SOURCES = $(libdrmtest_la_SOURCES) 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+ * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include "drmtest.h" + +int main(int argc, char **argv) +{ + int fd; + + fd = drm_open_any(); + close(fd); + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/setversion.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/setversion.c --- libdrm-2.3.0.16/tests/setversion.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/setversion.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,84 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include +#include "drmtest.h" + +/** + * Checks DRM_IOCTL_SET_VERSION. + * + * This tests that we can get the actual version out, and that setting invalid + * major/minor numbers fails appropriately. It does not check the actual + * behavior differenses resulting from an increased DI version. + */ +int main(int argc, char **argv) +{ + int fd, ret; + drm_set_version_t sv, version; + + fd = drm_open_any_master(); + + /* First, check that we can get the DD/DI versions. */ + memset(&version, 0, sizeof(version)); + version.drm_di_major = -1; + version.drm_di_minor = -1; + version.drm_dd_major = -1; + version.drm_dd_minor = -1; + ret = ioctl(fd, DRM_IOCTL_SET_VERSION, &version); + assert(ret == 0); + assert(version.drm_di_major != -1); + assert(version.drm_di_minor != -1); + assert(version.drm_dd_major != -1); + assert(version.drm_dd_minor != -1); + + /* Check that an invalid DI major fails */ + sv = version; + sv.drm_di_major++; + ret = ioctl(fd, DRM_IOCTL_SET_VERSION, &sv); + assert(ret == -1 && errno == EINVAL); + + /* Check that an invalid DI minor fails */ + sv = version; + sv.drm_di_major++; + ret = ioctl(fd, DRM_IOCTL_SET_VERSION, &sv); + assert(ret == -1 && errno == EINVAL); + + /* Check that an invalid DD major fails */ + sv = version; + sv.drm_dd_major++; + ret = ioctl(fd, DRM_IOCTL_SET_VERSION, &sv); + assert(ret == -1 && errno == EINVAL); + + /* Check that an invalid DD minor fails */ + sv = version; + sv.drm_dd_minor++; + ret = ioctl(fd, DRM_IOCTL_SET_VERSION, &sv); + assert(ret == -1 && errno == EINVAL); + + close(fd); + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/AUTHORS /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/AUTHORS --- libdrm-2.3.0.16/tests/ttmtest/AUTHORS 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/AUTHORS 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1 @@ +Thomas Hellström and others. diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/ChangeLog /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/ChangeLog --- libdrm-2.3.0.16/tests/ttmtest/ChangeLog 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/ChangeLog 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,23 @@ +2006-01-24 Thomas Hellström + + * configure.ac: + * src/ttmtest.c: + + Fixed include path. + +2006-01-24 Thomas Hellström + + * AUTHORS: + * Makefile.am: + * configure.ac: + * reconf: + * src/Makefile.am: + * src/ttmtest.c: (fastrdtsc), (time_diff), (releaseContext), + (testAGP), (main): + * src/xf86dri.c: (uniDRIDestroyContext), (uniDRICreateDrawable), + (uniDRIDestroyDrawable), (uniDRIGetDrawableInfo): + * src/xf86dri.h: + * src/xf86dristr.h: + + Initial import of the ttmtest utility. + \ No newline at end of file diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/configure.ac /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/configure.ac --- libdrm-2.3.0.16/tests/ttmtest/configure.ac 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/configure.ac 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,33 @@ +AC_INIT +AC_PROG_CC +AC_PATH_X +if test "x$no_x" != "xyes"; then + savecpp="$CPPFLAGS" + CPPFLAGS="$CPPFLAGS -I$x_includes" + AC_CHECK_HEADER($x_includes/X11/Xlib.h,,\ + [AC_MSG_ERROR(Could not find X installation.)]) + CPPFLAGS="$savecpp" + MDRIINC="-I$x_includes" + LIBS="-L$x_libraries $LIBS" +else + AC_MSG_ERROR(Could not find X installation. Aborting.) +fi +AC_ARG_WITH(libdrm, + AC_HELP_STRING([--with-libdrm=DIR], + [Installation prefix of libdrm [[default=/usr]]]), + [libdrmpref="$withval"], + [libdrmpref="/usr"]) +savecpp="$CPPFLAGS" +MDRIINC="-I$libdrmpref/include -I$libdrmpref/include/drm -I$x_includes" +CPPFLAGS="$CPPFLAGS $MDRIINC" +AC_CHECK_HEADER(xf86drm.h,,\ + [AC_MSG_ERROR(Could not find libdrm installation. Use --with-libdrm=)]) +AC_CHECK_HEADER(drm.h,,\ + [AC_MSG_ERROR(Could not find libdrm installation. Use --with-libdrm=)]) +CPPFLAGS="$savecpp" +LIBS="-L$libdrmpref/lib64 -L$libdrmpref/lib $LIBS" +AC_SUBST(MDRIINC) +AC_SYS_LARGEFILE +AM_INIT_AUTOMAKE(minidri,0.1.0) +AM_CONFIG_HEADER(config.h) +AC_OUTPUT([Makefile src/Makefile]) diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/Makefile.am /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/Makefile.am --- libdrm-2.3.0.16/tests/ttmtest/Makefile.am 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/Makefile.am 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1 @@ +SUBDIRS = src diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/reconf /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/reconf --- libdrm-2.3.0.16/tests/ttmtest/reconf 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/reconf 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,2 @@ +#!/bin/sh +autoreconf -v --install || exit 1 \ No newline at end of file diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/src/Makefile.am /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/src/Makefile.am --- libdrm-2.3.0.16/tests/ttmtest/src/Makefile.am 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/src/Makefile.am 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,8 @@ +INCLUDES = @MDRIINC@ +bin_PROGRAMS = ttmtest +ttmtest_SOURCES = \ + ttmtest.c \ + xf86dri.c \ + xf86dri.h \ + xf86dristr.h +ttmtest_LDADD = -ldrm -lXext -lX11 diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/src/ttmtest.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/src/ttmtest.c --- libdrm-2.3.0.16/tests/ttmtest/src/ttmtest.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/src/ttmtest.c 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,430 @@ +/************************************************************************** + * + * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, TX., USA + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * + **************************************************************************/ +/* + * Authors: Thomas Hellström + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include +#include +#include +#include +#include "xf86dri.h" +#include "xf86drm.h" +#include "stdio.h" +#include "sys/types.h" +#include +#include +#include +#include +#include "sys/mman.h" + +typedef struct +{ + enum + { + haveNothing, + haveDisplay, + haveConnection, + haveDriverName, + haveDeviceInfo, + haveDRM, + haveContext + } + state; + + Display *display; + int screen; + drm_handle_t sAreaOffset; + char *curBusID; + char *driverName; + int drmFD; + XVisualInfo visualInfo; + XID id; + drm_context_t hwContext; + void *driPriv; + int driPrivSize; + int fbSize; + int fbOrigin; + int fbStride; + drm_handle_t fbHandle; + int ddxDriverMajor; + int ddxDriverMinor; + int ddxDriverPatch; +} TinyDRIContext; + +#ifndef __x86_64__ +static unsigned +fastrdtsc(void) +{ + unsigned eax; + __asm__ volatile ("\t" + "pushl %%ebx\n\t" + "cpuid\n\t" ".byte 0x0f, 0x31\n\t" "popl %%ebx\n":"=a" (eax) + :"0"(0) + :"ecx", "edx", "cc"); + + return eax; +} +#else +static unsigned +fastrdtsc(void) +{ + unsigned eax; + __asm__ volatile ("\t" "cpuid\n\t" ".byte 0x0f, 0x31\n\t":"=a" (eax) + :"0"(0) + :"ecx", "edx", "ebx", "cc"); + + return eax; +} +#endif + +void +bmError(int val, const char *file, const char *function, int line) +{ + fprintf(stderr, "Fatal video memory manager error \"%s\".\n" + "Check kernel logs or set the LIBGL_DEBUG\n" + "environment variable to \"verbose\" for more info.\n" + "Detected in file %s, line %d, function %s.\n", + strerror(-val), file, line, function); + abort(); +} + +#define BM_CKFATAL(val) \ + do{ \ + int tstVal = (val); \ + if (tstVal) \ + bmError(tstVal, __FILE__, __FUNCTION__, __LINE__); \ + } while(0); + +static unsigned +time_diff(unsigned t, unsigned t2) +{ + return ((t < t2) ? t2 - t : 0xFFFFFFFFU - (t - t2 - 1)); +} + +static int +releaseContext(TinyDRIContext * ctx) +{ + switch (ctx->state) { + case haveContext: + uniDRIDestroyContext(ctx->display, ctx->screen, ctx->id); + case haveDRM: + drmClose(ctx->drmFD); + case haveDeviceInfo: + XFree(ctx->driPriv); + case haveDriverName: + XFree(ctx->driverName); + case haveConnection: + XFree(ctx->curBusID); + uniDRICloseConnection(ctx->display, ctx->screen); + case haveDisplay: + XCloseDisplay(ctx->display); + default: + break; + } + return -1; +} + +static void +readBuf(void *buf, unsigned long size) +{ + volatile unsigned *buf32 = (unsigned *)buf; + unsigned *end = (unsigned *)buf32 + size / sizeof(*buf32); + + while (buf32 < end) { + (void)*buf32++; + } +} + +static int +benchmarkBuffer(TinyDRIContext * ctx, unsigned long size, + unsigned long *ticks) +{ + unsigned long curTime, oldTime; + int ret; + drmBO buf; + void *virtual; + + /* + * Test system memory objects. + */ + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOCreate(ctx->drmFD, size, 0, NULL, + DRM_BO_FLAG_READ | + DRM_BO_FLAG_WRITE | + DRM_BO_FLAG_MEM_LOCAL, 0, &buf)); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOMap(ctx->drmFD, &buf, + DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0, &virtual)); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + memset(virtual, 0xF0, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + memset(virtual, 0x0F, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + readBuf(virtual, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOUnmap(ctx->drmFD, &buf)); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + /* + * Test TT bound buffer objects. + */ + + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOSetStatus(ctx->drmFD, &buf, + DRM_BO_FLAG_MEM_TT, + DRM_BO_MASK_MEM, + 0,0,0)); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOMap(ctx->drmFD, &buf, + DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0, &virtual)); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + memset(virtual, 0xF0, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + memset(virtual, 0x0F, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + readBuf(virtual, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + BM_CKFATAL(drmBOUnmap(ctx->drmFD, &buf)); + + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOSetStatus(ctx->drmFD, &buf, + DRM_BO_FLAG_MEM_LOCAL, DRM_BO_MASK_MEM, 0, 0,0)); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + /* + * Test cached buffers objects. + */ + + oldTime = fastrdtsc(); + ret = drmBOSetStatus(ctx->drmFD, &buf, + DRM_BO_FLAG_MEM_TT | + DRM_BO_FLAG_CACHED | + DRM_BO_FLAG_FORCE_CACHING, + DRM_BO_MASK_MEMTYPE | + DRM_BO_FLAG_FORCE_CACHING, + 0, 0, 0); + curTime = fastrdtsc(); + + if (ret) { + printf("Couldn't bind cached. Probably no support\n"); + BM_CKFATAL(drmBOUnreference(ctx->drmFD, &buf)); + return 1; + } + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + BM_CKFATAL(drmBOMap(ctx->drmFD, &buf, + DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0, &virtual)); + + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + memset(virtual, 0xF0, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + memset(virtual, 0x0F, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + oldTime = fastrdtsc(); + readBuf(virtual, buf.size); + curTime = fastrdtsc(); + *ticks++ = time_diff(oldTime, curTime); + + BM_CKFATAL(drmBOUnmap(ctx->drmFD, &buf)); + BM_CKFATAL(drmBOUnreference(ctx->drmFD, &buf)); + + return 0; +} + +static void +testAGP(TinyDRIContext * ctx) +{ + unsigned long ticks[128], *pTicks; + unsigned long size = 8 * 1024; + int ret; + + ret = benchmarkBuffer(ctx, size, ticks); + if (ret < 0) { + fprintf(stderr, "Buffer error %s\n", strerror(-ret)); + return; + } + pTicks = ticks; + + printf("Buffer size %d bytes\n", size); + printf("System memory timings ********************************\n"); + printf("Creation took %12lu ticks\n", *pTicks++); + printf("Mapping took %12lu ticks\n", *pTicks++); + printf("Writing took %12lu ticks\n", *pTicks++); + printf("Writing Again took %12lu ticks\n", *pTicks++); + printf("Reading took %12lu ticks\n", *pTicks++); + printf("Unmapping took %12lu ticks\n", *pTicks++); + + printf("\nTT Memory timings ************************************\n"); + printf("Moving to TT took %12lu ticks\n", *pTicks++); + printf("Mapping in TT took %12lu ticks\n", *pTicks++); + printf("Writing to TT took %12lu ticks\n", *pTicks++); + printf("Writing again to TT took %12lu ticks\n", *pTicks++); + printf("Reading from TT took %12lu ticks\n", *pTicks++); + printf("Moving to system took %12lu ticks\n", *pTicks++); + + if (ret == 1) + return; + + printf("\nCached TT Memory timings *****************************\n"); + printf("Moving to CTT took %12lu ticks\n", *pTicks++); + printf("Mapping in CTT took %12lu ticks\n", *pTicks++); + printf("Writing to CTT took %12lu ticks\n", *pTicks++); + printf("Re-writing to CTT took %12lu ticks\n", *pTicks++); + printf("Reading from CTT took %12lu ticks\n", *pTicks++); + printf("\n\n"); +} + +int +main() +{ + int ret, screen, isCapable; + char *displayName = ":0"; + TinyDRIContext ctx; + unsigned magic; + + ctx.screen = 0; + ctx.state = haveNothing; + ctx.display = XOpenDisplay(displayName); + if (!ctx.display) { + fprintf(stderr, "Could not open display\n"); + return releaseContext(&ctx); + } + ctx.state = haveDisplay; + + ret = + uniDRIQueryDirectRenderingCapable(ctx.display, ctx.screen, + &isCapable); + if (!ret || !isCapable) { + fprintf(stderr, "No DRI on this display:sceen\n"); + return releaseContext(&ctx); + } + + if (!uniDRIOpenConnection(ctx.display, ctx.screen, &ctx.sAreaOffset, + &ctx.curBusID)) { + fprintf(stderr, "Could not open DRI connection.\n"); + return releaseContext(&ctx); + } + ctx.state = haveConnection; + + if (!uniDRIGetClientDriverName(ctx.display, ctx.screen, + &ctx.ddxDriverMajor, &ctx.ddxDriverMinor, + &ctx.ddxDriverPatch, &ctx.driverName)) { + fprintf(stderr, "Could not get DRI driver name.\n"); + return releaseContext(&ctx); + } + ctx.state = haveDriverName; + + if (!uniDRIGetDeviceInfo(ctx.display, ctx.screen, + &ctx.fbHandle, &ctx.fbOrigin, &ctx.fbSize, + &ctx.fbStride, &ctx.driPrivSize, &ctx.driPriv)) { + fprintf(stderr, "Could not get DRI device info.\n"); + return releaseContext(&ctx); + } + ctx.state = haveDriverName; + + if ((ctx.drmFD = drmOpen(NULL, ctx.curBusID)) < 0) { + perror("DRM Device could not be opened"); + return releaseContext(&ctx); + } + ctx.state = haveDRM; + + drmGetMagic(ctx.drmFD, &magic); + if (!uniDRIAuthConnection(ctx.display, ctx.screen, magic)) { + fprintf(stderr, "Could not get X server to authenticate us.\n"); + return releaseContext(&ctx); + } + + ret = XMatchVisualInfo(ctx.display, ctx.screen, 24, TrueColor, + &ctx.visualInfo); + if (!ret) { + ret = XMatchVisualInfo(ctx.display, ctx.screen, 16, TrueColor, + &ctx.visualInfo); + if (!ret) { + fprintf(stderr, "Could not find a matching visual.\n"); + return releaseContext(&ctx); + } + } + + if (!uniDRICreateContext(ctx.display, ctx.screen, ctx.visualInfo.visual, + &ctx.id, &ctx.hwContext)) { + fprintf(stderr, "Could not create DRI context.\n"); + return releaseContext(&ctx); + } + ctx.state = haveContext; + + testAGP(&ctx); + + releaseContext(&ctx); + printf("Terminating normally\n"); + return 0; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/src/xf86dri.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/src/xf86dri.c --- libdrm-2.3.0.16/tests/ttmtest/src/xf86dri.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/src/xf86dri.c 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,604 @@ +/* $XFree86: xc/lib/GL/dri/XF86dri.c,v 1.13 2002/10/30 12:51:25 alanh Exp $ */ +/************************************************************************** + +Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. +Copyright 2000 VA Linux Systems, Inc. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sub license, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR +ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin + * Jens Owen + * Rickard E. (Rik) Faith + * + */ + +/* THIS IS NOT AN X CONSORTIUM STANDARD */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#define NEED_REPLIES +#include +#include +#include +#include +#include "xf86dristr.h" + +static XExtensionInfo _xf86dri_info_data; +static XExtensionInfo *xf86dri_info = &_xf86dri_info_data; +static char xf86dri_extension_name[] = XF86DRINAME; + +#define uniDRICheckExtension(dpy,i,val) \ + XextCheckExtension (dpy, i, xf86dri_extension_name, val) + +/***************************************************************************** + * * + * private utility routines * + * * + *****************************************************************************/ + +static int close_display(Display * dpy, XExtCodes * extCodes); +static /* const */ XExtensionHooks xf86dri_extension_hooks = { + NULL, /* create_gc */ + NULL, /* copy_gc */ + NULL, /* flush_gc */ + NULL, /* free_gc */ + NULL, /* create_font */ + NULL, /* free_font */ + close_display, /* close_display */ + NULL, /* wire_to_event */ + NULL, /* event_to_wire */ + NULL, /* error */ + NULL, /* error_string */ +}; + +static +XEXT_GENERATE_FIND_DISPLAY(find_display, xf86dri_info, + xf86dri_extension_name, &xf86dri_extension_hooks, 0, NULL) + + static XEXT_GENERATE_CLOSE_DISPLAY(close_display, xf86dri_info) + +/***************************************************************************** + * * + * public XFree86-DRI Extension routines * + * * + *****************************************************************************/ +#if 0 +#include +#define TRACE(msg) fprintf(stderr,"uniDRI%s\n", msg); +#else +#define TRACE(msg) +#endif + Bool uniDRIQueryExtension(dpy, event_basep, error_basep) + Display *dpy; + int *event_basep, *error_basep; +{ + XExtDisplayInfo *info = find_display(dpy); + + TRACE("QueryExtension..."); + if (XextHasExtension(info)) { + *event_basep = info->codes->first_event; + *error_basep = info->codes->first_error; + TRACE("QueryExtension... return True"); + return True; + } else { + TRACE("QueryExtension... return False"); + return False; + } +} + +Bool +uniDRIQueryVersion(dpy, majorVersion, minorVersion, patchVersion) + Display *dpy; + int *majorVersion; + int *minorVersion; + int *patchVersion; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIQueryVersionReply rep; + xXF86DRIQueryVersionReq *req; + + TRACE("QueryVersion..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIQueryVersion, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIQueryVersion; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryVersion... return False"); + return False; + } + *majorVersion = rep.majorVersion; + *minorVersion = rep.minorVersion; + *patchVersion = rep.patchVersion; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryVersion... return True"); + return True; +} + +Bool +uniDRIQueryDirectRenderingCapable(dpy, screen, isCapable) + Display *dpy; + int screen; + Bool *isCapable; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIQueryDirectRenderingCapableReply rep; + xXF86DRIQueryDirectRenderingCapableReq *req; + + TRACE("QueryDirectRenderingCapable..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIQueryDirectRenderingCapable, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIQueryDirectRenderingCapable; + req->screen = screen; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryDirectRenderingCapable... return False"); + return False; + } + *isCapable = rep.isCapable; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryDirectRenderingCapable... return True"); + return True; +} + +Bool +uniDRIOpenConnection(dpy, screen, hSAREA, busIdString) + Display *dpy; + int screen; + drm_handle_t *hSAREA; + char **busIdString; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIOpenConnectionReply rep; + xXF86DRIOpenConnectionReq *req; + + TRACE("OpenConnection..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIOpenConnection, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIOpenConnection; + req->screen = screen; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("OpenConnection... return False"); + return False; + } + + *hSAREA = rep.hSAREALow; +#ifdef LONG64 + if (sizeof(drm_handle_t) == 8) { + *hSAREA |= ((unsigned long)rep.hSAREAHigh) << 32; + } +#endif + if (rep.length) { + if (!(*busIdString = (char *)Xcalloc(rep.busIdStringLength + 1, 1))) { + _XEatData(dpy, ((rep.busIdStringLength + 3) & ~3)); + UnlockDisplay(dpy); + SyncHandle(); + TRACE("OpenConnection... return False"); + return False; + } + _XReadPad(dpy, *busIdString, rep.busIdStringLength); + } else { + *busIdString = NULL; + } + UnlockDisplay(dpy); + SyncHandle(); + TRACE("OpenConnection... return True"); + return True; +} + +Bool +uniDRIAuthConnection(dpy, screen, magic) + Display *dpy; + int screen; + drm_magic_t magic; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIAuthConnectionReq *req; + xXF86DRIAuthConnectionReply rep; + + TRACE("AuthConnection..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIAuthConnection, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIAuthConnection; + req->screen = screen; + req->magic = magic; + rep.authenticated = 0; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse) || !rep.authenticated) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("AuthConnection... return False"); + return False; + } + UnlockDisplay(dpy); + SyncHandle(); + TRACE("AuthConnection... return True"); + return True; +} + +Bool +uniDRICloseConnection(dpy, screen) + Display *dpy; + int screen; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRICloseConnectionReq *req; + + TRACE("CloseConnection..."); + + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRICloseConnection, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRICloseConnection; + req->screen = screen; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("CloseConnection... return True"); + return True; +} + +Bool +uniDRIGetClientDriverName(dpy, screen, ddxDriverMajorVersion, + ddxDriverMinorVersion, ddxDriverPatchVersion, clientDriverName) + Display *dpy; + int screen; + int *ddxDriverMajorVersion; + int *ddxDriverMinorVersion; + int *ddxDriverPatchVersion; + char **clientDriverName; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIGetClientDriverNameReply rep; + xXF86DRIGetClientDriverNameReq *req; + + TRACE("GetClientDriverName..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIGetClientDriverName, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIGetClientDriverName; + req->screen = screen; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetClientDriverName... return False"); + return False; + } + + *ddxDriverMajorVersion = rep.ddxDriverMajorVersion; + *ddxDriverMinorVersion = rep.ddxDriverMinorVersion; + *ddxDriverPatchVersion = rep.ddxDriverPatchVersion; + + if (rep.length) { + if (!(*clientDriverName = + (char *)Xcalloc(rep.clientDriverNameLength + 1, 1))) { + _XEatData(dpy, ((rep.clientDriverNameLength + 3) & ~3)); + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetClientDriverName... return False"); + return False; + } + _XReadPad(dpy, *clientDriverName, rep.clientDriverNameLength); + } else { + *clientDriverName = NULL; + } + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetClientDriverName... return True"); + return True; +} + +Bool +uniDRICreateContextWithConfig(dpy, screen, configID, context, hHWContext) + Display *dpy; + int screen; + int configID; + XID *context; + drm_context_t *hHWContext; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRICreateContextReply rep; + xXF86DRICreateContextReq *req; + + TRACE("CreateContext..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRICreateContext, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRICreateContext; + req->visual = configID; + req->screen = screen; + *context = XAllocID(dpy); + req->context = *context; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("CreateContext... return False"); + return False; + } + *hHWContext = rep.hHWContext; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("CreateContext... return True"); + return True; +} + +Bool +uniDRICreateContext(dpy, screen, visual, context, hHWContext) + Display *dpy; + int screen; + Visual *visual; + XID *context; + drm_context_t *hHWContext; +{ + return uniDRICreateContextWithConfig(dpy, screen, visual->visualid, + context, hHWContext); +} + +Bool +uniDRIDestroyContext(Display * ndpy, int screen, XID context) +{ + Display *const dpy = (Display *) ndpy; + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIDestroyContextReq *req; + + TRACE("DestroyContext..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIDestroyContext, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIDestroyContext; + req->screen = screen; + req->context = context; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("DestroyContext... return True"); + return True; +} + +Bool +uniDRICreateDrawable(Display * ndpy, int screen, + Drawable drawable, drm_drawable_t * hHWDrawable) +{ + Display *const dpy = (Display *) ndpy; + XExtDisplayInfo *info = find_display(dpy); + xXF86DRICreateDrawableReply rep; + xXF86DRICreateDrawableReq *req; + + TRACE("CreateDrawable..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRICreateDrawable, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRICreateDrawable; + req->screen = screen; + req->drawable = drawable; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("CreateDrawable... return False"); + return False; + } + *hHWDrawable = rep.hHWDrawable; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("CreateDrawable... return True"); + return True; +} + +Bool +uniDRIDestroyDrawable(Display * ndpy, int screen, Drawable drawable) +{ + Display *const dpy = (Display *) ndpy; + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIDestroyDrawableReq *req; + + TRACE("DestroyDrawable..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIDestroyDrawable, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIDestroyDrawable; + req->screen = screen; + req->drawable = drawable; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("DestroyDrawable... return True"); + return True; +} + +Bool +uniDRIGetDrawableInfo(Display * dpy, int screen, Drawable drawable, + unsigned int *index, unsigned int *stamp, + int *X, int *Y, int *W, int *H, + int *numClipRects, drm_clip_rect_t ** pClipRects, + int *backX, int *backY, + int *numBackClipRects, drm_clip_rect_t ** pBackClipRects) +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIGetDrawableInfoReply rep; + xXF86DRIGetDrawableInfoReq *req; + int total_rects; + + TRACE("GetDrawableInfo..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIGetDrawableInfo, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIGetDrawableInfo; + req->screen = screen; + req->drawable = drawable; + + if (!_XReply(dpy, (xReply *) & rep, 1, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetDrawableInfo... return False"); + return False; + } + *index = rep.drawableTableIndex; + *stamp = rep.drawableTableStamp; + *X = (int)rep.drawableX; + *Y = (int)rep.drawableY; + *W = (int)rep.drawableWidth; + *H = (int)rep.drawableHeight; + *numClipRects = rep.numClipRects; + total_rects = *numClipRects; + + *backX = rep.backX; + *backY = rep.backY; + *numBackClipRects = rep.numBackClipRects; + total_rects += *numBackClipRects; + +#if 0 + /* Because of the fix in Xserver/GL/dri/xf86dri.c, this check breaks + * backwards compatibility (Because of the >> 2 shift) but the fix + * enables multi-threaded apps to work. + */ + if (rep.length != ((((SIZEOF(xXF86DRIGetDrawableInfoReply) - + SIZEOF(xGenericReply) + + total_rects * sizeof(drm_clip_rect_t)) + + 3) & ~3) >> 2)) { + _XEatData(dpy, rep.length); + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetDrawableInfo... return False"); + return False; + } +#endif + + if (*numClipRects) { + int len = sizeof(drm_clip_rect_t) * (*numClipRects); + + *pClipRects = (drm_clip_rect_t *) Xcalloc(len, 1); + if (*pClipRects) + _XRead(dpy, (char *)*pClipRects, len); + } else { + *pClipRects = NULL; + } + + if (*numBackClipRects) { + int len = sizeof(drm_clip_rect_t) * (*numBackClipRects); + + *pBackClipRects = (drm_clip_rect_t *) Xcalloc(len, 1); + if (*pBackClipRects) + _XRead(dpy, (char *)*pBackClipRects, len); + } else { + *pBackClipRects = NULL; + } + + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetDrawableInfo... return True"); + return True; +} + +Bool +uniDRIGetDeviceInfo(dpy, screen, hFrameBuffer, + fbOrigin, fbSize, fbStride, devPrivateSize, pDevPrivate) + Display *dpy; + int screen; + drm_handle_t *hFrameBuffer; + int *fbOrigin; + int *fbSize; + int *fbStride; + int *devPrivateSize; + void **pDevPrivate; +{ + XExtDisplayInfo *info = find_display(dpy); + xXF86DRIGetDeviceInfoReply rep; + xXF86DRIGetDeviceInfoReq *req; + + TRACE("GetDeviceInfo..."); + uniDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(XF86DRIGetDeviceInfo, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_XF86DRIGetDeviceInfo; + req->screen = screen; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetDeviceInfo... return False"); + return False; + } + + *hFrameBuffer = rep.hFrameBufferLow; +#ifdef LONG64 + if (sizeof(drm_handle_t) == 8) { + *hFrameBuffer |= ((unsigned long)rep.hFrameBufferHigh) << 32; + } +#endif + + *fbOrigin = rep.framebufferOrigin; + *fbSize = rep.framebufferSize; + *fbStride = rep.framebufferStride; + *devPrivateSize = rep.devPrivateSize; + + if (rep.length) { + if (!(*pDevPrivate = (void *)Xcalloc(rep.devPrivateSize, 1))) { + _XEatData(dpy, ((rep.devPrivateSize + 3) & ~3)); + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetDeviceInfo... return False"); + return False; + } + _XRead(dpy, (char *)*pDevPrivate, rep.devPrivateSize); + } else { + *pDevPrivate = NULL; + } + + UnlockDisplay(dpy); + SyncHandle(); + TRACE("GetDeviceInfo... return True"); + return True; +} diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/src/xf86dri.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/src/xf86dri.h --- libdrm-2.3.0.16/tests/ttmtest/src/xf86dri.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/src/xf86dri.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,116 @@ +/* $XFree86: xc/lib/GL/dri/xf86dri.h,v 1.8 2002/10/30 12:51:25 alanh Exp $ */ +/************************************************************************** + +Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. +Copyright 2000 VA Linux Systems, Inc. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sub license, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR +ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/** + * \file xf86dri.h + * Protocol numbers and function prototypes for DRI X protocol. + * + * \author Kevin E. Martin + * \author Jens Owen + * \author Rickard E. (Rik) Faith + */ + +#ifndef _XF86DRI_H_ +#define _XF86DRI_H_ + +#include +#include + +#define X_XF86DRIQueryVersion 0 +#define X_XF86DRIQueryDirectRenderingCapable 1 +#define X_XF86DRIOpenConnection 2 +#define X_XF86DRICloseConnection 3 +#define X_XF86DRIGetClientDriverName 4 +#define X_XF86DRICreateContext 5 +#define X_XF86DRIDestroyContext 6 +#define X_XF86DRICreateDrawable 7 +#define X_XF86DRIDestroyDrawable 8 +#define X_XF86DRIGetDrawableInfo 9 +#define X_XF86DRIGetDeviceInfo 10 +#define X_XF86DRIAuthConnection 11 +#define X_XF86DRIOpenFullScreen 12 /* Deprecated */ +#define X_XF86DRICloseFullScreen 13 /* Deprecated */ + +#define XF86DRINumberEvents 0 + +#define XF86DRIClientNotLocal 0 +#define XF86DRIOperationNotSupported 1 +#define XF86DRINumberErrors (XF86DRIOperationNotSupported + 1) + +#ifndef _XF86DRI_SERVER_ + +_XFUNCPROTOBEGIN + Bool uniDRIQueryExtension(Display * dpy, int *event_base, + int *error_base); + +Bool uniDRIQueryVersion(Display * dpy, int *majorVersion, int *minorVersion, + int *patchVersion); + +Bool uniDRIQueryDirectRenderingCapable(Display * dpy, int screen, + Bool * isCapable); + +Bool uniDRIOpenConnection(Display * dpy, int screen, drm_handle_t * hSAREA, + char **busIDString); + +Bool uniDRIAuthConnection(Display * dpy, int screen, drm_magic_t magic); + +Bool uniDRICloseConnection(Display * dpy, int screen); + +Bool uniDRIGetClientDriverName(Display * dpy, int screen, + int *ddxDriverMajorVersion, int *ddxDriverMinorVersion, + int *ddxDriverPatchVersion, char **clientDriverName); + +Bool uniDRICreateContext(Display * dpy, int screen, Visual * visual, + XID * ptr_to_returned_context_id, drm_context_t * hHWContext); + +Bool uniDRICreateContextWithConfig(Display * dpy, int screen, int configID, + XID * ptr_to_returned_context_id, drm_context_t * hHWContext); + +extern Bool uniDRIDestroyContext(Display * dpy, int screen, XID context_id); + +extern Bool uniDRICreateDrawable(Display * dpy, int screen, + Drawable drawable, drm_drawable_t * hHWDrawable); + +extern Bool uniDRIDestroyDrawable(Display * dpy, int screen, + Drawable drawable); + +Bool uniDRIGetDrawableInfo(Display * dpy, int screen, Drawable drawable, + unsigned int *index, unsigned int *stamp, + int *X, int *Y, int *W, int *H, + int *numClipRects, drm_clip_rect_t ** pClipRects, + int *backX, int *backY, + int *numBackClipRects, drm_clip_rect_t ** pBackClipRects); + +Bool uniDRIGetDeviceInfo(Display * dpy, int screen, + drm_handle_t * hFrameBuffer, int *fbOrigin, int *fbSize, + int *fbStride, int *devPrivateSize, void **pDevPrivate); + +_XFUNCPROTOEND +#endif /* _XF86DRI_SERVER_ */ +#endif /* _XF86DRI_H_ */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/ttmtest/src/xf86dristr.h /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/ttmtest/src/xf86dristr.h --- libdrm-2.3.0.16/tests/ttmtest/src/xf86dristr.h 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/ttmtest/src/xf86dristr.h 2009-04-20 07:00:29.000000000 +0100 @@ -0,0 +1,390 @@ +/* $XFree86: xc/lib/GL/dri/xf86dristr.h,v 1.10 2002/10/30 12:51:25 alanh Exp $ */ +/************************************************************************** + +Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. +Copyright 2000 VA Linux Systems, Inc. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sub license, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR +ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin + * Jens Owen + * Rickard E. (Rik) Fiath + * + */ + +#ifndef _XF86DRISTR_H_ +#define _XF86DRISTR_H_ + +#include "xf86dri.h" + +#define XF86DRINAME "XFree86-DRI" + +/* The DRI version number. This was originally set to be the same of the + * XFree86 version number. However, this version is really indepedent of + * the XFree86 version. + * + * Version History: + * 4.0.0: Original + * 4.0.1: Patch to bump clipstamp when windows are destroyed, 28 May 02 + * 4.1.0: Add transition from single to multi in DRMInfo rec, 24 Jun 02 + */ +#define XF86DRI_MAJOR_VERSION 4 +#define XF86DRI_MINOR_VERSION 1 +#define XF86DRI_PATCH_VERSION 0 + +typedef struct _XF86DRIQueryVersion +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIQueryVersion */ + CARD16 length B16; +} xXF86DRIQueryVersionReq; + +#define sz_xXF86DRIQueryVersionReq 4 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD16 majorVersion B16; /* major version of DRI protocol */ + CARD16 minorVersion B16; /* minor version of DRI protocol */ + CARD32 patchVersion B32; /* patch version of DRI protocol */ + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xXF86DRIQueryVersionReply; + +#define sz_xXF86DRIQueryVersionReply 32 + +typedef struct _XF86DRIQueryDirectRenderingCapable +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* X_DRIQueryDirectRenderingCapable */ + CARD16 length B16; + CARD32 screen B32; +} xXF86DRIQueryDirectRenderingCapableReq; + +#define sz_xXF86DRIQueryDirectRenderingCapableReq 8 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + BOOL isCapable; + BOOL pad2; + BOOL pad3; + BOOL pad4; + CARD32 pad5 B32; + CARD32 pad6 B32; + CARD32 pad7 B32; + CARD32 pad8 B32; + CARD32 pad9 B32; +} xXF86DRIQueryDirectRenderingCapableReply; + +#define sz_xXF86DRIQueryDirectRenderingCapableReply 32 + +typedef struct _XF86DRIOpenConnection +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIOpenConnection */ + CARD16 length B16; + CARD32 screen B32; +} xXF86DRIOpenConnectionReq; + +#define sz_xXF86DRIOpenConnectionReq 8 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 hSAREALow B32; + CARD32 hSAREAHigh B32; + CARD32 busIdStringLength B32; + CARD32 pad6 B32; + CARD32 pad7 B32; + CARD32 pad8 B32; +} xXF86DRIOpenConnectionReply; + +#define sz_xXF86DRIOpenConnectionReply 32 + +typedef struct _XF86DRIAuthConnection +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRICloseConnection */ + CARD16 length B16; + CARD32 screen B32; + CARD32 magic B32; +} xXF86DRIAuthConnectionReq; + +#define sz_xXF86DRIAuthConnectionReq 12 + +typedef struct +{ + BYTE type; + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 authenticated B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xXF86DRIAuthConnectionReply; + +#define zx_xXF86DRIAuthConnectionReply 32 + +typedef struct _XF86DRICloseConnection +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRICloseConnection */ + CARD16 length B16; + CARD32 screen B32; +} xXF86DRICloseConnectionReq; + +#define sz_xXF86DRICloseConnectionReq 8 + +typedef struct _XF86DRIGetClientDriverName +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIGetClientDriverName */ + CARD16 length B16; + CARD32 screen B32; +} xXF86DRIGetClientDriverNameReq; + +#define sz_xXF86DRIGetClientDriverNameReq 8 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 ddxDriverMajorVersion B32; + CARD32 ddxDriverMinorVersion B32; + CARD32 ddxDriverPatchVersion B32; + CARD32 clientDriverNameLength B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xXF86DRIGetClientDriverNameReply; + +#define sz_xXF86DRIGetClientDriverNameReply 32 + +typedef struct _XF86DRICreateContext +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRICreateContext */ + CARD16 length B16; + CARD32 screen B32; + CARD32 visual B32; + CARD32 context B32; +} xXF86DRICreateContextReq; + +#define sz_xXF86DRICreateContextReq 16 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 hHWContext B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xXF86DRICreateContextReply; + +#define sz_xXF86DRICreateContextReply 32 + +typedef struct _XF86DRIDestroyContext +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIDestroyContext */ + CARD16 length B16; + CARD32 screen B32; + CARD32 context B32; +} xXF86DRIDestroyContextReq; + +#define sz_xXF86DRIDestroyContextReq 12 + +typedef struct _XF86DRICreateDrawable +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRICreateDrawable */ + CARD16 length B16; + CARD32 screen B32; + CARD32 drawable B32; +} xXF86DRICreateDrawableReq; + +#define sz_xXF86DRICreateDrawableReq 12 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 hHWDrawable B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xXF86DRICreateDrawableReply; + +#define sz_xXF86DRICreateDrawableReply 32 + +typedef struct _XF86DRIDestroyDrawable +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIDestroyDrawable */ + CARD16 length B16; + CARD32 screen B32; + CARD32 drawable B32; +} xXF86DRIDestroyDrawableReq; + +#define sz_xXF86DRIDestroyDrawableReq 12 + +typedef struct _XF86DRIGetDrawableInfo +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIGetDrawableInfo */ + CARD16 length B16; + CARD32 screen B32; + CARD32 drawable B32; +} xXF86DRIGetDrawableInfoReq; + +#define sz_xXF86DRIGetDrawableInfoReq 12 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 drawableTableIndex B32; + CARD32 drawableTableStamp B32; + INT16 drawableX B16; + INT16 drawableY B16; + INT16 drawableWidth B16; + INT16 drawableHeight B16; + CARD32 numClipRects B32; + INT16 backX B16; + INT16 backY B16; + CARD32 numBackClipRects B32; +} xXF86DRIGetDrawableInfoReply; + +#define sz_xXF86DRIGetDrawableInfoReply 36 + +typedef struct _XF86DRIGetDeviceInfo +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIGetDeviceInfo */ + CARD16 length B16; + CARD32 screen B32; +} xXF86DRIGetDeviceInfoReq; + +#define sz_xXF86DRIGetDeviceInfoReq 8 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 hFrameBufferLow B32; + CARD32 hFrameBufferHigh B32; + CARD32 framebufferOrigin B32; + CARD32 framebufferSize B32; + CARD32 framebufferStride B32; + CARD32 devPrivateSize B32; +} xXF86DRIGetDeviceInfoReply; + +#define sz_xXF86DRIGetDeviceInfoReply 32 + +typedef struct _XF86DRIOpenFullScreen +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIOpenFullScreen */ + CARD16 length B16; + CARD32 screen B32; + CARD32 drawable B32; +} xXF86DRIOpenFullScreenReq; + +#define sz_xXF86DRIOpenFullScreenReq 12 + +typedef struct +{ + BYTE type; + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 isFullScreen B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xXF86DRIOpenFullScreenReply; + +#define sz_xXF86DRIOpenFullScreenReply 32 + +typedef struct _XF86DRICloseFullScreen +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRICloseFullScreen */ + CARD16 length B16; + CARD32 screen B32; + CARD32 drawable B32; +} xXF86DRICloseFullScreenReq; + +#define sz_xXF86DRICloseFullScreenReq 12 + +typedef struct +{ + BYTE type; + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; + CARD32 pad7 B32; +} xXF86DRICloseFullScreenReply; + +#define sz_xXF86DRICloseFullScreenReply 32 + +#endif /* _XF86DRISTR_H_ */ diff -Nru /tmp/4QPwaNl0MA/libdrm-2.3.0.16/tests/updatedraw.c /tmp/5JEwQoyJ2h/libdrm-2.3.1/tests/updatedraw.c --- libdrm-2.3.0.16/tests/updatedraw.c 1970-01-01 01:00:00.000000000 +0100 +++ libdrm-2.3.1/tests/updatedraw.c 2008-07-01 08:50:43.000000000 +0100 @@ -0,0 +1,148 @@ +/* + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +#include "drmtest.h" + +static void +set_draw_cliprects_empty(int fd, int drawable) +{ + int ret; + struct drm_update_draw update; + + update.handle = drawable; + update.type = DRM_DRAWABLE_CLIPRECTS; + update.num = 0; + update.data = 0; + + ret = ioctl(fd, DRM_IOCTL_UPDATE_DRAW, &update); + assert(ret == 0); +} + +static void +set_draw_cliprects_empty_fail(int fd, int drawable) +{ + int ret; + struct drm_update_draw update; + + update.handle = drawable; + update.type = DRM_DRAWABLE_CLIPRECTS; + update.num = 0; + update.data = 0; + + ret = ioctl(fd, DRM_IOCTL_UPDATE_DRAW, &update); + assert(ret == -1 && errno == EINVAL); +} + +static void +set_draw_cliprects_2(int fd, int drawable) +{ + int ret; + struct drm_update_draw update; + drm_clip_rect_t rects[2]; + + rects[0].x1 = 0; + rects[0].y1 = 0; + rects[0].x2 = 10; + rects[0].y2 = 10; + + rects[1].x1 = 10; + rects[1].y1 = 10; + rects[1].x2 = 20; + rects[1].y2 = 20; + + update.handle = drawable; + update.type = DRM_DRAWABLE_CLIPRECTS; + update.num = 2; + update.data = (unsigned long long)(uintptr_t)&rects; + + ret = ioctl(fd, DRM_IOCTL_UPDATE_DRAW, &update); + assert(ret == 0); +} + +static int add_drawable(int fd) +{ + drm_draw_t drawarg; + int ret; + + /* Create a drawable. + * IOCTL_ADD_DRAW is RDWR, though it should really just be RD + */ + drawarg.handle = 0; + ret = ioctl(fd, DRM_IOCTL_ADD_DRAW, &drawarg); + assert(ret == 0); + return drawarg.handle; +} + +static int rm_drawable(int fd, int drawable, int fail) +{ + drm_draw_t drawarg; + int ret; + + /* Create a drawable. + * IOCTL_ADD_DRAW is RDWR, though it should really just be RD + */ + drawarg.handle = drawable; + ret = ioctl(fd, DRM_IOCTL_RM_DRAW, &drawarg); + if (!fail) + assert(ret == 0); + else + assert(ret == -1 && errno == EINVAL); + + return drawarg.handle; +} + +/** + * Tests drawable management: adding, removing, and updating the cliprects of + * drawables. + */ +int main(int argc, char **argv) +{ + int fd, ret, d1, d2; + + fd = drm_open_any_master(); + + d1 = add_drawable(fd); + d2 = add_drawable(fd); + /* Do a series of cliprect updates */ + set_draw_cliprects_empty(fd, d1); + set_draw_cliprects_empty(fd, d2); + set_draw_cliprects_2(fd, d1); + set_draw_cliprects_empty(fd, d1); + + /* Remove our drawables */ + rm_drawable(fd, d1, 0); + rm_drawable(fd, d2, 0); + + /* Check that removing an unknown drawable returns error */ + rm_drawable(fd, 0x7fffffff, 1); + + /* Attempt to set cliprects on a nonexistent drawable */ + set_draw_cliprects_empty_fail(fd, d1); + + close(fd); + return 0; +}